net: mdio: Handle bus level GPIO Reset
Some platforms have bus level Reset controlled
by a GPIO line. If available then handle bus reset
via GPIO.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
diff --git a/include/phy.h b/include/phy.h
index e02cbdb..ae23814 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -9,6 +9,7 @@
#ifndef _PHY_H
#define _PHY_H
+#include <asm-generic/gpio.h>
#include <log.h>
#include <phy_interface.h>
#include <dm/ofnode.h>
@@ -76,6 +77,12 @@
int (*reset)(struct mii_dev *bus);
struct phy_device *phymap[PHY_MAX_ADDR];
u32 phy_mask;
+ /** @reset_delay_us: Bus GPIO reset pulse width in microseconds */
+ int reset_delay_us;
+ /** @reset_post_delay_us: Bus GPIO reset deassert delay in microseconds */
+ int reset_post_delay_us;
+ /** @reset_gpiod: Bus Reset GPIO descriptor pointer */
+ struct gpio_desc reset_gpiod;
};
/* struct phy_driver: a structure which defines PHY behavior