| commit | ac086b58eb48e5c2f324afabb322ab4b02e89be3 | [log] [tgz] |
|---|---|---|
| author | Michal Simek <michal.simek@amd.com> | Thu Jan 04 11:28:35 2024 +0100 |
| committer | Michal Simek <michal.simek@amd.com> | Wed Jan 10 09:17:45 2024 +0100 |
| tree | 3e0e24085d7a62db13fb5cc429fddc20096773f1 | |
| parent | 6f665997adb39cd5e5e9fd09565303309024e541 [diff] |
arm64: zynqmp: Match dwc3 interrupts description with values Correct IRQ values don't match IRQ line description. There is one more IRQ (hiber) but it is not described in DT binding spec that's why value is not described. Just for completeness dwc3_0 has hiber IRQ at 75 and dwc3_1 at 76. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/578d758ce2af7e307e38ac8b7fa28ba9efba16d4.1704364111.git.michal.simek@amd.com