global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/doc/README.arm-relocation b/doc/README.arm-relocation
index 6bb4e17..69882a7 100644
--- a/doc/README.arm-relocation
+++ b/doc/README.arm-relocation
@@ -53,8 +53,8 @@
d) this initialize CPU, RAM, ... and copy itself to RAM
(this bin must fit in one page, so board_init_f()
don;t fit in it ... )
-e) there it copy u-boot to CONFIG_SYS_NAND_U_BOOT_DST and
- starts this image @ CONFIG_SYS_NAND_U_BOOT_START
+e) there it copy u-boot to CFG_SYS_NAND_U_BOOT_DST and
+ starts this image @ CFG_SYS_NAND_U_BOOT_START
f) u-boot code steps through board_init_f() and calculates
the relocation address and copy itself to it
@@ -86,8 +86,8 @@
- The First page contains u-boot code from drivers/mtd/nand/raw/mxc_nand_spl.c
which inits the dram, cpu registers, reloacte itself to CONFIG_SPL_TEXT_BASE and loads
- the "real" u-boot to CONFIG_SYS_NAND_U_BOOT_DST and starts execution
- @CONFIG_SYS_NAND_U_BOOT_START
+ the "real" u-boot to CFG_SYS_NAND_U_BOOT_DST and starts execution
+ @CFG_SYS_NAND_U_BOOT_START
- This u-boot does no RAM init, nor CPU register setup. Just look
where it has to copy and relocate itself to this address. If
diff --git a/doc/README.omap3 b/doc/README.omap3
index 208714a..3a1ac81 100644
--- a/doc/README.omap3
+++ b/doc/README.omap3
@@ -146,11 +146,11 @@
When you require the SPL to read with BCH8 there are two more configs to
change:
- * CONFIG_SYS_NAND_ECCPOS (must be the same as .eccpos in
+ * CFG_SYS_NAND_ECCPOS (must be the same as .eccpos in
GPMC_NAND_HW_BCH8_ECC_LAYOUT defined in
arch/arm/include/asm/arch-omap3/omap_gpmc.h)
- * CONFIG_SYS_NAND_ECCSIZE must be 512
- * CONFIG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
+ * CFG_SYS_NAND_ECCSIZE must be 512
+ * CFG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
Acknowledgements
================
diff --git a/doc/board/ti/am335x_evm.rst b/doc/board/ti/am335x_evm.rst
index a90f32d..0b230cf 100644
--- a/doc/board/ti/am335x_evm.rst
+++ b/doc/board/ti/am335x_evm.rst
@@ -54,7 +54,7 @@
CONFIG_SYS_NAND_PAGE_SIZE number of main bytes in NAND page
CONFIG_SYS_NAND_OOBSIZE number of OOB bytes in NAND page
CONFIG_SYS_NAND_BLOCK_SIZE number of bytes in NAND erase-block
- CONFIG_SYS_NAND_ECCPOS ECC map for NAND page
+ CFG_SYS_NAND_ECCPOS ECC map for NAND page
CONFIG_NAND_OMAP_ECCSCHEME (refer doc/README.nand)
Step-2: Flashing NAND via MMC/SD