x86: Allow a hardcoded TSC frequency provided by Kconfig
By default U-Boot automatically calibrates TSC running frequency via
MSR and PIT. The calibration may not work on every x86 processor, so
a new Kconfig option CONFIG_TSC_CALIBRATION_BYPASS is introduced to
allow bypassing the calibration and assign a hardcoded TSC frequency
CONFIG_TSC_FREQ_IN_MHZ.
Normally the bypass should be turned on in a simulation environment
like qemu.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e992e64..ffcb4cb 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -313,6 +313,26 @@
endmenu
+config TSC_CALIBRATION_BYPASS
+ bool "Bypass Time-Stamp Counter (TSC) calibration"
+ default n
+ help
+ By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
+ running frequency via Model-Specific Register (MSR) and Programmable
+ Interval Timer (PIT). If the calibration does not work on your board,
+ select this option and provide a hardcoded TSC running frequency with
+ CONFIG_TSC_FREQ_IN_MHZ below.
+
+ Normally this option should be turned on in a simulation environment
+ like qemu.
+
+config TSC_FREQ_IN_MHZ
+ int "Time-Stamp Counter (TSC) running frequency in MHz"
+ depends on TSC_CALIBRATION_BYPASS
+ default 1000
+ help
+ The running frequency in MHz of Time-Stamp Counter (TSC).
+
source "arch/x86/cpu/ivybridge/Kconfig"
source "arch/x86/cpu/queensbay/Kconfig"