tree 4d4dd7e78d49b8bd1d32132f651893fb6e138302
parent 81526d57fb5da8f928dd2d61df4cae6415cfb139
author Suneel Garapati <sgarapati@marvell.com> 1571532505 -0700
committer Stefan Roese <sr@denx.de> 1598335276 +0200

ata: ahci: Add BAR index quirk for Cavium PCI SATA device

For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0
instead of BAR5.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>