commit b2483ada793ed931f83857b622359d5b34403a5f
author Jakov Petrina <jakov.petrina@sartura.hr> Fri Apr 24 11:24:08 2020 +0200
committer Stefan Roese <sr@denx.de> Mon May 04 07:04:04 2020 +0200
tree 24efe694bfe953d7e1edb48563b29506455eb3cb
parent 754f00be15db8c4df1919ff47cd90f174c6e4cd8

arm: dts: uDPU: switch default PHY speed to 3.125Gbit

This resolves issues with certain SFP modules.

Signed-off-by: Jakov Petrina <jakov.petrina@sartura.hr>
Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>

arch/arm/dts/armada-3720-uDPU.dts

diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts
index 683dac2..07c7b91 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -109,11 +109,11 @@
 &comphy {
 	phy0 {
 		phy-type = <PHY_TYPE_SGMII1>;
-		phy-speed = <PHY_SPEED_1_25G>;
+		phy-speed = <PHY_SPEED_3_125G>;
 	};
         phy1 {
                 phy-type = <PHY_TYPE_SGMII0>;
-                phy-speed = <PHY_SPEED_1_25G>;
+                phy-speed = <PHY_SPEED_3_125G>;
         };
 
         phy2 {
@@ -125,22 +125,16 @@
 &eth0 {
 	pinctrl-0 = <&pcie_pins>;
 	status = "okay";
-	phy-mode = "sgmii";
+	phy-mode = "2500base-x";
+	managed = "in-band-status";
 	phy = <&ethphy0>;
-	fixed-link {
-		speed = <1000>;
-		full-duplex;
-	};
 };
 
 &eth1 {
 	status = "okay";
-	phy-mode = "sgmii";
+	phy-mode = "2500base-x";
+	managed = "in-band-status";
 	phy = <&ethphy1>;
-	fixed-link {
-		speed = <1000>;
-		full-duplex;
-	};
 };
 
 &i2c0 {