commit b20b19eabcb719fada497d20fbec78b9ed1ebec4
author Michal Simek <michal.simek@xilinx.com> Wed Jul 18 13:27:24 2018 +0200
committer Michal Simek <michal.simek@xilinx.com> Tue Oct 16 14:58:45 2018 +0200
tree 5c79372be4b2ccad94cee1721ca8de0325a2c9fa
parent f707b5a7fef98a48ca9dee2fbd324c5c44f9b963

arm: zynq: Enable FIT fpga loading in SPL for zc706

Enable loading FPGA from FIT image in SPL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

configs/zynq_zc706_defconfig

diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index 6191900..bcbfa65 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -12,9 +12,12 @@
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_PRINT=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_FPGA_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_PROMPT="Zynq> "
@@ -78,3 +81,4 @@
 CONFIG_USB_FUNCTION_THOR=y
 CONFIG_WDT=y
 CONFIG_WDT_CDNS=y
+CONFIG_SPL_GZIP=y