commit b1fa0d09cc6bf934c4f91d9cd0e206c247f54ab9
author Michal Simek <michal.simek@amd.com> Wed May 17 10:22:48 2023 +0200
committer Michal Simek <michal.simek@amd.com> Mon Jun 12 13:24:31 2023 +0200
tree 6328fe05ccf639861736a8542d0ff3bb108cb88b
parent ba73d6edf8767f75fb57b596e0cbae91136e629f

mmc: zynq: Sync with upstream DT binding

Versal NET is not in production yet that's why no need to keep backward
compatible with previously used compatible string.

Link: https://lore.kernel.org/r/20230403102551.3763054-2-sai.krishna.potthuri@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0d355f4fbaf6a3521d41ee43f17dde2515ff7ab7.1684311766.git.michal.simek@amd.com

drivers/mmc/zynq_sdhci.c

diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index e44868a..e779251 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -873,7 +873,7 @@
 		if (ret)
 			return ret;
 	} else if (IS_ENABLED(CONFIG_ARCH_VERSAL_NET) &&
-		   device_is_compatible(dev, "xlnx,versal-net-5.1-emmc")) {
+		   device_is_compatible(dev, "xlnx,versal-net-emmc")) {
 		if (mmc->clock >= MIN_PHY_CLK_HZ)
 			if (iclk_phase == VERSAL_NET_EMMC_ICLK_PHASE_DDR52_DLY_CHAIN)
 				iclk_phase = VERSAL_NET_EMMC_ICLK_PHASE_DDR52_DLL;
@@ -948,7 +948,7 @@
 	}
 
 	if (IS_ENABLED(CONFIG_ARCH_VERSAL_NET) &&
-	    device_is_compatible(dev, "xlnx,versal-net-5.1-emmc")) {
+	    device_is_compatible(dev, "xlnx,versal-net-emmc")) {
 		for (i = 0; i <= MMC_TIMING_MMC_HS400; i++) {
 			clk_data->clk_phase_in[i] = versal_net_emmc_iclk_phases[i];
 			clk_data->clk_phase_out[i] = versal_net_emmc_oclk_phases[i];
@@ -1102,7 +1102,7 @@
 		}
 	}
 #endif
-	if (device_is_compatible(dev, "xlnx,versal-net-5.1-emmc"))
+	if (device_is_compatible(dev, "xlnx,versal-net-emmc"))
 		priv->internal_phy_reg = true;
 
 	ret = clk_get_by_index(dev, 0, &clk);
@@ -1136,7 +1136,7 @@
 		host->quirks |= SDHCI_QUIRK_NO_1_8_V;
 
 	if (CONFIG_IS_ENABLED(ARCH_VERSAL_NET) &&
-	    device_is_compatible(dev, "xlnx,versal-net-5.1-emmc"))
+	    device_is_compatible(dev, "xlnx,versal-net-emmc"))
 		host->quirks |= SDHCI_QUIRK_CAPS_BIT63_FOR_HS400;
 
 	plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ;
@@ -1219,7 +1219,7 @@
 
 static const struct udevice_id arasan_sdhci_ids[] = {
 	{ .compatible = "arasan,sdhci-8.9a" },
-	{ .compatible = "xlnx,versal-net-5.1-emmc" },
+	{ .compatible = "xlnx,versal-net-emmc" },
 	{ }
 };