mmc: s5p_sdhci: add the set_mmc_clk for cmu control
Samsung SoC use the cmu control to set clock.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 9378e36..b978236 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -21,6 +21,7 @@
#include <malloc.h>
#include <sdhci.h>
#include <asm/arch/mmc.h>
+#include <asm/arch/clk.h>
static char *S5P_NAME = "SAMSUNG SDHCI";
static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
@@ -87,6 +88,8 @@
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
host->set_control_reg = &s5p_sdhci_set_control_reg;
+ host->set_clock = set_mmc_clk;
+ host->index = index;
host->host_caps = MMC_MODE_HC;
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 3bb0ad0..2e3c408 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -279,6 +279,9 @@
}
div >>= 1;
+ if (host->set_clock)
+ host->set_clock(host->index, div);
+
clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
<< SDHCI_DIVIDER_HI_SHIFT;
diff --git a/include/configs/trats.h b/include/configs/trats.h
index f8da9c01..794b6fb 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -78,6 +78,7 @@
#define CONFIG_MMC
#define CONFIG_S5P_SDHCI
#define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
/* PWM */
#define CONFIG_PWM
diff --git a/include/sdhci.h b/include/sdhci.h
index d41287f..c0345ed 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -253,8 +253,10 @@
unsigned int clock;
struct mmc *mmc;
const struct sdhci_ops *ops;
+ int index;
void (*set_control_reg)(struct sdhci_host *host);
+ void (*set_clock)(int dev_index, unsigned int div);
uint voltages;
};