* Patch by Arun Dharankar, 4 Apr 2003:
  Add IDMA example code (tested on 8260 only)

* Add support for Purple Board (MIPS64 5Kc)

* Add support for MIPS64 5Kc CPUs

* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS

* Patch by Denis Peter, 04 Apr 2003:
  - update MIP405-4 board

* Patches by Denis Peter, 03 April 2003:
  - fix PCI IRQs on MPL boards
  - fix two more un-relocated pointer problems

* Fix behaviour of "run" command:
  - print error message iv variable does not exist
  - terminate processing of arguments in case of error

* Patches by Peter Figuli, 10 Mar 2003
  - Add support for BTUART on PXA platform
  - Add support for WEP EP250 (PXA) board

* Fix flash problems on INCA-IP; add tool to allow bruning images  to
  flash using a BDI2000

* Implement fix for I2C Edge Conditions problem for all boards that
  use the bit-banging driver (common/soft_i2c.c)

* Add patches by Robert Schwebel, 31 Mar 2003:
  - csb226 board: bring in sync with innokom/memsetup.S
  - csb226 board: fix MDREFR handling
  - misc doc fixes / extensions
  - innokom board: cleanup, MDREFR fix in memsetup.S, config update
  - add BOOT_PROGRESS to armlinux.c
diff --git a/include/asm-mips/inca-ip.h b/include/asm-mips/inca-ip.h
index dbacb33..0c5f1d7 100644
--- a/include/asm-mips/inca-ip.h
+++ b/include/asm-mips/inca-ip.h
@@ -894,7 +894,12 @@
 /*  Module      :  EBU register address and bits                       */
 /***********************************************************************/
          
+#if defined(CONFIG_INCA_IP)
 #define INCA_IP_EBU                          (0xB8000200)
+#elif defined(CONFIG_PURPLE)
+#define INCA_IP_EBU                          (0xB800D800)
+#endif
+
 /***********************************************************************/   
 
       
@@ -1490,7 +1495,12 @@
 /*  Module      :  ASC register address and bits                       */
 /***********************************************************************/
          
+#if defined(CONFIG_INCA_IP)
 #define INCA_IP_ASC                          (0xB8000400)
+#elif defined(CONFIG_PURPLE)
+#define INCA_IP_ASC                          (0xBE500000)
+#endif
+
 /***********************************************************************/   
 
       
diff --git a/include/cmd_net.h b/include/cmd_net.h
index 2fa848b..e9ca5c5 100644
--- a/include/cmd_net.h
+++ b/include/cmd_net.h
@@ -56,7 +56,7 @@
 #define	CMD_TBL_DHCP	MK_CMD_TBL_ENTRY(					\
 	"dhcp",		4,	3,	1,	do_dhcp,			\
 	"dhcp    - invoke DHCP client to obtain IP/boot params\n",		\
-	"\n" 						 			\
+	"[loadAddress] [bootfilename]\n" 		 			\
 ),
 
 int do_dhcp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 1dd7f3a..477be52 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -109,7 +109,7 @@
 #define CONFIG_BOOT_RETRY_TIME	-10	/* feature is avaiable but not enabled */
 #define CONFIG_ZERO_BOOTDELAY_CHECK  	/* check console even if bootdelay = 0 */
 
-#define CONFIG_BOOTCOMMAND	"diskboot 200000 0:1; bootm" /* autoboot command		*/
+#define CONFIG_BOOTCOMMAND	"diskboot 400000 0:1; bootm" /* autoboot command		*/
 #define CONFIG_BOOTARGS		"console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
 
 #define CONFIG_IPADDR		10.0.0.100
@@ -162,7 +162,7 @@
 	{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400,     \
 	 57600, 115200, 230400, 460800, 921600 }
 
-#define CFG_LOAD_ADDR	0x200000	/* default load address */
+#define CFG_LOAD_ADDR	0x400000	/* default load address */
 #define CFG_EXTBDINFO	1		/* To use extended board_into (bd_t) */
 
 #define CFG_HZ		1000		/* decrementer freq: 1 ms ticks */
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index a5fc8d9..5ecb537 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -113,7 +113,7 @@
 #define CONFIG_ZERO_BOOTDELAY_CHECK  	/* check console even if bootdelay = 0 */
 
 
-#define CONFIG_BOOTCOMMAND	"diskboot 200000 0:1; bootm" /* autoboot command		*/
+#define CONFIG_BOOTCOMMAND	"diskboot 400000 0:1; bootm" /* autoboot command		*/
 #define CONFIG_BOOTARGS		"console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
 
 #define CONFIG_IPADDR		10.0.0.100
@@ -166,7 +166,7 @@
 	{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400,     \
 	 57600, 115200, 230400, 460800, 921600 }
 
-#define CFG_LOAD_ADDR		0x200000	/* default load address */
+#define CFG_LOAD_ADDR		0x400000	/* default load address */
 #define CFG_EXTBDINFO		1	/* To use extended board_into (bd_t) */
 
 #define CFG_HZ		1000		/* decrementer freq: 1 ms ticks */
diff --git a/include/configs/incaip.h b/include/configs/incaip.h
index bc0db84..3b648c1 100644
--- a/include/configs/incaip.h
+++ b/include/configs/incaip.h
@@ -34,18 +34,60 @@
 /* allowed values: 100000000 and 150000000 */
 #define CPU_CLOCK_RATE	150000000   /* 150 MHz clock for the MIPS core */
 
-#define CONFIG_BAUDRATE		115200
+#if CPU_CLOCK_RATE == 100000000
+#define INFINEON_EBU_BOOTCFG	0x20C4	/* CMULT = 4 for 100 MHz */
+#else
+#define INFINEON_EBU_BOOTCFG	0x40C4	/* CMULT = 8 for 150 MHz */
+#endif
 
-#define CFG_SDRAM_BASE		0x80000000
 
-#define CFG_MALLOC_LEN		128*1024
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
 
-#define CFG_BOOTPARAMS_LEN	128*1024
+#define CONFIG_BAUDRATE		115200
 
 /* valid baudrates */
 #define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
+#define	CONFIG_TIMESTAMP		/* Print image info with timestamp */
+
+#define CONFIG_PREBOOT	"echo;"	\
+	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+	"echo"
+
+#undef	CONFIG_BOOTARGS
+
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=$(serverip):$(rootpath)\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addip=setenv bootargs $(bootargs) "				\
+		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"	\
+		":$(hostname):$(netdev):off\0"				\
+	"addmisc=setenv bootargs $(bootargs) "				\
+		"console=ttyS0,$(baudrate) "				\
+		"ethaddr=$(ethaddr) "					\
+		"panic=1\0"						\
+	"flash_nfs=run nfsargs addip addmisc;"				\
+		"bootm $(kernel_addr)\0"				\
+	"flash_self=run ramargs addip addmisc;"				\
+		"bootm $(kernel_addr) $(ramdisk_addr)\0"		\
+	"net_nfs=tftp 80500000 $(bootfile);"				\
+		"run nfsargs addip addmisc;bootm\0"			\
+	"rootpath=/opt/eldk/mips_4KC\0"					\
+	"bootfile=/tftpboot/INCA/uImage\0"				\
+	"kernel_addr=B0040000\0"					\
+	"ramdisk_addr=B0100000\0"					\
+	"u-boot=/tftpboot/INCA/u-boot.bin\0"				\
+	"load=tftp 80500000 $(u-boot)\0"				\
+	"update=protect off 1:0-2;era 1:0-2;"				\
+		"cp.b 80500000 B0000000 $(filesize)\0"			\
+	""
+#define CONFIG_BOOTCOMMAND	"run flash_self"
+
-#define CONFIG_COMMANDS		(CONFIG_CMD_DFL | CFG_CMD_ELF)
+#define CONFIG_COMMANDS		(CONFIG_CMD_DFL | \
+				 CFG_CMD_ASKENV	| \
+				 CFG_CMD_DHCP	| \
+				 CFG_CMD_ELF	)
 #include <cmd_confdefs.h>
 
 /*
@@ -55,12 +97,19 @@
 #define	CFG_PROMPT		"INCA-IP # "	/* Monitor Command Prompt    */
 #define	CFG_CBSIZE		256		/* Console I/O Buffer Size   */
 #define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)  /* Print Buffer Size */
-#define CFG_HZ			(CPU_CLOCK_RATE/2)
 #define	CFG_MAXARGS		16		/* max number of command args*/
 
+#define CFG_MALLOC_LEN		128*1024
+
+#define CFG_BOOTPARAMS_LEN	128*1024
+
+#define CFG_HZ			(CPU_CLOCK_RATE/2)
+
+#define CFG_SDRAM_BASE		0x80000000
+
 #define	CFG_LOAD_ADDR		0x80100000	/* default load address	*/
 
-#define CFG_MEMTEST_START	0x80200000
+#define CFG_MEMTEST_START	0x80100000
 #define CFG_MEMTEST_END		0x80800000
 
 /*-----------------------------------------------------------------------
diff --git a/include/configs/innokom.h b/include/configs/innokom.h
index c2267bd..312c854 100644
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -62,7 +62,8 @@
 #define CONFIG_BAUDRATE		19200
 #define CONFIG_MISC_INIT_R	1	/* we have a misc_init_r() function */
 
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL|CFG_CMD_I2C|CFG_CMD_EEPROM|CFG_CMD_NET|CFG_CMD_JFFS2|CFG_CMD_DHCP)
+#define CONFIG_COMMANDS (CFG_CMD_BDI|CFG_CMD_LOADB|CFG_CMD_IMI|CFG_CMD_FLASH|CFG_CMD_MEMORY|CFG_CMD_NET|CFG_CMD_ENV|CFG_CMD_RUN|CFG_CMD_ASKENV|CFG_CMD_ECHO|CFG_CMD_I2C|CFG_CMD_DHCP)
+/* CONFIG_CMD_DFL|CFG_CMD_I2C|CFG_CMD_EEPROM|CFG_CMD_NET|CFG_CMD_JFFS2|CFG_CMD_DHCP) */
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any)   */
 #include <cmd_confdefs.h>
 
@@ -78,11 +79,6 @@
 
 #define CONFIG_CMDLINE_TAG	1
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	19200		/* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX	2		/* which serial port to use */
-#endif
-
 /*
  * Miscellaneous configurable options
  */
@@ -186,7 +182,7 @@
 
 
 /*
- * GPIO settings; see BDI2000 config file for details
+ * GPIO settings
  *
  * GP15 == nCS1      is 1
  * GP24 == SFRM      is 1
@@ -391,7 +387,7 @@
  * [32:26] 0     - reserved
  * [25]    0     - K2FREE: not free running
  * [24]    0     - K1FREE: not free running
- * [23]    0     - K0FREE: not free running
+ * [23]    1     - K0FREE: not free running
  * [22]    0     - SLFRSH: self refresh disabled
  * [21]    0     - reserved
  * [20]    0     - APD: no auto power down
@@ -401,11 +397,11 @@
  * [16]    1     - K1RUN: enable SDCLK1
  * [15]    1     - E1PIN: SDRAM clock enable
  * [14]    1     - K0DB2: SDCLK0 is MemClk
- * [13]    1     - K0RUN: disable SDCLK0
+ * [13]    0     - K0RUN: disable SDCLK0
  * [12]    1     - E0PIN: disable SDCKE0
  * [11:00] 000000011000 - (64ms/8192)*MemClkFreq/32 = 24
  */
-#define CFG_MDREFR_VAL		0x0001F018
+#define CFG_MDREFR_VAL		0x0081D018
 
 /* MDMRS: Mode Register Set Configuration Register
  *
diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h
new file mode 100644
index 0000000..c88c4ab
--- /dev/null
+++ b/include/configs/wepep250.h
@@ -0,0 +1,188 @@
+/* 
+ * Copyright (C) 2003 ETC s.r.o.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Written by Peter Figuli <peposh@etc.sk>, 2003.
+ *
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_PXA250          1        /* this is an PXA250 CPU     */
+#define CONFIG_WEPEP250        1        /* config for wepep250 board */
+#undef  CONFIG_USE_IRQ                  /* don't need use IRQ/FIQ    */
+
+
+/*
+ * Select serial console configuration
+ */
+#define CONFIG_BTUART          1       /* BTUART is default on WEP dev board */
+#define CONFIG_BAUDRATE   115200
+
+
+/*
+ * Definition of u-boot build in commands. Check out CONFIG_CMD_DFL if
+ * neccessary in include/cmd_confdefs.h file. (Un)comment for getting
+ * functionality or size of u-boot code.
+ */
+#define CONFIG_COMMANDS         (CONFIG_CMD_DFL		\
+				& ~CFG_CMD_NET 		\
+				& ~CFG_CMD_LOADS	\
+				& ~CFG_CMD_CONSOLE	\
+				& ~CFG_CMD_AUTOSCRIPT	\
+/*				| CFG_CMD_JFFS2 */	\
+				)
+#include <cmd_confdefs.h>
+
+/*
+ * Boot options. Setting delay to -1 stops autostart count down.
+ * NOTE: Sending parameters to kernel depends on kernel version and
+ * 2.4.19-rmk6-pxa1 patch used while my u-boot coding didn't accept 
+ * parameters at all! Do not get confused by them so.
+ */
+#define CONFIG_BOOTDELAY   -1
+#define CONFIG_BOOTARGS    "root=/dev/mtdblock2 mem=32m console=ttyS01,115200n8"
+#define CONFIG_BOOTCOMMAND "bootm 40000"
+
+
+/*
+ * General options for u-boot. Modify to save memory foot print
+ */
+#define CFG_LONGHELP                                  /* undef saves memory  */
+#define CFG_PROMPT              "WEP> "               /* prompt string       */
+#define CFG_CBSIZE              256                   /* console I/O buffer  */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* print buffer size   */
+#define CFG_MAXARGS             16                    /* max command args    */
+#define CFG_BARGSIZE            CFG_CBSIZE            /* boot args buf size  */
+
+#define CFG_MEMTEST_START       0xa0400000            /* memtest test area   */
+#define CFG_MEMTEST_END         0xa0800000      
+
+#undef  CFG_CLKS_IN_HZ                       /* use HZ for freq. display     */
+
+#define CFG_HZ                  3686400      /* incrementer freq: 3.6864 MHz */
+#define CFG_CPUSPEED            0x141        /* core clock - register value  */
+
+#define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Definitions related to passing arguments to kernel.
+ */
+#define CONFIG_CMDLINE_TAG           1   /* send commandline to Kernel       */
+#define CONFIG_SETUP_MEMORY_TAGS     1   /* send memory definition to kernel */
+#undef  CONFIG_INITRD_TAG                /* do not send initrd params        */
+#undef  CONFIG_VFD                       /* do not send framebuffer setup    */
+
+
+/*
+ * Malloc pool need to host env + 128 Kb reserve for other allocations.
+ */
+#define CFG_MALLOC_LEN	  (CFG_ENV_SIZE + (128<<10) )
+
+#define CONFIG_STACKSIZE        (120<<10)      /* stack size */
+
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ    (4<<10)        /* IRQ stack  */
+#define CONFIG_STACKSIZE_FIQ    (4<<10)        /* FIQ stack  */
+#endif
+
+/*
+ * SDRAM Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS    1                /* we have 1 bank of SDRAM */
+#define WEP_SDRAM_1            0xa0000000        /* SDRAM bank #1           */
+#define WEP_SDRAM_1_SIZE       0x02000000        /* 32 MB ( 2 chip )        */
+#define WEP_SDRAM_2            0xa2000000        /* SDRAM bank #2           */
+#define WEP_SDRAM_2_SIZE       0x00000000        /* 0 MB                    */
+#define WEP_SDRAM_3            0xa8000000        /* SDRAM bank #3           */
+#define WEP_SDRAM_3_SIZE       0x00000000        /* 0 MB                    */
+#define WEP_SDRAM_4            0xac000000        /* SDRAM bank #4           */
+#define WEP_SDRAM_4_SIZE       0x00000000        /* 0 MB                    */
+
+#define CFG_DRAM_BASE           0xa0000000
+#define CFG_DRAM_SIZE           0x02000000
+
+/* Uncomment used SDRAM chip */
+#define WEP_SDRAM_K4S281633
+/*#define WEP_SDRAM_K4S561633*/
+
+
+/*
+ * Configuration for FLASH memory
+ */
+#define CFG_MAX_FLASH_BANKS    	1  	/* FLASH banks count (not chip count)*/
+#define CFG_MAX_FLASH_SECT     	128	/* number of sector in FLASH bank    */
+#define WEP_FLASH_BUS_WIDTH 	4	/* we use 32 bit FLASH memory...     */
+#define WEP_FLASH_INTERLEAVE	2	/* ... made of 2 chips */ 
+#define WEP_FLASH_BANK_SIZE  0x2000000  /* size of one flash bank*/
+#define WEP_FLASH_SECT_SIZE  0x0040000  /* size of erase sector */
+#define WEP_FLASH_BASE       0x0000000  /* location of flash memory */
+#define WEP_FLASH_UNLOCK        1       /* perform hw unlock first */
+
+
+/* This should be defined if CFI FLASH device is present. Actually benefit
+   is not so clear to me. In other words we can provide more informations
+   to user, but this expects more complex flash handling we do not provide 
+   now.*/
+#undef  CFG_FLASH_CFI	
+
+#define CFG_FLASH_ERASE_TOUT    (2*CFG_HZ)    /* timeout for Erase operation */
+#define CFG_FLASH_WRITE_TOUT    (2*CFG_HZ)    /* timeout for Write operation */
+
+#define CFG_FLASH_BASE          WEP_FLASH_BASE
+
+/*
+ * This is setting for JFFS2 support in u-boot.
+ * Right now there is no gain for user, but later on booting kernel might be
+ * possible. Consider using XIP kernel running from flash to save RAM
+ * footprint.
+ * NOTE: Enable CFG_CMD_JFFS2 for JFFS2 support.
+ */
+#define CFG_JFFS2_FIRST_BANK		0
+#define CFG_JFFS2_FIRST_SECTOR		5
+#define CFG_JFFS2_NUM_BANKS		1
+
+/*
+ * Environment setup. Definitions of monitor location and size with
+ * definition of environment setup ends up in 2 possibilities.
+ * 1. Embeded environment - in u-boot code is space for environment
+ * 2. Environment is read from predefined sector of flash
+ * Right now we support 2. possiblity, but expecting no env placed
+ * on mentioned address right now. This also needs to provide whole
+ * sector for it - for us 256Kb is really waste of memory. U-boot uses
+ * default env. and until kernel parameters could be sent to kernel
+ * env. has no sense to us.
+ */
+
+#define CFG_MONITOR_BASE	PHYS_FLASH_1
+#define CFG_MONITOR_LEN		0x20000		/* 128kb ( 1 flash sector )  */
+#define CFG_ENV_IS_IN_FLASH	1
+#define CFG_ENV_ADDR		0x20000	        /* absolute address for now  */
+#define CFG_ENV_SIZE		0x2000	        
+
+#undef  CONFIG_ENV_OVERWRITE                    /* env is not writable now   */
+
+/*
+ * Well this has to be defined, but on the other hand it is used differently
+ * one may expect. For instance loadb command do not cares :-)
+ * So advice is - do not relay on this...
+ */
+#define CFG_LOAD_ADDR        0x40000
+
+#endif  /* __CONFIG_H */
+