mx5/6: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c
index e2725e1..b021903 100644
--- a/arch/arm/imx-common/timer.c
+++ b/arch/arm/imx-common/timer.c
@@ -27,6 +27,7 @@
#include <asm/io.h>
#include <div64.h>
#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
/* General purpose timers registers */
struct mxc_gpt {
@@ -44,7 +45,6 @@
#define GPTCR_FRR (1 << 9) /* Freerun / restart */
#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
#define GPTCR_TEN 1 /* Timer enable */
-#define CLK_32KHZ 32768 /* 32Khz input */
DECLARE_GLOBAL_DATA_PTR;
@@ -54,14 +54,14 @@
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
- do_div(tick, CLK_32KHZ);
+ do_div(tick, MXC_CLK32);
return tick;
}
static inline unsigned long long us_to_tick(unsigned long long usec)
{
- usec = usec * CLK_32KHZ + 999999;
+ usec = usec * MXC_CLK32 + 999999;
do_div(usec, 1000000);
return usec;
@@ -86,7 +86,7 @@
__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
val = __raw_readl(&cur_gpt->counter);
- lastinc = val / (CLK_32KHZ / CONFIG_SYS_HZ);
+ lastinc = val / (MXC_CLK32 / CONFIG_SYS_HZ);
timestamp = 0;
return 0;
@@ -114,7 +114,7 @@
{
/*
* get_ticks() returns a long long (64 bit), it wraps in
- * 2^64 / CONFIG_MX25_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
+ * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
* 5 * 10^6 days - long enough.
*/
@@ -145,5 +145,5 @@
*/
ulong get_tbclk(void)
{
- return CLK_32KHZ;
+ return MXC_CLK32;
}