commit af0501a31852890202f46918423b61804f0b327d
author Wolfgang Denk <wd@denx.de> Sun Oct 19 02:35:50 2008 +0200
committer Wolfgang Denk <wd@denx.de> Tue Oct 21 11:25:39 2008 +0200
tree 7e2ff620c5b378aa82208c3e7a99e2a56570ddb7
parent 2059104d7ad9744eb2fa9aba8a67204fe8597aca

Cleanup: fix "MHz" spelling

Signed-off-by: Wolfgang Denk <wd@denx.de>

board/bf537-stamp/post-memory.c

diff --git a/board/bf537-stamp/post-memory.c b/board/bf537-stamp/post-memory.c
index 7c36c81..889aa5c 100644
--- a/board/bf537-stamp/post-memory.c
+++ b/board/bf537-stamp/post-memory.c
@@ -27,18 +27,18 @@
 	{{4, 1}, {4, 2}, {4, 4}}	/* CCLK = 100M */
 };
 const char *const log[CCLK_NUM][SCLK_NUM] = {
-	{"CCLK-500Mhz SCLK-125Mhz:    Writing...\0",
-	 "CCLK-500Mhz SCLK-100Mhz:    Writing...\0",
-	 "CCLK-500Mhz SCLK- 50Mhz:    Writing...\0",},
-	{"CCLK-400Mhz SCLK-100Mhz:    Writing...\0",
-	 "CCLK-400Mhz SCLK- 80Mhz:    Writing...\0",
-	 "CCLK-400Mhz SCLK- 50Mhz:    Writing...\0",},
-	{"CCLK-200Mhz SCLK-100Mhz:    Writing...\0",
-	 "CCLK-200Mhz SCLK- 50Mhz:    Writing...\0",
-	 "CCLK-200Mhz SCLK- 40Mhz:    Writing...\0",},
-	{"CCLK-100Mhz SCLK-100Mhz:    Writing...\0",
-	 "CCLK-100Mhz SCLK- 50Mhz:    Writing...\0",
-	 "CCLK-100Mhz SCLK- 25Mhz:    Writing...\0",},
+	{"CCLK-500MHz SCLK-125MHz:    Writing...\0",
+	 "CCLK-500MHz SCLK-100MHz:    Writing...\0",
+	 "CCLK-500MHz SCLK- 50MHz:    Writing...\0",},
+	{"CCLK-400MHz SCLK-100MHz:    Writing...\0",
+	 "CCLK-400MHz SCLK- 80MHz:    Writing...\0",
+	 "CCLK-400MHz SCLK- 50MHz:    Writing...\0",},
+	{"CCLK-200MHz SCLK-100MHz:    Writing...\0",
+	 "CCLK-200MHz SCLK- 50MHz:    Writing...\0",
+	 "CCLK-200MHz SCLK- 40MHz:    Writing...\0",},
+	{"CCLK-100MHz SCLK-100MHz:    Writing...\0",
+	 "CCLK-100MHz SCLK- 50MHz:    Writing...\0",
+	 "CCLK-100MHz SCLK- 25MHz:    Writing...\0",},
 };
 
 int memory_post_test(int flags)