ARM: dts: at91: sama5d2_icp: add QSPI1 device
Add support for sst26vf064b 64Mbit qspi-flash that is
present on sama5d2_icp board.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
[eugen.hristev@microchip.com: move u-boot properties to sama5d2_icp-u-boot.dtsi]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
diff --git a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
index 347fa81..68c27f2 100644
--- a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
+++ b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
@@ -28,3 +28,19 @@
&pinctrl_mikrobus1_uart {
u-boot,dm-pre-reloc;
};
+
+&pinctrl_qspi1_sck_cs_default {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl_qspi1_dat_default {
+ u-boot,dm-pre-reloc;
+};
+
+&qspi1 {
+ u-boot,dm-pre-reloc;
+
+ flash@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts
index f81fa60..2c6e91c 100644
--- a/arch/arm/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/dts/at91-sama5d2_icp.dts
@@ -33,6 +33,21 @@
};
apb {
+
+ qspi1: spi@f0024000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <83000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+ };
+
uart0: serial@f801c000 { /* mikrobus1 uart */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus1_uart>;
@@ -109,6 +124,20 @@
bias-pull-up;
};
+ pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
+ pinmux = <PIN_PA6__QSPI1_SCK>,
+ <PIN_PA11__QSPI1_CS>;
+ bias-disable;
+ };
+
+ pinctrl_qspi1_dat_default: qspi1_dat_default {
+ pinmux = <PIN_PA7__QSPI1_IO0>,
+ <PIN_PA8__QSPI1_IO1>,
+ <PIN_PA9__QSPI1_IO2>,
+ <PIN_PA10__QSPI1_IO3>;
+ bias-pull-up;
+ };
+
pinctrl_sdmmc0_default: sdmmc0_default {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA2__SDMMC0_DAT0>,