Add ARM946E cpu and core module targets; remap memory to 0x00000000
Patch by Peter Pearse, 2 Feb 2005
diff --git a/cpu/arm926ejs/cpu.c b/cpu/arm926ejs/cpu.c
index 2681f99..f57c5a5 100644
--- a/cpu/arm926ejs/cpu.c
+++ b/cpu/arm926ejs/cpu.c
@@ -69,21 +69,21 @@
 {
 	volatile int i;
 
-	/* Many OMAP regs need at least 2 nops  */
+	/* copro seems to need some delay between reading and writing */
 	for (i = 0; i < 100; i++);
 }
 
-/* See also ARM Ref. Man. */
+/* See also ARM926EJ-S Technical Reference Manual */
 #define C1_MMU		(1<<0)		/* mmu off/on */
 #define C1_ALIGN	(1<<1)		/* alignment faults off/on */
 #define C1_DC		(1<<2)		/* dcache off/on */
-#define C1_WB		(1<<3)		/* merging write buffer on/off */
-#define C1_BIG_ENDIAN	(1<<7)	/* big endian off/on */
+
+#define C1_BIG_ENDIAN	(1<<7)		/* big endian off/on */
 #define C1_SYS_PROT	(1<<8)		/* system protection */
 #define C1_ROM_PROT	(1<<9)		/* ROM protection */
 #define C1_IC		(1<<12)		/* icache off/on */
-#define C1_HIGH_VECTORS	(1<<13)	/* location of vectors: low/high addresses */
-#define RESERVED_1	(0xf << 3)	/* must be 111b for R/W */
+#define C1_HIGH_VECTORS	(1<<13)		/* location of vectors: low/high addresses */
+
 
 int cpu_init (void)
 {
@@ -120,6 +120,7 @@
 	/* flush I/D-cache */
 	i = 0;
 	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
+
 	return (0);
 }
 
diff --git a/cpu/arm926ejs/interrupts.c b/cpu/arm926ejs/interrupts.c
index ae8082d..0457bff 100644
--- a/cpu/arm926ejs/interrupts.c
+++ b/cpu/arm926ejs/interrupts.c
@@ -36,8 +36,7 @@
  */
 
 #include <common.h>
-#include <arm925t.h>
-
+#include <arm926ejs.h>
 #include <asm/proc-armv/ptrace.h>
 
 #define TIMER_LOAD_VAL 0xffffffff
@@ -46,9 +45,6 @@
 #ifdef CONFIG_OMAP
 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
 #endif
-#ifdef CONFIG_INTEGRATOR
-#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
-#endif
 #ifdef CONFIG_VERSATILE
 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
 #endif
@@ -186,6 +182,12 @@
 	bad_mode ();
 }
 
+#ifdef CONFIG_INTEGRATOR
+
+	/* Timer functionality supplied by Integrator board (AP or CP) */
+
+#else
+
 static ulong timestamp;
 static ulong lastdec;
 
@@ -200,12 +202,7 @@
 	val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
 	*((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
 #endif	/* CONFIG_OMAP */
-#ifdef CONFIG_INTEGRATOR
-	/* Load timer with initial value */
-	*(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
-	/* Set timer to be enabled, free-running, no interrupts, 256 divider */
-	*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
-#endif	/* CONFIG_INTEGRATOR */
+
 #ifdef CONFIG_VERSATILE
 	*(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD;	/* TimerLoad */
 	*(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;	/* TimerValue */
@@ -332,3 +329,5 @@
 	tbclk = CFG_HZ;
 	return tbclk;
 }
+
+#endif /* CONFIG_INTEGRATOR */
diff --git a/cpu/arm926ejs/start.S b/cpu/arm926ejs/start.S
index d62940b..dfa6e7f 100644
--- a/cpu/arm926ejs/start.S
+++ b/cpu/arm926ejs/start.S
@@ -393,6 +393,12 @@
 
 #endif
 
+# ifdef CONFIG_INTEGRATOR
+
+	/* Satisfied by Integrator routine (AP or CP) */ 
+
+#else
+
 	.align	5
 .globl reset_cpu
 reset_cpu:
@@ -404,6 +410,8 @@
 _loop_forever:
 	b	_loop_forever
 
-
 rstctl1:
 	.word	0xfffece10
+
+#endif /* #ifdef CONFIG_INTEGRATOR */
+