blob: 852e1e5ae3cd7379b8eb71dfa50bbffa3159abdc [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2024 Intel Corporation <www.intel.com>
*/
#include "socfpga_agilex5.dtsi"
/ {
model = "SoCFPGA Agilex5 SoCDK";
aliases {
serial0 = &uart0;
ethernet0 = &gmac0;
ethernet2 = &gmac2;
};
leds {
compatible = "gpio-leds";
hps0 {
label = "hps_led0";
gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
};
hps1 {
label = "hps_led1";
gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
};
hps2 {
label = "hps_led2";
gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
};
};
memory {
device_type = "memory";
/* We expect the bootloader to fill in the reg */
reg = <0 0 0 0>;
};
soc {
clocks {
osc1 {
clock-frequency = <25000000>;
};
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i3c0 {
status = "okay";
};
&i3c1 {
status = "okay";
};
&uart0 {
status = "okay";
};
&usbphy0 {
status = "okay";
};
&usb0 {
status = "okay";
disable-over-current;
};
&watchdog0 {
status = "okay";
};
&watchdog1 {
status = "okay";
};
&watchdog2 {
status = "okay";
};
&watchdog3 {
status = "okay";
};
&watchdog4 {
status = "okay";
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&timer2 {
status = "okay";
};
&timer3 {
status = "okay";
};
&spi0 {
status = "okay";
};
&spi1 {
status = "okay";
};
&qspi {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mt25qu02g";
reg = <0>;
spi-max-frequency = <100000000>;
m25p,fast-read;
cdns,page-size = <256>;
cdns,block-size = <16>;
cdns,read-delay = <1>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
qspi_boot: partition@0 {
label = "u-boot";
reg = <0x0 0x04200000>;
};
root: partition@4200000 {
label = "root";
reg = <0x04200000 0x0BE00000>;
};
};
};
};