rockchip: rk3368: Add PX5 Evaluation board
PX5 EVB is designed by Rockchip for automotive field
with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
HDMI video input/output interface, audio codec ES8396,
WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity
sensor STK3410.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/board/rockchip/evb_px5/Kconfig b/board/rockchip/evb_px5/Kconfig
new file mode 100644
index 0000000..9a04ee7
--- /dev/null
+++ b/board/rockchip/evb_px5/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_PX5
+
+config SYS_BOARD
+ default "evb_px5"
+
+config SYS_VENDOR
+ default "rockchip"
+
+config SYS_CONFIG_NAME
+ default "evb_px5"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/rockchip/evb_px5/MAINTAINERS b/board/rockchip/evb_px5/MAINTAINERS
new file mode 100644
index 0000000..5d09fbf
--- /dev/null
+++ b/board/rockchip/evb_px5/MAINTAINERS
@@ -0,0 +1,6 @@
+PX5 EVB
+M: Andy Yan <andy.yan@rock-chips.com>
+S: Maintained
+F: board/rockchip/evb_px5
+F: include/configs/evb_px5.h
+F: configs/evb-px5_defconfig
diff --git a/board/rockchip/evb_px5/Makefile b/board/rockchip/evb_px5/Makefile
new file mode 100644
index 0000000..f5aa5a9
--- /dev/null
+++ b/board/rockchip/evb_px5/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += evb-px5.o
diff --git a/board/rockchip/evb_px5/README b/board/rockchip/evb_px5/README
new file mode 100644
index 0000000..de980f2
--- /dev/null
+++ b/board/rockchip/evb_px5/README
@@ -0,0 +1 @@
+see board/rockchip/sheep_rk3368/README
diff --git a/board/rockchip/evb_px5/evb-px5.c b/board/rockchip/evb_px5/evb-px5.c
new file mode 100644
index 0000000..54e62db
--- /dev/null
+++ b/board/rockchip/evb_px5/evb-px5.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2017 Andy Yan
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <fdtdec.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3368.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mach_cpu_init(void)
+{
+ struct rk3368_pmu_grf *pmugrf;
+ int node;
+
+ node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rk3368-pmugrf");
+ pmugrf = (struct rk3368_pmu_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
+
+ rk_clrsetreg(&pmugrf->gpio0d_iomux,
+ GPIO0D0_MASK | GPIO0D1_MASK |
+ GPIO0D2_MASK | GPIO0D3_MASK,
+ GPIO0D0_GPIO << GPIO0D0_SHIFT |
+ GPIO0D1_GPIO << GPIO0D1_SHIFT |
+ GPIO0D2_UART4_SOUT << GPIO0D2_SHIFT |
+ GPIO0D3_UART4_SIN << GPIO0D3_SHIFT);
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = 0x40000000;
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ /* Reserve 0x200000 for ATF bl31 */
+ gd->bd->bi_dram[0].start = 0x200000;
+ gd->bd->bi_dram[0].size = 0x3fe00000;
+
+ return 0;
+}