x86: Support CPU functions in long mode
At present it is not possible to find out the physical-address size in
long mode, so a predefined value is used.
Update the macros to support this properly, since it is important when
programming MTRRs.
Signed-off-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index fd389d4..1f1b545 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -58,6 +58,10 @@
X86_SYSCON_PUNIT, /* Power unit */
};
+#define CPUID_FEATURE_PAE BIT(6)
+#define CPUID_FEATURE_PSE36 BIT(17)
+#define CPUID_FEAURE_HTT BIT(28)
+
struct cpuid_result {
uint32_t eax;
uint32_t ebx;
@@ -161,12 +165,16 @@
return edx;
}
-#if !CONFIG_IS_ENABLED(X86_64)
-
+#if CONFIG_IS_ENABLED(X86_64)
+static inline int flag_is_changeable_p(u32 flag)
+{
+ return 1;
+}
+#else
/* Standard macro to see if a specific flag is changeable */
-static inline int flag_is_changeable_p(uint32_t flag)
+static inline int flag_is_changeable_p(u32 flag)
{
- uint32_t f1, f2;
+ u32 f1, f2;
asm(
"pushfl\n\t"
@@ -181,9 +189,9 @@
"popfl\n\t"
: "=&r" (f1), "=&r" (f2)
: "ir" (flag));
- return ((f1^f2) & flag) != 0;
+ return ((f1 ^ f2) & flag) != 0;
}
-#endif
+#endif /* X86_64 */
/**
* cpu_enable_paging_pae() - Enable PAE-paging