commit abe44089cf2834699183c8634477ce5632c7ab0f
author Kever Yang <kever.yang@rock-chips.com> Fri Oct 18 15:54:16 2019 +0800
committer Kever Yang <kever.yang@rock-chips.com> Sun Nov 10 20:40:20 2019 +0800
tree 585fb3a3eba902fce52687f7e8c224f3d7228c20
parent 133f85c8d6a050dc9b9fc37c6f9313ece15b5802

rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs

Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to
limit the SPL size in 0x40000(start from 0) so that we don't need to do
the relocate for ATF loading.
Note that there will be separate BSS, STACK and MALLOC heap, so the size
0x40000(256KB) should be enough for SPL text.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

include/configs/rk3399_common.h

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 126c347..7331c6d 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -21,7 +21,7 @@
 
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
 #define CONFIG_SPL_STACK		0x00400000
-#define CONFIG_SPL_MAX_SIZE             0x100000
+#define CONFIG_SPL_MAX_SIZE             0x40000
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #else