rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs
Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to
limit the SPL size in 0x40000(start from 0) so that we don't need to do
the relocate for ATF loading.
Note that there will be separate BSS, STACK and MALLOC heap, so the size
0x40000(256KB) should be enough for SPL text.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 3ff3331..e51e1b0 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -18,7 +18,7 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
#define CONFIG_SYS_LOAD_ADDR 0x00800800
#define CONFIG_SPL_STACK 0x00400000
-#define CONFIG_SPL_MAX_SIZE 0x100000
+#define CONFIG_SPL_MAX_SIZE 0x40000
#define CONFIG_SPL_BSS_START_ADDR 0x2000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index e4b2114..e57d0ef 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -27,7 +27,7 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
#define CONFIG_SYS_LOAD_ADDR 0x00280000
-#define CONFIG_SPL_MAX_SIZE 0x60000
+#define CONFIG_SPL_MAX_SIZE 0x40000
#define CONFIG_SPL_BSS_START_ADDR 0x400000
#define CONFIG_SPL_BSS_MAX_SIZE 0x20000
#define CONFIG_SPL_STACK 0x00188000
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 126c347..7331c6d 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -21,7 +21,7 @@
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
#define CONFIG_SPL_STACK 0x00400000
-#define CONFIG_SPL_MAX_SIZE 0x100000
+#define CONFIG_SPL_MAX_SIZE 0x40000
#define CONFIG_SPL_BSS_START_ADDR 0x00400000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
#else