tree 524c634f0cf9c2430a39d4eef62b9d0ed0a3dd44
parent 8488d1b1da419f107fa41bf619ed59462e291075
author Shaohui Xie <Shaohui.Xie@freescale.com> 1322789892 +0800
committer Kumar Gala <galak@kernel.crashing.org> 1323229473 -0600

p2041rdb: fix serdes clock map

Description of SerDes clock Bank2 setting in p2041 hardware specification
is wrong, the clock map which based on it is wrong either, so fix the
serdes clock map.

wrong setting of SERDES Reference Clocks Bank2:
SW2[5:6] = ON OFF	=>100MHz for PCI mode
SW2[5:6] = OFF ON	=>125MHz for SGMII mode

right setting of SERDES Reference Clocks Bank2:
SW2[5:6] = OFF OFF	=>100MHz for PCI mode
SW2[5:6] = OFF ON	=>125MHz for SGMII mode
SW2[5:6] = ON OFF	=>156.25MHZ

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>