imx: Support i.MX91 11x11 EVK board
Add i.MX91 11x11 EVK Board support.
- Four ddr scripts included w/o inline ecc feature.
- SDHC/NETWORK/I2C/UART supported
- PCA9451 supported, default nominal drive mode
- Documentation added.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
diff --git a/arch/arm/dts/imx91-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx91-11x11-evk-u-boot.dtsi
new file mode 100644
index 0000000..54b4d0a
--- /dev/null
+++ b/arch/arm/dts/imx91-11x11-evk-u-boot.dtsi
@@ -0,0 +1,195 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2024 NXP
+ */
+
+#include "imx91-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdog3>;
+ bootph-pre-ram;
+ bootph-some-ram;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&{/soc@0} {
+ bootph-all;
+ bootph-pre-ram;
+};
+
+&aips1 {
+ bootph-pre-ram;
+ bootph-all;
+};
+
+&aips2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&aips3 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&iomuxc {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+®_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <20000>;
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl_reg_usdhc2_vmmc {
+ bootph-pre-ram;
+};
+
+&pinctrl_uart1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl_usdhc1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl_usdhc2_gpio {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl_usdhc2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&gpio1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&gpio2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&gpio3 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&gpio4 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&lpuart1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&usdhc1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&usdhc2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ fsl,signal-voltage-switch-extra-delay-ms = <8>;
+};
+
+&lpi2c1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&lpi2c2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&lpi2c3 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&{/soc@0/bus@44000000/i2c@44350000/pmic@25} {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&{/soc@0/bus@44000000/i2c@44350000/pmic@25/regulators} {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl_lpi2c1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl_lpi2c2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl_lpi2c3 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&fec {
+ compatible = "fsl,imx91-fec", "fsl,imx93-fec", "fsl,imx8mq-fec";
+ phy-reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+ðphy1 {
+ reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <100000>;
+};
+
+&s4muap {
+ bootph-pre-ram;
+ bootph-some-ram;
+ status = "okay";
+};
+
+&clk {
+ bootph-all;
+ bootph-pre-ram;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-rates;
+ /delete-property/ assigned-clock-parents;
+};
+
+&osc_32k {
+ bootph-all;
+ bootph-pre-ram;
+};
+
+&osc_24m {
+ bootph-all;
+ bootph-pre-ram;
+};
+
+&clk_ext1 {
+ bootph-all;
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/imx91-u-boot.dtsi b/arch/arm/dts/imx91-u-boot.dtsi
new file mode 100644
index 0000000..5b639c9
--- /dev/null
+++ b/arch/arm/dts/imx91-u-boot.dtsi
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Mathieu Othacehe <m.othacehe@gmail.com>
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+&A55_0 {
+ clocks = <&clk IMX93_CLK_A55_SEL>;
+};
+
+&binman {
+ u-boot-spl-ddr {
+ align = <4>;
+ align-size = <4>;
+ filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+
+ u-boot-spl {
+ align-end = <4>;
+ filename = "u-boot-spl.bin";
+ };
+
+ ddr-1d-imem-fw {
+ filename = "lpddr4_imem_1d_v202201.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-1d-dmem-fw {
+ filename = "lpddr4_dmem_1d_v202201.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-2d-imem-fw {
+ filename = "lpddr4_imem_2d_v202201.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-2d-dmem-fw {
+ filename = "lpddr4_dmem_2d_v202201.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+ };
+
+ spl {
+ filename = "spl.bin";
+
+ mkimage {
+ args = "-n spl/u-boot-spl.cfgout -T imx8image -e 0x204A0000";
+
+ blob {
+ filename = "u-boot-spl-ddr.bin";
+ };
+ };
+ };
+
+ u-boot-container {
+ filename = "u-boot-container.bin";
+
+ mkimage {
+ args = "-n u-boot-container.cfgout -T imx8image -e 0x0";
+
+ blob {
+ filename = "u-boot.bin";
+ };
+ };
+ };
+
+ imx-boot {
+ filename = "flash.bin";
+ pad-byte = <0x00>;
+
+ spl: blob-ext@1 {
+ filename = "spl.bin";
+ offset = <0x0>;
+ align-size = <0x400>;
+ align = <0x400>;
+ };
+
+ uboot: blob-ext@2 {
+ filename = "u-boot-container.bin";
+ };
+ };
+};
diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index 4554e21..54c6b11 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -29,6 +29,12 @@
prompt "NXP i.MX9 board select"
optional
+config TARGET_IMX91_11X11_EVK
+ bool "imx91_11x11_evk"
+ select OF_BOARD_FIXUP
+ select IMX91
+ imply OF_UPSTREAM
+
config TARGET_IMX93_9X9_QSB
bool "imx93_qsb"
select OF_BOARD_FIXUP
@@ -56,6 +62,7 @@
endchoice
+source "board/freescale/imx91_evk/Kconfig"
source "board/freescale/imx93_evk/Kconfig"
source "board/freescale/imx93_qsb/Kconfig"
source "board/phytec/phycore_imx93/Kconfig"