Merge git://git.denx.de/u-boot-sunxi
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 6e13ee3..dcacdf3 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -217,6 +217,8 @@
satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR);
gpio_request(satapwr_pin, "satapwr");
gpio_direction_output(satapwr_pin, 1);
+ /* Give attached sata device time to power-up to avoid link timeouts */
+ mdelay(500);
#endif
#ifdef CONFIG_MACPWR
macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR);
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 09bbb2c..3ccc6b0 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -604,6 +604,8 @@
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+#ifdef CONFIG_MACH_SUNXI_H3_H5
+ /* Only H3/H5 have clock controls for internal EPHY */
if (priv->use_internal_phy) {
/* Set clock gating for ephy */
setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY));
@@ -611,6 +613,7 @@
/* Deassert EPHY */
setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY));
}
+#endif
/* Set clock gating for emac */
setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));