Merge tag 'clk-2024.01-next' of https://source.denx.de/u-boot/custodians/u-boot-clk into next
clock patches for u-boot/next
The main thing in here is Igor's conversion of soc_clk_dump to a clk_ops
member. There's also a write-protect feature for nuvoton clocks.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
index 78c3715..4e37048 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
@@ -5,72 +5,6 @@
#include "k3-binman.dtsi"
-#ifndef CONFIG_ARM64
-
-&bcfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-&pcfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-&scfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-tifs-cfg */
-
-&bcfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-&pcfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-&scfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-dm-cfg */
-
-&pcfg_yaml_dm {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml_dm {
- schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-sysfw-cfg */
-
-&bcfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-&pcfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-&scfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-#endif /* CONFIG_ARM64 */
-
#ifdef CONFIG_TARGET_VERDIN_AM62_R5
&binman {
diff --git a/arch/arm/dts/k3-binman.dtsi b/arch/arm/dts/k3-binman.dtsi
index c7513e1..cd9926a 100644
--- a/arch/arm/dts/k3-binman.dtsi
+++ b/arch/arm/dts/k3-binman.dtsi
@@ -32,28 +32,28 @@
filename = "board-cfg.bin";
bcfg_yaml: ti-board-config {
config = "board-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
pm-cfg {
filename = "pm-cfg.bin";
pcfg_yaml: ti-board-config {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
rm-cfg {
filename = "rm-cfg.bin";
rcfg_yaml: ti-board-config {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
sec-cfg {
filename = "sec-cfg.bin";
scfg_yaml: ti-board-config {
config = "sec-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
combined-tifs-cfg {
@@ -61,19 +61,19 @@
ti-board-config {
bcfg_yaml_tifs: board-cfg {
config = "board-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
scfg_yaml_tifs: sec-cfg {
config = "sec-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
pcfg_yaml_tifs: pm-cfg {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_tifs: rm-cfg {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
@@ -82,11 +82,11 @@
ti-board-config {
pcfg_yaml_dm: pm-cfg {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_dm: rm-cfg {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
@@ -95,19 +95,19 @@
ti-board-config {
bcfg_yaml_sysfw: board-cfg {
config = "board-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
scfg_yaml_sysfw: sec-cfg {
config = "sec-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
pcfg_yaml_sysfw: pm-cfg {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_sysfw: rm-cfg {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index c07e202..47ba9fa 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -90,6 +90,13 @@
bootph-all;
};
+&dsi {
+ clocks = <&rcc 0 STM32F4_APB2_CLOCK(DSI)>,
+ <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>,
+ <&clk_hse>;
+ clock-names = "pclk", "px_clk", "ref";
+};
+
&gpioa {
bootph-all;
};
@@ -132,6 +139,12 @@
&gpiok {
bootph-all;
+};
+
+<dc {
+ bootph-all;
+
+ clocks = <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>;
};
&pinctrl {
diff --git a/arch/arm/dts/stm32f469-disco.dts b/arch/arm/dts/stm32f469-disco.dts
index 6e0ffc1..c9acabf 100644
--- a/arch/arm/dts/stm32f469-disco.dts
+++ b/arch/arm/dts/stm32f469-disco.dts
@@ -119,7 +119,7 @@
};
};
- panel-dsi@0 {
+ panel@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
@@ -138,7 +138,7 @@
status = "okay";
port {
- ltdc_out_dsi: endpoint@0 {
+ ltdc_out_dsi: endpoint {
remote-endpoint = <&dsi_in>;
};
};
diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index 2c823cc..add55c9 100644
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -70,22 +70,17 @@
};
};
};
+ };
+};
- ltdc: display-controller@40016800 {
- compatible = "st,stm32-ltdc";
- reg = <0x40016800 0x200>;
- resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
- clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
-
- status = "okay";
- bootph-all;
+<dc {
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
+ bootph-all;
- ports {
- port@0 {
- dp_out: endpoint {
- remote-endpoint = <&dsi_in>;
- };
- };
+ ports {
+ port@0 {
+ dp_out: endpoint {
+ remote-endpoint = <&dsi_in>;
};
};
};
diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 6f93fc7..d63cd2b 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -86,6 +86,10 @@
status = "okay";
};
+<dc {
+ status = "okay";
+};
+
&rtc {
status = "okay";
};
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index e8db533..b430820 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -12,119 +12,7 @@
#include <asm/system.h>
#include <asm/armv8/mmu.h>
-#ifdef CONFIG_SOC_K3_AM654
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 5)
-
-/* ToDo: Add 64bit IO */
-struct mm_region am654_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa0000000UL,
- .phys = 0xa0000000UL,
- .size = 0x02100000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa2100000UL,
- .phys = 0xa2100000UL,
- .size = 0x5df00000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = am654_mem_map;
-#endif /* CONFIG_SOC_K3_AM654 */
-
-#ifdef CONFIG_SOC_K3_J721E
-
-#ifdef CONFIG_SOC_K3_J721E_J7200
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 5)
-
-/* ToDo: Add 64bit IO */
-struct mm_region j7200_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa0000000UL,
- .phys = 0xa0000000UL,
- .size = 0x04800000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_NON_SHARE
- }, {
- .virt = 0xa4800000UL,
- .phys = 0xa4800000UL,
- .size = 0x5b800000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = j7200_mem_map;
-
-#else /* CONFIG_SOC_K3_J721E_J7200 */
-
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 6)
-
-/* ToDo: Add 64bit IO */
-struct mm_region j721e_mem_map[NR_MMU_REGIONS] = {
+struct mm_region k3_mem_map[] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
@@ -135,164 +23,12 @@
}, {
.virt = 0x80000000UL,
.phys = 0x80000000UL,
- .size = 0x20000000UL,
+ .size = 0x1e780000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
.virt = 0xa0000000UL,
.phys = 0xa0000000UL,
- .size = 0x1bc00000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_NON_SHARE
- }, {
- .virt = 0xbbc00000UL,
- .phys = 0xbbc00000UL,
- .size = 0x44400000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x4d80000000UL,
- .phys = 0x4d80000000UL,
- .size = 0x0002000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_INNER_SHARE
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = j721e_mem_map;
-#endif /* CONFIG_SOC_K3_J721E_J7200 */
-
-#endif /* CONFIG_SOC_K3_J721E */
-
-#ifdef CONFIG_SOC_K3_J721S2
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3)
-
-/* ToDo: Add 64bit IO */
-struct mm_region j721s2_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = j721s2_mem_map;
-
-#endif /* CONFIG_SOC_K3_J721S2 */
-
-#if defined(CONFIG_SOC_K3_AM625) || defined(CONFIG_SOC_K3_AM62A7)
-
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
-
-/* ToDo: Add 64bit IO */
-struct mm_region am62_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x1E780000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xA0000000UL,
- .phys = 0xA0000000UL,
- .size = 0x60000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
-
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = am62_mem_map;
-#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
-
-#ifdef CONFIG_SOC_K3_AM642
-
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
-
-/* ToDo: Add 64bit IO */
-struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x1E800000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xA0000000UL,
- .phys = 0xA0000000UL,
.size = 0x60000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
@@ -315,5 +51,4 @@
}
};
-struct mm_region *mem_map = am64_mem_map;
-#endif /* CONFIG_SOC_K3_AM642 */
+struct mm_region *mem_map = k3_mem_map;
diff --git a/board/ti/common/schema.yaml b/arch/arm/mach-k3/schema.yaml
similarity index 100%
rename from board/ti/common/schema.yaml
rename to arch/arm/mach-k3/schema.yaml
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index a8eb8d5..77edb86 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -73,7 +73,6 @@
static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf)
{
struct mtd_info *part;
- bool first = true;
const char *name;
int len, partnum = 0;
@@ -86,17 +85,13 @@
"mtd %s=", name);
len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
- "%s raw 0x0 0x%llx ",
+ "%s raw 0x0 0x%llx",
name, mtd->size);
list_for_each_entry(part, &mtd->partitions, node) {
partnum++;
- if (!first)
- len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, ";");
- first = false;
-
len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
- "%s_%s part %d",
+ ";%s_%s part %d",
name, part->name, partnum);
}
}
@@ -128,24 +123,9 @@
/* probe all MTD devices */
mtd_probe_devices();
- /* probe SPI flash device on a bus */
- if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev)) {
- mtd = get_mtd_device_nm("nor0");
- if (!IS_ERR_OR_NULL(mtd))
- board_get_alt_info_mtd(mtd, buf);
-
- mtd = get_mtd_device_nm("nor1");
- if (!IS_ERR_OR_NULL(mtd))
+ mtd_for_each_device(mtd)
+ if (!mtd_is_partition(mtd))
board_get_alt_info_mtd(mtd, buf);
- }
-
- mtd = get_mtd_device_nm("nand0");
- if (!IS_ERR_OR_NULL(mtd))
- board_get_alt_info_mtd(mtd, buf);
-
- mtd = get_mtd_device_nm("spi-nand0");
- if (!IS_ERR_OR_NULL(mtd))
- board_get_alt_info_mtd(mtd, buf);
}
if (IS_ENABLED(CONFIG_DFU_VIRT)) {
diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml
index 15c4017..b9f3668 100644
--- a/board/ti/am62ax/rm-cfg.yaml
+++ b/board/ti/am62ax/rm-cfg.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
#
-# Resource management configuration for AM62ax
+# Resource management configuration for AM62A
#
---
@@ -18,234 +18,234 @@
host_cfg_entries:
- #1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #2
- host_id: 30
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 20
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #3
- host_id: 36
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 30
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #4
- host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ host_id: 36
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #5
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #6
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #7
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #8
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #9
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #10
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #16
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #17
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #18
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #19
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #20
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #21
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #22
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #23
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #24
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #25
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #26
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #27
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #28
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #29
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #30
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #31
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #32
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
resasg:
subhdr:
magic: 0x7B25
- size : 8
- resasg_entries_size: 1032
- reserved : 0
+ size: 8
+ resasg_entries_size: 1064
+ reserved: 0
resasg_entries:
-
start_resource: 0
@@ -253,896 +253,792 @@
type: 64
host_id: 12
reserved: 0
-
-
start_resource: 16
num_resource: 4
type: 64
host_id: 35
reserved: 0
-
-
start_resource: 16
num_resource: 4
type: 64
host_id: 36
reserved: 0
-
-
start_resource: 20
num_resource: 22
type: 64
host_id: 30
reserved: 0
-
-
start_resource: 0
num_resource: 16
type: 192
host_id: 12
reserved: 0
-
-
start_resource: 34
num_resource: 2
type: 192
host_id: 30
reserved: 0
-
-
start_resource: 0
- num_resource: 4
+ num_resource: 2
type: 320
host_id: 12
reserved: 0
-
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 320
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 320
+ host_id: 36
+ reserved: 0
-
start_resource: 4
num_resource: 4
type: 320
host_id: 30
reserved: 0
-
-
start_resource: 0
num_resource: 26
type: 384
host_id: 128
reserved: 0
-
-
start_resource: 50176
num_resource: 164
type: 1666
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1
type: 1667
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 18
type: 1677
host_id: 12
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1677
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1677
host_id: 36
reserved: 0
-
-
start_resource: 24
num_resource: 2
type: 1677
host_id: 30
reserved: 0
-
-
start_resource: 26
num_resource: 6
type: 1677
host_id: 128
reserved: 0
-
-
start_resource: 54
num_resource: 18
type: 1678
host_id: 12
reserved: 0
-
-
start_resource: 72
num_resource: 6
type: 1678
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 72
num_resource: 6
type: 1678
host_id: 36
reserved: 0
-
-
start_resource: 78
num_resource: 2
type: 1678
host_id: 30
reserved: 0
-
-
start_resource: 80
num_resource: 2
type: 1678
host_id: 128
reserved: 0
-
-
start_resource: 32
num_resource: 12
type: 1679
host_id: 12
reserved: 0
-
-
start_resource: 44
num_resource: 6
type: 1679
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 44
num_resource: 6
type: 1679
host_id: 36
reserved: 0
-
-
start_resource: 50
num_resource: 2
type: 1679
host_id: 30
reserved: 0
-
-
start_resource: 52
num_resource: 2
type: 1679
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 18
type: 1696
host_id: 12
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1696
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1696
host_id: 36
reserved: 0
-
-
start_resource: 24
num_resource: 2
type: 1696
host_id: 30
reserved: 0
-
-
start_resource: 26
num_resource: 6
type: 1696
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 18
type: 1697
host_id: 12
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1697
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1697
host_id: 36
reserved: 0
-
-
start_resource: 24
num_resource: 2
type: 1697
host_id: 30
reserved: 0
-
-
start_resource: 26
num_resource: 2
type: 1697
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 12
type: 1698
host_id: 12
reserved: 0
-
-
start_resource: 12
num_resource: 6
type: 1698
- host_id: 35
+ host_id: 20
reserved: 0
-
-
start_resource: 12
num_resource: 6
type: 1698
host_id: 36
reserved: 0
-
-
start_resource: 18
num_resource: 2
type: 1698
host_id: 30
reserved: 0
-
-
start_resource: 20
num_resource: 2
type: 1698
host_id: 128
reserved: 0
-
-
start_resource: 6
- num_resource: 34
+ num_resource: 26
type: 1802
host_id: 12
reserved: 0
-
-
- start_resource: 44
- num_resource: 36
+ start_resource: 32
+ num_resource: 8
+ type: 1802
+ host_id: 20
+ reserved: 0
+ -
+ start_resource: 45
+ num_resource: 35
type: 1802
host_id: 35
reserved: 0
-
-
- start_resource: 44
- num_resource: 36
+ start_resource: 45
+ num_resource: 35
type: 1802
host_id: 36
reserved: 0
-
-
start_resource: 168
num_resource: 8
type: 1802
host_id: 30
reserved: 0
-
-
- start_resource: 14
+ start_resource: 15
num_resource: 512
type: 1805
host_id: 12
reserved: 0
-
-
- start_resource: 526
+ start_resource: 527
num_resource: 256
type: 1805
host_id: 35
reserved: 0
-
-
- start_resource: 526
+ start_resource: 527
num_resource: 256
type: 1805
host_id: 36
reserved: 0
-
-
- start_resource: 782
+ start_resource: 783
num_resource: 128
type: 1805
host_id: 30
reserved: 0
-
-
- start_resource: 910
- num_resource: 626
+ start_resource: 911
+ num_resource: 128
+ type: 1805
+ host_id: 20
+ reserved: 0
+ -
+ start_resource: 1039
+ num_resource: 497
type: 1805
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1024
type: 1807
host_id: 128
reserved: 0
-
-
start_resource: 4096
num_resource: 29
type: 1808
host_id: 128
reserved: 0
-
-
start_resource: 4608
num_resource: 99
type: 1809
host_id: 128
reserved: 0
-
-
start_resource: 5120
num_resource: 24
type: 1810
host_id: 128
reserved: 0
-
-
start_resource: 5632
num_resource: 51
type: 1811
host_id: 128
reserved: 0
-
-
start_resource: 6144
num_resource: 51
type: 1812
host_id: 128
reserved: 0
-
-
start_resource: 6656
num_resource: 51
type: 1813
host_id: 128
reserved: 0
-
-
start_resource: 8192
num_resource: 32
type: 1814
host_id: 128
reserved: 0
-
-
start_resource: 8704
num_resource: 32
type: 1815
host_id: 128
reserved: 0
-
-
start_resource: 9216
num_resource: 32
type: 1816
host_id: 128
reserved: 0
-
-
start_resource: 9728
num_resource: 22
type: 1817
host_id: 128
reserved: 0
-
-
start_resource: 10240
num_resource: 22
type: 1818
host_id: 128
reserved: 0
-
-
start_resource: 10752
num_resource: 22
type: 1819
host_id: 128
reserved: 0
-
-
start_resource: 11264
num_resource: 28
type: 1820
host_id: 128
reserved: 0
-
-
start_resource: 11776
num_resource: 28
type: 1821
host_id: 128
reserved: 0
-
-
start_resource: 12288
num_resource: 28
type: 1822
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1
type: 1923
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 10
type: 1936
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1936
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1936
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1936
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1936
host_id: 128
reserved: 0
-
-
start_resource: 19
num_resource: 64
type: 1937
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 64
type: 1937
host_id: 30
reserved: 0
-
-
start_resource: 83
num_resource: 8
type: 1938
host_id: 12
reserved: 0
-
-
start_resource: 91
num_resource: 8
type: 1939
host_id: 12
reserved: 0
-
-
start_resource: 99
num_resource: 10
type: 1942
host_id: 12
reserved: 0
-
-
start_resource: 109
num_resource: 3
type: 1942
host_id: 35
reserved: 0
-
-
start_resource: 109
num_resource: 3
type: 1942
host_id: 36
reserved: 0
-
-
start_resource: 112
num_resource: 3
type: 1942
host_id: 30
reserved: 0
-
-
start_resource: 115
num_resource: 3
type: 1942
host_id: 128
reserved: 0
-
-
start_resource: 118
num_resource: 16
type: 1943
host_id: 12
reserved: 0
-
-
start_resource: 118
num_resource: 16
type: 1943
host_id: 30
reserved: 0
-
-
start_resource: 134
num_resource: 8
type: 1944
host_id: 12
reserved: 0
-
-
start_resource: 134
num_resource: 8
type: 1945
host_id: 12
reserved: 0
-
-
start_resource: 142
num_resource: 8
type: 1946
host_id: 12
reserved: 0
-
-
start_resource: 142
num_resource: 8
type: 1947
host_id: 12
reserved: 0
-
-
start_resource: 0
num_resource: 10
type: 1955
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1955
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1955
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1955
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1955
host_id: 128
reserved: 0
-
-
start_resource: 19
num_resource: 8
type: 1956
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 8
type: 1956
host_id: 30
reserved: 0
-
-
start_resource: 27
num_resource: 1
type: 1957
host_id: 12
reserved: 0
-
-
start_resource: 28
num_resource: 1
type: 1958
host_id: 12
reserved: 0
-
-
start_resource: 0
num_resource: 10
type: 1961
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1961
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1961
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1961
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1961
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 10
type: 1962
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1962
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1962
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1962
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1962
host_id: 128
reserved: 0
-
-
start_resource: 19
num_resource: 1
type: 1963
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 1
type: 1963
host_id: 30
reserved: 0
-
-
start_resource: 19
num_resource: 16
type: 1964
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 16
type: 1964
host_id: 30
reserved: 0
-
-
start_resource: 20
num_resource: 1
type: 1965
host_id: 12
reserved: 0
-
-
start_resource: 35
num_resource: 8
type: 1966
host_id: 12
reserved: 0
-
-
start_resource: 21
num_resource: 1
type: 1967
host_id: 12
reserved: 0
-
-
start_resource: 35
num_resource: 8
type: 1968
host_id: 12
reserved: 0
-
-
start_resource: 22
num_resource: 1
type: 1969
host_id: 12
reserved: 0
-
-
start_resource: 43
num_resource: 8
type: 1970
host_id: 12
reserved: 0
-
-
start_resource: 23
num_resource: 1
type: 1971
host_id: 12
reserved: 0
-
-
start_resource: 43
num_resource: 8
type: 1972
host_id: 12
reserved: 0
-
-
start_resource: 0
num_resource: 1
type: 2112
host_id: 128
reserved: 0
-
-
start_resource: 2
num_resource: 2
type: 2122
host_id: 12
reserved: 0
-
-
start_resource: 51200
num_resource: 12
type: 12738
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1
type: 12739
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 6
type: 12750
host_id: 12
reserved: 0
-
-
start_resource: 0
num_resource: 6
type: 12769
host_id: 12
reserved: 0
-
-
start_resource: 0
num_resource: 8
type: 12810
host_id: 12
reserved: 0
-
-
start_resource: 12288
num_resource: 128
type: 12813
host_id: 12
reserved: 0
-
-
start_resource: 3072
num_resource: 6
type: 12828
host_id: 128
reserved: 0
-
-
start_resource: 3584
num_resource: 6
type: 12829
host_id: 128
reserved: 0
-
-
start_resource: 4096
num_resource: 6
diff --git a/board/ti/am62x/rm-cfg.yaml b/board/ti/am62x/rm-cfg.yaml
index c28707b..c06232f 100644
--- a/board/ti/am62x/rm-cfg.yaml
+++ b/board/ti/am62x/rm-cfg.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
#
-# Resource management configuration for AM62
+# Resource management configuration for AM62X
#
---
@@ -18,234 +18,234 @@
host_cfg_entries:
- #1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #2
host_id: 30
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #3
host_id: 36
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
- #4
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #5
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #6
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #7
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #8
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #9
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #10
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #16
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #17
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #18
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #19
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #20
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #21
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #22
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #23
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #24
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #25
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #26
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #27
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #28
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #29
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #30
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #31
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
- #32
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
resasg:
subhdr:
magic: 0x7B25
- size : 8
- resasg_entries_size: 960
- reserved : 0
+ size: 8
+ resasg_entries_size: 976
+ reserved: 0
resasg_entries:
-
start_resource: 0
@@ -253,833 +253,726 @@
type: 64
host_id: 12
reserved: 0
-
-
start_resource: 16
num_resource: 4
type: 64
host_id: 35
reserved: 0
-
-
start_resource: 16
num_resource: 4
type: 64
host_id: 36
reserved: 0
-
-
start_resource: 20
num_resource: 22
type: 64
host_id: 30
reserved: 0
-
-
start_resource: 0
num_resource: 16
type: 192
host_id: 12
reserved: 0
-
-
start_resource: 34
num_resource: 2
type: 192
host_id: 30
reserved: 0
-
-
start_resource: 0
- num_resource: 4
+ num_resource: 2
type: 320
host_id: 12
reserved: 0
-
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 320
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 320
+ host_id: 36
+ reserved: 0
-
start_resource: 4
num_resource: 4
type: 320
host_id: 30
reserved: 0
-
-
start_resource: 0
num_resource: 26
type: 384
host_id: 128
reserved: 0
-
-
start_resource: 50176
num_resource: 164
type: 1666
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1
type: 1667
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 18
type: 1677
host_id: 12
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1677
host_id: 35
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1677
host_id: 36
reserved: 0
-
-
start_resource: 24
num_resource: 2
type: 1677
host_id: 30
reserved: 0
-
-
start_resource: 26
num_resource: 6
type: 1677
host_id: 128
reserved: 0
-
-
start_resource: 54
num_resource: 18
type: 1678
host_id: 12
reserved: 0
-
-
start_resource: 72
num_resource: 6
type: 1678
host_id: 35
reserved: 0
-
-
start_resource: 72
num_resource: 6
type: 1678
host_id: 36
reserved: 0
-
-
start_resource: 78
num_resource: 2
type: 1678
host_id: 30
reserved: 0
-
-
start_resource: 80
num_resource: 2
type: 1678
host_id: 128
reserved: 0
-
-
start_resource: 32
num_resource: 12
type: 1679
host_id: 12
reserved: 0
-
-
start_resource: 44
num_resource: 6
type: 1679
host_id: 35
reserved: 0
-
-
start_resource: 44
num_resource: 6
type: 1679
host_id: 36
reserved: 0
-
-
start_resource: 50
num_resource: 2
type: 1679
host_id: 30
reserved: 0
-
-
start_resource: 52
num_resource: 2
type: 1679
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 18
type: 1696
host_id: 12
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1696
host_id: 35
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1696
host_id: 36
reserved: 0
-
-
start_resource: 24
num_resource: 2
type: 1696
host_id: 30
reserved: 0
-
-
start_resource: 26
num_resource: 6
type: 1696
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 18
type: 1697
host_id: 12
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1697
host_id: 35
reserved: 0
-
-
start_resource: 18
num_resource: 6
type: 1697
host_id: 36
reserved: 0
-
-
start_resource: 24
num_resource: 2
type: 1697
host_id: 30
reserved: 0
-
-
start_resource: 26
num_resource: 2
type: 1697
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 12
type: 1698
host_id: 12
reserved: 0
-
-
start_resource: 12
num_resource: 6
type: 1698
host_id: 35
reserved: 0
-
-
start_resource: 12
num_resource: 6
type: 1698
host_id: 36
reserved: 0
-
-
start_resource: 18
num_resource: 2
type: 1698
host_id: 30
reserved: 0
-
-
start_resource: 20
num_resource: 2
type: 1698
host_id: 128
reserved: 0
-
-
start_resource: 5
num_resource: 35
type: 1802
host_id: 12
reserved: 0
-
-
- start_resource: 44
- num_resource: 36
+ start_resource: 45
+ num_resource: 35
type: 1802
host_id: 35
reserved: 0
-
-
- start_resource: 44
- num_resource: 36
+ start_resource: 45
+ num_resource: 35
type: 1802
host_id: 36
reserved: 0
-
-
start_resource: 168
num_resource: 8
type: 1802
host_id: 30
reserved: 0
-
-
- start_resource: 13
+ start_resource: 14
num_resource: 512
type: 1805
host_id: 12
reserved: 0
-
-
- start_resource: 525
+ start_resource: 526
num_resource: 256
type: 1805
host_id: 35
reserved: 0
-
-
- start_resource: 525
+ start_resource: 526
num_resource: 256
type: 1805
host_id: 36
reserved: 0
-
-
- start_resource: 781
+ start_resource: 782
num_resource: 128
type: 1805
host_id: 30
reserved: 0
-
-
- start_resource: 909
- num_resource: 627
+ start_resource: 910
+ num_resource: 626
type: 1805
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1024
type: 1807
host_id: 128
reserved: 0
-
-
start_resource: 4096
num_resource: 29
type: 1808
host_id: 128
reserved: 0
-
-
start_resource: 4608
num_resource: 99
type: 1809
host_id: 128
reserved: 0
-
-
start_resource: 5120
num_resource: 24
type: 1810
host_id: 128
reserved: 0
-
-
start_resource: 5632
num_resource: 51
type: 1811
host_id: 128
reserved: 0
-
-
start_resource: 6144
num_resource: 51
type: 1812
host_id: 128
reserved: 0
-
-
start_resource: 6656
num_resource: 51
type: 1813
host_id: 128
reserved: 0
-
-
start_resource: 8192
num_resource: 32
type: 1814
host_id: 128
reserved: 0
-
-
start_resource: 8704
num_resource: 32
type: 1815
host_id: 128
reserved: 0
-
-
start_resource: 9216
num_resource: 32
type: 1816
host_id: 128
reserved: 0
-
-
start_resource: 9728
num_resource: 22
type: 1817
host_id: 128
reserved: 0
-
-
start_resource: 10240
num_resource: 22
type: 1818
host_id: 128
reserved: 0
-
-
start_resource: 10752
num_resource: 22
type: 1819
host_id: 128
reserved: 0
-
-
start_resource: 11264
num_resource: 28
type: 1820
host_id: 128
reserved: 0
-
-
start_resource: 11776
num_resource: 28
type: 1821
host_id: 128
reserved: 0
-
-
start_resource: 12288
num_resource: 28
type: 1822
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 1
type: 1923
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 10
type: 1936
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1936
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1936
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1936
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1936
host_id: 128
reserved: 0
-
-
start_resource: 19
num_resource: 64
type: 1937
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 64
type: 1937
host_id: 36
reserved: 0
-
-
start_resource: 83
num_resource: 8
type: 1938
host_id: 12
reserved: 0
-
-
start_resource: 91
num_resource: 8
type: 1939
host_id: 12
reserved: 0
-
-
start_resource: 99
num_resource: 10
type: 1942
host_id: 12
reserved: 0
-
-
start_resource: 109
num_resource: 3
type: 1942
host_id: 35
reserved: 0
-
-
start_resource: 109
num_resource: 3
type: 1942
host_id: 36
reserved: 0
-
-
start_resource: 112
num_resource: 3
type: 1942
host_id: 30
reserved: 0
-
-
start_resource: 115
num_resource: 3
type: 1942
host_id: 128
reserved: 0
-
-
start_resource: 118
num_resource: 16
type: 1943
host_id: 12
reserved: 0
-
-
start_resource: 118
num_resource: 16
type: 1943
host_id: 36
reserved: 0
-
-
start_resource: 134
num_resource: 8
type: 1944
host_id: 12
reserved: 0
-
-
start_resource: 134
num_resource: 8
type: 1945
host_id: 12
reserved: 0
-
-
start_resource: 142
num_resource: 8
type: 1946
host_id: 12
reserved: 0
-
-
start_resource: 142
num_resource: 8
type: 1947
host_id: 12
reserved: 0
-
-
start_resource: 0
num_resource: 10
type: 1955
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1955
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1955
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1955
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1955
host_id: 128
reserved: 0
-
-
start_resource: 19
num_resource: 8
type: 1956
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 8
type: 1956
host_id: 36
reserved: 0
-
-
start_resource: 27
num_resource: 1
type: 1957
host_id: 12
reserved: 0
-
-
start_resource: 28
num_resource: 1
type: 1958
host_id: 12
reserved: 0
-
-
start_resource: 0
num_resource: 10
type: 1961
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1961
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1961
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1961
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1961
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 10
type: 1962
host_id: 12
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1962
host_id: 35
reserved: 0
-
-
start_resource: 10
num_resource: 3
type: 1962
host_id: 36
reserved: 0
-
-
start_resource: 13
num_resource: 3
type: 1962
host_id: 30
reserved: 0
-
-
start_resource: 16
num_resource: 3
type: 1962
host_id: 128
reserved: 0
-
-
start_resource: 19
num_resource: 1
type: 1963
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 1
type: 1963
host_id: 36
reserved: 0
-
-
start_resource: 19
num_resource: 16
type: 1964
host_id: 12
reserved: 0
-
-
start_resource: 19
num_resource: 16
type: 1964
host_id: 36
reserved: 0
-
-
start_resource: 20
num_resource: 1
type: 1965
host_id: 12
reserved: 0
-
-
start_resource: 35
num_resource: 8
type: 1966
host_id: 12
reserved: 0
-
-
start_resource: 21
num_resource: 1
type: 1967
host_id: 12
reserved: 0
-
-
start_resource: 35
num_resource: 8
type: 1968
host_id: 12
reserved: 0
-
-
start_resource: 22
num_resource: 1
type: 1969
host_id: 12
reserved: 0
-
-
start_resource: 43
num_resource: 8
type: 1970
host_id: 12
reserved: 0
-
-
start_resource: 23
num_resource: 1
type: 1971
host_id: 12
reserved: 0
-
-
start_resource: 43
num_resource: 8
type: 1972
host_id: 12
reserved: 0
-
-
start_resource: 0
num_resource: 1
type: 2112
host_id: 128
reserved: 0
-
-
start_resource: 2
num_resource: 2
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 975eb17..df20902 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -73,13 +73,13 @@
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].start = 0x880000000;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 0768385..c541880 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -61,13 +61,13 @@
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].start = 0x880000000;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index db71739..1220cd8 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -56,13 +56,13 @@
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = 0x7fffffff;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].start = 0x880000000;
gd->bd->bi_dram[1].size = 0x37fffffff;
gd->ram_size = 0x400000000;
#endif
diff --git a/boot/bootm.c b/boot/bootm.c
index a0d17be..301cfde 100644
--- a/boot/bootm.c
+++ b/boot/bootm.c
@@ -443,24 +443,8 @@
}
if (images.os.type == IH_TYPE_KERNEL_NOLOAD) {
- if (IS_ENABLED(CONFIG_CMD_BOOTI) &&
- images.os.arch == IH_ARCH_ARM64 &&
- images.os.os == IH_OS_LINUX) {
- ulong image_addr;
- ulong image_size;
-
- ret = booti_setup(images.os.image_start, &image_addr,
- &image_size, true);
- if (ret != 0)
- return 1;
-
- images.os.type = IH_TYPE_KERNEL;
- images.os.load = image_addr;
- images.ep = image_addr;
- } else {
- images.os.load = images.os.image_start;
- images.ep += images.os.image_start;
- }
+ images.os.load = images.os.image_start;
+ images.ep += images.os.image_start;
}
images.os.start = map_to_sysmem(os_hdr);
@@ -645,6 +629,24 @@
void *load_buf, *image_buf;
int err;
+ /*
+ * For a "noload" compressed kernel we need to allocate a buffer large
+ * enough to decompress in to and use that as the load address now.
+ * Assume that the kernel compression is at most a factor of 4 since
+ * zstd almost achieves that.
+ * Use an alignment of 2MB since this might help arm64
+ */
+ if (os.type == IH_TYPE_KERNEL_NOLOAD && os.comp != IH_COMP_NONE) {
+ ulong req_size = ALIGN(image_len * 4, SZ_1M);
+
+ load = lmb_alloc(&images->lmb, req_size, SZ_2M);
+ if (!load)
+ return 1;
+ os.load = load;
+ debug("Allocated %lx bytes at %lx for kernel (size %lx) decompression\n",
+ req_size, load, image_len);
+ }
+
load_buf = map_sysmem(load, 0);
image_buf = map_sysmem(os.image_start, image_len);
err = image_decomp(os.comp, load, os.image_start, os.type,
@@ -685,6 +687,31 @@
}
}
+ if (IS_ENABLED(CONFIG_CMD_BOOTI) && images->os.arch == IH_ARCH_ARM64 &&
+ images->os.os == IH_OS_LINUX) {
+ ulong relocated_addr;
+ ulong image_size;
+ int ret;
+
+ ret = booti_setup(load, &relocated_addr, &image_size, false);
+ if (ret) {
+ printf("Failed to prep arm64 kernel (err=%d)\n", ret);
+ return BOOTM_ERR_RESET;
+ }
+
+ /* Handle BOOTM_STATE_LOADOS */
+ if (relocated_addr != load) {
+ printf("Moving Image from 0x%lx to 0x%lx, end=%lx\n",
+ load, relocated_addr,
+ relocated_addr + image_size);
+ memmove((void *)relocated_addr, load_buf, image_size);
+ }
+
+ images->ep = relocated_addr;
+ images->os.start = relocated_addr;
+ images->os.end = relocated_addr + image_size;
+ }
+
lmb_reserve(&images->lmb, images->os.load, (load_end -
images->os.load));
return 0;
diff --git a/boot/image.c b/boot/image.c
index 88b67bc..675b5dd 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -415,15 +415,20 @@
* @type: OS type (IH_OS_...)
* @comp_type: Compression type being used (IH_COMP_...)
* @is_xip: true if the load address matches the image start
+ * @load: Load address for printing
*/
-static void print_decomp_msg(int comp_type, int type, bool is_xip)
+static void print_decomp_msg(int comp_type, int type, bool is_xip,
+ ulong load)
{
const char *name = genimg_get_type_name(type);
+ /* Shows "Loading Kernel Image" for example */
if (comp_type == IH_COMP_NONE)
- printf(" %s %s\n", is_xip ? "XIP" : "Loading", name);
+ printf(" %s %s", is_xip ? "XIP" : "Loading", name);
else
- printf(" Uncompressing %s\n", name);
+ printf(" Uncompressing %s", name);
+
+ printf(" to %lx\n", load);
}
int image_decomp_type(const unsigned char *buf, ulong len)
@@ -448,7 +453,7 @@
int ret = -ENOSYS;
*load_end = load;
- print_decomp_msg(comp, type, load == image_start);
+ print_decomp_msg(comp, type, load == image_start, load);
/*
* Load the image to the right place, decompressing if needed. After
diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig
index b2c30b8..ce00f0d 100644
--- a/configs/stm32746g-eval_defconfig
+++ b/configs/stm32746g-eval_defconfig
@@ -19,12 +19,11 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@@ -66,3 +65,4 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig
index 682d297..aae6ceb 100644
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -16,12 +16,12 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_IMLS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIMER=y
diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig
index f460c6f..75f6a4d 100644
--- a/configs/stm32f429-evaluation_defconfig
+++ b/configs/stm32f429-evaluation_defconfig
@@ -12,13 +12,12 @@
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_IMLS=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -32,3 +31,4 @@
CONFIG_STM32_FLASH=y
CONFIG_SYS_MAX_FLASH_SECT=12
CONFIG_SYS_MAX_FLASH_BANKS=2
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig
index 21c5498..9b5f38b 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -12,15 +12,15 @@
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_IMLS=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
# CONFIG_ISO_PARTITION is not set
@@ -37,6 +37,21 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_PINCTRL_FULL is not set
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
+CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=480
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index 3c3a0d2..7a23875 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -19,12 +19,11 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@@ -66,3 +65,4 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig
index 3514a78..a0d2aa0 100644
--- a/configs/stm32f769-disco_defconfig
+++ b/configs/stm32f769-disco_defconfig
@@ -19,11 +19,10 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@@ -68,3 +67,4 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig
index a8bf332..89d79e9 100644
--- a/configs/stm32h743-disco_defconfig
+++ b/configs/stm32h743-disco_defconfig
@@ -17,10 +17,10 @@
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco"
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
index 387dc6a..2d79bf0 100644
--- a/configs/stm32mp13_defconfig
+++ b/configs/stm32mp13_defconfig
@@ -16,11 +16,11 @@
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_PROMPT="STM32MP> "
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y
diff --git a/drivers/clk/stm32/clk-stm32f.c b/drivers/clk/stm32/clk-stm32f.c
index ed76601..d68c75e 100644
--- a/drivers/clk/stm32/clk-stm32f.c
+++ b/drivers/clk/stm32/clk-stm32f.c
@@ -522,17 +522,20 @@
/* get the current PLLSAIR output freq */
pllsair_rate = stm32_clk_get_pllsai_rate(priv, PLLSAIR);
- best_div = pllsair_rate / rate;
+ if ((pllsair_rate % rate) == 0) {
+ best_div = pllsair_rate / rate;
- /* look into pllsaidivr_table if this divider is available*/
- for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
- if (best_div == pllsaidivr_table[i]) {
- /* set pll_saidivr with found value */
- clrsetbits_le32(®s->dckcfgr,
- RCC_DCKCFGR_PLLSAIDIVR_MASK,
- pllsaidivr_table[i]);
- return rate;
- }
+ /* look into pllsaidivr_table if this divider is available */
+ for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
+ if (best_div == pllsaidivr_table[i]) {
+ /* set pll_saidivr with found value */
+ clrsetbits_le32(®s->dckcfgr,
+ RCC_DCKCFGR_PLLSAIDIVR_MASK,
+ pllsaidivr_table[i] <<
+ RCC_DCKCFGR_PLLSAIDIVR_SHIFT);
+ return rate;
+ }
+ }
/*
* As no pllsaidivr value is suitable to obtain requested freq,
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 6fd90e3..4f60ba8 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -495,6 +495,33 @@
setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
}
+#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
+static int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+ u32 sdram_size = gd->ram_size;
+ struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+ phys_addr_t cpu;
+ dma_addr_t bus;
+ u64 dma_size;
+ int ret;
+
+ ret = dev_get_dma_range(dev, &cpu, &bus, &dma_size);
+ if (ret) {
+ dev_err(dev, "failed to get dma address\n");
+ return ret;
+ }
+
+ uc_plat->base = bus + sdram_size - ALIGN(uc_plat->size, uc_plat->align);
+ return 0;
+}
+#else
+static inline int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+ /* Delegate framebuffer allocation to video-uclass */
+ return 0;
+}
+#endif
+
static int stm32_ltdc_probe(struct udevice *dev)
{
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@@ -605,6 +632,10 @@
priv->crop_h = timings.vactive.typ;
priv->alpha = 0xFF;
+ ret = stm32_ltdc_alloc_fb(dev);
+ if (ret)
+ return ret;
+
dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
timings.hactive.typ, timings.vactive.typ,
VNBITS(priv->l2bpp), uc_plat->base);
diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h
index 57003f1..496d1c2 100644
--- a/include/configs/am62ax_evm.h
+++ b/include/configs/am62ax_evm.h
@@ -12,10 +12,6 @@
#include <env/ti/mmc.h>
#include <env/ti/k3_dfu.h>
-/* DDR Configuration */
-#define CFG_SYS_SDRAM_BASE1 0x880000000
-
-
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
index 811dc0f..64458eb 100644
--- a/include/configs/am65x_evm.h
+++ b/include/configs/am65x_evm.h
@@ -14,9 +14,6 @@
#include <env/ti/k3_rproc.h>
#include <env/ti/k3_dfu.h>
-/* DDR Configuration */
-#define CFG_SYS_SDRAM_BASE1 0x880000000
-
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index ea39d1b..c26438c 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -11,8 +11,6 @@
#include <linux/sizes.h>
-/* DDR Configuration */
-#define CFG_SYS_SDRAM_BASE1 0x880000000
/* FLASH Configuration */
#define CFG_SYS_FLASH_BASE 0x000000000
diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h
index 692c6bb..846cfa7 100644
--- a/include/configs/j721s2_evm.h
+++ b/include/configs/j721s2_evm.h
@@ -12,9 +12,6 @@
#include <linux/sizes.h>
#include <config_distro_bootcmd.h>
-/* DDR Configuration */
-#define CFG_SYS_SDRAM_BASE1 0x880000000
-
/* SPL Loader Configuration */
#if defined(CONFIG_TARGET_J721S2_A72_EVM)
#define CFG_SYS_UBOOT_BASE 0x50280000
diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h
index 62a7e9a..75bb9cd 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -31,6 +31,8 @@
"scriptaddr=0x00418000\0" \
"pxefile_addr_r=0x00428000\0" \
"ramdisk_addr_r=0x00438000\0" \
+ "splashimage=0x00448000\0" \
+ "splashpos=m,m\0" \
BOOTENV
#endif /* __CONFIG_H */
diff --git a/include/image.h b/include/image.h
index 9f43518..432ec92 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1011,7 +1011,7 @@
* @load: Destination load address in U-Boot memory
* @image_start Image start address (where we are decompressing from)
* @type: OS type (IH_OS_...)
- * @load_bug: Place to decompress to
+ * @load_buf: Place to decompress to
* @image_buf: Address to decompress from
* @image_len: Number of bytes in @image_buf to decompress
* @unc_len: Available space for decompression
diff --git a/tools/logos/stm32f469-discovery.bmp b/tools/logos/stm32f469-discovery.bmp
new file mode 100644
index 0000000..ecc8d98
--- /dev/null
+++ b/tools/logos/stm32f469-discovery.bmp
Binary files differ