ppc/85xx/pci: fsl_pci_init: pcie agent mode support
Originally written by Jason Jin and Mingkai Hu for mpc8536.
When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0
* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 933dd12..2b32234 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -199,7 +199,7 @@
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie3_hose, first_free_busno);
+ &pcie3_hose, first_free_busno, pcie_ep);
/*
* Activate ULI1575 legacy chip by performing a fake
* memory access. Needed to make ULI RTC work.
@@ -231,7 +231,7 @@
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie2_hose, first_free_busno);
+ &pcie2_hose, first_free_busno, pcie_ep);
} else {
printf (" PCIE2: disabled\n");
}
@@ -251,7 +251,7 @@
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie1_hose, first_free_busno);
+ &pcie1_hose, first_free_busno, pcie_ep);
} else {
printf (" PCIE1: disabled\n");
}