Merge tag 'u-boot-at91-2022.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2022.01 cycle:

This feature set includes : the support for CPU driver for arm926
(sam9x60 device); changes required for OP-TEE boot for sama5d2_xplained
and sama5d27_som1_ek boards; QSPI boot configuration for sama5d2_icp;
starting to remove old Kconfig unused symbols from config_whitelist.txt
(work will take more time); also small fixes and updates in mach, DT,
configs, etc.
diff --git a/MAINTAINERS b/MAINTAINERS
index 5e8693f..687c72d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -312,6 +312,7 @@
 F:	board/atmel/
 F:	drivers/cpu/at91_cpu.c
 F:	drivers/misc/microchip_flexcom.c
+F:	include/dt-bindings/mfd/atmel-flexcom.h
 F:	drivers/timer/mchp-pit64b-timer.c
 
 ARM NEXELL S5P4418
diff --git a/README b/README
index bbfc4bc..1ef8010 100644
--- a/README
+++ b/README
@@ -856,17 +856,6 @@
 		Support for National dp8382[01] gigabit chips.
 
 - NETWORK Support (other):
-
-		CONFIG_DRIVER_AT91EMAC
-		Support for AT91RM9200 EMAC.
-
-			CONFIG_RMII
-			Define this to use reduced MII inteface
-
-			CONFIG_DRIVER_AT91EMAC_QUIET
-			If this defined, the driver is quiet.
-			The driver doen't show link status messages.
-
 		CONFIG_CALXEDA_XGMAC
 		Support for the Calxeda XGMAC device
 
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 02cbda9..cba4a1f 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -35,20 +35,6 @@
 	orr	r0, r0, #0xd3
 	msr	cpsr, r0
 
-#if	defined(CONFIG_AT91RM9200DK)
-	/*
-	 * relocate exception table
-	 */
-	ldr	r0, =_start
-	ldr	r1, =0x0
-	mov	r2, #16
-copyex:
-	subs	r2, r2, #1
-	ldr	r3, [r0], #4
-	str	r3, [r1], #4
-	bne	copyex
-#endif
-
 	/*
 	 * we do sys-critical inits only at reboot,
 	 * not when booting from ram!
diff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts b/arch/arm/dts/at91-sama5d27_som1_ek.dts
index ee851a1..efd1a5d 100644
--- a/arch/arm/dts/at91-sama5d27_som1_ek.dts
+++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts
@@ -68,7 +68,7 @@
 	};
 
 	ahb {
-		usb1: ohci@00400000 {
+		usb1: ohci@400000 {
 			num-ports = <3>;
 			atmel,vbus-gpio = <&pioA 42 0>;
 			pinctrl-names = "default";
@@ -76,7 +76,7 @@
 			status = "okay";
 		};
 
-		usb2: ehci@00500000 {
+		usb2: ehci@500000 {
 			status = "okay";
 		};
 
diff --git a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
index 347fa81..b45de97 100644
--- a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
+++ b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
@@ -13,18 +13,35 @@
 	};
 };
 
-&sdmmc0 {
+&pinctrl_mikrobus1_uart {
 	u-boot,dm-pre-reloc;
 };
 
-&uart0 { /* mikrobus1 uart */
+&pinctrl_qspi1_sck_cs_default {
 	u-boot,dm-pre-reloc;
 };
 
+&pinctrl_qspi1_dat_default {
+	u-boot,dm-pre-reloc;
+};
+
 &pinctrl_sdmmc0_default {
 	u-boot,dm-pre-reloc;
 };
 
-&pinctrl_mikrobus1_uart {
+&qspi1 {
 	u-boot,dm-pre-reloc;
+
+	flash@0 {
+		u-boot,dm-pre-reloc;
+	};
 };
+
+&sdmmc0 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart0 { /* mikrobus1 uart */
+	u-boot,dm-pre-reloc;
+};
+
diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts
index f81fa60..4452219 100644
--- a/arch/arm/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/dts/at91-sama5d2_icp.dts
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+ OR MIT
 /*
  * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2 ICP board
- *			SAMA5D2 Industrial Connectivity Board
+ *			SAMA5D2 Industrial Connectivity Platform
  *
  *  Copyright (c) 2018, Microchip Technology Inc.
  *                2018, Eugen Hristev <eugen.hristev@microchip.com>
@@ -33,10 +33,19 @@
 		};
 
 		apb {
-			uart0: serial@f801c000 { /* mikrobus1 uart */
+
+			qspi1: spi@f0024000 {
 				pinctrl-names = "default";
-				pinctrl-0 = <&pinctrl_mikrobus1_uart>;
+				pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>;
 				status = "okay";
+
+				flash@0 {
+					compatible = "jedec,spi-nor";
+					reg = <0>;
+					spi-max-frequency = <83000000>;
+					spi-rx-bus-width = <4>;
+					spi-tx-bus-width = <4>;
+				};
 			};
 
 			macb0: ethernet@f8008000 {
@@ -46,6 +55,12 @@
 				status = "okay";
 			};
 
+			uart0: serial@f801c000 { /* mikrobus1 uart */
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_mikrobus1_uart>;
+				status = "okay";
+			};
+
 			i2c1: i2c@fc028000 {
 				dmas = <0>, <0>;
 				pinctrl-names = "default";
@@ -70,6 +85,7 @@
 					pagesize = <16>;
 				};
 			};
+
 			pioA: gpio@fc038000 {
 				status = "okay";
 				pinctrl {
@@ -109,6 +125,26 @@
 						bias-pull-up;
 					};
 
+					pinctrl_mikrobus1_uart: mikrobus1_uart {
+						pinmux = <PIN_PB26__URXD0>,
+							 <PIN_PB27__UTXD0>;
+						bias-disable;
+					};
+
+					pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
+						pinmux = <PIN_PA6__QSPI1_SCK>,
+							 <PIN_PA11__QSPI1_CS>;
+						bias-disable;
+					};
+
+					pinctrl_qspi1_dat_default: qspi1_dat_default {
+						pinmux = <PIN_PA7__QSPI1_IO0>,
+							 <PIN_PA8__QSPI1_IO1>,
+							 <PIN_PA9__QSPI1_IO2>,
+							 <PIN_PA10__QSPI1_IO3>;
+						bias-pull-up;
+					};
+
 					pinctrl_sdmmc0_default: sdmmc0_default {
 						pinmux = <PIN_PA1__SDMMC0_CMD>,
 							 <PIN_PA2__SDMMC0_DAT0>,
@@ -119,12 +155,6 @@
 							 <PIN_PA13__SDMMC0_CD>;
 						bias-disable;
 					};
-
-					pinctrl_mikrobus1_uart: mikrobus1_uart {
-						pinmux = <PIN_PB26__URXD0>,
-							 <PIN_PB27__UTXD0>;
-						bias-disable;
-					};
 				};
 			};
 		};
diff --git a/arch/arm/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/dts/at91-sama5d2_ptc_ek.dts
index cd3711a..f45fb1e 100644
--- a/arch/arm/dts/at91-sama5d2_ptc_ek.dts
+++ b/arch/arm/dts/at91-sama5d2_ptc_ek.dts
@@ -76,7 +76,7 @@
 			status = "okay";
 		};
 
-		usb1: ohci@00400000 {
+		usb1: ohci@400000 {
 			num-ports = <3>;
 			atmel,vbus-gpio = <0
 					   &pioA PIN_PB12 GPIO_ACTIVE_HIGH
@@ -87,7 +87,7 @@
 			status = "okay";
 		};
 
-		usb2: ehci@00500000 {
+		usb2: ehci@500000 {
 			status = "okay";
 		};
 
diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts b/arch/arm/dts/at91-sama5d2_xplained.dts
index b733c4d..34b64a2 100644
--- a/arch/arm/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/dts/at91-sama5d2_xplained.dts
@@ -12,6 +12,10 @@
 		stdout-path = &uart1;
 	};
 
+	memory {
+		reg = <0x20000000 0x20000000>;
+	};
+
 	onewire_tm: onewire {
 		gpios = <&pioA PIN_PB0 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
@@ -25,7 +29,7 @@
 	};
 
 	ahb {
-		usb1: ohci@00400000 {
+		usb1: ohci@400000 {
 			num-ports = <3>;
 			atmel,vbus-gpio = <&pioA 42 0>;
 			pinctrl-names = "default";
@@ -33,7 +37,7 @@
 			status = "okay";
 		};
 
-		usb2: ehci@00500000 {
+		usb2: ehci@500000 {
 			status = "okay";
 		};
 
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 007646f..e801331 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -50,6 +50,18 @@
 		};
 	};
 
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ARM9260_0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,arm926ej-s";
+			clocks = <&pmc PMC_TYPE_CORE 19>, <&pmc PMC_TYPE_CORE 11>, <&main_xtal>;
+			clock-names = "cpu", "master", "xtal";
+		};
+	};
+
 	ahb {
 		compatible = "simple-bus";
 		#address-cells = <1>;
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
index 77edd59..32ffe93 100644
--- a/arch/arm/dts/sam9x60ek.dts
+++ b/arch/arm/dts/sam9x60ek.dts
@@ -7,6 +7,7 @@
  * Author: Sandeep Sheriker M <Sandeepsheriker.mallikarjun@microchip.com>
  */
 /dts-v1/;
+#include <dt-bindings/mfd/atmel-flexcom.h>
 #include "sam9x60.dtsi"
 
 / {
@@ -57,7 +58,7 @@
 			};
 
 			flx0: flexcom@f801c600 {
-				atmel,flexcom-mode = <3>;
+				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
 				status = "okay";
 
 				i2c@600 {
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 6fb2cb2..d8a125b 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -32,7 +32,7 @@
 		#size-cells = <1>;
 		u-boot,dm-pre-reloc;
 
-		usb1: ohci@00400000 {
+		usb1: ohci@400000 {
 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 			reg = <0x00400000 0x100000>;
 			clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
@@ -40,7 +40,7 @@
 			status = "disabled";
 		};
 
-		usb2: ehci@00500000 {
+		usb2: ehci@500000 {
 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 			reg = <0x00500000 0x100000>;
 			clocks = <&utmi>, <&uhphs_clk>;
diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts
index 3a4fdd3..1c59a8a 100644
--- a/arch/arm/dts/sama7g5ek.dts
+++ b/arch/arm/dts/sama7g5ek.dts
@@ -8,6 +8,7 @@
  *		  2020, Claudiu Beznea <claudiu.beznea@microchip.com>
  */
 /dts-v1/;
+#include <dt-bindings/mfd/atmel-flexcom.h>
 #include "sama7g5.dtsi"
 #include "sama7g5-pinfunc.h"
 
@@ -64,7 +65,7 @@
 };
 
 &flx1 {
-	atmel,flexcom-mode = <3>;
+	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
 	status = "okay";
 };
 
diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h
index 32532b3..2713b1d 100644
--- a/arch/arm/include/asm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -267,7 +267,6 @@
 #define MACH_TYPE_BMS                  259
 #define MACH_TYPE_IXCDP1100            260
 #define MACH_TYPE_PRPMC1100            261
-#define MACH_TYPE_AT91RM9200DK         262
 #define MACH_TYPE_ARMSTICK             263
 #define MACH_TYPE_ARMONIE              264
 #define MACH_TYPE_MPORT1               265
diff --git a/arch/arm/mach-at91/armv7/Makefile b/arch/arm/mach-at91/armv7/Makefile
index f5b2665..246050b 100644
--- a/arch/arm/mach-at91/armv7/Makefile
+++ b/arch/arm/mach-at91/armv7/Makefile
@@ -11,7 +11,9 @@
 obj-$(CONFIG_SAMA5D4)	+= sama5d4_devices.o clock.o
 obj-$(CONFIG_SAMA7G5)	+= sama7g5_devices.o
 obj-y += cpu.o
-obj-y += reset.o
+ifndef CONFIG_$(SPL_TPL_)SYSRESET
+obj-y	+= reset.o
+endif
 ifneq ($(CONFIG_ATMEL_PIT_TIMER),y)
 ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y)
 # old non-DM timer driver
diff --git a/arch/arm/mach-at91/armv7/sama5d2_devices.c b/arch/arm/mach-at91/armv7/sama5d2_devices.c
index 9e9d026..edc2057 100644
--- a/arch/arm/mach-at91/armv7/sama5d2_devices.c
+++ b/arch/arm/mach-at91/armv7/sama5d2_devices.c
@@ -46,6 +46,8 @@
 			return "SAMA5D28-CU";
 		case ARCH_EXID_SAMA5D28CN:
 			return "SAMA5D28-CN";
+		case ARCH_EXID_SAMA5D29CN:
+			return "SAMA5D29-CN";
 		}
 	}
 
diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h
index d1b2e01..9d94627 100644
--- a/arch/arm/mach-at91/include/mach/sama5d2.h
+++ b/arch/arm/mach-at91/include/mach/sama5d2.h
@@ -215,6 +215,7 @@
 #define ARCH_EXID_SAMA5D27CN	0x00000021
 #define ARCH_EXID_SAMA5D28CU	0x00000010
 #define ARCH_EXID_SAMA5D28CN	0x00000020
+#define ARCH_EXID_SAMA5D29CN	0x00000023
 
 #define ARCH_ID_SAMA5D2_SIP		0x8a5c08c2
 #define ARCH_EXID_SAMA5D225C_D1M	0x00000053
diff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
index 1b7d946..8c0cf3d 100644
--- a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
+++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <debug_uart.h>
+#include <fdtdec.h>
 #include <init.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
@@ -68,7 +69,7 @@
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
 
 #ifdef CONFIG_CMD_USB
 	board_usb_hw_init();
@@ -77,11 +78,14 @@
 	return 0;
 }
 
+int dram_init_banksize(void)
+{
+	return fdtdec_setup_memory_banksize();
+}
+
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
-	return 0;
+	return fdtdec_setup_mem_size_base();
 }
 
 #define MAC24AA_MAC_OFFSET	0xfa
diff --git a/board/atmel/sama5d2_icp/MAINTAINERS b/board/atmel/sama5d2_icp/MAINTAINERS
index db984b6..4a65c65 100644
--- a/board/atmel/sama5d2_icp/MAINTAINERS
+++ b/board/atmel/sama5d2_icp/MAINTAINERS
@@ -4,4 +4,5 @@
 F:     board/atmel/sama5d2_icp/
 F:     include/configs/sama5d2_icp.h
 F:     configs/sama5d2_icp_mmc_defconfig
+F:     configs/sama5d2_icp_qspiflash_defconfig
 
diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 5110ec8..8b5cd53 100644
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -68,7 +68,7 @@
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
 
 #ifdef CONFIG_CMD_USB
 	board_usb_hw_init();
@@ -77,11 +77,14 @@
 	return 0;
 }
 
+int dram_init_banksize(void)
+{
+	return fdtdec_setup_memory_banksize();
+}
+
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
-	return 0;
+	return fdtdec_setup_mem_size_base();
 }
 
 #define AT24MAC_MAC_OFFSET	0x9a
diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig
index 9f9d100..4e1b44e 100644
--- a/configs/gardena-smart-gateway-at91sam_defconfig
+++ b/configs/gardena-smart-gateway-at91sam_defconfig
@@ -10,6 +10,7 @@
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MEMTEST_START=0x0
 CONFIG_ENV_SIZE=0x10000
 CONFIG_SYS_MALLOC_LEN=0x1000000
 CONFIG_DM_GPIO=y
@@ -26,6 +27,8 @@
 CONFIG_FIT=y
 CONFIG_NAND_BOOT=y
 CONFIG_BOOTDELAY=0
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_STOP_STR="x"
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -36,20 +39,26 @@
 CONFIG_SPL_NAND_DRIVERS=y
 CONFIG_SPL_NAND_BASE=y
 CONFIG_HUSH_PARSER=y
+CONFIG_CMD_LICENSE=y
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
 CONFIG_CMD_DM=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MTD=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_WDT=y
-# CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+CONFIG_CMD_UUID=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
 CONFIG_MTDIDS_DEFAULT="nand0=atmel_nand"
 CONFIG_MTDPARTS_DEFAULT="atmel_nand:1536k(uboot),10752k(unused),-(ubi)"
 CONFIG_CMD_UBI=y
@@ -62,6 +71,8 @@
 CONFIG_ENV_UBI_VOLUME="uboot_env0"
 CONFIG_ENV_UBI_VOLUME_REDUND="uboot_env1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_VERSION_VARIABLE=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
@@ -75,6 +86,7 @@
 CONFIG_MTD=y
 CONFIG_NAND_ATMEL=y
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
@@ -88,3 +100,4 @@
 CONFIG_WDT=y
 CONFIG_WDT_AT91=y
 # CONFIG_UBIFS_SILENCE_MSG is not set
+CONFIG_LZMA=y
diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig
index b262332..178f113 100644
--- a/configs/sam9x60ek_mmc_defconfig
+++ b/configs/sam9x60ek_mmc_defconfig
@@ -47,6 +47,7 @@
 CONFIG_CLK_AT91=y
 CONFIG_AT91_GENERIC_CLK=y
 CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_CPU=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_AT91=y
diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig
index 14a8094..67924fc 100644
--- a/configs/sam9x60ek_nandflash_defconfig
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -49,6 +49,7 @@
 CONFIG_CLK_AT91=y
 CONFIG_AT91_GENERIC_CLK=y
 CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_CPU=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_AT91=y
diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig
index a23f1c2..07bc753 100644
--- a/configs/sam9x60ek_qspiflash_defconfig
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -57,6 +57,7 @@
 CONFIG_CLK_AT91=y
 CONFIG_AT91_GENERIC_CLK=y
 CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_CPU=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_AT91=y
diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig
new file mode 100644
index 0000000..bf442bf
--- /dev/null
+++ b/configs/sama5d2_icp_qspiflash_defconfig
@@ -0,0 +1,104 @@
+CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TARGET_SAMA5D2_ICP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MEMTEST_START=0x20000000
+CONFIG_SYS_MEMTEST_END=0x40000000
+CONFIG_ENV_SIZE=0x4000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp"
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0xf801c000
+CONFIG_DEBUG_UART_CLOCK=83000000
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
+CONFIG_SYS_BOOT_GET_CMDLINE=y
+CONFIG_SYS_BOOT_GET_KBD=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
+CONFIG_QSPI_BOOT=y
+CONFIG_SD_BOOT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlycon earlyprintk=serial,ttyS0, ignore_loglevel root=/dev/mmcblk0p2 memtest=0 rootfstype=ext4 rw rootwait"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CONFIG=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_GETTIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=2
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=0
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=66000000
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0x0
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_ATMEL_PIO4=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_EEPROM=y
+CONFIG_MICROCHIP_FLEXCOM=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_SPEED=66000000
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_QSPI=y
+CONFIG_TIMER=y
+CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_OF_LIBFDT=y
+# CONFIG_EFI_LOADER_HII is not set
diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig
index bd6cbcc..bb03db4 100644
--- a/configs/sama7g5ek_mmc1_defconfig
+++ b/configs/sama7g5ek_mmc1_defconfig
@@ -19,6 +19,8 @@
 CONFIG_SD_BOOT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk1p2 rw rootwait"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 1:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000"
 CONFIG_MISC_INIT_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig
index 83026eb..b5dd64c 100644
--- a/configs/sama7g5ek_mmc_defconfig
+++ b/configs/sama7g5ek_mmc_defconfig
@@ -19,6 +19,8 @@
 CONFIG_SD_BOOT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 0:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000"
 CONFIG_MISC_INIT_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index 5d93e6a..aec0bca 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -12,13 +12,15 @@
 #include <asm/processor.h>
 #include <clk-uclass.h>
 #include <common.h>
+#include <div64.h>
 #include <dm.h>
 #include <linux/clk-provider.h>
 #include <linux/clk/at91_pmc.h>
 
 #include "pmc.h"
 
-#define UBOOT_DM_CLK_AT91_MASTER		"at91-master-clk"
+#define UBOOT_DM_CLK_AT91_MASTER_PRES		"at91-master-clk-pres"
+#define UBOOT_DM_CLK_AT91_MASTER_DIV		"at91-master-clk-div"
 #define UBOOT_DM_CLK_AT91_SAMA7G5_MASTER	"at91-sama7g5-master-clk"
 
 #define MASTER_PRES_MASK	0x7
@@ -73,7 +75,7 @@
 	return 0;
 }
 
-static ulong clk_master_get_rate(struct clk *clk)
+static ulong clk_master_pres_get_rate(struct clk *clk)
 {
 	struct clk_master *master = to_clk_master(clk);
 	const struct clk_master_layout *layout = master->layout;
@@ -81,7 +83,7 @@
 						master->characteristics;
 	ulong rate = clk_get_parent_rate(clk);
 	unsigned int mckr;
-	u8 pres, div;
+	u8 pres;
 
 	if (!rate)
 		return 0;
@@ -90,29 +92,21 @@
 	mckr &= layout->mask;
 
 	pres = (mckr >> layout->pres_shift) & MASTER_PRES_MASK;
-	div = (mckr >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK;
 
 	if (characteristics->have_div3_pres && pres == MASTER_PRES_MAX)
-		rate /= 3;
+		pres = 3;
 	else
-		rate >>= pres;
-
-	rate /= characteristics->divisors[div];
-
-	if (rate < characteristics->output.min)
-		pr_warn("master clk is underclocked");
-	else if (rate > characteristics->output.max)
-		pr_warn("master clk is overclocked");
+		pres = (1 << pres);
 
-	return rate;
+	return DIV_ROUND_CLOSEST_ULL(rate, pres);
 }
 
-static const struct clk_ops master_ops = {
+static const struct clk_ops master_pres_ops = {
 	.enable = clk_master_enable,
-	.get_rate = clk_master_get_rate,
+	.get_rate = clk_master_pres_get_rate,
 };
 
-struct clk *at91_clk_register_master(void __iomem *base,
+struct clk *at91_clk_register_master_pres(void __iomem *base,
 		const char *name, const char * const *parent_names,
 		int num_parents, const struct clk_master_layout *layout,
 		const struct clk_master_characteristics *characteristics,
@@ -140,7 +134,7 @@
 	pmc_read(master->base, master->layout->offset, &val);
 	clk = &master->clk;
 	clk->flags = CLK_GET_RATE_NOCACHE | CLK_IS_CRITICAL;
-	ret = clk_register(clk, UBOOT_DM_CLK_AT91_MASTER, name,
+	ret = clk_register(clk, UBOOT_DM_CLK_AT91_MASTER_PRES, name,
 			   parent_names[val & AT91_PMC_CSS]);
 	if (ret) {
 		kfree(master);
@@ -150,10 +144,81 @@
 	return clk;
 }
 
+U_BOOT_DRIVER(at91_master_pres_clk) = {
+	.name = UBOOT_DM_CLK_AT91_MASTER_PRES,
+	.id = UCLASS_CLK,
+	.ops = &master_pres_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
+
+static ulong clk_master_div_get_rate(struct clk *clk)
+{
+	struct clk_master *master = to_clk_master(clk);
+	const struct clk_master_layout *layout = master->layout;
+	const struct clk_master_characteristics *characteristics =
+						master->characteristics;
+	ulong rate = clk_get_parent_rate(clk);
+	unsigned int mckr;
+	u8 div;
+
+	if (!rate)
+		return 0;
+
+	pmc_read(master->base, master->layout->offset, &mckr);
+	mckr &= layout->mask;
+	div = (mckr >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK;
+
+	rate = DIV_ROUND_CLOSEST_ULL(rate, characteristics->divisors[div]);
+	if (rate < characteristics->output.min)
+		pr_warn("master clk is underclocked");
+	else if (rate > characteristics->output.max)
+		pr_warn("master clk is overclocked");
+
+	return rate;
+}
+
+static const struct clk_ops master_div_ops = {
+	.enable = clk_master_enable,
+	.get_rate = clk_master_div_get_rate,
+};
+
+struct clk *at91_clk_register_master_div(void __iomem *base,
+		const char *name, const char *parent_name,
+		const struct clk_master_layout *layout,
+		const struct clk_master_characteristics *characteristics)
+{
+	struct clk_master *master;
+	struct clk *clk;
+	int ret;
+
+	if (!base || !name || !parent_name || !layout || !characteristics)
+		return ERR_PTR(-EINVAL);
+
+	master = kzalloc(sizeof(*master), GFP_KERNEL);
+	if (!master)
+		return ERR_PTR(-ENOMEM);
+
+	master->layout = layout;
+	master->characteristics = characteristics;
+	master->base = base;
+	master->num_parents = 1;
+
+	clk = &master->clk;
+	clk->flags = CLK_GET_RATE_NOCACHE | CLK_IS_CRITICAL;
+	ret = clk_register(clk, UBOOT_DM_CLK_AT91_MASTER_DIV, name,
+			   parent_name);
+	if (ret) {
+		kfree(master);
+		clk = ERR_PTR(ret);
+	}
+
+	return clk;
+}
+
-U_BOOT_DRIVER(at91_master_clk) = {
-	.name = UBOOT_DM_CLK_AT91_MASTER,
+U_BOOT_DRIVER(at91_master_div_clk) = {
+	.name = UBOOT_DM_CLK_AT91_MASTER_DIV,
 	.id = UCLASS_CLK,
-	.ops = &master_ops,
+	.ops = &master_div_ops,
 	.flags = DM_FLAG_PRE_RELOC,
 };
 
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index f07f535..2b4dd9a 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -97,12 +97,17 @@
 			const struct clk_pll_characteristics *characteristics,
 			const struct clk_pll_layout *layout, bool critical);
 struct clk *
-at91_clk_register_master(void __iomem *base, const char *name,
+at91_clk_register_master_pres(void __iomem *base, const char *name,
 			const char * const *parent_names, int num_parents,
 			const struct clk_master_layout *layout,
 			const struct clk_master_characteristics *characteristics,
 			const u32 *mux_table);
 struct clk *
+at91_clk_register_master_div(void __iomem *base,
+			const char *name, const char *parent_name,
+			const struct clk_master_layout *layout,
+			const struct clk_master_characteristics *characteristics);
+struct clk *
 at91_clk_sama7g5_register_master(void __iomem *base, const char *name,
 			const char * const *parent_names, int num_parents,
 			const u32 *mux_table, const u32 *clk_mux_table,
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 9e9a643..4d00ee2 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -31,7 +31,7 @@
  * @ID_PLL_A_FRAC:		APLL fractional clock identifier
  * @ID_PLL_A_DIV:		APLL divider clock identifier
 
- * @ID_MCK:			MCK clock identifier
+ * @ID_MCK_DIV:			MCK DIV clock identifier
 
  * @ID_UTMI:			UTMI clock identifier
 
@@ -43,6 +43,8 @@
  * @ID_DDR:			DDR system clock identifier
  * @ID_QSPI:			QSPI system clock identifier
  *
+ * @ID_MCK_PRES:		MCK PRES clock identifier
+ *
  * Note: if changing the values of this enums please sync them with
  *       device tree
  */
@@ -60,7 +62,7 @@
 	ID_PLL_A_FRAC		= 9,
 	ID_PLL_A_DIV		= 10,
 
-	ID_MCK			= 11,
+	ID_MCK_DIV		= 11,
 
 	ID_UTMI			= 12,
 
@@ -73,6 +75,8 @@
 	ID_DDR			= 17,
 	ID_QSPI			= 18,
 
+	ID_MCK_PRES		= 19,
+
 	ID_MAX,
 };
 
@@ -93,7 +97,8 @@
 	[ID_MAINCK]		= "mainck",
 	[ID_PLL_U_DIV]		= "upll_divpmcck",
 	[ID_PLL_A_DIV]		= "plla_divpmcck",
-	[ID_MCK]		= "mck",
+	[ID_MCK_PRES]		= "mck_pres",
+	[ID_MCK_DIV]		= "mck_div",
 };
 
 /* Fractional PLL output range. */
@@ -260,10 +265,10 @@
 	u8 id;
 	u8 cid;
 } sam9x60_systemck[] = {
-	{ .n = "ddrck",		.p = "mck", .id = 2, .cid = ID_DDR, },
+	{ .n = "ddrck",		.p = "mck_pres", .id = 2, .cid = ID_DDR, },
 	{ .n = "pck0",		.p = "prog0",    .id = 8, .cid = ID_PCK0, },
 	{ .n = "pck1",		.p = "prog1",    .id = 9, .cid = ID_PCK1, },
-	{ .n = "qspick",	.p = "mck", .id = 19, .cid = ID_QSPI, },
+	{ .n = "qspick",	.p = "mck_pres", .id = 19, .cid = ID_QSPI, },
 };
 
 /**
@@ -508,7 +513,7 @@
 		clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, sam9x60_plls[i].cid), c);
 	}
 
-	/* Register MCK clock. */
+	/* Register MCK pres clock. */
 	p[0] = clk_names[ID_MD_SLCK];
 	p[1] = clk_names[ID_MAINCK];
 	p[2] = clk_names[ID_PLL_A_DIV];
@@ -519,25 +524,36 @@
 	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV);
 	prepare_mux_table(clkmuxallocs, clkmuxallocindex, tmpclkmux, cm, 4,
 			  fail);
-	c = at91_clk_register_master(base, clk_names[ID_MCK], p, 4, &mck_layout,
-				     &mck_characteristics, tmpclkmux);
+	c = at91_clk_register_master_pres(base, clk_names[ID_MCK_PRES], p, 4,
+					  &mck_layout, &mck_characteristics,
+					  tmpclkmux);
+	if (IS_ERR(c)) {
+		ret = PTR_ERR(c);
+		goto fail;
+	}
+	clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_PRES), c);
+
+	/* Register MCK div clock. */
+	c = at91_clk_register_master_div(base, clk_names[ID_MCK_DIV],
+					 clk_names[ID_MCK_PRES],
+					 &mck_layout, &mck_characteristics);
 	if (IS_ERR(c)) {
 		ret = PTR_ERR(c);
 		goto fail;
 	}
-	clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK), c);
+	clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV), c);
 
 	/* Register programmable clocks. */
 	p[0] = clk_names[ID_MD_SLCK];
 	p[1] = clk_names[ID_TD_SLCK];
 	p[2] = clk_names[ID_MAINCK];
-	p[3] = clk_names[ID_MCK];
+	p[3] = clk_names[ID_MCK_DIV];
 	p[4] = clk_names[ID_PLL_A_DIV];
 	p[5] = clk_names[ID_PLL_U_DIV];
 	cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
 	cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
 	cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
-	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK);
+	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV);
 	cm[4] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_A_DIV);
 	cm[5] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV);
 	for (i = 0; i < ARRAY_SIZE(sam9x60_prog); i++) {
@@ -572,7 +588,7 @@
 	for (i = 0; i < ARRAY_SIZE(sam9x60_periphck); i++) {
 		c = at91_clk_register_sam9x5_peripheral(base, &pcr_layout,
 							sam9x60_periphck[i].n,
-							clk_names[ID_MCK],
+							clk_names[ID_MCK_DIV],
 							sam9x60_periphck[i].id,
 							&r);
 		if (IS_ERR(c)) {
@@ -587,7 +603,7 @@
 	p[0] = clk_names[ID_MD_SLCK];
 	p[1] = clk_names[ID_TD_SLCK];
 	p[2] = clk_names[ID_MAINCK];
-	p[3] = clk_names[ID_MCK];
+	p[3] = clk_names[ID_MCK_DIV];
 	p[4] = clk_names[ID_PLL_A_DIV];
 	p[5] = clk_names[ID_PLL_U_DIV];
 	m[0] = 0;
@@ -599,7 +615,7 @@
 	cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
 	cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
 	cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
-	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK);
+	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV);
 	cm[4] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_A_DIV);
 	cm[5] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV);
 	for (i = 0; i < ARRAY_SIZE(sam9x60_gck); i++) {
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index c0d9271..d1ec3c8 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -44,7 +44,8 @@
  * @ID_PLL_ETH_FRAC:		Ethernet PLL fractional clock identifier
  * @ID_PLL_ETH_DIV:		Ethernet PLL divider clock identifier
 
- * @ID_MCK0:			MCK0 clock identifier
+ * @ID_MCK0_PRES:		MCK0 PRES clock identifier
+ * @ID_MCK0_DIV:		MCK0 DIV clock identifier
  * @ID_MCK1:			MCK1 clock identifier
  * @ID_MCK2:			MCK2 clock identifier
  * @ID_MCK3:			MCK3 clock identifier
@@ -95,7 +96,7 @@
 	ID_PLL_ETH_FRAC		= 20,
 	ID_PLL_ETH_DIV		= 21,
 
-	ID_MCK0			= 22,
+	ID_MCK0_DIV		= 22,
 	ID_MCK1			= 23,
 	ID_MCK2			= 24,
 	ID_MCK3			= 25,
@@ -121,6 +122,8 @@
 	ID_PCK6			= 42,
 	ID_PCK7			= 43,
 
+	ID_MCK0_PRES		= 44,
+
 	ID_MAX,
 };
 
@@ -147,7 +150,8 @@
 	[ID_PLL_AUDIO_DIVPMC]	= "audiopll_divpmcck",
 	[ID_PLL_AUDIO_DIVIO]	= "audiopll_diviock",
 	[ID_PLL_ETH_DIV]	= "ethpll_divpmcck",
-	[ID_MCK0]		= "mck0",
+	[ID_MCK0_DIV]		= "mck0_div",
+	[ID_MCK0_PRES]		= "mck0_pres",
 };
 
 /* Fractional PLL output range. */
@@ -504,7 +508,7 @@
 	struct clk_range r;
 	u8 id;
 } sama7g5_periphck[] = {
-	{ .n = "pioA_clk",	.p = "mck0", .id = 11, },
+	{ .n = "pioA_clk",	.p = "mck0_div", .id = 11, },
 	{ .n = "sfr_clk",	.p = "mck1", .id = 19, },
 	{ .n = "hsmc_clk",	.p = "mck1", .id = 21, },
 	{ .n = "xdmac0_clk",	.p = "mck1", .id = 22, },
@@ -514,7 +518,7 @@
 	{ .n = "aes_clk",	.p = "mck1", .id = 27, },
 	{ .n = "tzaesbasc_clk",	.p = "mck1", .id = 28, },
 	{ .n = "asrc_clk",	.p = "mck1", .id = 30, .r = { .max = 200000000, }, },
-	{ .n = "cpkcc_clk",	.p = "mck0", .id = 32, },
+	{ .n = "cpkcc_clk",	.p = "mck0_div", .id = 32, },
 	{ .n = "csi_clk",	.p = "mck3", .id = 33, .r = { .max = 266000000, }, },
 	{ .n = "csi2dc_clk",	.p = "mck3", .id = 34, .r = { .max = 266000000, }, },
 	{ .n = "eic_clk",	.p = "mck1", .id = 37, },
@@ -1210,7 +1214,7 @@
 			sama7g5_plls[i].c));
 	}
 
-	/* Register MCK0 clock. */
+	/* Register MCK0_PRES clock. */
 	p[0] = clk_names[ID_MD_SLCK];
 	p[1] = clk_names[ID_MAINCK];
 	p[2] = clk_names[ID_PLL_CPU_DIV];
@@ -1221,15 +1225,19 @@
 	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_SYS_DIV);
 	prepare_mux_table(clkmuxallocs, clkmuxallocindex, tmpclkmux, cm, 2,
 			  fail);
-	clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0),
-		at91_clk_register_master(base, clk_names[ID_MCK0], p,
+	clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_PRES),
+		at91_clk_register_master_pres(base, clk_names[ID_MCK0_PRES], p,
 		4, &mck0_layout, &mck0_characteristics, tmpclkmux));
 
+	clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_DIV),
+		at91_clk_register_master_div(base, clk_names[ID_MCK0_DIV],
+		clk_names[ID_MCK0_PRES], &mck0_layout, &mck0_characteristics));
+
 	/* Register MCK1-4 clocks. */
 	p[0] = clk_names[ID_MD_SLCK];
 	p[1] = clk_names[ID_TD_SLCK];
 	p[2] = clk_names[ID_MAINCK];
-	p[3] = clk_names[ID_MCK0];
+	p[3] = clk_names[ID_MCK0_DIV];
 	m[0] = 0;
 	m[1] = 1;
 	m[2] = 2;
@@ -1237,7 +1245,7 @@
 	cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
 	cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
 	cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
-	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0);
+	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_DIV);
 	for (i = 0; i < ARRAY_SIZE(sama7g5_mckx); i++) {
 		for (j = 0; j < sama7g5_mckx[i].ep_count; j++) {
 			p[4 + j] = sama7g5_mckx[i].ep[j];
@@ -1267,7 +1275,7 @@
 	p[0] = clk_names[ID_MD_SLCK];
 	p[1] = clk_names[ID_TD_SLCK];
 	p[2] = clk_names[ID_MAINCK];
-	p[3] = clk_names[ID_MCK0];
+	p[3] = clk_names[ID_MCK0_DIV];
 	p[4] = clk_names[ID_PLL_SYS_DIV];
 	p[5] = clk_names[ID_PLL_DDR_DIV];
 	p[6] = clk_names[ID_PLL_IMG_DIV];
@@ -1277,7 +1285,7 @@
 	cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
 	cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
 	cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
-	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0);
+	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_DIV);
 	cm[4] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_SYS_DIV);
 	cm[5] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_DDR_DIV);
 	cm[6] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_IMG_DIV);
@@ -1315,7 +1323,7 @@
 	p[0] = clk_names[ID_MD_SLCK];
 	p[1] = clk_names[ID_TD_SLCK];
 	p[2] = clk_names[ID_MAINCK];
-	p[3] = clk_names[ID_MCK0];
+	p[3] = clk_names[ID_MCK0_DIV];
 	m[0] = 0;
 	m[1] = 1;
 	m[2] = 2;
@@ -1323,7 +1331,7 @@
 	cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
 	cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
 	cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
-	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0);
+	cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_DIV);
 	for (i = 0; i < ARRAY_SIZE(sama7g5_gck); i++) {
 		for (j = 0; j < sama7g5_gck[i].ep_count; j++) {
 			p[4 + j] = sama7g5_gck[i].ep[j];
diff --git a/drivers/cpu/at91_cpu.c b/drivers/cpu/at91_cpu.c
index 9ef1b31..34a3f61 100644
--- a/drivers/cpu/at91_cpu.c
+++ b/drivers/cpu/at91_cpu.c
@@ -70,6 +70,7 @@
 
 static const struct udevice_id at91_cpu_ids[] = {
 	{ .compatible = "arm,cortex-a7" },
+	{ .compatible = "arm,arm926ej-s" },
 	{ /* Sentinel. */ }
 };
 
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 96c061a..e4078d1 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -11,7 +11,6 @@
 obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
 obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o
 obj-$(CONFIG_BCMGENET) += bcmgenet.o
-obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
 obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o
 obj-$(CONFIG_BCM_SF2_ETH_GMAC) += bcm-sf2-eth-gmac.o
diff --git a/drivers/net/at91_emac.c b/drivers/net/at91_emac.c
deleted file mode 100644
index e40b94a..0000000
--- a/drivers/net/at91_emac.c
+++ /dev/null
@@ -1,519 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2009 BuS Elektronik GmbH & Co. KG
- * Jens Scharsig (esw@bus-elektronik.de)
- *
- * (C) Copyright 2003
- * Author : Hamid Ikdoumi (Atmel)
- */
-
-#include <common.h>
-#include <log.h>
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/at91_emac.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/at91_pio.h>
-#include <net.h>
-#include <netdev.h>
-#include <malloc.h>
-#include <miiphy.h>
-#include <linux/delay.h>
-#include <linux/mii.h>
-
-#undef MII_DEBUG
-#undef ET_DEBUG
-
-#if (CONFIG_SYS_RX_ETH_BUFFER > 1024)
-#error AT91 EMAC supports max 1024 RX buffers. \
-	Please decrease the CONFIG_SYS_RX_ETH_BUFFER value
-#endif
-
-#ifndef CONFIG_DRIVER_AT91EMAC_PHYADDR
-#define CONFIG_DRIVER_AT91EMAC_PHYADDR	0
-#endif
-
-/* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */
-#if (AT91C_MASTER_CLOCK > 80000000)
-	#define HCLK_DIV	AT91_EMAC_CFG_MCLK_64
-#elif (AT91C_MASTER_CLOCK > 40000000)
-	#define HCLK_DIV	AT91_EMAC_CFG_MCLK_32
-#elif (AT91C_MASTER_CLOCK > 20000000)
-	#define HCLK_DIV	AT91_EMAC_CFG_MCLK_16
-#else
-	#define HCLK_DIV	AT91_EMAC_CFG_MCLK_8
-#endif
-
-#ifdef ET_DEBUG
-#define DEBUG_AT91EMAC	1
-#else
-#define DEBUG_AT91EMAC	0
-#endif
-
-#ifdef MII_DEBUG
-#define DEBUG_AT91PHY	1
-#else
-#define DEBUG_AT91PHY	0
-#endif
-
-#ifndef CONFIG_DRIVER_AT91EMAC_QUIET
-#define VERBOSEP	1
-#else
-#define VERBOSEP	0
-#endif
-
-#define RBF_ADDR      0xfffffffc
-#define RBF_OWNER     (1<<0)
-#define RBF_WRAP      (1<<1)
-#define RBF_BROADCAST (1<<31)
-#define RBF_MULTICAST (1<<30)
-#define RBF_UNICAST   (1<<29)
-#define RBF_EXTERNAL  (1<<28)
-#define RBF_UNKNOWN   (1<<27)
-#define RBF_SIZE      0x07ff
-#define RBF_LOCAL4    (1<<26)
-#define RBF_LOCAL3    (1<<25)
-#define RBF_LOCAL2    (1<<24)
-#define RBF_LOCAL1    (1<<23)
-
-#define RBF_FRAMEMAX CONFIG_SYS_RX_ETH_BUFFER
-#define RBF_FRAMELEN 0x600
-
-typedef struct {
-	unsigned long addr, size;
-} rbf_t;
-
-typedef struct {
-	rbf_t 		rbfdt[RBF_FRAMEMAX];
-	unsigned long	rbindex;
-} emac_device;
-
-void at91emac_EnableMDIO(at91_emac_t *at91mac)
-{
-	/* Mac CTRL reg set for MDIO enable */
-	writel(readl(&at91mac->ctl) | AT91_EMAC_CTL_MPE, &at91mac->ctl);
-}
-
-void at91emac_DisableMDIO(at91_emac_t *at91mac)
-{
-	/* Mac CTRL reg set for MDIO disable */
-	writel(readl(&at91mac->ctl) & ~AT91_EMAC_CTL_MPE, &at91mac->ctl);
-}
-
-int  at91emac_read(at91_emac_t *at91mac, unsigned char addr,
-		unsigned char reg, unsigned short *value)
-{
-	unsigned long netstat;
-	at91emac_EnableMDIO(at91mac);
-
-	writel(AT91_EMAC_MAN_HIGH | AT91_EMAC_MAN_RW_R |
-		AT91_EMAC_MAN_REGA(reg) | AT91_EMAC_MAN_CODE_802_3 |
-		AT91_EMAC_MAN_PHYA(addr),
-		&at91mac->man);
-
-	do {
-		netstat = readl(&at91mac->sr);
-		debug_cond(DEBUG_AT91PHY, "poll SR %08lx\n", netstat);
-	} while (!(netstat & AT91_EMAC_SR_IDLE));
-
-	*value = readl(&at91mac->man) & AT91_EMAC_MAN_DATA_MASK;
-
-	at91emac_DisableMDIO(at91mac);
-
-	debug_cond(DEBUG_AT91PHY,
-		"AT91PHY read %p REG(%d)=%x\n", at91mac, reg, *value);
-
-	return 0;
-}
-
-int  at91emac_write(at91_emac_t *at91mac, unsigned char addr,
-		unsigned char reg, unsigned short value)
-{
-	unsigned long netstat;
-	debug_cond(DEBUG_AT91PHY,
-		"AT91PHY write %p REG(%d)=%p\n", at91mac, reg, &value);
-
-	at91emac_EnableMDIO(at91mac);
-
-	writel(AT91_EMAC_MAN_HIGH | AT91_EMAC_MAN_RW_W |
-		AT91_EMAC_MAN_REGA(reg) | AT91_EMAC_MAN_CODE_802_3 |
-		AT91_EMAC_MAN_PHYA(addr) | (value & AT91_EMAC_MAN_DATA_MASK),
-		&at91mac->man);
-
-	do {
-		netstat = readl(&at91mac->sr);
-		debug_cond(DEBUG_AT91PHY, "poll SR %08lx\n", netstat);
-	} while (!(netstat & AT91_EMAC_SR_IDLE));
-
-	at91emac_DisableMDIO(at91mac);
-
-	return 0;
-}
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-
-at91_emac_t *get_emacbase_by_name(const char *devname)
-{
-	struct eth_device *netdev;
-
-	netdev = eth_get_dev_by_name(devname);
-	return (at91_emac_t *) netdev->iobase;
-}
-
-int at91emac_mii_read(struct mii_dev *bus, int addr, int devad, int reg)
-{
-	unsigned short value = 0;
-	at91_emac_t *emac;
-
-	emac = get_emacbase_by_name(bus->name);
-	at91emac_read(emac , addr, reg, &value);
-	return value;
-}
-
-
-int at91emac_mii_write(struct mii_dev *bus, int addr, int devad, int reg,
-		       u16 value)
-{
-	at91_emac_t *emac;
-
-	emac = get_emacbase_by_name(bus->name);
-	at91emac_write(emac, addr, reg, value);
-	return 0;
-}
-
-#endif
-
-static int at91emac_phy_reset(struct eth_device *netdev)
-{
-	int i;
-	u16 status, adv;
-	at91_emac_t *emac;
-
-	emac = (at91_emac_t *) netdev->iobase;
-
-	adv = ADVERTISE_CSMA | ADVERTISE_ALL;
-	at91emac_write(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
-		MII_ADVERTISE, adv);
-	debug_cond(VERBOSEP, "%s: Starting autonegotiation...\n", netdev->name);
-	at91emac_write(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_BMCR,
-		(BMCR_ANENABLE | BMCR_ANRESTART));
-
-	for (i = 0; i < 30000; i++) {
-		at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
-			MII_BMSR, &status);
-		if (status & BMSR_ANEGCOMPLETE)
-			break;
-		udelay(100);
-	}
-
-	if (status & BMSR_ANEGCOMPLETE) {
-		debug_cond(VERBOSEP,
-			"%s: Autonegotiation complete\n", netdev->name);
-	} else {
-		printf("%s: Autonegotiation timed out (status=0x%04x)\n",
-		       netdev->name, status);
-		return -1;
-	}
-	return 0;
-}
-
-static int at91emac_phy_init(struct eth_device *netdev)
-{
-	u16 phy_id, status, adv, lpa;
-	int media, speed, duplex;
-	int i;
-	at91_emac_t *emac;
-
-	emac = (at91_emac_t *) netdev->iobase;
-
-	/* Check if the PHY is up to snuff... */
-	at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
-		MII_PHYSID1, &phy_id);
-	if (phy_id == 0xffff) {
-		printf("%s: No PHY present\n", netdev->name);
-		return -1;
-	}
-
-	at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
-		MII_BMSR, &status);
-
-	if (!(status & BMSR_LSTATUS)) {
-		/* Try to re-negotiate if we don't have link already. */
-		if (at91emac_phy_reset(netdev))
-			return -2;
-
-		for (i = 0; i < 100000 / 100; i++) {
-			at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
-				MII_BMSR, &status);
-			if (status & BMSR_LSTATUS)
-				break;
-			udelay(100);
-		}
-	}
-	if (!(status & BMSR_LSTATUS)) {
-		debug_cond(VERBOSEP, "%s: link down\n", netdev->name);
-		return -3;
-	} else {
-		at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
-			MII_ADVERTISE, &adv);
-		at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
-			MII_LPA, &lpa);
-		media = mii_nway_result(lpa & adv);
-		speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
-			 ? 1 : 0);
-		duplex = (media & ADVERTISE_FULL) ? 1 : 0;
-		debug_cond(VERBOSEP, "%s: link up, %sMbps %s-duplex\n",
-		       netdev->name,
-		       speed ? "100" : "10",
-		       duplex ? "full" : "half");
-	}
-	return 0;
-}
-
-int at91emac_UpdateLinkSpeed(at91_emac_t *emac)
-{
-	unsigned short stat1;
-
-	at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_BMSR, &stat1);
-
-	if (!(stat1 & BMSR_LSTATUS))	/* link status up? */
-		return -1;
-
-	if (stat1 & BMSR_100FULL) {
-		/*set Emac for 100BaseTX and Full Duplex  */
-		writel(readl(&emac->cfg) |
-			AT91_EMAC_CFG_SPD | AT91_EMAC_CFG_FD,
-			&emac->cfg);
-		return 0;
-	}
-
-	if (stat1 & BMSR_10FULL) {
-		/*set MII for 10BaseT and Full Duplex  */
-		writel((readl(&emac->cfg) &
-			~(AT91_EMAC_CFG_SPD | AT91_EMAC_CFG_FD)
-			) | AT91_EMAC_CFG_FD,
-			&emac->cfg);
-		return 0;
-	}
-
-	if (stat1 & BMSR_100HALF) {
-		/*set MII for 100BaseTX and Half Duplex  */
-		writel((readl(&emac->cfg) &
-			~(AT91_EMAC_CFG_SPD | AT91_EMAC_CFG_FD)
-			) | AT91_EMAC_CFG_SPD,
-			&emac->cfg);
-		return 0;
-	}
-
-	if (stat1 & BMSR_10HALF) {
-		/*set MII for 10BaseT and Half Duplex  */
-		writel((readl(&emac->cfg) &
-			~(AT91_EMAC_CFG_SPD | AT91_EMAC_CFG_FD)),
-			&emac->cfg);
-		return 0;
-	}
-	return 0;
-}
-
-static int at91emac_init(struct eth_device *netdev, struct bd_info *bd)
-{
-	int i;
-	u32 value;
-	emac_device *dev;
-	at91_emac_t *emac;
-	at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
-
-	emac = (at91_emac_t *) netdev->iobase;
-	dev = (emac_device *) netdev->priv;
-
-	/* PIO Disable Register */
-	value =	ATMEL_PMX_AA_EMDIO |	ATMEL_PMX_AA_EMDC |
-		ATMEL_PMX_AA_ERXER |	ATMEL_PMX_AA_ERX1 |
-		ATMEL_PMX_AA_ERX0 |	ATMEL_PMX_AA_ECRS |
-		ATMEL_PMX_AA_ETX1 |	ATMEL_PMX_AA_ETX0 |
-		ATMEL_PMX_AA_ETXEN |	ATMEL_PMX_AA_EREFCK;
-
-	writel(value, &pio->pioa.pdr);
-	writel(value, &pio->pioa.mux.pio2.asr);
-
-#ifdef CONFIG_RMII
-	value = ATMEL_PMX_BA_ERXCK;
-#else
-	value = ATMEL_PMX_BA_ERXCK |	ATMEL_PMX_BA_ECOL |
-		ATMEL_PMX_BA_ERXDV |	ATMEL_PMX_BA_ERX3 |
-		ATMEL_PMX_BA_ERX2 |	ATMEL_PMX_BA_ETXER |
-		ATMEL_PMX_BA_ETX3 |	ATMEL_PMX_BA_ETX2;
-#endif
-	writel(value, &pio->piob.pdr);
-	writel(value, &pio->piob.mux.pio2.bsr);
-
-	at91_periph_clk_enable(ATMEL_ID_EMAC);
-
-	writel(readl(&emac->ctl) | AT91_EMAC_CTL_CSR, &emac->ctl);
-
-	/* Init Ethernet buffers */
-	for (i = 0; i < RBF_FRAMEMAX; i++) {
-		dev->rbfdt[i].addr = (unsigned long) net_rx_packets[i];
-		dev->rbfdt[i].size = 0;
-	}
-	dev->rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;
-	dev->rbindex = 0;
-	writel((u32) &(dev->rbfdt[0]), &emac->rbqp);
-
-	writel(readl(&emac->rsr) &
-		~(AT91_EMAC_RSR_OVR | AT91_EMAC_RSR_REC | AT91_EMAC_RSR_BNA),
-		&emac->rsr);
-
-	value = AT91_EMAC_CFG_CAF |	AT91_EMAC_CFG_NBC |
-		HCLK_DIV;
-#ifdef CONFIG_RMII
-	value |= AT91_EMAC_CFG_RMII;
-#endif
-	writel(value, &emac->cfg);
-
-	writel(readl(&emac->ctl) | AT91_EMAC_CTL_TE | AT91_EMAC_CTL_RE,
-		&emac->ctl);
-
-	if (!at91emac_phy_init(netdev)) {
-		at91emac_UpdateLinkSpeed(emac);
-		return 0;
-	}
-	return -1;
-}
-
-static void at91emac_halt(struct eth_device *netdev)
-{
-	at91_emac_t *emac;
-
-	emac = (at91_emac_t *) netdev->iobase;
-	writel(readl(&emac->ctl) & ~(AT91_EMAC_CTL_TE | AT91_EMAC_CTL_RE),
-		&emac->ctl);
-	debug_cond(DEBUG_AT91EMAC, "halt MAC\n");
-}
-
-static int at91emac_send(struct eth_device *netdev, void *packet, int length)
-{
-	at91_emac_t *emac;
-
-	emac = (at91_emac_t *) netdev->iobase;
-
-	while (!(readl(&emac->tsr) & AT91_EMAC_TSR_BNQ))
-		;
-	writel((u32) packet, &emac->tar);
-	writel(AT91_EMAC_TCR_LEN(length), &emac->tcr);
-	while (AT91_EMAC_TCR_LEN(readl(&emac->tcr)))
-		;
-	debug_cond(DEBUG_AT91EMAC, "Send %d\n", length);
-	writel(readl(&emac->tsr) | AT91_EMAC_TSR_COMP, &emac->tsr);
-	return 0;
-}
-
-static int at91emac_recv(struct eth_device *netdev)
-{
-	emac_device *dev;
-	at91_emac_t *emac;
-	rbf_t *rbfp;
-	int size;
-
-	emac = (at91_emac_t *) netdev->iobase;
-	dev = (emac_device *) netdev->priv;
-
-	rbfp = &dev->rbfdt[dev->rbindex];
-	while (rbfp->addr & RBF_OWNER)	{
-		size = rbfp->size & RBF_SIZE;
-		net_process_received_packet(net_rx_packets[dev->rbindex], size);
-
-		debug_cond(DEBUG_AT91EMAC, "Recv[%ld]: %d bytes @ %lx\n",
-			dev->rbindex, size, rbfp->addr);
-
-		rbfp->addr &= ~RBF_OWNER;
-		rbfp->size = 0;
-		if (dev->rbindex < (RBF_FRAMEMAX-1))
-			dev->rbindex++;
-		else
-			dev->rbindex = 0;
-
-		rbfp = &(dev->rbfdt[dev->rbindex]);
-		if (!(rbfp->addr & RBF_OWNER))
-			writel(readl(&emac->rsr) | AT91_EMAC_RSR_REC,
-				&emac->rsr);
-	}
-
-	if (readl(&emac->isr) & AT91_EMAC_IxR_RBNA) {
-		/* EMAC silicon bug 41.3.1 workaround 1 */
-		writel(readl(&emac->ctl) & ~AT91_EMAC_CTL_RE, &emac->ctl);
-		writel(readl(&emac->ctl) | AT91_EMAC_CTL_RE, &emac->ctl);
-		dev->rbindex = 0;
-		printf("%s: reset receiver (EMAC dead lock bug)\n",
-			netdev->name);
-	}
-	return 0;
-}
-
-static int at91emac_write_hwaddr(struct eth_device *netdev)
-{
-	at91_emac_t *emac;
-	emac = (at91_emac_t *) netdev->iobase;
-
-	at91_periph_clk_enable(ATMEL_ID_EMAC);
-
-	debug_cond(DEBUG_AT91EMAC,
-		"init MAC-ADDR %02x:%02x:%02x:%02x:%02x:%02x\n",
-		netdev->enetaddr[5], netdev->enetaddr[4], netdev->enetaddr[3],
-		netdev->enetaddr[2], netdev->enetaddr[1], netdev->enetaddr[0]);
-	writel( (netdev->enetaddr[0] | netdev->enetaddr[1] << 8 |
-			netdev->enetaddr[2] << 16 | netdev->enetaddr[3] << 24),
-			&emac->sa2l);
-	writel((netdev->enetaddr[4] | netdev->enetaddr[5] << 8), &emac->sa2h);
-	debug_cond(DEBUG_AT91EMAC, "init MAC-ADDR %x%x\n",
-		readl(&emac->sa2h), readl(&emac->sa2l));
-	return 0;
-}
-
-int at91emac_register(struct bd_info *bis, unsigned long iobase)
-{
-	emac_device *emac;
-	emac_device *emacfix;
-	struct eth_device *dev;
-
-	if (iobase == 0)
-		iobase = ATMEL_BASE_EMAC;
-	emac = malloc(sizeof(*emac)+512);
-	if (emac == NULL)
-		return -1;
-	dev = malloc(sizeof(*dev));
-	if (dev == NULL) {
-		free(emac);
-		return -1;
-	}
-	/* alignment as per Errata (64 bytes) is insufficient! */
-	emacfix = (emac_device *) (((unsigned long) emac + 0x1ff) & 0xFFFFFE00);
-	memset(emacfix, 0, sizeof(emac_device));
-
-	memset(dev, 0, sizeof(*dev));
-	strcpy(dev->name, "emac");
-	dev->iobase = iobase;
-	dev->priv = emacfix;
-	dev->init = at91emac_init;
-	dev->halt = at91emac_halt;
-	dev->send = at91emac_send;
-	dev->recv = at91emac_recv;
-	dev->write_hwaddr = at91emac_write_hwaddr;
-
-	eth_register(dev);
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-	int retval;
-	struct mii_dev *mdiodev = mdio_alloc();
-	if (!mdiodev)
-		return -ENOMEM;
-	strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
-	mdiodev->read = at91emac_mii_read;
-	mdiodev->write = at91emac_mii_write;
-
-	retval = mdio_register(mdiodev);
-	if (retval < 0)
-		return retval;
-#endif
-	return 1;
-}
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 1523eff..d530107 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -25,8 +25,6 @@
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000
 
-#define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9261"
-
 /* clocks */
 /* CKGR_MOR - enable main osc. */
 #define CONFIG_SYS_MOR_VAL						\
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index cf74e0e..c13f8de 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -25,8 +25,6 @@
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 
-#define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9263"
-
 /* clocks */
 #define CONFIG_SYS_MOR_VAL						\
 		(AT91_PMC_MOR_MOSCEN |					\
diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h
index 89d8486..1c30e44 100644
--- a/include/configs/sama5d27_som1_ek.h
+++ b/include/configs/sama5d27_som1_ek.h
@@ -14,24 +14,20 @@
 #undef CONFIG_SYS_AT91_MAIN_CLOCK
 #define CONFIG_SYS_AT91_MAIN_CLOCK      24000000 /* from 24 MHz crystal */
 
-/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE		0x20000000
-#define CONFIG_SYS_SDRAM_SIZE		0x8000000
-
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_INIT_SP_ADDR		0x218000
 #else
 #define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+	(0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
 #endif
 
 #undef CONFIG_BOOTCOMMAND
 #ifdef CONFIG_SD_BOOT
 /* bootstrap + u-boot + env in sd card */
-#define CONFIG_BOOTCOMMAND	"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x21000000 " \
+#define CONFIG_BOOTCOMMAND	"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 " \
 				CONFIG_DEFAULT_DEVICE_TREE ".dtb; " \
-				"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 zImage; " \
-				"bootz 0x22000000 - 0x21000000"
+				"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x23000000 zImage; " \
+				"bootz 0x23000000 - 0x22000000"
 #endif
 
 /* SPL */
diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
index 5c69b6b..da573bc 100644
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -11,15 +11,11 @@
 
 #include "at91-sama5_common.h"
 
-/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE           0x20000000
-#define CONFIG_SYS_SDRAM_SIZE		0x20000000
-
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_INIT_SP_ADDR		0x218000
 #else
 #define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+	(0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
 #endif
 
 /* SerialFlash */
@@ -29,18 +25,18 @@
 /* bootstrap + u-boot + env in sd card */
 #undef CONFIG_BOOTCOMMAND
 
-#define CONFIG_BOOTCOMMAND	"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x21000000 at91-sama5d2_xplained.dtb; " \
-				"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 zImage; " \
-				"bootz 0x22000000 - 0x21000000"
+#define CONFIG_BOOTCOMMAND	"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 at91-sama5d2_xplained.dtb; " \
+				"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x23000000 zImage; " \
+				"bootz 0x23000000 - 0x22000000"
 
 #elif CONFIG_SPI_BOOT
 
 /* bootstrap + u-boot + env in sd card, but kernel + dtb in eMMC */
 #undef CONFIG_BOOTCOMMAND
 
-#define CONFIG_BOOTCOMMAND	"ext4load mmc 0:1 0x21000000 /boot/at91-sama5d2_xplained.dtb; " \
-				"ext4load mmc 0:1 0x22000000 /boot/zImage; " \
-				"bootz 0x22000000 - 0x21000000"
+#define CONFIG_BOOTCOMMAND	"ext4load mmc 0:1 0x22000000 /boot/at91-sama5d2_xplained.dtb; " \
+				"ext4load mmc 0:1 0x23000000 /boot/zImage; " \
+				"bootz 0x23000000 - 0x22000000"
 
 #endif
 
@@ -49,9 +45,9 @@
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_ENV_SPI_BUS	1
 #define CONFIG_BOOTCOMMAND	"sf probe 1:0; "			\
-				"sf read 0x21000000 0x180000 0x80000; "	\
-				"sf read 0x22000000 0x200000 0x600000; "\
-				"bootz 0x22000000 - 0x21000000"
+				"sf read 0x22000000 0x180000 0x80000; "	\
+				"sf read 0x23000000 0x200000 0x600000; "\
+				"bootz 0x23000000 - 0x22000000"
 
 #endif
 
diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h
index ddf4f0b..9b7cc2c 100644
--- a/include/configs/sama7g5ek.h
+++ b/include/configs/sama7g5ek.h
@@ -24,7 +24,7 @@
 	 GENERATED_GBL_DATA_SIZE)
 #endif
 
-#undef CONFIG_BOOTCOMMAND
+#ifndef CONFIG_BOOTCOMMAND
 #ifdef CONFIG_SD_BOOT
 /* u-boot env in sd/mmc card */
 
@@ -32,6 +32,10 @@
 #define CONFIG_BOOTCOMMAND	"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x61000000 at91-sama7g5ek.dtb; " \
 				"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x62000000 zImage; " \
 				"bootz 0x62000000 - 0x61000000"
+#else
+#define CONFIG_BOOTCOMMAND	"Place your bootcommand here"
+#endif
+
 #endif
 
 #define CONFIG_ARP_TIMEOUT		200
diff --git a/include/dt-bindings/mfd/atmel-flexcom.h b/include/dt-bindings/mfd/atmel-flexcom.h
new file mode 100644
index 0000000..4e2fc32
--- /dev/null
+++ b/include/dt-bindings/mfd/atmel-flexcom.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * This header provides macros for Atmel Flexcom DT bindings.
+ *
+ * Copyright (C) 2015 Cyrille Pitchen <cyrille.pitchen@atmel.com>
+ */
+
+#ifndef __DT_BINDINGS_ATMEL_FLEXCOM_H__
+#define __DT_BINDINGS_ATMEL_FLEXCOM_H__
+
+#define ATMEL_FLEXCOM_MODE_USART	1
+#define ATMEL_FLEXCOM_MODE_SPI		2
+#define ATMEL_FLEXCOM_MODE_TWI		3
+
+#endif /* __DT_BINDINGS_ATMEL_FLEXCOM_H__ */
diff --git a/include/netdev.h b/include/netdev.h
index 00a0993..fb18f09 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -29,7 +29,6 @@
 int cpu_eth_init(struct bd_info *bis);
 
 /* Driver initialization prototypes */
-int at91emac_register(struct bd_info *bis, unsigned long iobase);
 int ax88180_initialize(struct bd_info *bis);
 int bcm_sf2_eth_register(struct bd_info *bis, u8 dev_num);
 int bfin_EMAC_initialize(struct bd_info *bis);
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 36b8cc1..bf7a7d3 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -228,8 +228,6 @@
 CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
 CONFIG_DP_DDR_NUM_CTRLS
 CONFIG_DRAM_TIMINGS_
-CONFIG_DRIVER_AT91EMAC_PHYADDR
-CONFIG_DRIVER_AT91EMAC_QUIET
 CONFIG_DRIVER_DM9000
 CONFIG_DSP_CLUSTER_START
 CONFIG_DWCDDR21MCTL
@@ -1328,7 +1326,6 @@
 CONFIG_SYS_AMASK5
 CONFIG_SYS_AMASK6
 CONFIG_SYS_AMASK7
-CONFIG_SYS_AT91_CPU_NAME
 CONFIG_SYS_AT91_MAIN_CLOCK
 CONFIG_SYS_AT91_PLLA
 CONFIG_SYS_AT91_PLLB