| commit | a8ff27c3fdd3548b432ec587a56f6180b80e2cef | [log] [tgz] |
|---|---|---|
| author | Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> | Fri Jun 14 18:21:10 2024 +0530 |
| committer | Michal Simek <michal.simek@amd.com> | Mon Jun 17 16:02:30 2024 +0200 |
| tree | f96ef06ec4bf6930357e41ab809c9e76f51ccede | |
| parent | ec5616790f156cad943f18b7348b2b595abe941e [diff] |
xilinx: versal-net: Add env redund offset ENV_OFFSET_REDUND config is by default set to 0 for flashes. Saving the env variables is overwriting data at 0 offset, which is wrong. So add default redund env offset ENV_OFFSET_REDUND at 0x7F00000 for Versal NET platform. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20240614125110.23058-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>