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git01.mediatek.com / filogic / uboot / a87d2f5bd2b13a9e51aef8d12f135c20e6f76125 / . / arch / arm / mach-socfpga
tree: 29b5e0b14a6f730ce86101396f7dfd0bb7d9d9a9 [path history] [tgz]
  1. include/
  2. board.c
  3. clock_manager.c
  4. clock_manager_agilex.c
  5. clock_manager_arria10.c
  6. clock_manager_gen5.c
  7. clock_manager_s10.c
  8. firewall.c
  9. fpga_manager.c
  10. freeze_controller.c
  11. Kconfig
  12. mailbox_s10.c
  13. Makefile
  14. misc.c
  15. misc_arria10.c
  16. misc_gen5.c
  17. misc_s10.c
  18. mmu-arm64_s10.c
  19. pinmux_arria10.c
  20. qts-filter-a10.sh
  21. qts-filter.sh
  22. reset_manager_arria10.c
  23. reset_manager_gen5.c
  24. reset_manager_s10.c
  25. scan_manager.c
  26. spl_a10.c
  27. spl_agilex.c
  28. spl_gen5.c
  29. spl_s10.c
  30. system_manager_gen5.c
  31. system_manager_s10.c
  32. timer.c
  33. timer_s10.c
  34. wrap_iocsr_config.c
  35. wrap_pinmux_config.c
  36. wrap_pinmux_config_s10.c
  37. wrap_pll_config.c
  38. wrap_pll_config_s10.c
  39. wrap_sdram_config.c