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filogic
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a73b0ec92909de767b540ea6407ddb4ae6abaf08
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.
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arch
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arm
/
dts
/
zynq-cse-qspi-single.dts
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/*
* Xilinx CSE QSPI single DTS
*
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include
"zynq-cse-qspi.dtsi"
&
qspi
{
spi
-
rx
-
bus
-
width
=
<
4
>;
};