| commit | 0bad345602b8e499b937f14f7d47553aadad9cc3 | [log] [tgz] |
|---|---|---|
| author | Marek Vasut <marek.vasut+renesas@gmail.com> | Tue Apr 10 16:43:47 2018 +0200 |
| committer | Marek Vasut <marex@denx.de> | Wed Apr 11 23:19:51 2018 +0200 |
| tree | 986de767a326a218faa5c3bed94c9abc19eb54bd | |
| parent | f6bdbcc138ffa7cf00f4e75b1db246099bef13da [diff] |
spi: sh_qspi: Make use of the 32byte FIFO The QSPI controller on RCar Gen2 has 32byte FIFO. Instead of doing the SPI transmission 1 byte at time, if there is a 32byte chunk of data to be transferred, fill the FIFO completely and then transfer the data to/from the FIFO. This increases the SPI NOR access speed significantly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>