| commit | a48d43d797872ef97c37be672ecae55be7924139 | [log] [tgz] |
|---|---|---|
| author | York Sun <yorksun@freescale.com> | Mon Mar 25 07:39:36 2013 +0000 |
| committer | Andy Fleming <afleming@freescale.com> | Tue May 14 16:13:25 2013 -0500 |
| tree | e98a8d7e5bd94cc49b871efddac86215c5a577dc | |
| parent | 01a82581e4acc6a648564c3e157808996c8c303e [diff] |
powerpc/b4860qds: Assign DDR address in board file B4860QDS requires DDRC2 has 0 as base address and DDRC1 has higher address. This is the requirement for DSP cores to run in 32-bit address space. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>