Merge branch 'master' of git://git.denx.de/u-boot-ubi
diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi b/arch/arm/dts/da850-evm-u-boot.dtsi
index b3546e7..ab1de77 100644
--- a/arch/arm/dts/da850-evm-u-boot.dtsi
+++ b/arch/arm/dts/da850-evm-u-boot.dtsi
@@ -6,17 +6,6 @@
* Copyright (C) Adam Ford
*/
-/ {
- chosen {
- stdout-path = &serial2;
- };
-
- aliases {
- i2c0 = &i2c0;
- spi0 = &spi1;
- };
-};
-
&flash {
compatible = "m25p64", "spi-flash";
};
diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts
index 67e72bc..0e82bb9 100644
--- a/arch/arm/dts/da850-evm.dts
+++ b/arch/arm/dts/da850-evm.dts
@@ -15,143 +15,18 @@
compatible = "ti,da850-evm", "ti,da850";
model = "DA850/AM1808/OMAP-L138 EVM";
- soc@1c00000 {
- pmx_core: pinmux@14120 {
- status = "okay";
-
- mcasp0_pins: pinmux_mcasp0_pins {
- pinctrl-single,bits = <
- /*
- * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR,
- * AFSR, AMUTE
- */
- 0x00 0x11111111 0xffffffff
- /* AXR11, AXR12 */
- 0x04 0x00011000 0x000ff000
- >;
- };
- nand_pins: nand_pins {
- pinctrl-single,bits = <
- /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */
- 0x1c 0x10110110 0xf0ff0ff0
- /*
- * EMA_D[0], EMA_D[1], EMA_D[2],
- * EMA_D[3], EMA_D[4], EMA_D[5],
- * EMA_D[6], EMA_D[7]
- */
- 0x24 0x11111111 0xffffffff
- /* EMA_A[1], EMA_A[2] */
- 0x30 0x01100000 0x0ff00000
- >;
- };
- };
- serial0: serial@42000 {
- status = "okay";
- };
- serial1: serial@10c000 {
- status = "okay";
- };
- serial2: serial@10d000 {
- status = "okay";
- };
- rtc0: rtc@23000 {
- status = "okay";
- };
- i2c0: i2c@22000 {
- status = "okay";
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
-
- tps: tps@48 {
- reg = <0x48>;
- };
- tlv320aic3106: tlv320aic3106@18 {
- #sound-dai-cells = <0>;
- compatible = "ti,tlv320aic3106";
- reg = <0x18>;
- status = "okay";
+ chosen {
+ stdout-path = &serial2;
+ };
- /* Regulators */
- IOVDD-supply = <&vdcdc2_reg>;
- /* Derived from VBAT: Baseboard 3.3V / 1.8V */
- AVDD-supply = <&vbat>;
- DRVDD-supply = <&vbat>;
- DVDD-supply = <&vbat>;
- };
- tca6416: gpio@20 {
- compatible = "ti,tca6416";
- reg = <0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- };
- };
- wdt: wdt@21000 {
- status = "okay";
- };
- mmc0: mmc@40000 {
- max-frequency = <50000000>;
- bus-width = <4>;
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins>;
- };
- spi1: spi@30e000 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&spi1_pins &spi1_cs0_pin>;
- flash: m25p80@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "m25p64";
- spi-max-frequency = <30000000>;
- m25p,fast-read;
- reg = <0>;
- partition@0 {
- label = "U-Boot-SPL";
- reg = <0x00000000 0x00010000>;
- read-only;
- };
- partition@1 {
- label = "U-Boot";
- reg = <0x00010000 0x00080000>;
- read-only;
- };
- partition@2 {
- label = "U-Boot-Env";
- reg = <0x00090000 0x00010000>;
- read-only;
- };
- partition@3 {
- label = "Kernel";
- reg = <0x000a0000 0x00280000>;
- };
- partition@4 {
- label = "Filesystem";
- reg = <0x00320000 0x00400000>;
- };
- partition@5 {
- label = "MAC-Address";
- reg = <0x007f0000 0x00010000>;
- read-only;
- };
- };
- };
- mdio: mdio@224000 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&mdio_pins>;
- bus_freq = <2200000>;
- };
- eth0: ethernet@220000 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&mii_pins>;
- };
- gpio: gpio@226000 {
- status = "okay";
- };
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ ethernet0 = ð0;
+ spi0 = &spi1;
};
+
vbat: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
@@ -188,6 +63,155 @@
};
};
+&pmx_core {
+ status = "okay";
+
+ mcasp0_pins: pinmux_mcasp0_pins {
+ pinctrl-single,bits = <
+ /*
+ * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR,
+ * AFSR, AMUTE
+ */
+ 0x00 0x11111111 0xffffffff
+ /* AXR11, AXR12 */
+ 0x04 0x00011000 0x000ff000
+ >;
+ };
+ nand_pins: nand_pins {
+ pinctrl-single,bits = <
+ /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */
+ 0x1c 0x10110110 0xf0ff0ff0
+ /*
+ * EMA_D[0], EMA_D[1], EMA_D[2],
+ * EMA_D[3], EMA_D[4], EMA_D[5],
+ * EMA_D[6], EMA_D[7]
+ */
+ 0x24 0x11111111 0xffffffff
+ /* EMA_A[1], EMA_A[2] */
+ 0x30 0x01100000 0x0ff00000
+ >;
+ };
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&rtc0 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ tps: tps@48 {
+ reg = <0x48>;
+ };
+ tlv320aic3106: tlv320aic3106@18 {
+ #sound-dai-cells = <0>;
+ compatible = "ti,tlv320aic3106";
+ reg = <0x18>;
+ status = "okay";
+
+ /* Regulators */
+ IOVDD-supply = <&vdcdc2_reg>;
+ /* Derived from VBAT: Baseboard 3.3V / 1.8V */
+ AVDD-supply = <&vbat>;
+ DRVDD-supply = <&vbat>;
+ DVDD-supply = <&vbat>;
+ };
+ tca6416: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
+&wdt {
+ status = "okay";
+};
+
+&mmc0 {
+ max-frequency = <50000000>;
+ bus-width = <4>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio 65 GPIO_ACTIVE_HIGH>;
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins &spi1_cs0_pin>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p64";
+ spi-max-frequency = <30000000>;
+ m25p,fast-read;
+ reg = <0>;
+ partition@0 {
+ label = "U-Boot-SPL";
+ reg = <0x00000000 0x00010000>;
+ read-only;
+ };
+ partition@1 {
+ label = "U-Boot";
+ reg = <0x00010000 0x00080000>;
+ read-only;
+ };
+ partition@2 {
+ label = "U-Boot-Env";
+ reg = <0x00090000 0x00010000>;
+ read-only;
+ };
+ partition@3 {
+ label = "Kernel";
+ reg = <0x000a0000 0x00280000>;
+ };
+ partition@4 {
+ label = "Filesystem";
+ reg = <0x00320000 0x00400000>;
+ };
+ partition@5 {
+ label = "MAC-Address";
+ reg = <0x007f0000 0x00010000>;
+ read-only;
+ };
+ };
+};
+
+&mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+ bus_freq = <2200000>;
+};
+
+ð0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mii_pins>;
+};
+
+&gpio {
+ status = "okay";
+};
+
/include/ "tps6507x.dtsi"
&tps {
@@ -297,6 +321,18 @@
};
};
+&usb_phy {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
+
&vpif {
pinctrl-names = "default";
pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>;
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index d4a1e2e..176d4f6 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -202,7 +202,7 @@
#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
gpmc_init();
#endif
-#ifdef CONFIG_SPL_I2C_SUPPORT
+#if defined(CONFIG_SPL_I2C_SUPPORT) && !defined(CONFIG_DM_I2C)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
diff --git a/board/davinci/da8xxevm/MAINTAINERS b/board/davinci/da8xxevm/MAINTAINERS
index 99b4786..5958986 100644
--- a/board/davinci/da8xxevm/MAINTAINERS
+++ b/board/davinci/da8xxevm/MAINTAINERS
@@ -5,6 +5,7 @@
F: include/configs/da850evm.h
F: configs/da850_am18xxevm_defconfig
F: configs/da850evm_defconfig
+F: configs/da850evm_nand_defconfig
F: configs/da850evm_direct_nor_defconfig
OMAPL138_LCDK BOARD
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index 5583b45..e8ec553 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -204,6 +204,7 @@
return 0;
}
+#ifndef CONFIG_DM_MMC
#ifdef CONFIG_MMC_DAVINCI
static struct davinci_mmc mmc_sd0 = {
.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
@@ -220,6 +221,7 @@
return davinci_mmc_init(bis, &mmc_sd0);
}
#endif
+#endif
static const struct pinmux_config gpio_pins[] = {
#ifdef CONFIG_USE_NOR
diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c
index 15ffc3b..2c2f885 100644
--- a/board/davinci/da8xxevm/omapl138_lcdk.c
+++ b/board/davinci/da8xxevm/omapl138_lcdk.c
@@ -353,6 +353,7 @@
return 0;
}
+#ifndef CONFIG_DM_MMC
#ifdef CONFIG_MMC_DAVINCI
static struct davinci_mmc mmc_sd0 = {
.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
@@ -369,3 +370,4 @@
return davinci_mmc_init(bis, &mmc_sd0);
}
#endif
+#endif
diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c
index da8be22..6f72839 100644
--- a/board/logicpd/am3517evm/am3517evm.c
+++ b/board/logicpd/am3517evm/am3517evm.c
@@ -108,10 +108,11 @@
volatile unsigned int ctr;
u32 reset;
+#if !defined(CONFIG_DM_I2C)
#ifdef CONFIG_SYS_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
-
+#endif
omap_die_id_display();
am3517_evm_musb_init();
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index fbad89b..620423b 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -24,6 +24,7 @@
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
+#include <asm/omap_mmc.h>
#include <asm/mach-types.h>
#include <linux/mtd/rawnand.h>
#include <asm/omap_musb.h>
@@ -39,6 +40,36 @@
DECLARE_GLOBAL_DATA_PTR;
+/* This is only needed until SPL gets OF support */
+#ifdef CONFIG_SPL_BUILD
+static const struct ns16550_platdata omap3logic_serial = {
+ .base = OMAP34XX_UART1,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK,
+ .fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DEVICE(omap3logic_uart) = {
+ "ns16550_serial",
+ &omap3logic_serial
+};
+
+static const struct omap_hsmmc_plat omap3_logic_mmc0_platdata = {
+ .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE,
+ .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT,
+ .cfg.f_min = 400000,
+ .cfg.f_max = 52000000,
+ .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195,
+ .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
+};
+
+U_BOOT_DEVICE(am335x_mmc0) = {
+ .name = "omap_hsmmc",
+ .platdata = &omap3_logic_mmc0_platdata,
+};
+
+#endif
+
/*
* two dimensional array of strucures containining board name and Linux
* machine IDs; row it selected based on CPU column is slected based
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index e845e35..96491f3 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -46,6 +46,7 @@
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MII=y
CONFIG_DRIVER_TI_EMAC=y
+# CONFIG_TWL4030_POWER is not set
CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index e81efe8..c30f396 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -43,6 +43,7 @@
CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DAVINCI=y
+CONFIG_DM_MMC=y
CONFIG_MTD_DEVICE=y
CONFIG_MTD_PARTITIONS=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index 65eaa9e..4039d0ee 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -37,6 +37,7 @@
CONFIG_DEFAULT_DEVICE_TREE="da850-evm"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_DM=y
+CONFIG_BLK=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_COMPAT=y
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
new file mode 100644
index 0000000..11d6a2b
--- /dev/null
+++ b/configs/da850evm_nand_defconfig
@@ -0,0 +1,60 @@
+CONFIG_ARM=y
+CONFIG_ARCH_DAVINCI=y
+CONFIG_SYS_TEXT_BASE=0xc1080000
+CONFIG_TARGET_DA850EVM=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="da850-evm"
+CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
+CONFIG_BOOTDELAY=3
+CONFIG_VERSION_VARIABLE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot > "
+CONFIG_CRC32_VERIFY=y
+# CONFIG_CMD_EEPROM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPT is not set
+CONFIG_CMD_NAND=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_TIME is not set
+# CONFIG_CMD_EXT4 is not set
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=nand512"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=nand512:128k(u-boot env),512k(u-boot),128k(spl-os),8m(kernel),-(rootfs)"
+CONFIG_CMD_DIAG=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_DA8XX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
+CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
+# CONFIG_FAT_WRITE is not set
+CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index eab379b..9b50a30 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
+# CONFIG_SPL_GPIO_SUPPORT is not set
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_OMAP3_LOGIC=y
# CONFIG_SPL_OMAP3_ID_NAND is not set
@@ -32,6 +33,7 @@
CONFIG_SPL_OF_PLATDATA=y
# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_SPL_DM=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_DM_I2C=y
@@ -46,6 +48,14 @@
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x08000000
CONFIG_SMC911X_32_BIT=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 96311af..e3a06c8 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -37,6 +37,7 @@
CONFIG_DM_I2C=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_SYS_I2C_DAVINCI=y
+CONFIG_DM_MMC=y
CONFIG_NAND=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index 1a1d37a..b0d49cb 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -13,6 +13,7 @@
#include <asm/gpio.h>
#include <asm/arch/hardware.h>
#include <asm/arch/davinci_misc.h>
+#include <dt-bindings/gpio/gpio.h>
#ifndef CONFIG_DM_GPIO
static struct gpio_registry {
@@ -429,20 +430,27 @@
static struct davinci_gpio *davinci_get_gpio_bank(struct udevice *dev, unsigned int offset)
{
struct davinci_gpio_bank *bank = dev_get_priv(dev);
+ unsigned int addr;
- /* The device tree is not broken into banks but the infrastructure is
+ /*
+ * The device tree is not broken into banks but the infrastructure is
* expecting it this way, so we'll first include the 0x10 offset, then
* calculate the bank manually based on the offset.
+ * Casting 'addr' as Unsigned long is needed to make the math work.
*/
-
- return ((struct davinci_gpio *)bank->base) + 0x10 + (offset >> 5);
+ addr = ((unsigned long)(struct davinci_gpio *)bank->base) +
+ 0x10 + (0x28 * (offset >> 5));
+ return (struct davinci_gpio *)addr;
}
static int davinci_gpio_direction_input(struct udevice *dev, unsigned int offset)
{
struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
- _gpio_direction_input(base, offset);
+ /*
+ * Fetch the address based on GPIO, but only pass the masked low 32-bits
+ */
+ _gpio_direction_input(base, (offset & 0x1f));
return 0;
}
@@ -451,7 +459,7 @@
{
struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
- _gpio_direction_output(base, offset, value);
+ _gpio_direction_output(base, (offset & 0x1f), value);
return 0;
}
@@ -459,7 +467,7 @@
{
struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
- return _gpio_get_value(base, offset);
+ return _gpio_get_value(base, (offset & 0x1f));
}
static int davinci_gpio_set_value(struct udevice *dev, unsigned int offset,
@@ -467,7 +475,7 @@
{
struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
- _gpio_set_value(base, offset, value);
+ _gpio_set_value(base, (offset & 0x1f), value);
return 0;
}
@@ -485,12 +493,25 @@
return GPIOF_OUTPUT;
}
+static int davinci_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
+ struct ofnode_phandle_args *args)
+{
+ desc->offset = args->args[0];
+
+ if (args->args[1] & GPIO_ACTIVE_LOW)
+ desc->flags = GPIOD_ACTIVE_LOW;
+ else
+ desc->flags = 0;
+ return 0;
+}
+
static const struct dm_gpio_ops gpio_davinci_ops = {
.direction_input = davinci_gpio_direction_input,
.direction_output = davinci_gpio_direction_output,
.get_value = davinci_gpio_get_value,
.set_value = davinci_gpio_set_value,
.get_function = davinci_gpio_get_function,
+ .xlate = davinci_gpio_xlate,
};
static int davinci_gpio_probe(struct udevice *dev)
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index 651f699..555eba2 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -288,11 +288,9 @@
struct gpio_bank *bank = dev_get_priv(dev);
struct omap_gpio_platdata *plat = dev_get_platdata(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- int banknum;
char name[18], *str;
- banknum = plat->bank_index;
- sprintf(name, "GPIO%d_", banknum + 1);
+ sprintf(name, "gpio@%4x_", (unsigned int)plat->base);
str = strdup(name);
if (!str)
return -ENOMEM;
@@ -337,6 +335,7 @@
}
#endif
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static const struct udevice_id omap_gpio_ids[] = {
{ .compatible = "ti,omap3-gpio" },
{ .compatible = "ti,omap4-gpio" },
@@ -344,7 +343,6 @@
{ }
};
-#if CONFIG_IS_ENABLED(OF_CONTROL)
static int omap_gpio_ofdata_to_platdata(struct udevice *dev)
{
struct omap_gpio_platdata *plat = dev_get_platdata(dev);
@@ -363,14 +361,15 @@
.name = "gpio_omap",
.id = UCLASS_GPIO,
#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+ .of_match = omap_gpio_ids,
.ofdata_to_platdata = of_match_ptr(omap_gpio_ofdata_to_platdata),
- .bind = dm_scan_fdt_dev,
.platdata_auto_alloc_size = sizeof(struct omap_gpio_platdata),
+#endif
#else
.bind = omap_gpio_bind,
#endif
.ops = &gpio_omap_ops,
- .of_match = omap_gpio_ids,
.probe = omap_gpio_probe,
.priv_auto_alloc_size = sizeof(struct gpio_bank),
.flags = DM_FLAG_PRE_RELOC,
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index da368cc..f2cbe78 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -24,7 +24,6 @@
obj-$(CONFIG_SYS_I2C_MESON) += meson_i2c.o
obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
-obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR_I2C) += rcar_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 5e58dd0..c5a3c4e 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -562,7 +562,7 @@
return ops->deblock(bus);
}
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip)
{
int addr;
@@ -584,7 +584,7 @@
static int i2c_post_probe(struct udevice *dev)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
@@ -597,7 +597,7 @@
static int i2c_child_post_bind(struct udevice *dev)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
if (!dev_of_valid(dev))
@@ -612,7 +612,7 @@
.id = UCLASS_I2C,
.name = "i2c",
.flags = DM_UC_FLAG_SEQ_ALIAS,
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.post_bind = dm_scan_fdt_dev,
#endif
.post_probe = i2c_post_probe,
diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
deleted file mode 100644
index 6766d37..0000000
--- a/drivers/i2c/mxs_i2c.c
+++ /dev/null
@@ -1,319 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Freescale i.MX28 I2C Driver
- *
- * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
- * on behalf of DENX Software Engineering GmbH
- *
- * Partly based on Linux kernel i2c-mxs.c driver:
- * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
- *
- * Which was based on a (non-working) driver which was:
- * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <i2c.h>
-#include <linux/errno.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/sys_proto.h>
-
-#define MXS_I2C_MAX_TIMEOUT 1000000
-
-static struct mxs_i2c_regs *mxs_i2c_get_base(struct i2c_adapter *adap)
-{
- if (adap->hwadapnr == 0)
- return (struct mxs_i2c_regs *)MXS_I2C0_BASE;
- else
- return (struct mxs_i2c_regs *)MXS_I2C1_BASE;
-}
-
-static unsigned int mxs_i2c_get_bus_speed(struct i2c_adapter *adap)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
- uint32_t timing0;
-
- timing0 = readl(&i2c_regs->hw_i2c_timing0);
- /*
- * This is a reverse version of the algorithm presented in
- * i2c_set_bus_speed(). Please refer there for details.
- */
- return clk / ((((timing0 >> 16) - 3) * 2) + 38);
-}
-
-static uint mxs_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- /*
- * The timing derivation algorithm. There is no documentation for this
- * algorithm available, it was derived by using the scope and fiddling
- * with constants until the result observed on the scope was good enough
- * for 20kHz, 50kHz, 100kHz, 200kHz, 300kHz and 400kHz. It should be
- * possible to assume the algorithm works for other frequencies as well.
- *
- * Note it was necessary to cap the frequency on both ends as it's not
- * possible to configure completely arbitrary frequency for the I2C bus
- * clock.
- */
- uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
- uint32_t base = ((clk / speed) - 38) / 2;
- uint16_t high_count = base + 3;
- uint16_t low_count = base - 3;
- uint16_t rcv_count = (high_count * 3) / 4;
- uint16_t xmit_count = low_count / 4;
-
- if (speed > 540000) {
- printf("MXS I2C: Speed too high (%d Hz)\n", speed);
- return -EINVAL;
- }
-
- if (speed < 12000) {
- printf("MXS I2C: Speed too low (%d Hz)\n", speed);
- return -EINVAL;
- }
-
- writel((high_count << 16) | rcv_count, &i2c_regs->hw_i2c_timing0);
- writel((low_count << 16) | xmit_count, &i2c_regs->hw_i2c_timing1);
-
- writel((0x0030 << I2C_TIMING2_BUS_FREE_OFFSET) |
- (0x0030 << I2C_TIMING2_LEADIN_COUNT_OFFSET),
- &i2c_regs->hw_i2c_timing2);
-
- return 0;
-}
-
-static void mxs_i2c_reset(struct i2c_adapter *adap)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- int ret;
- int speed = mxs_i2c_get_bus_speed(adap);
-
- ret = mxs_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
- if (ret) {
- debug("MXS I2C: Block reset timeout\n");
- return;
- }
-
- writel(I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | I2C_CTRL1_NO_SLAVE_ACK_IRQ |
- I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
- I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ,
- &i2c_regs->hw_i2c_ctrl1_clr);
-
- writel(I2C_QUEUECTRL_PIO_QUEUE_MODE, &i2c_regs->hw_i2c_queuectrl_set);
-
- mxs_i2c_set_bus_speed(adap, speed);
-}
-
-static void mxs_i2c_setup_read(struct i2c_adapter *adap, uint8_t chip, int len)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
-
- writel(I2C_QUEUECMD_RETAIN_CLOCK | I2C_QUEUECMD_PRE_SEND_START |
- I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
- (1 << I2C_QUEUECMD_XFER_COUNT_OFFSET),
- &i2c_regs->hw_i2c_queuecmd);
-
- writel((chip << 1) | 1, &i2c_regs->hw_i2c_data);
-
- writel(I2C_QUEUECMD_SEND_NAK_ON_LAST | I2C_QUEUECMD_MASTER_MODE |
- (len << I2C_QUEUECMD_XFER_COUNT_OFFSET) |
- I2C_QUEUECMD_POST_SEND_STOP, &i2c_regs->hw_i2c_queuecmd);
-
- writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
-}
-
-static int mxs_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
- int alen, uchar *buf, int blen, int stop)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- uint32_t data, tmp;
- int i, remain, off;
- int timeout = MXS_I2C_MAX_TIMEOUT;
-
- if ((alen > 4) || (alen == 0)) {
- debug("MXS I2C: Invalid address length\n");
- return -EINVAL;
- }
-
- if (stop)
- stop = I2C_QUEUECMD_POST_SEND_STOP;
-
- writel(I2C_QUEUECMD_PRE_SEND_START |
- I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
- ((blen + alen + 1) << I2C_QUEUECMD_XFER_COUNT_OFFSET) | stop,
- &i2c_regs->hw_i2c_queuecmd);
-
- data = (chip << 1) << 24;
-
- for (i = 0; i < alen; i++) {
- data >>= 8;
- data |= ((char *)&addr)[alen - i - 1] << 24;
- if ((i & 3) == 2)
- writel(data, &i2c_regs->hw_i2c_data);
- }
-
- off = i;
- for (; i < off + blen; i++) {
- data >>= 8;
- data |= buf[i - off] << 24;
- if ((i & 3) == 2)
- writel(data, &i2c_regs->hw_i2c_data);
- }
-
- remain = 24 - ((i & 3) * 8);
- if (remain)
- writel(data >> remain, &i2c_regs->hw_i2c_data);
-
- writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
-
- while (--timeout) {
- tmp = readl(&i2c_regs->hw_i2c_queuestat);
- if (tmp & I2C_QUEUESTAT_WR_QUEUE_EMPTY)
- break;
- }
-
- if (!timeout) {
- debug("MXS I2C: Failed transmitting data!\n");
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int mxs_i2c_wait_for_ack(struct i2c_adapter *adap)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- uint32_t tmp;
- int timeout = MXS_I2C_MAX_TIMEOUT;
-
- for (;;) {
- tmp = readl(&i2c_regs->hw_i2c_ctrl1);
- if (tmp & I2C_CTRL1_NO_SLAVE_ACK_IRQ) {
- debug("MXS I2C: No slave ACK\n");
- goto err;
- }
-
- if (tmp & (
- I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
- I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ)) {
- debug("MXS I2C: Error (CTRL1 = %08x)\n", tmp);
- goto err;
- }
-
- if (tmp & I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ)
- break;
-
- if (!timeout--) {
- debug("MXS I2C: Operation timed out\n");
- goto err;
- }
-
- udelay(1);
- }
-
- return 0;
-
-err:
- mxs_i2c_reset(adap);
- return 1;
-}
-
-static int mxs_i2c_if_read(struct i2c_adapter *adap, uint8_t chip,
- uint addr, int alen, uint8_t *buffer,
- int len)
-{
- struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
- uint32_t tmp = 0;
- int timeout = MXS_I2C_MAX_TIMEOUT;
- int ret;
- int i;
-
- ret = mxs_i2c_write(adap, chip, addr, alen, NULL, 0, 0);
- if (ret) {
- debug("MXS I2C: Failed writing address\n");
- return ret;
- }
-
- ret = mxs_i2c_wait_for_ack(adap);
- if (ret) {
- debug("MXS I2C: Failed writing address\n");
- return ret;
- }
-
- mxs_i2c_setup_read(adap, chip, len);
- ret = mxs_i2c_wait_for_ack(adap);
- if (ret) {
- debug("MXS I2C: Failed reading address\n");
- return ret;
- }
-
- for (i = 0; i < len; i++) {
- if (!(i & 3)) {
- while (--timeout) {
- tmp = readl(&i2c_regs->hw_i2c_queuestat);
- if (!(tmp & I2C_QUEUESTAT_RD_QUEUE_EMPTY))
- break;
- }
-
- if (!timeout) {
- debug("MXS I2C: Failed receiving data!\n");
- return -ETIMEDOUT;
- }
-
- tmp = readl(&i2c_regs->hw_i2c_queuedata);
- }
- buffer[i] = tmp & 0xff;
- tmp >>= 8;
- }
-
- return 0;
-}
-
-static int mxs_i2c_if_write(struct i2c_adapter *adap, uint8_t chip,
- uint addr, int alen, uint8_t *buffer,
- int len)
-{
- int ret;
- ret = mxs_i2c_write(adap, chip, addr, alen, buffer, len, 1);
- if (ret) {
- debug("MXS I2C: Failed writing address\n");
- return ret;
- }
-
- ret = mxs_i2c_wait_for_ack(adap);
- if (ret)
- debug("MXS I2C: Failed writing address\n");
-
- return ret;
-}
-
-static int mxs_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
-{
- int ret;
- ret = mxs_i2c_write(adap, chip, 0, 1, NULL, 0, 1);
- if (!ret)
- ret = mxs_i2c_wait_for_ack(adap);
- mxs_i2c_reset(adap);
- return ret;
-}
-
-static void mxs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
-{
- mxs_i2c_reset(adap);
- mxs_i2c_set_bus_speed(adap, speed);
-
- return;
-}
-
-U_BOOT_I2C_ADAP_COMPLETE(mxs0, mxs_i2c_init, mxs_i2c_probe,
- mxs_i2c_if_read, mxs_i2c_if_write,
- mxs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_SPEED, 0, 0)
-U_BOOT_I2C_ADAP_COMPLETE(mxs1, mxs_i2c_init, mxs_i2c_probe,
- mxs_i2c_if_read, mxs_i2c_if_write,
- mxs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_SPEED, 0, 1)
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 0759585..54bf35e 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -890,6 +890,7 @@
return 0;
}
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static int omap_i2c_ofdata_to_platdata(struct udevice *bus)
{
struct omap_i2c *priv = dev_get_priv(bus);
@@ -901,23 +902,26 @@
return 0;
}
-static const struct dm_i2c_ops omap_i2c_ops = {
- .xfer = omap_i2c_xfer,
- .probe_chip = omap_i2c_probe_chip,
- .set_bus_speed = omap_i2c_set_bus_speed,
-};
-
static const struct udevice_id omap_i2c_ids[] = {
{ .compatible = "ti,omap3-i2c" },
{ .compatible = "ti,omap4-i2c" },
{ }
};
+#endif
+
+static const struct dm_i2c_ops omap_i2c_ops = {
+ .xfer = omap_i2c_xfer,
+ .probe_chip = omap_i2c_probe_chip,
+ .set_bus_speed = omap_i2c_set_bus_speed,
+};
U_BOOT_DRIVER(i2c_omap) = {
.name = "i2c_omap",
.id = UCLASS_I2C,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.of_match = omap_i2c_ids,
.ofdata_to_platdata = omap_i2c_ofdata_to_platdata,
+#endif
.probe = omap_i2c_probe,
.priv_auto_alloc_size = sizeof(struct omap_i2c),
.ops = &omap_i2c_ops,
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index d7cb88a..0d63279 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -7,13 +7,15 @@
#include <config.h>
#include <common.h>
-#include <command.h>
+#include <dm.h>
#include <errno.h>
#include <mmc.h>
+#include <command.h>
#include <part.h>
#include <malloc.h>
#include <asm/io.h>
#include <asm/arch/sdmmc_defs.h>
+#include <asm-generic/gpio.h>
#define DAVINCI_MAX_BLOCKS (32)
#define WATCHDOG_COUNT (100000)
@@ -23,10 +25,40 @@
#define set_bit(addr, val) set_val((addr), (get_val(addr) | (val)))
#define clear_bit(addr, val) set_val((addr), (get_val(addr) & ~(val)))
+#ifdef CONFIG_DM_MMC
+struct davinci_of_data {
+ const char *name;
+ u8 version;
+};
+
+/* Davinci MMC board definitions */
+struct davinci_mmc_priv {
+ struct davinci_mmc_regs *reg_base; /* Register base address */
+ uint input_clk; /* Input clock to MMC controller */
+ uint version; /* MMC Controller version */
+ struct gpio_desc cd_gpio; /* Card Detect GPIO */
+ struct gpio_desc wp_gpio; /* Write Protect GPIO */
+};
+
+struct davinci_mmc_plat
+{
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+#endif
+
/* Set davinci clock prescalar value based on the required clock in HZ */
+#if !CONFIG_IS_ENABLED(DM_MMC)
static void dmmc_set_clock(struct mmc *mmc, uint clock)
{
struct davinci_mmc *host = mmc->priv;
+#else
+
+static void davinci_mmc_set_clock(struct udevice *dev, uint clock)
+{
+ struct davinci_mmc_priv *host = dev_get_priv(dev);
+ struct mmc *mmc = mmc_get_mmc_dev(dev);
+#endif
struct davinci_mmc_regs *regs = host->reg_base;
uint clkrt, sysclk2, act_clock;
@@ -120,13 +152,19 @@
}
/*
- * Sends a command out on the bus. Takes the mmc pointer,
+ * Sends a command out on the bus. Takes the device pointer,
* a command pointer, and an optional data pointer.
*/
-static int
-dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
+#if !CONFIG_IS_ENABLED(DM_MMC)
+static int dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
{
struct davinci_mmc *host = mmc->priv;
+#else
+static int
+davinci_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data)
+{
+ struct davinci_mmc_priv *host = dev_get_priv(dev);
+#endif
volatile struct davinci_mmc_regs *regs = host->reg_base;
uint mmcstatus, status_rdy, status_err;
uint i, cmddata, bytes_left = 0;
@@ -312,9 +350,15 @@
}
/* Initialize Davinci MMC controller */
+#if !CONFIG_IS_ENABLED(DM_MMC)
static int dmmc_init(struct mmc *mmc)
{
struct davinci_mmc *host = mmc->priv;
+#else
+static int davinci_dm_mmc_init(struct udevice *dev)
+{
+ struct davinci_mmc_priv *host = dev_get_priv(dev);
+#endif
struct davinci_mmc_regs *regs = host->reg_base;
/* Clear status registers explicitly - soft reset doesn't clear it
@@ -347,11 +391,19 @@
}
/* Set buswidth or clock as indicated by the MMC framework */
+#if !CONFIG_IS_ENABLED(DM_MMC)
static int dmmc_set_ios(struct mmc *mmc)
{
struct davinci_mmc *host = mmc->priv;
struct davinci_mmc_regs *regs = host->reg_base;
+#else
+static int davinci_mmc_set_ios(struct udevice *dev)
+{
+ struct mmc *mmc = mmc_get_mmc_dev(dev);
+ struct davinci_mmc_priv *host = dev_get_priv(dev);
+ struct davinci_mmc_regs *regs = host->reg_base;
+#endif
/* Set the bus width */
if (mmc->bus_width == 4)
set_bit(®s->mmcctl, MMCCTL_WIDTH_4_BIT);
@@ -359,21 +411,65 @@
clear_bit(®s->mmcctl, MMCCTL_WIDTH_4_BIT);
/* Set clock speed */
- if (mmc->clock)
+ if (mmc->clock) {
+#if !CONFIG_IS_ENABLED(DM_MMC)
dmmc_set_clock(mmc, mmc->clock);
-
+#else
+ davinci_mmc_set_clock(dev, mmc->clock);
+#endif
+ }
return 0;
}
+#if !CONFIG_IS_ENABLED(DM_MMC)
static const struct mmc_ops dmmc_ops = {
- .send_cmd = dmmc_send_cmd,
- .set_ios = dmmc_set_ios,
- .init = dmmc_init,
+ .send_cmd = dmmc_send_cmd,
+ .set_ios = dmmc_set_ios,
+ .init = dmmc_init,
+};
+#else
+
+static int davinci_mmc_getcd(struct udevice *dev)
+{
+ int value = -1;
+#if CONFIG_IS_ENABLED(DM_GPIO)
+ struct davinci_mmc_priv *priv = dev_get_priv(dev);
+ value = dm_gpio_get_value(&priv->cd_gpio);
+#endif
+ /* if no CD return as 1 */
+ if (value < 0)
+ return 1;
+
+ return value;
+}
+
+static int davinci_mmc_getwp(struct udevice *dev)
+{
+ int value = -1;
+#if CONFIG_IS_ENABLED(DM_GPIO)
+ struct davinci_mmc_priv *priv = dev_get_priv(dev);
+
+ value = dm_gpio_get_value(&priv->wp_gpio);
+#endif
+ /* if no WP return as 0 */
+ if (value < 0)
+ return 0;
+
+ return value;
+}
+
+static const struct dm_mmc_ops davinci_mmc_ops = {
+ .send_cmd = davinci_mmc_send_cmd,
+ .set_ios = davinci_mmc_set_ios,
+ .get_cd = davinci_mmc_getcd,
+ .get_wp = davinci_mmc_getwp,
};
+#endif
+#if !CONFIG_IS_ENABLED(DM_MMC)
/* Called from board_mmc_init during startup. Can be called multiple times
- * depending on the number of slots available on board and controller
- */
+* depending on the number of slots available on board and controller
+*/
int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)
{
host->cfg.name = "davinci";
@@ -389,3 +485,84 @@
return 0;
}
+#else
+
+
+static int davinci_mmc_probe(struct udevice *dev)
+{
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct davinci_mmc_plat *plat = dev_get_platdata(dev);
+ struct davinci_mmc_priv *priv = dev_get_priv(dev);
+ struct mmc_config *cfg = &plat->cfg;
+ struct davinci_of_data *data =
+ (struct davinci_of_data *)dev_get_driver_data(dev);
+ cfg->f_min = 200000;
+ cfg->f_max = 25000000;
+ cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
+ cfg->host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
+ cfg->b_max = DAVINCI_MAX_BLOCKS;
+
+ if (data) {
+ cfg->name = data->name;
+ priv->version = data->version;
+ }
+
+ priv->reg_base = (struct davinci_mmc_regs *)dev_read_addr(dev);
+ priv->input_clk = clk_get(DAVINCI_MMCSD_CLKID);
+
+#if CONFIG_IS_ENABLED(DM_GPIO)
+ /* These GPIOs are optional */
+ gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
+ gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN);
+#endif
+
+ upriv->mmc = &plat->mmc;
+
+ return davinci_dm_mmc_init(dev);
+}
+
+static int davinci_mmc_bind(struct udevice *dev)
+{
+ struct davinci_mmc_plat *plat = dev_get_platdata(dev);
+
+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
+}
+
+
+const struct davinci_of_data davinci_mmc_host_info[] = {
+ {
+ .name = "dm6441-mmc",
+ .version = MMC_CTLR_VERSION_1,
+ },
+ {
+ .name = "da830-mmc",
+ .version = MMC_CTLR_VERSION_2,
+ },
+ {},
+};
+
+static const struct udevice_id davinci_mmc_ids[] = {
+ {
+ .compatible = "ti,dm6441-mmc",
+ .data = (ulong) &davinci_mmc_host_info[MMC_CTLR_VERSION_1]
+ },
+ {
+ .compatible = "ti,da830-mmc",
+ .data = (ulong) &davinci_mmc_host_info[MMC_CTLR_VERSION_2]
+ },
+ {},
+};
+
+U_BOOT_DRIVER(davinci_mmc_drv) = {
+ .name = "davinci_mmc",
+ .id = UCLASS_MMC,
+ .of_match = davinci_mmc_ids,
+#if CONFIG_BLK
+ .bind = davinci_mmc_bind,
+#endif
+ .probe = davinci_mmc_probe,
+ .ops = &davinci_mmc_ops,
+ .platdata_auto_alloc_size = sizeof(struct davinci_mmc_plat),
+ .priv_auto_alloc_size = sizeof(struct davinci_mmc_priv),
+};
+#endif
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index caaa914..4d171f45 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -1365,9 +1365,10 @@
static int omap_hsmmc_getcd(struct udevice *dev)
{
struct omap_hsmmc_data *priv = dev_get_priv(dev);
- int value;
-
+ int value = -1;
+#if CONFIG_IS_ENABLED(DM_GPIO)
value = dm_gpio_get_value(&priv->cd_gpio);
+#endif
/* if no CD return as 1 */
if (value < 0)
return 1;
@@ -1379,10 +1380,11 @@
static int omap_hsmmc_getwp(struct udevice *dev)
{
+ int value = 0;
+#if CONFIG_IS_ENABLED(DM_GPIO)
struct omap_hsmmc_data *priv = dev_get_priv(dev);
- int value;
-
value = dm_gpio_get_value(&priv->wp_gpio);
+#endif
/* if no WP return as 0 */
if (value < 0)
return 0;
@@ -1901,10 +1903,12 @@
device_get_supply_regulator(dev, "pbias-supply",
&priv->pbias_supply);
#endif
-#if defined(OMAP_HSMMC_USE_GPIO) && CONFIG_IS_ENABLED(OF_CONTROL)
+#if defined(OMAP_HSMMC_USE_GPIO)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_GPIO)
gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN);
#endif
+#endif
mmc->dev = dev;
upriv->mmc = mmc;
diff --git a/drivers/power/regulator/pbias_regulator.c b/drivers/power/regulator/pbias_regulator.c
index 8f06e27..366f97b 100644
--- a/drivers/power/regulator/pbias_regulator.c
+++ b/drivers/power/regulator/pbias_regulator.c
@@ -108,6 +108,10 @@
static const struct udevice_id pbias_ids[] = {
{ .compatible = "ti,pbias-dra7" },
+ { .compatible = "ti,pbias-omap2" },
+ { .compatible = "ti,pbias-omap3" },
+ { .compatible = "ti,pbias-omap4" },
+ { .compatible = "ti,pbias-omap5" },
{ }
};
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 1fe81d8..0463e42 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -23,8 +23,8 @@
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
#include <configs/ti_omap3_common.h>
-#undef CONFIG_SDRC /* Disable SDRC since we have EMIF4 */
+#undef CONFIG_DM_I2C_COMPAT
#define CONFIG_REVISION_TAG
/* Hardware drivers */
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 7e52fea..14a6b9e 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -36,6 +36,7 @@
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
+#define CONFIG_SKIP_LOWLEVEL_INIT
#ifdef CONFIG_DIRECT_NOR_BOOT
#define CONFIG_ARCH_CPU_INIT
@@ -145,8 +146,11 @@
* Flash & Environment
*/
#ifdef CONFIG_NAND
+#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
#define CONFIG_ENV_SIZE (128 << 10)
+#define CONFIG_ENV_SECT_SIZE (128 << 10)
+#endif
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K
@@ -160,8 +164,7 @@
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x28000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
@@ -210,9 +213,11 @@
#endif
#ifdef CONFIG_USE_SPIFLASH
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE (64 << 10)
#define CONFIG_ENV_OFFSET (512 << 10)
-#define CONFIG_ENV_SECT_SIZE (64 << 10)
+#define CONFIG_ENV_SECT_SIZE (64 << 10)
+#endif
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_SPI_FLASH_MTD
#endif
diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index dcf7630..c668284 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -27,12 +27,10 @@
/* NS16550 Configuration */
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-#if defined(CONFIG_SPL_BUILD)
-#define CONFIG_SYS_NS16550_SERIAL
#if !defined(CONFIG_DM_SERIAL)
+#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#endif /* !CONFIG_DM_SERIAL */
-#endif /* CONFIG_SPL_BUILD */
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
115200}