diff --git a/board/LaCie/edminiv2/Makefile b/board/LaCie/edminiv2/Makefile
index 00a255d..c8d45f4 100644
--- a/board/LaCie/edminiv2/Makefile
+++ b/board/LaCie/edminiv2/Makefile
@@ -26,10 +26,13 @@
 #
 
 include $(TOPDIR)/config.mk
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../common)
+endif
 
 LIB	= $(obj)lib$(BOARD).o
 
-COBJS	:= edminiv2.o
+COBJS	:= edminiv2.o ../common/common.o
 
 SRCS	:= $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c
index ee26893..c1a01bc 100644
--- a/board/LaCie/edminiv2/edminiv2.c
+++ b/board/LaCie/edminiv2/edminiv2.c
@@ -27,7 +27,6 @@
 #include <common.h>
 #include <miiphy.h>
 #include <asm/arch/orion5x.h>
-#include "edminiv2.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -96,33 +95,6 @@
 /* Configure and enable MV88E1116 PHY */
 void reset_phy(void)
 {
-	u16 reg;
-	u16 devadr;
-	char *name = "egiga0";
-
-	if (miiphy_set_current_dev(name))
-		return;
-
-	/* command to read PHY dev address */
-	if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
-		printf("Err..%s could not read PHY dev address\n",
-			__func__);
-		return;
-	}
-
-	/*
-	 * Enable RGMII delay on Tx and Rx for CPU port
-	 * Ref: sec 4.7.2 of chip datasheet
-	 */
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
-	miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
-	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
-	miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
-	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
-
-	/* reset the phy */
-	miiphy_reset(name, devadr);
-
-	printf("88E1116 Initialized on %s\n", name);
+	mv_phy_88e1116_init("egiga0");
 }
 #endif /* CONFIG_RESET_PHY_R */
diff --git a/board/LaCie/edminiv2/edminiv2.h b/board/LaCie/edminiv2/edminiv2.h
deleted file mode 100644
index 88e62b2..0000000
--- a/board/LaCie/edminiv2/edminiv2.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * (C) Copyright 2009
- * Net Insight <www.netinsight.net>
- * Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
- *
- * Based on sheevaplug.h:
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#ifndef __EDMINIV2_BASE_H
-#define __EDMINIV2_BASE_H
-
-/* PHY related */
-#define MV88E1116_LED_FCTRL_REG		10
-#define MV88E1116_CPRSP_CR3_REG		21
-#define MV88E1116_MAC_CTRL_REG		21
-#define MV88E1116_PGADR_REG		22
-#define MV88E1116_RGMII_TXTM_CTRL	(1 << 4)
-#define MV88E1116_RGMII_RXTM_CTRL	(1 << 5)
-
-#endif /* __EDMINIV2_BASE_H */