diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
new file mode 100644
index 0000000..7aa9936
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
@@ -0,0 +1,31 @@
+/*
+ * Configuration for Xilinx ZynqMP zc1751 XM015 DC1
+ *
+ * (C) Copyright 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
+#define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
+
+#define CONFIG_ZYNQ_SDHCI0
+#define CONFIG_ZYNQ_SDHCI1
+#define CONFIG_ZYNQ_I2C1
+#define CONFIG_SYS_I2C_ZYNQ
+#define CONFIG_AHCI
+#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
+
+#define CONFIG_IDENT_STRING	" Xilinx ZynqMP ZC1751 xm015 dc1"
+
+#define CONFIG_KERNEL_FDT_OFST_SIZE \
+	"kernel_offset=0x400000\0" \
+	"fdt_offset=0x2400000\0" \
+	"kernel_size=0x2000000\0" \
+	"fdt_size=0x80000\0" \
+	"board=zc1751-dc1\0"
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h
new file mode 100644
index 0000000..2727dc6
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h
@@ -0,0 +1,28 @@
+/*
+ * Configuration for Xilinx ZynqMP zc1751 XM016 DC2
+ *
+ * (C) Copyright 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
+#define __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
+
+#define CONFIG_ZYNQ_I2C0
+#define CONFIG_SYS_I2C_ZYNQ
+#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB1_XHCI_BASEADDR}
+
+#define CONFIG_IDENT_STRING	" Xilinx ZynqMP ZC1751 xm016 dc2"
+
+#define CONFIG_KERNEL_FDT_OFST_SIZE \
+	"kernel_offset=0x400000\0" \
+	"fdt_offset=0x2400000\0" \
+	"kernel_size=0x2000000\0" \
+	"fdt_size=0x80000\0" \
+	"board=zc1751-dc2\0"
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
new file mode 100644
index 0000000..d9409ba
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
@@ -0,0 +1,30 @@
+/*
+ * Configuration for Xilinx ZynqMP zc1751 XM019 DC5
+ *
+ * (C) Copyright 2015 Xilinx, Inc.
+ * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
+#define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
+
+#define CONFIG_ZYNQ_SDHCI0
+#define CONFIG_ZYNQ_I2C0
+#define CONFIG_ZYNQ_I2C1
+#define CONFIG_SYS_I2C_ZYNQ
+
+#define CONFIG_IDENT_STRING	" Xilinx ZynqMP ZC1751 xm019 dc5"
+
+#define CONFIG_KERNEL_FDT_OFST_SIZE \
+	"kernel_offset=0x400000\0" \
+	"fdt_offset=0x2400000\0" \
+	"kernel_size=0x2000000\0" \
+	"fdt_size=0x80000\0" \
+	"board=zc1751-dc5\0"
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */