Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
a301a531099ffe39f2fb1b27b1fa7bc54bc0125d
/
.
/
arch
/
arm
/
dts
/
zynq-cse-qspi-single.dts
blob: bc08303d7a1acab1196ab2b85743483d187e0b0e [
file
] [
log
] [
blame
]
/*
* Xilinx CSE QSPI single DTS
*
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include
"zynq-cse-qspi.dtsi"
&
qspi
{
spi
-
rx
-
bus
-
width
=
<
4
>;
};