Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
diff --git a/post/lib_ppc/andi.c b/post/lib_ppc/andi.c
index e3315bf..75ba7a6 100644
--- a/post/lib_ppc/andi.c
+++ b/post/lib_ppc/andi.c
@@ -49,13 +49,13 @@
} cpu_post_andi_table[] =
{
{
- OP_ANDI_,
+ OP_ANDI_,
0x80008000,
0xffff,
0x00008000
},
{
- OP_ANDIS_,
+ OP_ANDIS_,
0x80008000,
0xffff,
0x80000000
@@ -79,7 +79,7 @@
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long codecr[] =
+ unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
@@ -112,7 +112,7 @@
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}
diff --git a/post/lib_ppc/cmp.c b/post/lib_ppc/cmp.c
index 89f754a..8d80f86 100644
--- a/post/lib_ppc/cmp.c
+++ b/post/lib_ppc/cmp.c
@@ -106,7 +106,7 @@
for (i = 0; i < cpu_post_cmp_size && ret == 0; i++)
{
struct cpu_post_cmp_s *test = cpu_post_cmp_table + i;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_2C(test->cmd, test->cr, 3, 4),
ASM_MFCR(3),
diff --git a/post/lib_ppc/cmpi.c b/post/lib_ppc/cmpi.c
index 0afdd71..92b4d57 100644
--- a/post/lib_ppc/cmpi.c
+++ b/post/lib_ppc/cmpi.c
@@ -106,7 +106,7 @@
for (i = 0; i < cpu_post_cmpi_size && ret == 0; i++)
{
struct cpu_post_cmpi_s *test = cpu_post_cmpi_table + i;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_1IC(test->cmd, test->cr, 3, test->op2),
ASM_MFCR(3),
diff --git a/post/lib_ppc/cpu_asm.h b/post/lib_ppc/cpu_asm.h
index 1cbaf41..ef6fe61 100644
--- a/post/lib_ppc/cpu_asm.h
+++ b/post/lib_ppc/cpu_asm.h
@@ -191,7 +191,7 @@
((imm2) << 6) + \
((imm3) << 1))
#define ASM_1O(opcode, off) ((opcode) + (off))
-#define ASM_3O(opcode, bo, bi, off) ((opcode) + \
+#define ASM_3O(opcode, bo, bi, off) ((opcode) + \
((bo) << 21) + \
((bi) << 16) + \
(off))
diff --git a/post/lib_ppc/rlwimi.c b/post/lib_ppc/rlwimi.c
index 1d8e61e..8662db1 100644
--- a/post/lib_ppc/rlwimi.c
+++ b/post/lib_ppc/rlwimi.c
@@ -53,7 +53,7 @@
} cpu_post_rlwimi_table[] =
{
{
- OP_RLWIMI,
+ OP_RLWIMI,
0xff00ffff,
0x0000aa00,
8,
@@ -80,7 +80,7 @@
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -20),
@@ -99,7 +99,7 @@
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
- unsigned long codecr[] =
+ unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -20),
@@ -124,26 +124,26 @@
if (ret == 0)
{
- cr = 0;
- cpu_post_exec_22 (code, & cr, & res, test->op0, test->op1);
+ cr = 0;
+ cpu_post_exec_22 (code, & cr, & res, test->op0, test->op1);
- ret = res == test->res && cr == 0 ? 0 : -1;
+ ret = res == test->res && cr == 0 ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at rlwimi test %d !\n", i);
- }
+ }
}
if (ret == 0)
{
- cpu_post_exec_22 (codecr, & cr, & res, test->op0, test->op1);
+ cpu_post_exec_22 (codecr, & cr, & res, test->op0, test->op1);
- ret = res == test->res &&
+ ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at rlwimi test %d !\n", i);
}
}
@@ -151,7 +151,7 @@
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}
diff --git a/post/lib_ppc/rlwinm.c b/post/lib_ppc/rlwinm.c
index 113e79d..4398a10 100644
--- a/post/lib_ppc/rlwinm.c
+++ b/post/lib_ppc/rlwinm.c
@@ -51,7 +51,7 @@
} cpu_post_rlwinm_table[] =
{
{
- OP_RLWINM,
+ OP_RLWINM,
0xffff0000,
24,
16,
@@ -77,7 +77,7 @@
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
@@ -94,7 +94,7 @@
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
- unsigned long codecr[] =
+ unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
@@ -117,26 +117,26 @@
if (ret == 0)
{
- cr = 0;
- cpu_post_exec_21 (code, & cr, & res, test->op1);
+ cr = 0;
+ cpu_post_exec_21 (code, & cr, & res, test->op1);
- ret = res == test->res && cr == 0 ? 0 : -1;
+ ret = res == test->res && cr == 0 ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at rlwinm test %d !\n", i);
- }
+ }
}
if (ret == 0)
{
- cpu_post_exec_21 (codecr, & cr, & res, test->op1);
+ cpu_post_exec_21 (codecr, & cr, & res, test->op1);
- ret = res == test->res &&
+ ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at rlwinm test %d !\n", i);
}
}
@@ -144,7 +144,7 @@
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}
diff --git a/post/lib_ppc/rlwnm.c b/post/lib_ppc/rlwnm.c
index a6684bf..c547bd7 100644
--- a/post/lib_ppc/rlwnm.c
+++ b/post/lib_ppc/rlwnm.c
@@ -52,7 +52,7 @@
} cpu_post_rlwnm_table[] =
{
{
- OP_RLWNM,
+ OP_RLWNM,
0xffff0000,
24,
16,
@@ -79,7 +79,7 @@
unsigned int reg1 = (reg + 1) % 32;
unsigned int reg2 = (reg + 2) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
@@ -100,7 +100,7 @@
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
- unsigned long codecr[] =
+ unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
@@ -127,26 +127,26 @@
if (ret == 0)
{
- cr = 0;
- cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
+ cr = 0;
+ cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
- ret = res == test->res && cr == 0 ? 0 : -1;
+ ret = res == test->res && cr == 0 ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at rlwnm test %d !\n", i);
- }
+ }
}
if (ret == 0)
{
- cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
+ cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
- ret = res == test->res &&
+ ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at rlwnm test %d !\n", i);
}
}
@@ -154,7 +154,7 @@
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}
diff --git a/post/lib_ppc/srawi.c b/post/lib_ppc/srawi.c
index 8c70007..4a3dddb 100644
--- a/post/lib_ppc/srawi.c
+++ b/post/lib_ppc/srawi.c
@@ -49,13 +49,13 @@
} cpu_post_srawi_table[] =
{
{
- OP_SRAWI,
+ OP_SRAWI,
0x8000,
3,
0x1000
},
{
- OP_SRAWI,
+ OP_SRAWI,
0x80000000,
3,
0xf0000000
@@ -79,7 +79,7 @@
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
@@ -96,7 +96,7 @@
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
- unsigned long codecr[] =
+ unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
@@ -118,26 +118,26 @@
if (ret == 0)
{
- cr = 0;
- cpu_post_exec_21 (code, & cr, & res, test->op1);
+ cr = 0;
+ cpu_post_exec_21 (code, & cr, & res, test->op1);
- ret = res == test->res && cr == 0 ? 0 : -1;
+ ret = res == test->res && cr == 0 ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at srawi test %d !\n", i);
- }
+ }
}
if (ret == 0)
{
- cpu_post_exec_21 (codecr, & cr, & res, test->op1);
+ cpu_post_exec_21 (codecr, & cr, & res, test->op1);
- ret = res == test->res &&
+ ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at srawi test %d !\n", i);
}
}
@@ -145,7 +145,7 @@
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}
diff --git a/post/lib_ppc/three.c b/post/lib_ppc/three.c
index a7f1a86..3fa513b 100644
--- a/post/lib_ppc/three.c
+++ b/post/lib_ppc/three.c
@@ -53,103 +53,103 @@
} cpu_post_three_table[] =
{
{
- OP_ADD,
+ OP_ADD,
100,
200,
300
},
{
- OP_ADD,
+ OP_ADD,
100,
-200,
-100
},
{
- OP_ADDC,
+ OP_ADDC,
100,
200,
300
},
{
- OP_ADDC,
+ OP_ADDC,
100,
-200,
-100
},
{
- OP_ADDE,
+ OP_ADDE,
100,
200,
300
},
{
- OP_ADDE,
+ OP_ADDE,
100,
-200,
-100
},
{
- OP_SUBF,
+ OP_SUBF,
100,
200,
100
},
{
- OP_SUBF,
+ OP_SUBF,
300,
200,
-100
},
{
- OP_SUBFC,
+ OP_SUBFC,
100,
200,
100
},
{
- OP_SUBFC,
+ OP_SUBFC,
300,
200,
-100
},
{
- OP_SUBFE,
+ OP_SUBFE,
100,
200,
200 + ~100
},
{
- OP_SUBFE,
+ OP_SUBFE,
300,
200,
200 + ~300
},
{
- OP_MULLW,
+ OP_MULLW,
200,
300,
200 * 300
},
{
- OP_MULHW,
+ OP_MULHW,
0x10000000,
0x10000000,
0x1000000
},
{
- OP_MULHWU,
+ OP_MULHWU,
0x80000000,
0x80000000,
0x40000000
},
{
- OP_DIVW,
+ OP_DIVW,
-20,
5,
-4
},
{
- OP_DIVWU,
+ OP_DIVWU,
0x8000,
0x200,
0x40
@@ -174,7 +174,7 @@
unsigned int reg1 = (reg + 1) % 32;
unsigned int reg2 = (reg + 2) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
@@ -195,7 +195,7 @@
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
- unsigned long codecr[] =
+ unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
@@ -221,26 +221,26 @@
if (ret == 0)
{
- cr = 0;
- cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
+ cr = 0;
+ cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
- ret = res == test->res && cr == 0 ? 0 : -1;
+ ret = res == test->res && cr == 0 ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at three test %d !\n", i);
- }
+ }
}
if (ret == 0)
{
- cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
+ cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
- ret = res == test->res &&
+ ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at three test %d !\n", i);
}
}
@@ -248,7 +248,7 @@
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}
diff --git a/post/lib_ppc/threei.c b/post/lib_ppc/threei.c
index bbb4f50..89f8fc8 100644
--- a/post/lib_ppc/threei.c
+++ b/post/lib_ppc/threei.c
@@ -51,25 +51,25 @@
} cpu_post_threei_table[] =
{
{
- OP_ORI,
+ OP_ORI,
0x80000000,
0xffff,
0x8000ffff
},
{
- OP_ORIS,
+ OP_ORIS,
0x00008000,
0xffff,
0xffff8000
},
{
- OP_XORI,
+ OP_XORI,
0x8000ffff,
0xffff,
0x80000000
},
{
- OP_XORIS,
+ OP_XORIS,
0x00008000,
0xffff,
0xffff8000
@@ -93,7 +93,7 @@
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
@@ -113,7 +113,7 @@
ulong res;
ulong cr;
- cr = 0;
+ cr = 0;
cpu_post_exec_21 (code, & cr, & res, test->op1);
ret = res == test->res && cr == 0 ? 0 : -1;
@@ -126,7 +126,7 @@
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}
diff --git a/post/lib_ppc/threex.c b/post/lib_ppc/threex.c
index 6aac937..1dfcc2c 100644
--- a/post/lib_ppc/threex.c
+++ b/post/lib_ppc/threex.c
@@ -53,73 +53,73 @@
} cpu_post_threex_table[] =
{
{
- OP_OR,
+ OP_OR,
0x1234,
0x5678,
0x1234 | 0x5678
},
{
- OP_ORC,
+ OP_ORC,
0x1234,
0x5678,
0x1234 | ~0x5678
},
{
- OP_XOR,
+ OP_XOR,
0x1234,
0x5678,
0x1234 ^ 0x5678
},
{
- OP_NAND,
+ OP_NAND,
0x1234,
0x5678,
~(0x1234 & 0x5678)
},
{
- OP_NOR,
+ OP_NOR,
0x1234,
0x5678,
~(0x1234 | 0x5678)
},
{
- OP_EQV,
+ OP_EQV,
0x1234,
0x5678,
~(0x1234 ^ 0x5678)
},
{
- OP_SLW,
+ OP_SLW,
0x80,
16,
0x800000
},
{
- OP_SLW,
+ OP_SLW,
0x80,
32,
0
},
{
- OP_SRW,
+ OP_SRW,
0x800000,
16,
0x80
},
{
- OP_SRW,
+ OP_SRW,
0x800000,
32,
0
},
{
- OP_SRAW,
+ OP_SRAW,
0x80000000,
3,
0xf0000000
},
{
- OP_SRAW,
+ OP_SRAW,
0x8000,
3,
0x1000
@@ -144,7 +144,7 @@
unsigned int reg1 = (reg + 1) % 32;
unsigned int reg2 = (reg + 2) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
@@ -165,7 +165,7 @@
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
- unsigned long codecr[] =
+ unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
@@ -191,26 +191,26 @@
if (ret == 0)
{
- cr = 0;
- cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
+ cr = 0;
+ cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
- ret = res == test->res && cr == 0 ? 0 : -1;
+ ret = res == test->res && cr == 0 ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at threex test %d !\n", i);
- }
+ }
}
if (ret == 0)
{
- cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
+ cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
- ret = res == test->res &&
+ ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at threex test %d !\n", i);
}
}
@@ -218,7 +218,7 @@
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}
diff --git a/post/lib_ppc/twox.c b/post/lib_ppc/twox.c
index 7417a36..519b432 100644
--- a/post/lib_ppc/twox.c
+++ b/post/lib_ppc/twox.c
@@ -51,32 +51,32 @@
} cpu_post_twox_table[] =
{
{
- OP_EXTSB,
+ OP_EXTSB,
3,
3
},
{
- OP_EXTSB,
+ OP_EXTSB,
0xff,
-1
},
{
- OP_EXTSH,
+ OP_EXTSH,
3,
3
},
{
- OP_EXTSH,
+ OP_EXTSH,
0xff,
0xff
},
{
- OP_EXTSH,
+ OP_EXTSH,
0xffff,
-1
},
{
- OP_CNTLZW,
+ OP_CNTLZW,
0x000fffff,
12
},
@@ -99,7 +99,7 @@
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
@@ -116,7 +116,7 @@
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
- unsigned long codecr[] =
+ unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
@@ -138,26 +138,26 @@
if (ret == 0)
{
- cr = 0;
- cpu_post_exec_21 (code, & cr, & res, test->op);
+ cr = 0;
+ cpu_post_exec_21 (code, & cr, & res, test->op);
- ret = res == test->res && cr == 0 ? 0 : -1;
+ ret = res == test->res && cr == 0 ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at twox test %d !\n", i);
- }
+ }
}
if (ret == 0)
{
- cpu_post_exec_21 (codecr, & cr, & res, test->op);
+ cpu_post_exec_21 (codecr, & cr, & res, test->op);
- ret = res == test->res &&
+ ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at twox test %d !\n", i);
}
}
@@ -165,7 +165,7 @@
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}