| commit | a18a645650daa785c50aa3b56e125a1bdc14da2e | [log] [tgz] |
|---|---|---|
| author | Kever Yang <kever.yang@rock-chips.com> | Mon Jul 29 12:18:18 2019 +0300 |
| committer | Kever Yang <kever.yang@rock-chips.com> | Mon Aug 05 21:05:02 2019 +0800 |
| tree | 4564e21fa3414e5bf9d2483332271800b00dddea | |
| parent | 9932a01cc5a0609510c4739ce1a6878052f806f5 [diff] |
rockchip: rk3328: set DDR as non-secure in SPL Set DDR as non-secure so that MMC DMA can access. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [cherry picked from https://github.com/rockchip-linux/u-boot/commit/bfe741ab9eb4f97371a4e6c24185419d57a3a75f and https://github.com/rockchip-linux/u-boot/commit/73d952acc8cc1ddad6652ba71895d9fe928c1e4b with minor modifications] Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c index 592f287..c2448d7 100644 --- a/arch/arm/mach-rockchip/rk3328/rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -16,6 +16,7 @@ #define CRU_BASE 0xFF440000 #define GRF_BASE 0xFF100000 #define UART2_BASE 0xFF130000 +#define FW_DDR_CON_REG 0xFF7C0040 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "rksdmmc@ff520000", @@ -46,8 +47,12 @@ int arch_cpu_init(void) { +#ifdef CONFIG_SPL_BUILD /* We do some SoC one time setting here. */ + /* Disable the ddr secure region setting to make it non-secure */ + rk_setreg(FW_DDR_CON_REG, 0x200); +#endif return 0; }