ddr: vybrid: Add calibration code to memory controler's (DDRMC) setup code
This patch extends the vf610 DDR memory controller code to support SW
leveling.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c
index fa948f7..461fba4 100644
--- a/arch/arm/mach-imx/ddrmc-vf610.c
+++ b/arch/arm/mach-imx/ddrmc-vf610.c
@@ -10,6 +10,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux-vf610.h>
#include <asm/arch/ddrmc-vf610.h>
+#include "ddrmc-vf610-calibration.h"
void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count)
{
@@ -235,4 +236,8 @@
while (!(readl(&ddrmr->cr[80]) & DDRMC_CR80_MC_INIT_COMPLETE))
udelay(10);
writel(DDRMC_CR80_MC_INIT_COMPLETE, &ddrmr->cr[81]);
+
+#ifdef CONFIG_DDRMC_VF610_CALIBRATION
+ ddrmc_calibration(ddrmr);
+#endif
}