diff --git a/board/google/Kconfig b/board/google/Kconfig
index e9559c9..7ba73a2 100644
--- a/board/google/Kconfig
+++ b/board/google/Kconfig
@@ -36,9 +36,22 @@
 	  video output and a 16GB SATA solid state drive. There is no Chrome
 	  OS EC on this model.
 
+config TARGET_CHROMEBOOK_SAMUS
+	bool "Chromebook samus"
+	help
+	  This is the Chromebook Pixel released in 2015. It uses an Intel
+	  Broadwell U Core i5 or Core i7 CPU with either 8GB or 16GB of
+	  LPDDR3 SDRAM. It has PCIe WiFi and Bluetooth. It also includes a
+	  720p webcam, USB SD reader, microphone and speakers, 2 USB 3 Type
+	  C ports which can support charging and up to a 4K external display.
+	  There is a solid state drive, either 32GB or 64GB. There is a
+	  Chrome OS EC connected on LPC, and it provides a 2560x1700 high
+	  resolution touch-enabled LCD display.
+
 endchoice
 
 source "board/google/chromebook_link/Kconfig"
 source "board/google/chromebox_panther/Kconfig"
+source "board/google/chromebook_samus/Kconfig"
 
 endif
diff --git a/board/google/chromebook_samus/Kconfig b/board/google/chromebook_samus/Kconfig
new file mode 100644
index 0000000..f2b9481
--- /dev/null
+++ b/board/google/chromebook_samus/Kconfig
@@ -0,0 +1,40 @@
+if TARGET_CHROMEBOOK_SAMUS
+
+config SYS_BOARD
+	default "chromebook_samus"
+
+config SYS_VENDOR
+	default "google"
+
+config SYS_SOC
+	default "broadwell"
+
+config SYS_CONFIG_NAME
+	default "chromebook_samus"
+
+config SYS_TEXT_BASE
+	default 0xffe00000
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select X86_RESET_VECTOR
+	select INTEL_BROADWELL
+	select HAVE_INTEL_ME
+	select BOARD_ROMSIZE_KB_8192
+
+config PCIE_ECAM_BASE
+	default 0xf0000000
+
+config EARLY_POST_CROS_EC
+	bool "Enable early post to Chrome OS EC"
+	default y
+
+config SYS_CAR_ADDR
+	hex
+	default 0xff7c0000
+
+config SYS_CAR_SIZE
+	hex
+	default 0x40000
+
+endif
diff --git a/board/google/chromebook_samus/MAINTAINERS b/board/google/chromebook_samus/MAINTAINERS
new file mode 100644
index 0000000..5500e46
--- /dev/null
+++ b/board/google/chromebook_samus/MAINTAINERS
@@ -0,0 +1,6 @@
+CHROMEBOOK SAMUS BOARD
+M:	Simon Glass <sjg@chromium.org>
+S:	Maintained
+F:	board/google/chromebook_samus/
+F:	include/configs/chromebook_samus.h
+F:	configs/chromebook_samus_defconfig
diff --git a/board/google/chromebook_samus/Makefile b/board/google/chromebook_samus/Makefile
new file mode 100644
index 0000000..1522286
--- /dev/null
+++ b/board/google/chromebook_samus/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2016 Google, Inc
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= samus.o
diff --git a/board/google/chromebook_samus/samus.c b/board/google/chromebook_samus/samus.c
new file mode 100644
index 0000000..3c3f5d4
--- /dev/null
+++ b/board/google/chromebook_samus/samus.c
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2016 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/cpu.h>
+
+int arch_early_init_r(void)
+{
+	return cpu_run_reference_code();
+}
+
+int board_early_init_f(void)
+{
+	return 0;
+}