tree e9d6b115e91cea5fe4e1ca3edc7d86bb28e4c190
parent 2aad0ae776ad3741647a352a1ad3244777cd566d
author Dave Liu <daveliu@freescale.com> 1227256303 +0800
committer Andrew Fleming-AFLEMING <afleming@freescale.com> 1232751794 -0600

fsl-ddr: use the 1T timing as default configuration

For light loaded system, we use the 1T timing to gain better
memory performance, but for some heavily loaded system,
you have to add the 2T timing options to board files.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>