commit a04ed14b235e3f3c2a751b698f43bc6a97b7b1bf
author SRICHARAN R <r.sricharan@ti.com> Tue Feb 12 01:33:43 2013 +0000
committer Tom Rini <trini@ti.com> Mon Mar 11 11:06:10 2013 -0400
tree 057c11204cfdc270720f49af35258b2708caa6e4
parent 06ebff4e557f4d2264c6b75a12e214788a6f3d97

ARM: OMAP4/5: clocks: Add the required OPP settings as per the latest addendum

Change OPP settings as per the latest 0.5 version of
addendum for OMAP5430 ES2.0. omap4/hw_data.c is touched
here to add dummy dividers.

While here correcting OPP_NOM mpu, core frequency for
OMAP4430 ES2.x

Note that OMAP5430 ES1.0 support is still kept alive and
would be removed in a cleanup later.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Nishanth Menon <nm@ti.com>

arch/arm/cpu/armv7/omap-common/clocks-common.c

diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index 88e5336..818a963 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -103,10 +103,14 @@
 		writel(params->m6_h13, &dpll_regs->cm_div_m6_h13_dpll);
 	if (params->m7_h14 >= 0)
 		writel(params->m7_h14, &dpll_regs->cm_div_m7_h14_dpll);
+	if (params->h21 >= 0)
+		writel(params->h21, &dpll_regs->cm_div_h21_dpll);
 	if (params->h22 >= 0)
 		writel(params->h22, &dpll_regs->cm_div_h22_dpll);
 	if (params->h23 >= 0)
 		writel(params->h23, &dpll_regs->cm_div_h23_dpll);
+	if (params->h24 >= 0)
+		writel(params->h24, &dpll_regs->cm_div_h24_dpll);
 }
 
 static inline void do_bypass_dpll(u32 const base)
@@ -319,11 +323,6 @@
 			CM_CLKSEL_DCC_EN_MASK);
 	}
 
-	setbits_le32((*prcm)->cm_mpu_mpu_clkctrl,
-		MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK);
-	setbits_le32((*prcm)->cm_mpu_mpu_clkctrl,
-		MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK);
-
 	params = get_mpu_dpll_params(*dplls_data);
 
 	do_setup_dpll((*prcm)->cm_clkmode_dpll_mpu, params, DPLL_LOCK, "mpu");