Coding style cleanup; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
diff --git a/post/cpu/ppc4xx/cache_4xx.S b/post/cpu/ppc4xx/cache_4xx.S
index 785b8d6..dddd76b 100644
--- a/post/cpu/ppc4xx/cache_4xx.S
+++ b/post/cpu/ppc4xx/cache_4xx.S
@@ -438,7 +438,7 @@
blr
/* Test instructions.
- */
+ */
cache_post_test_inst:
li r3, 0
li r3, -1
diff --git a/post/cpu/ppc4xx/fpu.c b/post/cpu/ppc4xx/fpu.c
index c2eb4a9..27e9ed0 100644
--- a/post/cpu/ppc4xx/fpu.c
+++ b/post/cpu/ppc4xx/fpu.c
@@ -37,7 +37,7 @@
{
if (mfspr(ccr0) & CCR0_DAPUIB)
return 0; /* Disabled */
- else
+ else
return 1; /* Enabled */
}
diff --git a/post/cpu/ppc4xx/spr.c b/post/cpu/ppc4xx/spr.c
index be5a701..3e74634 100644
--- a/post/cpu/ppc4xx/spr.c
+++ b/post/cpu/ppc4xx/spr.c
@@ -43,12 +43,11 @@
#include <asm/processor.h>
-static struct
-{
- int number;
- char * name;
- unsigned long mask;
- unsigned long value;
+static struct {
+ int number;
+ char * name;
+ unsigned long mask;
+ unsigned long value;
} spr_test_list [] = {
/* Standard Special-Purpose Registers */
@@ -65,7 +64,7 @@
{0x11f, "PVR", 0x00000000, 0x00000000},
/* Additional Special-Purpose Registers.
- * The values must match the initialization
+ * The values must match the initialization
* values from cpu/ppc4xx/start.S
*/
{0x30, "PID", 0x00000000, 0x00000000},