Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx
diff --git a/CHANGELOG b/CHANGELOG
index 7a503d0..143f061 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,653 @@
+commit 92bad20ad74b70adf3839df9a0a47cce000ac3d7
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Apr 8 14:00:57 2008 -0400
+
+ Add support for u-boot in svn and localversion-* files
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit d23ff6827decf121461fbc5622612fd7effe207e
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Thu Apr 3 17:04:22 2008 +0200
+
+ MX31ADS network and flash updates
+
+ This patch allows U-Boot to use buffered writes to the Spansion NOR
+ flash installed on this board, and eliminates long delays in network
+ transfers after the board startup.
+
+ Also modify flash layout to embed main and redundant environment
+ blocks in the U-Boot image.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit b5dc9b304d289831f291843ff88a45cbdf1a6290
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Mon Apr 14 10:53:12 2008 +0200
+
+ Support for the MX31ADS evaluation board from Freescale
+
+ This patch adds support for the MX31ADS evaluation board from Freescale,
+ initialization code is copied from RedBoot sources, also provided by
+ Freescale.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 5e3dca577b7c1bf58bd2b48449b18b7e7dcd8e04
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Thu Apr 17 18:18:00 2008 +0200
+
+ Fix crash on sequoia in ppc_4xx_eth_init
+
+ Currently U-Boot crashes in ppc_4xx_eth_init on sequoia
+ with cache enabled (TLB Parity exeption). This patch
+ fixes the problem.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit accf7355767dc7f6b85d88bb1c75c9d95e84ba5b
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Thu Apr 17 18:15:27 2008 +0200
+
+ ppc4xx: Fix crash on sequoia with cache enabled
+
+ Currently U-Boot crashes on sequoia board in CPU POST if
+ cache is enabled (CONFIG_4xx_DCACHE defined). The cache
+ won't be disabled by change_tlb before CPU POST because
+ there is an insufficient adress range check since
+ CFG_MEM_TOP_HIDE was introduced. This patch tries to fix
+ this problem.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 43c509254fab375c49936498da944658117ed07c
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Thu Apr 17 23:35:13 2008 +0900
+
+ Use jr as register jump instruction
+
+ Current assembler codes are inconsistent in the way of register jump
+ instruction usage; some use jr, some use j. Of course GNU as allows both
+ usages, but as can be expected from `Jump Register' the mnemonic `jr' is
+ more intuitive than `j'. For example, Linux doesn't have `j <reg>' usage
+ at all.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 7ce63709828d37b08866e537339a169bd0db2bd3
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Tue Apr 15 14:15:30 2008 +0200
+
+ RTC driver for MC13783
+
+ MC13783 is a multifunction IS with an SPI interface to the host. This
+ driver handles the RTC controller in this chip.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 38254f45b0b412332726c90d3184ad47479fcffb
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Tue Apr 15 14:14:25 2008 +0200
+
+ New i.MX31 SPI driver
+
+ This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
+ only implemented and tested on i.MX31, can with a modified register layout
+ and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
+ controllers too.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 7064122c2eef92f02a03ef37a1a1c07e70cd4e38
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Tue Apr 15 19:09:10 2008 +0200
+
+ Fix name of i.MX31 boards in config file header
+
+ Correct the name of the i.MX31 Litekit and phyCORE boards in config files.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit a49864593e083a5d0779fb9ca98e5a0f2053183d
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sun Apr 13 19:42:19 2008 -0400
+
+ allow ports to override go behavior
+
+ Split the arch-specific logic out of the common go code and into a dedicated
+ weak function called do_go_exec() that lives in cpu directories. This will
+ need review from i386/nios people to make sure I didn't break them.
+
+commit 017e9b7925f74878d0e9475388cca9bda5ef9482
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sun Apr 13 19:42:18 2008 -0400
+
+ allow ports to override bootelf behavior
+
+ Change the bootelf setup function into a dedicated weak function called
+ do_bootelf_exec. This way ports can control the behavior however they
+ like before/after calling the ELF entry point.
+
+commit a4b46ed6b3502335c3f3a5d672abe0bcb44f20b7
+Author: Ulf Samuelsson <ulf@atmel.com>
+Date: Sat Apr 12 20:56:03 2008 +0200
+
+ Reorder ARM boards in Makefile
+
+ Rearrange ARM boards in Makefile so that ARM926EJ-S boards
+ are no longer under ARM92xT header.
+
+ Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
+ Ack-By Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c3a60cb3bd67e120fc99b6ba88d9295c3c07f688
+Author: Ulf Samuelsson <ulf@atmel.com>
+Date: Sat Apr 12 20:29:44 2008 +0200
+
+ Clean up dataflash partitioning
+
+ This patch removes the board dependent parts from
+ "drivers/mtd/dataflash.c".
+ Each board relying on this, will have the appropriate
+ code in a new file, "partition.c" in the board directory.
+ board Makefiles updated to use the file.
+
+ The dataflash partitions are aligned on sector/page boundaries.
+
+ The CONFIG_NEW_DF_PARTITION was used to create named partitions
+ This is now the default operation, and the CONFIG variable is removed.
+
+ Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
+
+commit 51ecde946fec511a16346e498204ca10ad71080d
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Apr 12 14:08:45 2008 +0200
+
+ gitignore: udpate stgit generated and .patch file
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 66e39818e95f51ee1c1dd2094407a8929543fa6d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Apr 18 00:15:36 2008 -0700
+
+ Get rid of redundant copy of renamed header file.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c3aafd8cf814e33a77de81c2f22b8c772216a3cc
+Author: Vlad Lungu <vlad@comsys.ro>
+Date: Fri Apr 11 21:20:14 2008 +0300
+
+ Fix dependency generation for older gcc versions
+
+ With gcc 3.3.3 at least, compilation fails with
+
+ Generating include/autoconf.mk
+ gcc: compilation of header file requested
+ make: *** [include/autoconf.mk] Error 1
+
+ since commit 16fe77752eee099b9fb61ed73460e51cc94b37ba.
+
+ Signed-off-by: Vlad Lungu <vlad@comsys.ro>
+
+commit cb1c4896905ab22fcd982e6a8a539f0031942e71
+Author: Marian Balakowicz <m8@semihalf.com>
+Date: Fri Apr 11 11:07:49 2008 +0200
+
+ Restore the ability to continue booting after legacy image overwrite
+
+ Before new uImage code was merged, bootm code allowed for the kernel image to
+ get overwritten during decompresion. new uImage introduced a check for image
+ overwrites and refused to boot the image that got overwritten. This patch
+ restores the old behavior. It also adds a warning when the image overwriten is
+ a multi-image file, because in such case accessing componentes other than the
+ first one will fail.
+
+ Signed-off-by: Marian Balakowicz <m8@semihalf.com>
+
+commit de2b3216e6b4f3b2fe93759c05b17504f9dfe036
+Author: Marian Balakowicz <m8@semihalf.com>
+Date: Fri Apr 11 11:07:43 2008 +0200
+
+ ppc: Fix ftd_blob variable init when processing raw blob
+
+ Set fdt_blob variable before its value is printed out.
+
+ Signed-off-by: Marian Balakowicz <m8@semihalf.com>
+
+commit 3d36be030043cd841a2551d00a395135e363a64b
+Author: Jason Wessel <jason.wessel@windriver.com>
+Date: Thu Apr 10 14:30:16 2008 -0500
+
+ Remove all the search paths from the .lds files.
+
+ The cross compiler is responsible for providing the correct libraries
+ and the logic to find the linking libraries.
+
+ Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
+
+commit 7d721e34ae6be7d7db63e8d060a246278bb7ae58
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Mon Apr 14 15:44:16 2008 +0200
+
+ Boot-related documentation update
+
+ - document 'bootm_low' and 'bootm_size' environment variables
+ - update inaccurate CFG_BOOTMAPSZ entry
+
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit a6f0bd9f2b1971e2a61ac0fd1fc2c96cb7a4b67a
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Wed Apr 9 17:34:08 2008 +0200
+
+ Fix regression introduced by a typo in "Tidied other cpu/arm920t/start.S code"
+
+ Restore logic reverted by commit
+
+ commit 80767a6cead9990d9e77e62be947843c2c72f469
+ Author: Peter Pearse <peter.pearse@arm.com>
+ Date: Wed Sep 5 16:04:41 2007 +0100
+
+ Changed API name to coloured_led.h
+ Removed code using deprecated ifdef CONFIG_BOOTBINFUNC
+ Tidied other cpu/arm920t/start.S code
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit e25cb8d3f4fcc265a9cdf8e9d577b59bdb64bbaf
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Apr 8 10:24:24 2008 -0400
+
+ Remove conflicting NAND ID
+
+ There are two NAND entries with ID 0xDC and this obviously causes problems.
+ In the kernel, they punted the first entry, so we should do the same.
+
+ See this upstream e-mail for more info:
+ http://lists.infradead.org/pipermail/linux-mtd/2007-July/018795.html
+
+ Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 188e94c370621708d13547d58dbc6ed3c5602aa8
+Author: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+Date: Tue Apr 8 16:20:35 2008 +0900
+
+ cpu/mips/cpu.c: Fix flush_cache bug
+
+ Cache operations have to take line address (addr), not start_addr.
+ I noticed this bug when debugging ping failure.
+
+ Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+
+commit 8f2a68a07c058fca1d413e54f71c2e7e78a74ed4
+Author: Martin Krause <martin.krause@tqs.de>
+Date: Thu Apr 3 14:29:01 2008 +0200
+
+ TQM5200: fix default IDE reset level
+
+ Before the first call of ide_reset(), the level of the IDE reset
+ signal on the TQM5200 is low (reset asserted). This patch sets the
+ default value to high (reset not asserted).
+
+ Currently this patch fixes no real problem, but it is cleaner to
+ assert the reset signal only on demand, and not permanently.
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+
+commit c61e033d6e8abb7b4060ee36060961e1399f6079
+Author: Detlev Zundel <dzu@denx.de>
+Date: Thu Apr 3 14:18:48 2008 +0200
+
+ mgcoge, mgsuv: realign CONFIG_EXTRA_ENV_SETTING
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit f308572e19eb7fe63aa3d41f214cde4c23c9800f
+Author: Detlev Zundel <dzu@denx.de>
+Date: Thu Apr 3 14:18:47 2008 +0200
+
+ mgcoge, mgsuv: rename 'addcon' to 'addcons'
+
+ The latter name with 13 users is already established, so we will use
+ that.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit e175eacc87c3a9e4dad0799fee0e95732520afc7
+Author: Martin Krause <martin.krause@tqs.de>
+Date: Thu Apr 3 13:37:56 2008 +0200
+
+ IDE: fix bug in reset sequence
+
+ According to the ata (ata5) specification the RESET- signal
+ shall be asserted for at least 25 us. Without this patch,
+ the RESET- signal is asserted on some boards for only < 1 us
+ (e. g. on the TQM5200). This patch adds a general delay of
+ 25 us to the RESET- signal.
+
+ Without this patch a Platinum 4 GiB CF card is not recognised
+ properly on boards with a TQM5200 (STK52xx, TB5200).
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+
+commit 813bea96a960916c72b4a3a7df840151529c26ce
+Author: Sascha Laue <Sascha.Laue@gmx.biz>
+Date: Thu Apr 3 14:43:11 2008 +0200
+
+ lwmon5: disable CONFIG_ZERO_BOOTDELAY
+
+ Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
+
+commit 53eec6f1d25932e76d63ccb14082792b0b96bf41
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Apr 2 08:03:58 2008 +0200
+
+ ds174x: Fix warning on return in rtc_get and rtc_set functions
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit a253b38bf50c85227c33ca0febc870ee49d1588e
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Apr 2 08:03:57 2008 +0200
+
+ cmd_log.c: Fix assignment differ in signedness
+
+ In function 'logbuff_init_ptrs':
+ cmd_log.c:79: warning: pointer targets in assignment differ in signedness
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 6c0e9a8f1cc090fbfbc6f86b6b4fd17a1628f3df
+Author: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
+Date: Wed Apr 2 11:04:43 2008 +0530
+
+ Remove duplicate #undef SHOW_INFO in drivers/usb/usb_ohci.c
+
+ Signed-off-by: gururaja hebbar <gururajakr@sanyo.co.in>
+
+commit 478d5ec9ae3cbcc6040241d2d73dbbc61fe9b49d
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Apr 1 14:07:10 2008 +0200
+
+ s3c4510b_eth: fix 'packed' attribute ignored for fields of MACFrame
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c08fb3ea36d19b1640b7906264581e9105534399
+Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+Date: Tue Apr 15 10:24:14 2008 +0200
+
+ Additional PCI IDs for IDE and network controllers
+
+ These PCI IDs are required by the Linkstation platforms.
+
+ Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+
+commit c0559be371b2a64b1a817088c3308688e2182f93
+Author: Joakim Tjernlund <joakim.tjernlund@transmode.se>
+Date: Mon Apr 14 23:01:50 2008 +0200
+
+ Change env_get_char from a global function ptr to a function.
+
+ This avoids an early global data reference.
+
+ Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 3e0f331c05d72f140715c1e9fca991927e44d422
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Tue Apr 29 12:35:08 2008 +0000
+
+ Clean up smsc911x driver
+
+ Replace direct register address derefencing with accessor functions.
+ Restrict explicitly 32-bit bus-width, extend affected configurations
+ respectively.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit de1b686b763aa8b87a86f6748ce9169e7fc0e4cd
+Author: Sascha Hauer <s.hauer@pengutronix.de>
+Date: Tue Apr 15 00:08:20 2008 -0400
+
+ This patch adds a driver for the following smsc network controllers:
+ LAN9115
+ LAN9116
+ LAN9117
+ LAN9215
+ LAN9216
+ LAN9217
+
+ Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
+ Signed-off-by: Guennadi Liakhovetski<lg@denx.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 3dfd4aab929cccddb63d9ea509967861e1333b52
+Author: Sascha Laue <Sascha.Laue@gmx.biz>
+Date: Tue Apr 1 15:13:03 2008 +0200
+
+ Fix watchdog POST for lwmon5
+
+ If the hardware watchdog detects a voltage error, the watchdog sets
+ GPIO62 to low. The watchdog POST has to detect this low level.
+
+ Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
+
+commit 24b448448a917e52806f82660a5c9d47608894fb
+Author: Dave Liu <r63238@freescale.com>
+Date: Tue Apr 1 15:22:11 2008 +0800
+
+ ata: update the libata.h from ata.h of linux kernel
+
+ Current libata.h of u-boot is out of sync from linux kernel,
+ this patch make it be consistent with linux kernel.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Tor Krill <tor@excito.com>
+
+commit f8f9dc98883f66f59eb0601da65808e6b139c87c
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Mar 31 11:59:27 2008 -0500
+
+ Allow use of ARCH=powerpc when building
+
+ The linux kernel is now mostly ARCH=powerpc, so to make life easier
+ allow use to use ARCH=powerpc and convert it to ARCH=ppc.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8af657d2c6d1ca4f2f76973531394d4578ba2ef0
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Mon Mar 31 10:40:54 2008 +0900
+
+ Add apollon board MAINTAINERS entry
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit 77e475cc0ed1832160017d364be32a0be9ff02a9
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Mon Mar 31 10:40:36 2008 +0900
+
+ Fix OneNAND read
+
+ It should access with 16-bit instead of 8-bit
+
+ Now it uses the generic memcpy with 8-bit access. It means it reads wrong data from OneNAND.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit a9da2b41079d230db3a5641625311983f85ce1fb
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Mon Mar 31 10:40:19 2008 +0900
+
+ Fix OneNAND erase command
+
+ It mis-calculates the block address.
+ Also fix DECLARE_GLOBAL_DATA_PTR in env_onenand.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit 61525f2ffa156665a66908fda47dbf29d65ea579
+Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+Date: Mon Mar 31 01:32:15 2008 +0200
+
+ Support for LinkStation / KuroBox HD and HG PPC models
+
+ This patch is based on the port by Mihai Georgian (see linkstation.c for
+ Copyright information) and implements support for LinkStation / KuroBox HD
+ and HG PPC models from Buffalo Technology, whereby HD is deactivated at
+ the moment, pending network driver fixing.
+
+ Notice to users: this is pretty much a barebone port. Support for network
+ on HG models is already in the U-Boot mainline, but you might also want
+ patches to switch fan / phy modes depending on the negotiated ethernet
+ parameters. This patch also doesn't support console switching, booting EM
+ mode, Buffalo specific ext2 magic number. So, if you want to use any of
+ those, you need additional patches. Otherwise this patche provides a fully
+ functional u-boot with a network console on your system.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 0f3ba7e9783f352318f197a3148f6d5cc3d75bea
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Mar 30 01:22:13 2008 -0500
+
+ Add CONFIG_MII_INIT support to related boards
+
+ Replace CONFIG_8xx and CONFIG_MCF532x to CONFIG_MII_INIT in
+ cmd_init.c. Add CONFIG_MII_INIT to board configuration files
+ that use mii_init() in cmd_init.c.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+ Acked-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit f33fca22e76f20e4e4793810ca7a06a4805a6cf4
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Mar 30 01:19:06 2008 -0500
+
+ Update CONFIG_PCIAUTO_SKIP_HOST_BRIDGE to related boards
+
+ Remove test for CONFIG_MPC5200 in drivers/pci/pci_auto.c and define
+ CONFIG_PCIAUTO_SKIP_HOST_BRIDGE in related board configuration files.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit e99ccb488181d012248c6be30b2093e950319fc5
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Mar 27 11:46:38 2008 -0500
+
+ Introduce phys_size_t and move phys_addr_t into asm/types.h
+
+ Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's
+ that have larger physical addresses like 44x, 85xx, and 86xx.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 20a14a42a25f72e379f38460b8a8484667536795
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Apr 2 16:19:07 2008 -0500
+
+ Rename include/md5.h to include/u-boot/md5.h
+
+ Some systems have md5.h installed in /usr/include/. This isn't the
+ desired file (we want the one in include/md5.h). This will avoid the
+ conflict. This fixes the host tools building problem by creating a new
+ directory for U-Boot specific header files.
+
+ [Patch by Andy Fleming, modified to use separate directory by Wolfgang
+ Denk]
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+ Acked-by: Timur Tabi <timur@freescale.com>
+
+commit f297b7a1ec87433f66320d89d993e1bc738c66b8
+Author: Dave Liu <r63238@freescale.com>
+Date: Thu Mar 27 18:51:17 2008 +0800
+
+ drivers: code clean up
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 0ff7cba4a2e51c90827f6d21a0b28b4d67109597
+Author: Dave Liu <r63238@freescale.com>
+Date: Thu Mar 27 18:50:41 2008 +0800
+
+ drivers: clean up the ata_piix.h
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit e8f7ba404f1409606962815ecc955a06984b08b3
+Author: Dave Liu <r63238@freescale.com>
+Date: Thu Mar 27 18:49:56 2008 +0800
+
+ doc: english polishing for README.sata
+
+ according to gvb's suggestion, polishing for the doc.
+
+ Signed-off-by: Jerry Van Baren <gerald.vanbaren@ge.com>
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 3e3f766a5274d204780460e1879723b565296d34
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Mar 26 18:53:28 2008 -0500
+
+ Fix warnings introduced by I2C bus speed setting patch
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3c735e7437150e8615f26930c7819db85634276d
+Author: eran liberty <eran.liberty@gmail.com>
+Date: Thu Mar 27 00:50:49 2008 +0100
+
+ Altera Stratix II support
+
+ Adds Support for Altera's Stratix II.
+
+ Within your board specific init file you will have to call
+
+ 1. fpga_init (/* relocated code offset. usually => */ gd->reloc_off);
+ 2. fpga_add (fpga_altera, (Altera_desc*)&altera_desc);
+
+ Altera_desc* contines (for example):
+ {
+ Altera_StratixII, /* part type */
+ passive_serial, /* interface type */
+ 1, /* bytes of data part can accept */
+ (void *)(&funcs), /* interface function table */
+ 0L, /* base interface address */
+ 0 /* implementation specific cookie */
+ }
+
+ funcs is the interface. It is of type altera_board_specific_func.
+ It looks like this:
+ altera_board_specific_func func = {
+ pre_fn,
+ config_fn,
+ status_fn,
+ done_fn,
+ clk_fn,
+ data_fn,
+ abort_fn,
+ post_fn,
+ };
+
+ you will have to implement these functions, which is usually bit
+ banging some gpio.
+
+ Signed-off-by: Eran Liberty <liberty@extricom.com>
+
+commit 5ece9ec9f6cd52950ab848e2fe422dacf1d3a335
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Apr 13 14:32:54 2008 -0700
+
+ Update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
commit 5ad862166aa24d62a69aa9c708f6b2f5c0d28fb7
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date: Wed Mar 26 20:41:17 2008 +0100
diff --git a/MAKEALL b/MAKEALL
index 8241f45..38911ed 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -386,12 +386,6 @@
ZUMA \
"
-LIST_TSEC=" \
- ${LIST_85xx} \
- ${LIST_86xx} \
- ${LIST_83xx} \
-"
-
LIST_7xx=" \
BAB7xx \
CPCI750 \
@@ -400,6 +394,16 @@
ppmc7xx \
"
+#########################################################################
+## PowerPC groups
+#########################################################################
+
+LIST_TSEC=" \
+ ${LIST_83xx} \
+ ${LIST_85xx} \
+ ${LIST_86xx} \
+"
+
LIST_ppc=" \
${LIST_5xx} \
${LIST_512x} \
@@ -510,6 +514,7 @@
apollon \
imx31_litekit \
imx31_phycore \
+ mx31ads \
"
#########################################################################
@@ -544,6 +549,9 @@
scpu \
"
+#########################################################################
+## ARM groups
+#########################################################################
LIST_arm=" \
${LIST_SA} \
@@ -704,6 +712,11 @@
## SH Systems
#########################################################################
+LIST_sh3=" \
+ mpr2 \
+ ms7720se \
+"
+
LIST_sh4=" \
ms7750se \
ms7722se \
@@ -712,11 +725,6 @@
r2dplus \
"
-LIST_sh3=" \
- mpr2 \
- ms7720se \
-"
-
LIST_sh=" \
${LIST_sh3} \
${LIST_sh4} \
@@ -754,17 +762,17 @@
for arg in $@
do
case "$arg" in
- arm|SA|ARM7|ARM9|ARM10|ARM11|ixp|pxa| \
- avr32| \
- sparc| \
- blackfin| \
- coldfire| \
- microblaze| \
- mips|mips_el| \
- nios|nios2| \
- ppc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx| \
- x86|I486|TSEC| \
- sh|sh4|sh3 \
+ arm|SA|ARM7|ARM9|ARM10|ARM11|ixp|pxa \
+ |avr32 \
+ |blackfin \
+ |coldfire \
+ |microblaze \
+ |mips|mips_el \
+ |nios|nios2 \
+ |ppc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx|TSEC \
+ |sh|sh3|sh4 \
+ |sparc \
+ |x86|I486 \
)
for target in `eval echo '$LIST_'${arg}`
do
diff --git a/Makefile b/Makefile
index b67a2e1..94c21cc 100644
--- a/Makefile
+++ b/Makefile
@@ -2639,6 +2639,9 @@
imx31_phycore_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 imx31_phycore NULL mx31
+mx31ads_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
+
#========================================================================
# i386
#========================================================================
@@ -2971,7 +2974,8 @@
$(obj)board/{integratorap,integratorcp}/u-boot.lds \
$(obj)board/{bf533-ezkit,bf533-stamp,bf537-stamp,bf561-ezkit}/u-boot.lds \
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
- @rm -f $(obj)include/bmp_logo.h $(obj)nand_spl/{u-boot-spl,u-boot-spl.map}
+ @rm -f $(obj)include/bmp_logo.h
+ @rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl-4k.bin,ipl.map}
@rm -f $(obj)api_examples/demo $(VERSION_FILE)
@find $(OBJTREE) -type f \
diff --git a/board/linkstation/ide.c b/board/linkstation/ide.c
index 37d9b57..02086a0 100644
--- a/board/linkstation/ide.c
+++ b/board/linkstation/ide.c
@@ -81,12 +81,12 @@
#endif
pci_write_config_dword(devbusfn, IT8212_PCI_IdeBusSkewCONTROL, 0x02040204);
/* __LS_COMMENT__ BUFFALO changed 2004.11.10 changed for EMI */
- pci_write_config_byte(devbusfn, IT8212_PCI_IdeDrivingCURRENT, 0x36); /* 10mA */
-/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x09); */ /* 4mA */
-/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x12); */ /* 6mA */
-/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x24); */ /* 6mA,2mA */
-/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x2D); */ /* 8mA,4mA */
- pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x00);
+ pci_write_config_byte(devbusfn, IT8212_PCI_IdeDrivingCURRENT, 0x36); /* 10mA */
+/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x09); */ /* 4mA */
+/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x12); */ /* 6mA */
+/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x24); */ /* 6mA,2mA */
+/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x2D); */ /* 8mA,4mA */
+ pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x00);
}
return (status);
diff --git a/board/mx31ads/Makefile b/board/mx31ads/Makefile
new file mode 100644
index 0000000..dfadd96
--- /dev/null
+++ b/board/mx31ads/Makefile
@@ -0,0 +1,47 @@
+#
+# Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := mx31ads.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/mx31ads/config.mk b/board/mx31ads/config.mk
new file mode 100644
index 0000000..d34dc02
--- /dev/null
+++ b/board/mx31ads/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x87f00000
diff --git a/board/mx31ads/lowlevel_init.S b/board/mx31ads/lowlevel_init.S
new file mode 100644
index 0000000..099a7ca
--- /dev/null
+++ b/board/mx31ads/lowlevel_init.S
@@ -0,0 +1,281 @@
+/*
+ * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/arch/mx31-regs.h>
+
+.macro REG reg, val
+ ldr r2, =\reg
+ ldr r3, =\val
+ str r3, [r2]
+.endm
+
+.macro REG8 reg, val
+ ldr r2, =\reg
+ ldr r3, =\val
+ strb r3, [r2]
+.endm
+
+.macro DELAY loops
+ ldr r2, =\loops
+1:
+ subs r2, r2, #1
+ nop
+ bcs 1b
+.endm
+
+/* RedBoot: AIPS setup - Only setup MPROTx registers.
+ * The PACR default values are good.*/
+.macro init_aips
+ /*
+ * Set all MPROTx to be non-bufferable, trusted for R/W,
+ * not forced to user-mode.
+ */
+ ldr r0, =0x43F00000
+ ldr r1, =0x77777777
+ str r1, [r0, #0x00]
+ str r1, [r0, #0x04]
+ ldr r0, =0x53F00000
+ str r1, [r0, #0x00]
+ str r1, [r0, #0x04]
+
+ /*
+ * Clear the on and off peripheral modules Supervisor Protect bit
+ * for SDMA to access them. Did not change the AIPS control registers
+ * (offset 0x20) access type
+ */
+ ldr r0, =0x43F00000
+ ldr r1, =0x0
+ str r1, [r0, #0x40]
+ str r1, [r0, #0x44]
+ str r1, [r0, #0x48]
+ str r1, [r0, #0x4C]
+ ldr r1, [r0, #0x50]
+ and r1, r1, #0x00FFFFFF
+ str r1, [r0, #0x50]
+
+ ldr r0, =0x53F00000
+ ldr r1, =0x0
+ str r1, [r0, #0x40]
+ str r1, [r0, #0x44]
+ str r1, [r0, #0x48]
+ str r1, [r0, #0x4C]
+ ldr r1, [r0, #0x50]
+ and r1, r1, #0x00FFFFFF
+ str r1, [r0, #0x50]
+.endm /* init_aips */
+
+/* RedBoot: MAX (Multi-Layer AHB Crossbar Switch) setup */
+.macro init_max
+ ldr r0, =0x43F04000
+ /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */
+ ldr r1, =0x00302154
+ str r1, [r0, #0x000] /* for S0 */
+ str r1, [r0, #0x100] /* for S1 */
+ str r1, [r0, #0x200] /* for S2 */
+ str r1, [r0, #0x300] /* for S3 */
+ str r1, [r0, #0x400] /* for S4 */
+ /* SGPCR - always park on last master */
+ ldr r1, =0x10
+ str r1, [r0, #0x010] /* for S0 */
+ str r1, [r0, #0x110] /* for S1 */
+ str r1, [r0, #0x210] /* for S2 */
+ str r1, [r0, #0x310] /* for S3 */
+ str r1, [r0, #0x410] /* for S4 */
+ /* MGPCR - restore default values */
+ ldr r1, =0x0
+ str r1, [r0, #0x800] /* for M0 */
+ str r1, [r0, #0x900] /* for M1 */
+ str r1, [r0, #0xA00] /* for M2 */
+ str r1, [r0, #0xB00] /* for M3 */
+ str r1, [r0, #0xC00] /* for M4 */
+ str r1, [r0, #0xD00] /* for M5 */
+.endm /* init_max */
+
+/* RedBoot: M3IF setup */
+.macro init_m3if
+ /* Configure M3IF registers */
+ ldr r1, =0xB8003000
+ /*
+ * M3IF Control Register (M3IFCTL)
+ * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000
+ * MRRP[1] = L2CC1 not on priority list (0 << 0) = 0x00000000
+ * MRRP[2] = MBX not on priority list (0 << 0) = 0x00000000
+ * MRRP[3] = MAX1 not on priority list (0 << 0) = 0x00000000
+ * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000
+ * MRRP[5] = MPEG4 not on priority list (0 << 0) = 0x00000000
+ * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040
+ * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000
+ * ------------
+ * 0x00000040
+ */
+ ldr r0, =0x00000040
+ str r0, [r1] /* M3IF control reg */
+.endm /* init_m3if */
+
+/* RedBoot: To support 133MHz DDR */
+.macro init_drive_strength
+ /*
+ * Disable maximum drive strength SDRAM/DDR lines by clearing DSE1 bits
+ * in SW_PAD_CTL registers
+ */
+
+ /* SDCLK */
+ ldr r1, =0x43FAC200
+ ldr r0, [r1, #0x6C]
+ bic r0, r0, #(1 << 12)
+ str r0, [r1, #0x6C]
+
+ /* CAS */
+ ldr r0, [r1, #0x70]
+ bic r0, r0, #(1 << 22)
+ str r0, [r1, #0x70]
+
+ /* RAS */
+ ldr r0, [r1, #0x74]
+ bic r0, r0, #(1 << 2)
+ str r0, [r1, #0x74]
+
+ /* CS2 (CSD0) */
+ ldr r0, [r1, #0x7C]
+ bic r0, r0, #(1 << 22)
+ str r0, [r1, #0x7C]
+
+ /* DQM3 */
+ ldr r0, [r1, #0x84]
+ bic r0, r0, #(1 << 22)
+ str r0, [r1, #0x84]
+
+ /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */
+ ldr r2, =22 /* (0x2E0 - 0x288) / 4 = 22 */
+pad_loop:
+ ldr r0, [r1, #0x88]
+ bic r0, r0, #(1 << 22)
+ bic r0, r0, #(1 << 12)
+ bic r0, r0, #(1 << 2)
+ str r0, [r1, #0x88]
+ add r1, r1, #4
+ subs r2, r2, #0x1
+ bne pad_loop
+.endm /* init_drive_strength */
+
+/* CPLD on CS4 setup */
+.macro init_cs4
+ ldr r0, =WEIM_BASE
+ ldr r1, =0x0000D843
+ str r1, [r0, #0x40]
+ ldr r1, =0x22252521
+ str r1, [r0, #0x44]
+ ldr r1, =0x22220A00
+ str r1, [r0, #0x48]
+.endm /* init_cs4 */
+
+.globl lowlevel_init
+lowlevel_init:
+
+ /* Redboot initializes very early AIPS, what for?
+ * Then it also initializes Multi-Layer AHB Crossbar Switch,
+ * M3IF */
+ /* Also setup the Peripheral Port Remap register inside the core */
+ ldr r0, =0x40000015 /* start from AIPS 2GB region */
+ mcr p15, 0, r0, c15, c2, 4
+
+ init_aips
+
+ init_max
+
+ init_m3if
+
+ init_drive_strength
+
+ init_cs4
+
+ /* Image Processing Unit: */
+ /* Too early to switch display on? */
+ REG IPU_CONF, IPU_CONF_DI_EN /* Switch on Display Interface */
+ /* Clock Control Module: */
+ REG CCM_CCMR, 0x074B0BF5 /* Use CKIH, MCU PLL off */
+
+ DELAY 0x40000
+
+ REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE /* MCU PLL on */
+ REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS /* Switch to MCU PLL */
+
+ /* PBC CPLD on CS4 */
+ mov r1, #CS4_BASE
+ ldrh r1, [r1, #0x2]
+ /* Is 27MHz switch set? */
+ ands r1, r1, #0x16
+
+ /* 532-133-66.5 */
+ ldr r0, =CCM_BASE
+ ldr r1, =0xFF871D58
+ /* PDR0 */
+ str r1, [r0, #0x4]
+ ldreq r1, MPCTL_PARAM_532
+ ldrne r1, MPCTL_PARAM_532_27
+ /* MPCTL */
+ str r1, [r0, #0x10]
+
+ /* Set UPLL=240MHz, USB=60MHz */
+ ldr r1, =0x49FCFE7F
+ /* PDR1 */
+ str r1, [r0, #0x8]
+ ldreq r1, UPCTL_PARAM_240
+ ldrne r1, UPCTL_PARAM_240_27
+ /* UPCTL */
+ str r1, [r0, #0x14]
+ /* default CLKO to 1/8 of the ARM core */
+ mov r1, #0x000002C0
+ add r1, r1, #0x00000006
+ /* COSR */
+ str r1, [r0, #0x1c]
+
+ /* RedBoot sets 0x1ff, 7, 3, 5, 1, 3, 0 */
+/* REG CCM_PDR0, PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | PDR0_HSP_PODF(2) | PDR0_NFC_PODF(6) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(2) | PDR0_MCU_PODF(0)*/
+
+ /* Redboot: 0, 51, 10, 12 / 0, 14, 9, 13 */
+/* REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0x33) | PLL_MFI(7) | PLL_MFN(0x23)*/
+ /* Default: 1, 4, 12, 1 */
+ REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
+
+ /* B8xxxxxx - NAND, 8xxxxxxx - CSD0 RAM */
+ REG 0xB8001010, 0x00000004
+ REG 0xB8001004, 0x006ac73a
+ REG 0xB8001000, 0x92100000
+ REG 0x80000f00, 0x12344321
+ REG 0xB8001000, 0xa2100000
+ REG 0x80000000, 0x12344321
+ REG 0x80000000, 0x12344321
+ REG 0xB8001000, 0xb2100000
+ REG8 0x80000033, 0xda
+ REG8 0x81000000, 0xff
+ REG 0xB8001000, 0x82226080
+ REG 0x80000000, 0xDEADBEEF
+ REG 0xB8001010, 0x0000000c
+
+ mov pc, lr
+
+MPCTL_PARAM_532:
+ .word (((1-1) << 26) + ((52-1) << 16) + (10 << 10) + (12 << 0))
+MPCTL_PARAM_532_27:
+ .word (((1-1) << 26) + ((15-1) << 16) + (9 << 10) + (13 << 0))
+UPCTL_PARAM_240:
+ .word (((2-1) << 26) + ((13-1) << 16) + (9 << 10) + (3 << 0))
+UPCTL_PARAM_240_27:
+ .word (((2-1) << 26) + ((9 -1) << 16) + (8 << 10) + (8 << 0))
diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c
new file mode 100644
index 0000000..5a7d8c9
--- /dev/null
+++ b/board/mx31ads/mx31ads.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/mx31.h>
+#include <asm/arch/mx31-regs.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init (void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+int board_init (void)
+{
+ int i;
+
+ /* CS0: Nor Flash */
+ /*
+ * CS0L and CS0A values are from the RedBoot sources by Freescale
+ * and are also equal to those used by Sascha Hauer for the Phytec
+ * i.MX31 board. CS0U is just a slightly optimized hardware default:
+ * the only non-zero field "Wait State Control" is set to half the
+ * default value.
+ */
+ __REG(CSCR_U(0)) = 0x00000f00;
+ __REG(CSCR_L(0)) = 0x10000D03;
+ __REG(CSCR_A(0)) = 0x00720900;
+
+ /* setup pins for UART1 */
+ mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
+ mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
+ mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
+ mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
+
+ /* PBC setup */
+ /* Enable UART transceivers also reset the Ethernet/external UART */
+ readw(CS4_BASE + 4);
+
+ writew(0x8023, CS4_BASE + 4);
+
+ /* RedBoot also has an empty loop with 100000 iterations here -
+ * clock doesn't run yet */
+ for (i = 0; i < 100000; i++)
+ ;
+
+ /* Clear the reset, toggle the LEDs */
+ writew(0xDF, CS4_BASE + 6);
+
+ /* clock still doesn't run */
+ for (i = 0; i < 100000; i++)
+ ;
+
+ /* See 1.5.4 in IMX31ADSE_PERI_BUS_CNTRL_CPLD_RM.pdf */
+ readb(CS4_BASE + 8);
+ readb(CS4_BASE + 7);
+ readb(CS4_BASE + 8);
+ readb(CS4_BASE + 7);
+
+ gd->bd->bi_arch_number = 447; /* board id for linux */
+ gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
+
+ return 0;
+}
+
+int checkboard (void)
+{
+ printf("Board: MX31ADS\n");
+ return 0;
+}
diff --git a/board/mx31ads/u-boot.lds b/board/mx31ads/u-boot.lds
new file mode 100644
index 0000000..49713d4
--- /dev/null
+++ b/board/mx31ads/u-boot.lds
@@ -0,0 +1,70 @@
+/*
+ * January 2004 - Changed to support H4 device
+ * Copyright (c) 2004 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/arm1136/start.o (.text)
+ board/mx31ads/libmx31ads.a (.text)
+ lib_arm/libarm.a (.text)
+ net/libnet.a (.text)
+ drivers/mtd/libmtd.a (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o(.text)
+
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 3a0c83d..ae9c21b 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -100,7 +100,6 @@
int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
#endif
#if defined(CONFIG_ARTOS) && defined(CONFIG_PPC)
-extern uchar (*env_get_char)(int); /* Returns a character from the environment */
static boot_os_fn do_bootm_artos;
#endif
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h
index d04072e..02b7dcb 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -138,5 +138,19 @@
#define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI)
#define MUX_CSPI2_MISO__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO)
+/*
+ * Memory regions and CS
+ */
+#define IPU_MEM_BASE 0x70000000
+#define CSD0_BASE 0x80000000
+#define CSD1_BASE 0x90000000
+#define CS0_BASE 0xA0000000
+#define CS1_BASE 0xA8000000
+#define CS2_BASE 0xB0000000
+#define CS3_BASE 0xB2000000
+#define CS4_BASE 0xB4000000
+#define CS4_PSRAM_BASE 0xB5000000
+#define CS5_BASE 0xB6000000
+#define PCMCIA_MEM_BASE 0xC0000000
#endif /* __ASM_ARCH_MX31_REGS_H */
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
new file mode 100644
index 0000000..78e2545
--- /dev/null
+++ b/include/configs/mx31ads.h
@@ -0,0 +1,181 @@
+/*
+ * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
+ *
+ * Configuration settings for the MX31ADS Freescale board.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/mx31-regs.h>
+
+ /* High Level Configuration Options */
+#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
+#define CONFIG_MX31 1 /* in a mx31 */
+#define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */
+#define CONFIG_MX31_CLK32 32000
+
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/*
+ * Disabled for now due to build problems under Debian and a significant increase
+ * in the final file size: 144260 vs. 109536 Bytes.
+ */
+#if 0
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_FIT 1
+#define CONFIG_FIT_VERBOSE 1
+#endif
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+#define CONFIG_MX31_UART 1
+#define CFG_MX31_UART1 1
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
+
+/***********************************************************
+ * Command definition
+ ***********************************************************/
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+
+#define CONFIG_BOOTDELAY 3
+
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.23.168
+#define CONFIG_SERVERIP 192.168.23.2
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
+ "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
+ "bootcmd=run bootcmd_net\0" \
+ "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0" \
+ "prg_uboot=tftpboot 0x80000000 u-boot-mx31ads.bin; protect off 0xa0000000 0xa001ffff; erase 0xa0000000 0xa001ffff; cp.b 0x80000000 0xa0000000 $(filesize)\0"
+
+
+#define CONFIG_DRIVER_CS8900 1
+#define CS8900_BASE 0xb4020300
+#define CS8900_BUS16 1 /* follow the Linux driver */
+
+/*
+ * The MX31ADS board seems to have a hardware "peculiarity" confirmed under
+ * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
+ * controller inverted. The controller is capable of detecting and correcting
+ * this, but it needs 4 network packets for that. Which means, at startup, you
+ * will not receive answers to the first 4 packest, unless there have been some
+ * broadcasts on the network, or your board is on a hub. Reducing the ARP
+ * timeout from default 5 seconds to 200ms we speed up the initial TFTP
+ * transfer, should the user wish one, significantly.
+ */
+#define CONFIG_ARP_TIMEOUT 200UL
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> "
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0 /* memtest works on */
+#define CFG_MEMTEST_END 0x10000
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR CSD0_BASE /* default load address */
+
+#define CFG_HZ 32000
+
+#define CONFIG_CMDLINE_EDITING 1
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM_1 CSD0_BASE
+#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+#define CFG_FLASH_BASE CS0_BASE
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 262 /* max number of sectors on one chip */
+#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SECT_SIZE (32 * 1024)
+#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE)
+#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
+
+/* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end.
+ * The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors,
+ * if we put environment next to it, we will have to occupy 128KiB for it.
+ * Putting it at the top of flash we use only 32KiB. */
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_ENV_SECT_SIZE)
+
+/*-----------------------------------------------------------------------
+ * CFI FLASH driver setup
+ */
+#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
+#define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
+#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
+
+/*
+ * JFFS2 partitions
+ */
+#undef CONFIG_JFFS2_CMDLINE
+#define CONFIG_JFFS2_DEV "nor0"
+
+#endif /* __CONFIG_H */
diff --git a/tools/setlocalversion b/tools/setlocalversion
index 9bbdafd..bbb2ab2 100755
--- a/tools/setlocalversion
+++ b/tools/setlocalversion
@@ -22,4 +22,18 @@
| read dummy; then
printf '%s' -dirty
fi
+
+ # Is this git on svn?
+ if git config --get svn-remote.svn.url >/dev/null; then
+ printf -- '-svn%s' "`git-svn find-rev $head`"
+ fi
+fi
+
+# Check for svn and a svn repo.
+if rev=`svn info 2>/dev/null` ; then
+ rev=`echo "${rev}" | grep '^Revision' | awk '{print $NF}'`
+ printf -- '-svn%s' $rev
fi
+
+# Check for any localversion-* files
+printf '%s' "`cat localversion-* 2>/dev/null`"