Merge tag 'u-boot-at91-2025.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2025.10 cycle:
This feature set includes the addition of new sam9x7 SoC and a new board
named sam9x7-curiosity. There is also new support for sam9x60 compatible
at91 watchdog.
diff --git a/arch/Kconfig b/arch/Kconfig
index ea33d07..597b40f 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -63,6 +63,13 @@
default 64 if RISCV
default 32 if MIPS
+config SYS_DTC_PAD_BYTES
+ int "Size in bytes to pad device tree blob"
+ default 32768 if X86 && EFI_APP
+ default 4096 if ARC || ARM64 || M68K || MICROBLAZE || NIOS2 \
+ || RISCV || SANDBOX || X86
+ default 0
+
config LINKER_LIST_ALIGN
int
default 32 if SANDBOX
diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile
index fe6ad7b..87c627c 100644
--- a/arch/arc/dts/Makefile
+++ b/arch/arc/dts/Makefile
@@ -11,4 +11,4 @@
include $(srctree)/scripts/Makefile.dts
# Add any required device tree compiler flags here
-DTC_FLAGS += -R 4 -p 0x1000
+DTC_FLAGS += -R 4
diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m-ex-u-boot.dtsi b/arch/arm/dts/r8a774a1-hihope-rzg2m-ex-u-boot.dtsi
deleted file mode 100644
index dd5a208..0000000
--- a/arch/arm/dts/r8a774a1-hihope-rzg2m-ex-u-boot.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot for the Hihope RZ/G2M board
- *
- * Copyright (C) 2021-2024 Renesas Electronics Corporation
- */
-
-#include "r8a774a1-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774a1-u-boot.dtsi b/arch/arm/dts/r8a774a1-u-boot.dtsi
deleted file mode 100644
index bd91a963..0000000
--- a/arch/arm/dts/r8a774a1-u-boot.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on RZ/G2 R8A774A1 SoC
- *
- * Copyright (C) 2021 Renesas Electronics Corporation
- */
-
-#include "r8a779x-rcar64-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n-ex-u-boot.dtsi b/arch/arm/dts/r8a774b1-hihope-rzg2n-ex-u-boot.dtsi
deleted file mode 100644
index b378cab..0000000
--- a/arch/arm/dts/r8a774b1-hihope-rzg2n-ex-u-boot.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot for the Hihope RZ/G2N board
- *
- * Copyright (C) 2021-2024 Renesas Electronics Corp.
- */
-
-#include "r8a774b1-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774b1-u-boot.dtsi b/arch/arm/dts/r8a774b1-u-boot.dtsi
deleted file mode 100644
index 38a82f0..0000000
--- a/arch/arm/dts/r8a774b1-u-boot.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on RZ/G2 R8A774B1 SoC
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-
-#include "r8a779x-rcar64-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774c0-u-boot.dtsi b/arch/arm/dts/r8a774c0-u-boot.dtsi
index 4572c22..17b863d 100644
--- a/arch/arm/dts/r8a774c0-u-boot.dtsi
+++ b/arch/arm/dts/r8a774c0-u-boot.dtsi
@@ -6,8 +6,6 @@
*
*/
-#include "r8a779x-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h-ex-u-boot.dtsi b/arch/arm/dts/r8a774e1-hihope-rzg2h-ex-u-boot.dtsi
deleted file mode 100644
index 560bea4..0000000
--- a/arch/arm/dts/r8a774e1-hihope-rzg2h-ex-u-boot.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot for the Hihope RZ/G2H board
- *
- * Copyright (C) 2020-2024 Renesas Electronics Corp.
- */
-
-#include "r8a774e1-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a774e1-u-boot.dtsi b/arch/arm/dts/r8a774e1-u-boot.dtsi
deleted file mode 100644
index f314b2b..0000000
--- a/arch/arm/dts/r8a774e1-u-boot.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on RZ/G2 R8A774E1 SoC
- *
- * Copyright (C) 2020 Renesas Electronics Corp.
- */
-
-#include "r8a779x-rcar64-u-boot.dtsi"
diff --git a/arch/arm/dts/r8a7790-lager-u-boot.dtsi b/arch/arm/dts/r8a7790-lager-u-boot.dtsi
index ed18917..2b18e2e 100644
--- a/arch/arm/dts/r8a7790-lager-u-boot.dtsi
+++ b/arch/arm/dts/r8a7790-lager-u-boot.dtsi
@@ -5,12 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7790-u-boot.dtsi"
-
-&scif0 {
- bootph-all;
-};
-
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/r8a7790-stout-u-boot.dtsi b/arch/arm/dts/r8a7790-stout-u-boot.dtsi
index 3b39304..788432b 100644
--- a/arch/arm/dts/r8a7790-stout-u-boot.dtsi
+++ b/arch/arm/dts/r8a7790-stout-u-boot.dtsi
@@ -5,12 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7790-u-boot.dtsi"
-
-&scifa0 {
- bootph-all;
-};
-
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/r8a7790-u-boot.dtsi b/arch/arm/dts/r8a7790-u-boot.dtsi
deleted file mode 100644
index 2a7d76b..0000000
--- a/arch/arm/dts/r8a7790-u-boot.dtsi
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on R-Car R8A7790 SoC
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a779x-u-boot.dtsi"
-
-&usb_extal_clk {
- bootph-all;
-};
-
-&pfc {
- bootph-all;
-};
-
-&rst {
- bootph-all;
-};
diff --git a/arch/arm/dts/r8a7791-koelsch-u-boot.dtsi b/arch/arm/dts/r8a7791-koelsch-u-boot.dtsi
index 541c419..ed258d5 100644
--- a/arch/arm/dts/r8a7791-koelsch-u-boot.dtsi
+++ b/arch/arm/dts/r8a7791-koelsch-u-boot.dtsi
@@ -5,12 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7791-u-boot.dtsi"
-
-&scif0 {
- bootph-all;
-};
-
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/r8a7791-porter-u-boot.dtsi b/arch/arm/dts/r8a7791-porter-u-boot.dtsi
index cbf2c52..cb80842 100644
--- a/arch/arm/dts/r8a7791-porter-u-boot.dtsi
+++ b/arch/arm/dts/r8a7791-porter-u-boot.dtsi
@@ -5,20 +5,13 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7791-u-boot.dtsi"
-
-&scif0 {
- bootph-all;
-};
-
-&i2c6 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};
+
+&i2c6 {
+ clock-frequency = <400000>;
+};
diff --git a/arch/arm/dts/r8a7791-u-boot.dtsi b/arch/arm/dts/r8a7791-u-boot.dtsi
deleted file mode 100644
index bb0e2fd..0000000
--- a/arch/arm/dts/r8a7791-u-boot.dtsi
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on R-Car R8A7791 SoC
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a779x-u-boot.dtsi"
-
-&usb_extal_clk {
- bootph-all;
-};
-
-&pfc {
- bootph-all;
-};
-
-&rst {
- bootph-all;
-};
diff --git a/arch/arm/dts/r8a7792-blanche-u-boot.dtsi b/arch/arm/dts/r8a7792-blanche-u-boot.dtsi
deleted file mode 100644
index 8c36a3e..0000000
--- a/arch/arm/dts/r8a7792-blanche-u-boot.dtsi
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot for the Blanche board
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a7792-u-boot.dtsi"
-
-&iic3 {
- status = "okay";
-};
-
-&scif0 {
- bootph-all;
-};
diff --git a/arch/arm/dts/r8a7792-u-boot.dtsi b/arch/arm/dts/r8a7792-u-boot.dtsi
deleted file mode 100644
index ebbdcb7..0000000
--- a/arch/arm/dts/r8a7792-u-boot.dtsi
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on R-Car R8A7792 SoC
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a779x-u-boot.dtsi"
-
-&pfc {
- bootph-all;
-};
-
-&rst {
- bootph-all;
-};
diff --git a/arch/arm/dts/r8a7793-gose-u-boot.dtsi b/arch/arm/dts/r8a7793-gose-u-boot.dtsi
index 41c4361..fd99e0f 100644
--- a/arch/arm/dts/r8a7793-gose-u-boot.dtsi
+++ b/arch/arm/dts/r8a7793-gose-u-boot.dtsi
@@ -5,12 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7793-u-boot.dtsi"
-
-&scif0 {
- bootph-all;
-};
-
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/r8a7793-u-boot.dtsi b/arch/arm/dts/r8a7793-u-boot.dtsi
deleted file mode 100644
index 08f2248..0000000
--- a/arch/arm/dts/r8a7793-u-boot.dtsi
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on R-Car R8A7793 SoC
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a779x-u-boot.dtsi"
-
-&usb_extal_clk {
- bootph-all;
-};
-
-&pfc {
- bootph-all;
-};
-
-&rst {
- bootph-all;
-};
diff --git a/arch/arm/dts/r8a7794-alt-u-boot.dtsi b/arch/arm/dts/r8a7794-alt-u-boot.dtsi
index e156b4c..fea7138 100644
--- a/arch/arm/dts/r8a7794-alt-u-boot.dtsi
+++ b/arch/arm/dts/r8a7794-alt-u-boot.dtsi
@@ -5,48 +5,9 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7794-u-boot.dtsi"
-
-&i2c7 {
- status = "okay";
- clock-frequency = <100000>;
-};
-
-&pci0 {
- status = "okay";
- pinctrl-0 = <&usb0_pins>;
- pinctrl-names = "default";
-};
-
-&pci1 {
- status = "okay";
- pinctrl-0 = <&usb1_pins>;
- pinctrl-names = "default";
-};
-
-&pfc {
- usb0_pins: usb0 {
- groups = "usb0";
- function = "usb0";
- };
-
- usb1_pins: usb1 {
- groups = "usb1";
- function = "usb1";
- };
-};
-
-&scif2 {
- bootph-all;
-};
-
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};
-
-&usbphy {
- status = "okay";
-};
diff --git a/arch/arm/dts/r8a7794-silk-u-boot.dtsi b/arch/arm/dts/r8a7794-silk-u-boot.dtsi
index e448ea7..f87d04b 100644
--- a/arch/arm/dts/r8a7794-silk-u-boot.dtsi
+++ b/arch/arm/dts/r8a7794-silk-u-boot.dtsi
@@ -5,12 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7794-u-boot.dtsi"
-
-&scif2 {
- bootph-all;
-};
-
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/r8a7794-u-boot.dtsi b/arch/arm/dts/r8a7794-u-boot.dtsi
deleted file mode 100644
index 303afae..0000000
--- a/arch/arm/dts/r8a7794-u-boot.dtsi
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on R-Car R8A7794 SoC
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a779x-u-boot.dtsi"
-
-&usb_extal_clk {
- bootph-all;
-};
-
-&pfc {
- bootph-all;
-};
-
-&rst {
- bootph-all;
-};
diff --git a/arch/arm/dts/r8a77951-u-boot.dtsi b/arch/arm/dts/r8a77951-u-boot.dtsi
index 768d633..13760f3 100644
--- a/arch/arm/dts/r8a77951-u-boot.dtsi
+++ b/arch/arm/dts/r8a77951-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a779x-rcar64-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi
index db062f8..9cc0d52 100644
--- a/arch/arm/dts/r8a77960-u-boot.dtsi
+++ b/arch/arm/dts/r8a77960-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a779x-rcar64-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi
index d67e94e..3cf32d8 100644
--- a/arch/arm/dts/r8a77965-u-boot.dtsi
+++ b/arch/arm/dts/r8a77965-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a779x-rcar64-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi
index 8dfa56c..d00ef2f 100644
--- a/arch/arm/dts/r8a77970-u-boot.dtsi
+++ b/arch/arm/dts/r8a77970-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a779x-rcar64-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi
index 0888399..df86297 100644
--- a/arch/arm/dts/r8a77980-u-boot.dtsi
+++ b/arch/arm/dts/r8a77980-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a779x-rcar64-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a77990-u-boot.dtsi b/arch/arm/dts/r8a77990-u-boot.dtsi
index b701f68..d9dcce0 100644
--- a/arch/arm/dts/r8a77990-u-boot.dtsi
+++ b/arch/arm/dts/r8a77990-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a779x-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a77995-u-boot.dtsi b/arch/arm/dts/r8a77995-u-boot.dtsi
index f4bafb6..85fccba 100644
--- a/arch/arm/dts/r8a77995-u-boot.dtsi
+++ b/arch/arm/dts/r8a77995-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a779x-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a779a0-u-boot.dtsi b/arch/arm/dts/r8a779a0-u-boot.dtsi
index f506a66..a4e75a6 100644
--- a/arch/arm/dts/r8a779a0-u-boot.dtsi
+++ b/arch/arm/dts/r8a779a0-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2020 Renesas Electronics Corp.
*/
-#include "r8a779x-rcar64-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a779f0-u-boot.dtsi b/arch/arm/dts/r8a779f0-u-boot.dtsi
index 08d32fe..a7ff4eb 100644
--- a/arch/arm/dts/r8a779f0-u-boot.dtsi
+++ b/arch/arm/dts/r8a779f0-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2021 Renesas Electronics Corp.
*/
-#include "r8a779x-rcar64-u-boot.dtsi"
-
/ {
soc {
rpc: spi@ee200000 {
diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi
index cc9d99b..5aa6131 100644
--- a/arch/arm/dts/r8a779g0-u-boot.dtsi
+++ b/arch/arm/dts/r8a779g0-u-boot.dtsi
@@ -5,8 +5,6 @@
* Copyright (C) 2021 Renesas Electronics Corp.
*/
-#include "r8a779x-rcar64-u-boot.dtsi"
-
/ {
binman: binman {
multiple-images;
@@ -135,14 +133,6 @@
};
};
-&cpg {
- bootph-all;
-};
-
-&hscif0 {
- bootph-all;
-};
-
&hscif0_pins {
bootph-all;
};
@@ -151,19 +141,11 @@
bootph-all;
};
-&pfc {
- bootph-all;
-};
-
&rpc {
bank-width = <2>;
num-cs = <1>;
};
-&rst {
- bootph-all;
-};
-
&soc {
apmu@e6170000 { /* Remoteproc */
compatible = "renesas,r8a779g0-cr52";
diff --git a/arch/arm/dts/r8a779x-rcar64-u-boot.dtsi b/arch/arm/dts/r8a779x-rcar64-u-boot.dtsi
deleted file mode 100644
index b59cc7d..0000000
--- a/arch/arm/dts/r8a779x-rcar64-u-boot.dtsi
+++ /dev/null
@@ -1,12 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on R-Car 64bit SoC
- *
- * Copyright (C) 2024 Marek Vasut <marek.vasut+renesas@mailbox.org>
- */
-
-#include "r8a779x-u-boot.dtsi"
-
-&extalr_clk {
- bootph-all;
-};
diff --git a/arch/arm/dts/r8a779x-u-boot.dtsi b/arch/arm/dts/r8a779x-u-boot.dtsi
deleted file mode 100644
index d1441f1..0000000
--- a/arch/arm/dts/r8a779x-u-boot.dtsi
+++ /dev/null
@@ -1,24 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on R-Car Gen3
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-/ {
- soc {
- bootph-all;
- };
-};
-
-&cpg {
- bootph-all;
-};
-
-&extal_clk {
- bootph-all;
-};
-
-&prr {
- bootph-all;
-};
diff --git a/arch/arm/mach-k3/am62ax/am62a7_init.c b/arch/arm/mach-k3/am62ax/am62a7_init.c
index edd43a1..ac4d300 100644
--- a/arch/arm/mach-k3/am62ax/am62a7_init.c
+++ b/arch/arm/mach-k3/am62ax/am62a7_init.c
@@ -172,6 +172,10 @@
/* Output System Firmware version info */
k3_sysfw_print_ver();
+ /* Output DM Firmware version info */
+ if (IS_ENABLED(CONFIG_ARM64))
+ k3_dm_print_ver();
+
if (IS_ENABLED(CONFIG_ESM_K3)) {
/* Probe/configure ESM0 */
ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev);
diff --git a/arch/arm/mach-k3/am62px/am62p5_init.c b/arch/arm/mach-k3/am62px/am62p5_init.c
index 6e3c66e..44a2d44 100644
--- a/arch/arm/mach-k3/am62px/am62p5_init.c
+++ b/arch/arm/mach-k3/am62px/am62p5_init.c
@@ -224,6 +224,10 @@
/* Output System Firmware version info */
k3_sysfw_print_ver();
+ /* Output DM Firmware version info */
+ if (IS_ENABLED(CONFIG_ARM64))
+ k3_dm_print_ver();
+
if (IS_ENABLED(CONFIG_K3_AM62A_DDRSS)) {
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 0323001..f8c53b2 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -31,6 +31,11 @@
#include <dm/uclass-internal.h>
#include <dm/device-internal.h>
+#define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001
+#define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002
+#define PROC_ID_MCU_R5FSS0_CORE1 0x02
+#define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100
+
#include <asm/arch/k3-qos.h>
struct ti_sci_handle *get_ti_sci_handle(void)
@@ -68,6 +73,35 @@
ti_sci->version.firmware_revision, fw_desc);
}
+void __maybe_unused k3_dm_print_ver(void)
+{
+ struct ti_sci_handle *ti_sci = get_ti_sci_handle();
+ struct ti_sci_firmware_ops *fw_ops = &ti_sci->ops.fw_ops;
+ struct ti_sci_dm_version_info dm_info = {0};
+ u64 fw_caps;
+ int ret;
+
+ ret = fw_ops->query_dm_cap(ti_sci, &fw_caps);
+ if (ret) {
+ printf("Failed to query DM firmware capability %d\n", ret);
+ return;
+ }
+
+ if (!(fw_caps & TI_SCI_MSG_FLAG_FW_CAP_DM))
+ return;
+
+ ret = fw_ops->get_dm_version(ti_sci, &dm_info);
+ if (ret) {
+ printf("Failed to fetch DM firmware version %d\n", ret);
+ return;
+ }
+
+ printf("DM ABI: %d.%d (firmware ver 0x%04x '%s--%s' "
+ "patch_ver: %d)\n", dm_info.abi_major, dm_info.abi_minor,
+ dm_info.dm_ver, dm_info.sci_server_version,
+ dm_info.rm_pm_hal_version, dm_info.patch_ver);
+}
+
void mmr_unlock(uintptr_t base, u32 partition)
{
/* Translate the base address */
@@ -338,3 +372,67 @@
writel(qos_data[i].val, (uintptr_t)qos_data[i].reg);
}
#endif
+
+int __maybe_unused shutdown_mcu_r5_core1(void)
+{
+ struct ti_sci_handle *ti_sci = get_ti_sci_handle();
+ struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
+ struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
+ u32 dev_id_mcu_r5_core1 = put_core_ids[0];
+ u64 boot_vector;
+ u32 cfg, ctrl, sts, halted;
+ int cluster_mode_lockstep, ret;
+ bool r_state = false, c_state = false;
+
+ ret = proc_ops->proc_request(ti_sci, PROC_ID_MCU_R5FSS0_CORE1);
+ if (ret) {
+ printf("Unable to request processor control for MCU1_1 core, %d\n",
+ ret);
+ return ret;
+ }
+
+ ret = dev_ops->is_on(ti_sci, dev_id_mcu_r5_core1, &r_state, &c_state);
+ if (ret) {
+ printf("Unable to get device status for MCU1_1 core, %d\n", ret);
+ return ret;
+ }
+
+ ret = proc_ops->get_proc_boot_status(ti_sci, PROC_ID_MCU_R5FSS0_CORE1,
+ &boot_vector, &cfg, &ctrl, &sts);
+ if (ret) {
+ printf("Unable to get Processor boot status for MCU1_1 core, %d\n",
+ ret);
+ goto release_proc_ctrl;
+ }
+
+ halted = !!(sts & PROC_BOOT_STATUS_FLAG_R5_WFI);
+ cluster_mode_lockstep = !!(cfg & PROC_BOOT_CFG_FLAG_R5_LOCKSTEP);
+
+ /*
+ * Shutdown MCU R5F Core 1 only if:
+ * - cluster is booted in SplitMode
+ * - core is powered on
+ * - core is in WFI (halted)
+ */
+ if (cluster_mode_lockstep || !c_state || !halted) {
+ ret = -EINVAL;
+ goto release_proc_ctrl;
+ }
+
+ ret = proc_ops->set_proc_boot_ctrl(ti_sci, PROC_ID_MCU_R5FSS0_CORE1,
+ PROC_BOOT_CTRL_FLAG_R5_CORE_HALT, 0);
+ if (ret) {
+ printf("Unable to Halt MCU1_1 core, %d\n", ret);
+ goto release_proc_ctrl;
+ }
+
+ ret = dev_ops->put_device(ti_sci, dev_id_mcu_r5_core1);
+ if (ret) {
+ printf("Unable to assert reset on MCU1_1 core, %d\n", ret);
+ return ret;
+ }
+
+release_proc_ctrl:
+ proc_ops->proc_release(ti_sci, PROC_ID_MCU_R5FSS0_CORE1);
+ return ret;
+}
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index 02c7473..52d3faaa 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -42,6 +42,7 @@
void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
void k3_sysfw_print_ver(void);
+void k3_dm_print_ver(void);
void spl_enable_cache(void);
void mmr_unlock(uintptr_t base, u32 partition);
bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data);
@@ -49,6 +50,7 @@
struct ti_sci_handle *get_ti_sci_handle(void);
void do_board_detect(void);
void ti_secure_image_check_binary(void **p_image, size_t *p_size);
+int shutdown_mcu_r5_core1(void);
#if (IS_ENABLED(CONFIG_K3_QOS))
void setup_qos(void);
diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h
index c333626..2f5655b 100644
--- a/arch/arm/mach-k3/include/mach/am62_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
@@ -177,8 +177,8 @@
static const u32 put_device_ids[] = {};
-static const u32 put_core_ids[] = {};
-
#endif
+static const u32 put_core_ids[] = {};
+
#endif /* __ASM_ARCH_AM62_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h
index cd61abe..f3fd736 100644
--- a/arch/arm/mach-k3/include/mach/am62a_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h
@@ -90,8 +90,8 @@
static const u32 put_device_ids[] = {};
-static const u32 put_core_ids[] = {};
-
#endif
+static const u32 put_core_ids[] = {};
+
#endif /* __ASM_ARCH_AM62A_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am62p_hardware.h b/arch/arm/mach-k3/include/mach/am62p_hardware.h
index 95af5c5..a310b52 100644
--- a/arch/arm/mach-k3/include/mach/am62p_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62p_hardware.h
@@ -141,8 +141,8 @@
static const u32 put_device_ids[] = {};
-static const u32 put_core_ids[] = {};
-
#endif
+static const u32 put_core_ids[] = {};
+
#endif /* __ASM_ARCH_AM62P_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h
index 44df887..105b429 100644
--- a/arch/arm/mach-k3/include/mach/am64_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am64_hardware.h
@@ -50,19 +50,20 @@
#define AM64X_DEV_RTI8 127
#define AM64X_DEV_RTI9 128
-#define AM64X_DEV_R5FSS0_CORE0 121
-#define AM64X_DEV_R5FSS0_CORE1 122
static const u32 put_device_ids[] = {
AM64X_DEV_RTI9,
AM64X_DEV_RTI8,
};
+#endif
+
+#define AM64X_DEV_R5FSS0_CORE0 121
+#define AM64X_DEV_R5FSS0_CORE1 122
+
static const u32 put_core_ids[] = {
AM64X_DEV_R5FSS0_CORE1,
AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
};
-#endif
-
#endif /* __ASM_ARCH_DRA8_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h b/arch/arm/mach-k3/include/mach/am6_hardware.h
index 9913964..8169584 100644
--- a/arch/arm/mach-k3/include/mach/am6_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am6_hardware.h
@@ -43,19 +43,20 @@
#define AM6_DEV_MCU_RTI0 134
#define AM6_DEV_MCU_RTI1 135
-#define AM6_DEV_MCU_ARMSS0_CPU0 159
-#define AM6_DEV_MCU_ARMSS0_CPU1 245
static const u32 put_device_ids[] = {
AM6_DEV_MCU_RTI0,
AM6_DEV_MCU_RTI1,
};
+#endif
+
+#define AM6_DEV_MCU_ARMSS0_CPU0 159
+#define AM6_DEV_MCU_ARMSS0_CPU1 245
+
static const u32 put_core_ids[] = {
AM6_DEV_MCU_ARMSS0_CPU1,
AM6_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
};
-#endif
-
#endif /* __ASM_ARCH_AM6_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h
index 2b5ec77..5bef309 100644
--- a/arch/arm/mach-k3/include/mach/j721e_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h
@@ -41,19 +41,20 @@
#define J721E_DEV_MCU_RTI0 262
#define J721E_DEV_MCU_RTI1 263
-#define J721E_DEV_MCU_ARMSS0_CPU0 250
-#define J721E_DEV_MCU_ARMSS0_CPU1 251
static const u32 put_device_ids[] = {
J721E_DEV_MCU_RTI0,
J721E_DEV_MCU_RTI1,
};
+#endif
+
+#define J721E_DEV_MCU_ARMSS0_CPU0 250
+#define J721E_DEV_MCU_ARMSS0_CPU1 251
+
static const u32 put_core_ids[] = {
J721E_DEV_MCU_ARMSS0_CPU1,
J721E_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
};
-#endif
-
#endif /* __ASM_ARCH_J721E_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/j721s2_hardware.h b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
index 8daea82..82f076a 100644
--- a/arch/arm/mach-k3/include/mach/j721s2_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
@@ -41,19 +41,20 @@
#define J721S2_DEV_MCU_RTI0 295
#define J721S2_DEV_MCU_RTI1 296
-#define J721S2_DEV_MCU_ARMSS0_CPU0 284
-#define J721S2_DEV_MCU_ARMSS0_CPU1 285
static const u32 put_device_ids[] = {
J721S2_DEV_MCU_RTI0,
J721S2_DEV_MCU_RTI1,
};
+#endif
+
+#define J721S2_DEV_MCU_ARMSS0_CPU0 284
+#define J721S2_DEV_MCU_ARMSS0_CPU1 285
+
static const u32 put_core_ids[] = {
J721S2_DEV_MCU_ARMSS0_CPU1,
J721S2_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
};
-#endif
-
#endif /* __ASM_ARCH_J721S2_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/j722s_hardware.h b/arch/arm/mach-k3/include/mach/j722s_hardware.h
index 8d0bec2..0c69513 100644
--- a/arch/arm/mach-k3/include/mach/j722s_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j722s_hardware.h
@@ -76,8 +76,8 @@
static const u32 put_device_ids[] = {};
-static const u32 put_core_ids[] = {};
-
#endif
+static const u32 put_core_ids[] = {};
+
#endif /* __ASM_ARCH_J722S_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/j784s4_hardware.h b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
index 0ffe238..29a894b 100644
--- a/arch/arm/mach-k3/include/mach/j784s4_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
@@ -41,19 +41,20 @@
#define J784S4_DEV_MCU_RTI0 367
#define J784S4_DEV_MCU_RTI1 368
-#define J784S4_DEV_MCU_ARMSS0_CPU0 346
-#define J784S4_DEV_MCU_ARMSS0_CPU1 347
static const u32 put_device_ids[] = {
J784S4_DEV_MCU_RTI0,
J784S4_DEV_MCU_RTI1,
};
+#endif
+
+#define J784S4_DEV_MCU_ARMSS0_CPU0 346
+#define J784S4_DEV_MCU_ARMSS0_CPU1 347
+
static const u32 put_core_ids[] = {
J784S4_DEV_MCU_ARMSS0_CPU1,
J784S4_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
};
-#endif
-
#endif /* __ASM_ARCH_J784S4_HARDWARE_H */
diff --git a/arch/arm/mach-k3/j721e/j721e_init.c b/arch/arm/mach-k3/j721e/j721e_init.c
index f31c20f..f9af028 100644
--- a/arch/arm/mach-k3/j721e/j721e_init.c
+++ b/arch/arm/mach-k3/j721e/j721e_init.c
@@ -296,9 +296,9 @@
void board_init_f(ulong dummy)
{
+ int ret;
#if defined(CONFIG_K3_J721E_DDRSS) || defined(CONFIG_K3_LOAD_SYSFW)
struct udevice *dev;
- int ret;
#endif
/*
* Cannot delay this further as there is a chance that
@@ -371,9 +371,20 @@
preloader_console_init();
#endif
+ /* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
+ if (IS_ENABLED(CONFIG_ARM64)) {
+ ret = shutdown_mcu_r5_core1();
+ if (ret)
+ printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
+ }
+
/* Output System Firmware version info */
k3_sysfw_print_ver();
+ /* Output DM Firmware version info */
+ if (IS_ENABLED(CONFIG_ARM64))
+ k3_dm_print_ver();
+
/* Perform board detection */
do_board_detect();
diff --git a/arch/arm/mach-k3/j721s2/j721s2_init.c b/arch/arm/mach-k3/j721s2/j721s2_init.c
index 5941fa2..eee3d04 100644
--- a/arch/arm/mach-k3/j721s2/j721s2_init.c
+++ b/arch/arm/mach-k3/j721s2/j721s2_init.c
@@ -230,8 +230,19 @@
remove_fwl_configs(navss_cbass0_fwls, ARRAY_SIZE(navss_cbass0_fwls));
}
+ /* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
+ if (IS_ENABLED(CONFIG_ARM64)) {
+ ret = shutdown_mcu_r5_core1();
+ if (ret)
+ printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
+ }
+
/* Output System Firmware version info */
k3_sysfw_print_ver();
+
+ /* Output DM Firmware version info */
+ if (IS_ENABLED(CONFIG_ARM64))
+ k3_dm_print_ver();
}
bool check_rom_loaded_sysfw(void)
diff --git a/arch/arm/mach-k3/j722s/j722s_init.c b/arch/arm/mach-k3/j722s/j722s_init.c
index af21137..d8123f2 100644
--- a/arch/arm/mach-k3/j722s/j722s_init.c
+++ b/arch/arm/mach-k3/j722s/j722s_init.c
@@ -150,6 +150,10 @@
/* Output System Firmware version info */
k3_sysfw_print_ver();
+
+ /* Output DM Firmware version info */
+ if (IS_ENABLED(CONFIG_ARM64))
+ k3_dm_print_ver();
}
static void k3_mem_init(void)
diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c
index 4e9f823..0f11511 100644
--- a/arch/arm/mach-k3/j784s4/j784s4_init.c
+++ b/arch/arm/mach-k3/j784s4/j784s4_init.c
@@ -206,8 +206,19 @@
writel(AUDIO_REFCLK1_DEFAULT, (uintptr_t)CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL);
+ /* Shutdown MCU_R5 Core 1 in Split mode at A72 SPL Stage */
+ if (IS_ENABLED(CONFIG_ARM64)) {
+ ret = shutdown_mcu_r5_core1();
+ if (ret)
+ printf("Unable to shutdown MCU R5 core 1, %d\n", ret);
+ }
+
/* Output System Firmware version info */
k3_sysfw_print_ver();
+
+ /* Output DM Firmware version info */
+ if (IS_ENABLED(CONFIG_ARM64))
+ k3_dm_print_ver();
}
void k3_mem_init(void)
diff --git a/arch/m68k/dts/Makefile b/arch/m68k/dts/Makefile
index 8b354b9..0f06109 100644
--- a/arch/m68k/dts/Makefile
+++ b/arch/m68k/dts/Makefile
@@ -21,4 +21,4 @@
include $(srctree)/scripts/Makefile.dts
# Add any required device tree compiler flags here
-DTC_FLAGS += -R 4 -p 0x1000
+DTC_FLAGS += -R 4
diff --git a/arch/microblaze/dts/Makefile b/arch/microblaze/dts/Makefile
index 9be902d..0f3a747 100644
--- a/arch/microblaze/dts/Makefile
+++ b/arch/microblaze/dts/Makefile
@@ -5,4 +5,4 @@
include $(srctree)/scripts/Makefile.dts
# Add any required device tree compiler flags here
-DTC_FLAGS += -R 4 -p 0x1000
+DTC_FLAGS += -R 4
diff --git a/arch/nios2/dts/Makefile b/arch/nios2/dts/Makefile
index d77db97..7595116 100644
--- a/arch/nios2/dts/Makefile
+++ b/arch/nios2/dts/Makefile
@@ -5,4 +5,4 @@
include $(srctree)/scripts/Makefile.dts
# Add any required device tree compiler flags here
-DTC_FLAGS += -R 4 -p 0x1000
+DTC_FLAGS += -R 4
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index cf1872f..2b10c2d 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -19,4 +19,4 @@
include $(srctree)/scripts/Makefile.dts
# Add any required device tree compiler flags here
-DTC_FLAGS += -R 4 -p 0x1000
+DTC_FLAGS += -R 4
diff --git a/arch/sandbox/dts/Makefile b/arch/sandbox/dts/Makefile
index 1c9fb4a..0d7b0b8 100644
--- a/arch/sandbox/dts/Makefile
+++ b/arch/sandbox/dts/Makefile
@@ -11,4 +11,4 @@
include $(srctree)/scripts/Makefile.dts
# Add any required device tree compiler flags here
-DTC_FLAGS += -R 4 -p 0x1000
+DTC_FLAGS += -R 4
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index 9a46726..725991e 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -24,4 +24,4 @@
include $(srctree)/scripts/Makefile.dts
-DTC_FLAGS += -R 4 -p $(if $(CONFIG_EFI_APP),0x8000,0x1000)
+DTC_FLAGS += -R 4
diff --git a/board/ti/j7200/j7200.env b/board/ti/j7200/j7200.env
index 6cc92bf..292fc72 100644
--- a/board/ti/j7200/j7200.env
+++ b/board/ti/j7200/j7200.env
@@ -36,5 +36,5 @@
#endif
#if CONFIG_TARGET_J7200_A72_EVM
-rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
+rproc_fw_binaries= 1 /lib/firmware/j7200-mcu-r5f0_1-fw 2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
#endif
diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env
index e5b4225..ead7fbd 100644
--- a/board/ti/j721e/j721e.env
+++ b/board/ti/j721e/j721e.env
@@ -38,5 +38,5 @@
#endif
#if CONFIG_TARGET_J721E_A72_EVM
-rproc_fw_binaries=2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
+rproc_fw_binaries= 1 /lib/firmware/j7-mcu-r5f0_1-fw 2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
#endif
diff --git a/board/ti/j721s2/j721s2.env b/board/ti/j721s2/j721s2.env
index a6b2255..abd4fae 100644
--- a/board/ti/j721s2/j721s2.env
+++ b/board/ti/j721s2/j721s2.env
@@ -24,6 +24,6 @@
#endif
rd_spec=-
-rproc_fw_binaries= 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw
+rproc_fw_binaries= 1 /lib/firmware/j721s2-mcu-r5f0_1-fw 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw
diff --git a/board/ti/j784s4/j784s4.env b/board/ti/j784s4/j784s4.env
index 9e1741b..2f1a5f5 100644
--- a/board/ti/j784s4/j784s4.env
+++ b/board/ti/j784s4/j784s4.env
@@ -21,7 +21,7 @@
rd_spec=-
#if CONFIG_TARGET_J784S4_A72_EVM
-rproc_fw_binaries= 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw
+rproc_fw_binaries= 1 /lib/firmware/j784s4-mcu-r5f0_1-fw 2 /lib/firmware/j784s4-main-r5f0_0-fw 3 /lib/firmware/j784s4-main-r5f0_1-fw 4 /lib/firmware/j784s4-main-r5f1_0-fw 5 /lib/firmware/j784s4-main-r5f1_1-fw 6 /lib/firmware/j784s4-main-r5f2_0-fw 7 /lib/firmware/j784s4-main-r5f2_1-fw 8 /lib/firmware/j784s4-c71_0-fw 9 /lib/firmware/j784s4-c71_1-fw 10 /lib/firmware/j784s4-c71_2-fw 11 /lib/firmware/j784s4-c71_3-fw
#elif CONFIG_TARGET_J742S2_A72_EVM
-rproc_fw_binaries= 2 /lib/firmware/j742s2-main-r5f0_0-fw 3 /lib/firmware/j742s2-main-r5f0_1-fw 4 /lib/firmware/j742s2-main-r5f1_0-fw 5 /lib/firmware/j742s2-main-r5f1_1-fw 6 /lib/firmware/j742s2-main-r5f2_0-fw 7 /lib/firmware/j742s2-main-r5f2_1-fw 8 /lib/firmware/j742s2-c71_0-fw 9 /lib/firmware/j742s2-c71_1-fw 10 /lib/firmware/j742s2-c71_2-fw
+rproc_fw_binaries= 1 /lib/firmware/j742s2-mcu-r5f0_1-fw 2 /lib/firmware/j742s2-main-r5f0_0-fw 3 /lib/firmware/j742s2-main-r5f0_1-fw 4 /lib/firmware/j742s2-main-r5f1_0-fw 5 /lib/firmware/j742s2-main-r5f1_1-fw 6 /lib/firmware/j742s2-main-r5f2_0-fw 7 /lib/firmware/j742s2-main-r5f2_1-fw 8 /lib/firmware/j742s2-c71_0-fw 9 /lib/firmware/j742s2-c71_1-fw 10 /lib/firmware/j742s2-c71_2-fw
#endif
diff --git a/boot/Kconfig b/boot/Kconfig
index 30eb5b3..f5dfae2 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -855,6 +855,56 @@
The expo can be presented in graphics form using a vidconsole, or in
text form on a serial console.
+config BOOTMETH_RAUC
+ bool "Bootdev support for RAUC A/B systems"
+ depends on CMDLINE
+ select BOOTMETH_GLOBAL
+ select HUSH_PARSER
+ help
+ Enables support for booting RAUC A/B systems from MMC devices. This
+ makes the bootdevs look for a 'boot.scr.uimg' or 'boot.scr' in the
+ respective boot partitions, describing how to boot the distro.
+
+if BOOTMETH_RAUC
+
+config BOOTMETH_RAUC_BOOT_ORDER
+ string "RAUC boot order"
+ default "A B"
+ help
+ Sets the default boot order. This must be list of space-separated
+ strings naming the individual boot slots. Each entry in this string
+ should correspond to an existing slot on the target's flash device.
+
+config BOOTMETH_RAUC_PARTITIONS
+ string "RAUC boot and root partitions indexes"
+ default "1,2 3,4"
+ help
+ Sets the partition indexes of boot and root slots. This must be a list
+ of comma-separated pair values, which in turn are separated by spaces.
+ The first value in pair is for the boot partition and second for the
+ root partition.
+
+config BOOTMETH_RAUC_DEFAULT_TRIES
+ int "RAUC slot default tries"
+ default 3
+ help
+ Sets how many times a slot should be tried booting, before considering
+ it to be bad.
+
+config BOOTMETH_RAUC_RESET_ALL_ZERO_TRIES
+ bool "Reset slot tries when all RAUC slots have zero tries left"
+ default y
+ help
+ When all slots have zero tries left or no valid slot was found, reset
+ to the default boot order set by BOOTMETH_RAUC_BOOT_ORDER and set the
+ slot tries to their default value specified by
+ BOOTMETH_RAUC_DEFAULT_TRIES.
+
+ This prevents a system from remaining in an unbootable state, after
+ all slot tries were decremented to zero.
+
+endif # BOOTMETH_RAUC
+
config BOOTMETH_SANDBOX
def_bool y
depends on SANDBOX
diff --git a/boot/Makefile b/boot/Makefile
index e0d1579..3da6f7a 100644
--- a/boot/Makefile
+++ b/boot/Makefile
@@ -32,6 +32,7 @@
obj-$(CONFIG_$(PHASE_)BOOTMETH_EFILOADER) += bootmeth_efi.o
obj-$(CONFIG_$(PHASE_)BOOTMETH_CROS) += bootm.o bootm_os.o bootmeth_cros.o
obj-$(CONFIG_$(PHASE_)BOOTMETH_QFW) += bootmeth_qfw.o
+obj-$(CONFIG_$(PHASE_)BOOTMETH_RAUC) += bootmeth_rauc.o
obj-$(CONFIG_$(PHASE_)BOOTMETH_SANDBOX) += bootmeth_sandbox.o
obj-$(CONFIG_$(PHASE_)BOOTMETH_SCRIPT) += bootmeth_script.o
obj-$(CONFIG_$(PHASE_)CEDIT) += cedit.o
diff --git a/boot/bootmeth_rauc.c b/boot/bootmeth_rauc.c
new file mode 100644
index 0000000..fc60e6e
--- /dev/null
+++ b/boot/bootmeth_rauc.c
@@ -0,0 +1,432 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Bootmethod for distro boot with RAUC
+ *
+ * Copyright 2025 PHYTEC Messtechnik GmbH
+ * Written by Martin Schwan <m.schwan@phytec.de>
+ */
+
+#define LOG_CATEGORY UCLASS_BOOTSTD
+
+#include <blk.h>
+#include <bootflow.h>
+#include <bootmeth.h>
+#include <bootstd.h>
+#include <dm.h>
+#include <env.h>
+#include <fs.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <string.h>
+#include <asm/cache.h>
+
+/* Length of env var "BOOT_*_LEFT" */
+#define BOOT_LEFT_LEN (5 + 32 + 5)
+
+static const char * const script_names[] = { "boot.scr", "boot.scr.uimg", NULL };
+
+/**
+ * struct distro_rauc_slot - Slot information
+ *
+ * A slot describes the unit of a bootable system consisting of one or multiple
+ * partitions. This usually includes a root filesystem, kernel and potentially other
+ * files, like device trees and boot scripts for that particular distribution.
+ *
+ * @name The slot name
+ * @boot_part The boot partition number on disk
+ * @root_part The root partition number on disk
+ */
+struct distro_rauc_slot {
+ char *name;
+ int boot_part;
+ int root_part;
+};
+
+/**
+ * struct distro_rauc_priv - Private data
+ *
+ * @slots All slots of the device in default order
+ * @boot_order String of the current boot order containing the active slot names
+ */
+struct distro_rauc_priv {
+ struct distro_rauc_slot **slots;
+};
+
+static struct distro_rauc_slot *get_slot(struct distro_rauc_priv *priv,
+ const char *slot_name)
+{
+ int i;
+
+ for (i = 0; priv->slots[i]->name; i++) {
+ if (!strcmp(priv->slots[i]->name, slot_name))
+ return priv->slots[i];
+ }
+
+ return NULL;
+}
+
+static int distro_rauc_check(struct udevice *dev, struct bootflow_iter *iter)
+{
+ /*
+ * This distro only works on whole MMC devices, as multiple partitions
+ * are needed for an A/B system.
+ */
+ if (bootflow_iter_check_mmc(iter))
+ return log_msg_ret("mmc", -EOPNOTSUPP);
+ if (iter->part)
+ return log_msg_ret("part", -EOPNOTSUPP);
+
+ return 0;
+}
+
+static int distro_rauc_scan_boot_part(struct bootflow *bflow)
+{
+ struct blk_desc *desc;
+ struct distro_rauc_priv *priv;
+ char *boot_order;
+ const char **boot_order_list;
+ bool exists;
+ int ret;
+ int i;
+ int j;
+
+ desc = dev_get_uclass_plat(bflow->blk);
+
+ priv = bflow->bootmeth_priv;
+ if (!priv || !priv->slots)
+ return log_msg_ret("priv", -EINVAL);
+
+ boot_order = env_get("BOOT_ORDER");
+ boot_order_list = str_to_list(boot_order);
+ for (i = 0; boot_order_list[i]; i++) {
+ exists = false;
+ for (j = 0; script_names[j]; j++) {
+ const struct distro_rauc_slot *slot;
+
+ slot = get_slot(priv, boot_order_list[i]);
+ if (!slot)
+ return log_msg_ret("env", -ENOENT);
+ ret = fs_set_blk_dev_with_part(desc, slot->boot_part);
+ if (ret)
+ return log_msg_ret("blk", ret);
+ exists |= fs_exists(script_names[j]);
+ }
+ if (!exists)
+ return log_msg_ret("fs", -ENOENT);
+ }
+ str_free_list(boot_order_list);
+
+ return 0;
+}
+
+static int distro_rauc_read_bootflow(struct udevice *dev, struct bootflow *bflow)
+{
+ struct distro_rauc_priv *priv;
+ int ret;
+ char *slot;
+ int i;
+ char *partitions;
+ char *boot_order;
+ const char *default_boot_order;
+ const char **default_boot_order_list;
+ char *boot_order_copy;
+ char boot_left[BOOT_LEFT_LEN];
+ char *parts;
+
+ /* Get RAUC variables or set their default values */
+ boot_order = env_get("BOOT_ORDER");
+ if (!boot_order) {
+ log_debug("BOOT_ORDER did not exist yet, setting default value\n");
+ if (env_set("BOOT_ORDER", CONFIG_BOOTMETH_RAUC_BOOT_ORDER))
+ return log_msg_ret("env", -EPERM);
+ boot_order = CONFIG_BOOTMETH_RAUC_BOOT_ORDER;
+ }
+ default_boot_order = CONFIG_BOOTMETH_RAUC_BOOT_ORDER;
+ default_boot_order_list = str_to_list(default_boot_order);
+ for (i = 0; default_boot_order_list[i]; i++) {
+ sprintf(boot_left, "BOOT_%s_LEFT", default_boot_order_list[i]);
+ if (!env_get(boot_left)) {
+ log_debug("%s did not exist yet, setting default value\n",
+ boot_left);
+ if (env_set_ulong(boot_left, CONFIG_BOOTMETH_RAUC_DEFAULT_TRIES))
+ return log_msg_ret("env", -EPERM);
+ }
+ }
+ str_free_list(default_boot_order_list);
+
+ priv = calloc(1, sizeof(struct distro_rauc_priv));
+ if (!priv)
+ return log_msg_ret("buf", -ENOMEM);
+ priv->slots = calloc(1, sizeof(struct distro_rauc_slot));
+
+ /* Copy default boot_order, so we can leave the original unmodified */
+ boot_order_copy = strdup(default_boot_order);
+ partitions = strdup(CONFIG_BOOTMETH_RAUC_PARTITIONS);
+
+ for (i = 1;
+ (parts = strsep(&partitions, " ")) &&
+ (slot = strsep(&boot_order_copy, " "));
+ i++) {
+ struct distro_rauc_slot *s;
+
+ s = calloc(1, sizeof(struct distro_rauc_slot));
+ s->name = strdup(slot);
+ s->boot_part = simple_strtoul(strsep(&parts, ","), NULL, 10);
+ s->root_part = simple_strtoul(strsep(&parts, ","), NULL, 10);
+ priv->slots = realloc(priv->slots, (i + 1) *
+ sizeof(struct distro_rauc_slot));
+ priv->slots[i - 1] = s;
+ priv->slots[i]->name = NULL;
+ }
+
+ bflow->bootmeth_priv = priv;
+
+ ret = distro_rauc_scan_boot_part(bflow);
+ if (ret < 0) {
+ for (i = 0; priv->slots[i]->name; i++) {
+ free(priv->slots[i]->name);
+ free(priv->slots[i]);
+ }
+ free(priv);
+ free(boot_order_copy);
+ bflow->bootmeth_priv = NULL;
+ return ret;
+ }
+
+ bflow->state = BOOTFLOWST_READY;
+
+ return 0;
+}
+
+static int distro_rauc_read_file(struct udevice *dev, struct bootflow *bflow,
+ const char *file_path, ulong addr,
+ enum bootflow_img_t type, ulong *sizep)
+{
+ /*
+ * Reading individual files is not supported since we only operate on
+ * whole MMC devices (because we require multiple partitions).
+ */
+ return log_msg_ret("Unsupported", -ENOSYS);
+}
+
+static int distro_rauc_load_boot_script(struct bootflow *bflow,
+ const struct distro_rauc_slot *slot)
+{
+ struct blk_desc *desc;
+ struct distro_rauc_priv *priv;
+ struct udevice *bootstd;
+ const char *const *prefixes;
+ int ret;
+ int i;
+ int j;
+
+ ret = uclass_first_device_err(UCLASS_BOOTSTD, &bootstd);
+ if (ret)
+ return log_msg_ret("std", ret);
+ prefixes = bootstd_get_prefixes(bootstd);
+
+ desc = dev_get_uclass_plat(bflow->blk);
+ priv = bflow->bootmeth_priv;
+ if (!priv || !priv->slots)
+ return log_msg_ret("priv", -EINVAL);
+
+ bflow->part = slot->boot_part;
+ if (!bflow->part)
+ return log_msg_ret("part", -ENOENT);
+
+ ret = bootmeth_setup_fs(bflow, desc);
+ if (ret)
+ return log_msg_ret("set", ret);
+
+ for (i = 0; prefixes[i] && bflow->state != BOOTFLOWST_FILE; i++) {
+ for (j = 0; script_names[j] && bflow->state != BOOTFLOWST_FILE; j++) {
+ if (!bootmeth_try_file(bflow, desc, prefixes[i], script_names[j])) {
+ log_debug("Found file '%s%s' in %s.part_%x\n",
+ prefixes[i], script_names[j],
+ bflow->dev->name, bflow->part);
+ bflow->subdir = strdup(prefixes[i]);
+ }
+ }
+ }
+ if (bflow->state != BOOTFLOWST_FILE)
+ return log_msg_ret("file", -ENOENT);
+
+ ret = bootmeth_alloc_file(bflow, 0x10000, ARCH_DMA_MINALIGN,
+ (enum bootflow_img_t)IH_TYPE_SCRIPT);
+ if (ret)
+ return log_msg_ret("read", ret);
+
+ return 0;
+}
+
+static int find_active_slot(char **slot_name, ulong *slot_tries)
+{
+ ulong tries;
+ char boot_left[BOOT_LEFT_LEN];
+ char *boot_order;
+ const char **boot_order_list;
+ bool slot_found = false;
+ int ret;
+ int i;
+
+ boot_order = env_get("BOOT_ORDER");
+ if (!boot_order)
+ return log_msg_ret("env", -ENOENT);
+ boot_order_list = str_to_list(boot_order);
+ for (i = 0; boot_order_list[i] && !slot_found; i++) {
+ sprintf(boot_left, "BOOT_%s_LEFT", boot_order_list[i]);
+ tries = env_get_ulong(boot_left, 10, ULONG_MAX);
+ if (tries == ULONG_MAX)
+ return log_msg_ret("env", -ENOENT);
+
+ if (tries) {
+ ret = env_set_ulong(boot_left, tries - 1);
+ if (ret)
+ return log_msg_ret("env", ret);
+ *slot_name = strdup(boot_order_list[i]);
+ *slot_tries = tries;
+ slot_found = true;
+ }
+ }
+ str_free_list(boot_order_list);
+
+ if (!slot_found) {
+ if (IS_ENABLED(CONFIG_BOOTMETH_RAUC_RESET_ALL_ZERO_TRIES)) {
+ log_warning("WARNING: No valid slot found\n");
+ log_info("INFO: Resetting boot order and all slot tries\n");
+ boot_order_list = str_to_list(CONFIG_BOOTMETH_RAUC_BOOT_ORDER);
+ for (i = 0; boot_order_list[i]; i++) {
+ sprintf(boot_left, "BOOT_%s_LEFT", boot_order_list[i]);
+ ret = env_set_ulong(boot_left, CONFIG_BOOTMETH_RAUC_DEFAULT_TRIES);
+ if (ret)
+ return log_msg_ret("env", ret);
+ }
+ str_free_list(boot_order_list);
+ ret = env_save();
+ if (ret)
+ return log_msg_ret("env", ret);
+ do_reset(NULL, 0, 0, NULL);
+ }
+ log_err("ERROR: No valid slot found\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int distro_rauc_boot(struct udevice *dev, struct bootflow *bflow)
+{
+ struct blk_desc *desc;
+ struct distro_rauc_priv *priv;
+ const struct distro_rauc_slot *slot;
+ char *boot_order;
+ const char **boot_order_list;
+ char *active_slot;
+ ulong active_slot_tries;
+ char raucargs[64];
+ char boot_left[BOOT_LEFT_LEN];
+ ulong addr;
+ int ret = 0;
+ int i;
+
+ desc = dev_get_uclass_plat(bflow->blk);
+ if (desc->uclass_id != UCLASS_MMC)
+ return log_msg_ret("blk", -EINVAL);
+ priv = bflow->bootmeth_priv;
+
+ /* Device info variables */
+ ret = env_set("devtype", blk_get_devtype(bflow->blk));
+ if (ret)
+ return log_msg_ret("env", ret);
+
+ ret = env_set_hex("devnum", desc->devnum);
+ if (ret)
+ return log_msg_ret("env", ret);
+
+ /* Find active, valid slot */
+ ret = find_active_slot(&active_slot, &active_slot_tries);
+ if (ret)
+ return log_msg_ret("env", ret);
+
+ /* Kernel command line arguments */
+ sprintf(raucargs, "rauc.slot=%s", active_slot);
+ ret = env_set("raucargs", raucargs);
+ if (ret)
+ return log_msg_ret("env", ret);
+
+ /* Active slot info */
+ slot = get_slot(priv, active_slot);
+ if (!slot)
+ return log_msg_ret("env", -ENOENT);
+ ret = env_set_hex("distro_bootpart", slot->boot_part);
+ if (ret)
+ return log_msg_ret("env", ret);
+ ret = env_set_hex("distro_rootpart", slot->root_part);
+ if (ret)
+ return log_msg_ret("env", ret);
+ ret = env_save();
+ if (ret)
+ return log_msg_ret("env", ret);
+
+ /* Load distro boot script */
+ ret = distro_rauc_load_boot_script(bflow, slot);
+ if (ret)
+ return log_msg_ret("load", ret);
+
+ log_info("INFO: Booting slot %s, %lu of %d tries left\n",
+ active_slot, active_slot_tries, CONFIG_BOOTMETH_RAUC_DEFAULT_TRIES);
+
+ log_debug("devtype: %s\n", env_get("devtype"));
+ log_debug("devnum: %s\n", env_get("devnum"));
+ log_debug("distro_bootpart: %s\n", env_get("distro_bootpart"));
+ log_debug("distro_rootpart: %s\n", env_get("distro_rootpart"));
+ log_debug("raucargs: %s\n", env_get("raucargs"));
+ boot_order = env_get("BOOT_ORDER");
+ if (!boot_order)
+ return log_msg_ret("env", -EPERM);
+ log_debug("BOOT_ORDER: %s\n", boot_order);
+ boot_order_list = str_to_list(boot_order);
+ for (i = 0; boot_order_list[i]; i++) {
+ sprintf(boot_left, "BOOT_%s_LEFT", boot_order_list[i]);
+ log_debug("%s: %s\n", boot_left, env_get(boot_left));
+ }
+ str_free_list(boot_order_list);
+
+ /* Run distro boot script */
+ addr = map_to_sysmem(bflow->buf);
+ ret = cmd_source_script(addr, NULL, NULL);
+ if (ret)
+ return log_msg_ret("boot", ret);
+
+ return 0;
+}
+
+static int distro_rauc_bootmeth_bind(struct udevice *dev)
+{
+ struct bootmeth_uc_plat *plat = dev_get_uclass_plat(dev);
+
+ plat->desc = "RAUC distro boot from MMC";
+ plat->flags = BOOTMETHF_GLOBAL;
+
+ return 0;
+}
+
+static struct bootmeth_ops distro_rauc_bootmeth_ops = {
+ .check = distro_rauc_check,
+ .read_bootflow = distro_rauc_read_bootflow,
+ .read_file = distro_rauc_read_file,
+ .boot = distro_rauc_boot,
+};
+
+static const struct udevice_id distro_rauc_bootmeth_ids[] = {
+ { .compatible = "u-boot,distro-rauc" },
+ { }
+};
+
+U_BOOT_DRIVER(bootmeth_rauc) = {
+ .name = "bootmeth_rauc",
+ .id = UCLASS_BOOTMETH,
+ .of_match = distro_rauc_bootmeth_ids,
+ .ops = &distro_rauc_bootmeth_ops,
+ .bind = distro_rauc_bootmeth_bind,
+};
diff --git a/doc/board/broadcom/bcm7xxx.rst b/doc/board/broadcom/bcm7xxx.rst
index f1994d9..f559d5c 100644
--- a/doc/board/broadcom/bcm7xxx.rst
+++ b/doc/board/broadcom/bcm7xxx.rst
@@ -149,10 +149,8 @@
* to the Linux source tree as a .dts file.
*
* To support modifications to the device tree
- * in-place in U-Boot, add to Linux's
- * arch/arm/boot/dts/Makefile:
- *
- * DTC_FLAGS ?= -p 4096
+ * in-place in U-Boot, set the config variable
+ * CONFIG_SYS_DTC_PAD_BYTES as needed.
*
* This will leave some padding in the DTB and
* thus reserve room for node additions.
diff --git a/doc/develop/bootstd/index.rst b/doc/develop/bootstd/index.rst
index 4c4e26c..ec74fc2 100644
--- a/doc/develop/bootstd/index.rst
+++ b/doc/develop/bootstd/index.rst
@@ -12,5 +12,6 @@
qfw
android
cros
+ rauc
script
sandbox
diff --git a/doc/develop/bootstd/overview.rst b/doc/develop/bootstd/overview.rst
index 9fe5630..0a23735 100644
--- a/doc/develop/bootstd/overview.rst
+++ b/doc/develop/bootstd/overview.rst
@@ -443,6 +443,7 @@
- :doc:`extlinux / syslinux <extlinux>` boot from a storage device
- :doc:`extlinux / syslinux <extlinux>` boot from a network (PXE)
- :doc:`sandbox <sandbox>` used only for testing
+ - :doc:`RAUC distro <rauc>`: A/B system with RAUC from MMC
- :doc:`U-Boot scripts <script>` from disk, network or SPI flash
- :doc:`QFW <qfw>`: QEMU firmware interface
- :doc:`VBE </develop/vbe>`: Verified Boot for Embedded
diff --git a/doc/develop/bootstd/rauc.rst b/doc/develop/bootstd/rauc.rst
new file mode 100644
index 0000000..b2661d1
--- /dev/null
+++ b/doc/develop/bootstd/rauc.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+RAUC Bootmeth
+=============
+
+This bootmeth provides a way to locate and run an A/B system with RAUC as its
+update client. The booted distro must supply a script on an MMC device
+containing the final boot instructions necessary.
+
+This bootmeth assumes a symmetric A/B partition layout, with a separate boot
+partition containing the kernel image and another partition for the root
+filesystem each. The partition numbers must be specified with
+``CONFIG_BOOTMETH_RAUC_PARTITIONS``. The content must be a list of pairs, with
+the following syntax: ``1,2 3,4``, where 1 and 3 are the slots' boot partition
+and 2 and 4 the slots' root partition.
+
+Each pair of boot and rootfs partition form a "slot". The default order in which
+available slots are tried is set through ``CONFIG_BOOTMETH_RAUC_BOOT_ORDER``,
+with the left one tried first.
+
+The default number of boot tries of each slot is set by
+``CONFIG_BOOTMETH_RAUC_DEFAULT_TRIES``.
+
+In case no valid slot can be found and/or all slots have zero tries left, the
+boot order and slot tries are reset to their default values, if
+``CONFIG_BOOTMETH_RAUC_RESET_ALL_ZERO_TRIES`` is enabled. This prevents a system
+from locking up in the bootloader and tries booting again after a specified
+number of tries.
+
+The boot script must be located in each boot partition. The bootmeth searches
+for "boot.scr.uimg" first, then "boot.scr" if not found.
+
+When the bootflow is booted, the bootmeth sets these environment variables:
+
+devtype
+ device type (e.g. "mmc")
+
+devnum
+ device number, corresponding to the device 'sequence' number
+ ``dev_seq(dev)``
+
+distro_bootpart
+ partition number of the boot partition on the device (numbered from 1)
+
+distro_rootpart
+ partition number of the rootfs partition on the device (numbered from 1)
+
+raucargs
+ kernel command line arguments needed for RAUC to detect the currently booted
+ slot
+
+The script file must be a FIT or a legacy uImage. It is loaded into memory and
+executed.
+
+The compatible string "u-boot,distro-rauc" is used for the driver. It is present
+if ``CONFIG_BOOTMETH_RAUC`` is enabled.
diff --git a/doc/develop/makefiles.rst b/doc/develop/makefiles.rst
index 37a7dea..593556f4 100644
--- a/doc/develop/makefiles.rst
+++ b/doc/develop/makefiles.rst
@@ -1430,10 +1430,13 @@
A central rule exists to create `$(obj)/%.dtb` from `$(src)/%.dts`;
architecture Makefiles do no need to explicitly write out that rule.
+ The device tree can now be padded by the specified number of bytes
+ by setting CONFIG_SYS_DTC_PAD_BYTES instead of explicitly setting
+ DTC_FLAGS with the -p option.
+
Example::
targets += $(dtb-y)
- DTC_FLAGS ?= -p 1024
7.9 Preprocessing linker scripts
--------------------------------
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
index 375cc4a..5745acf 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -68,7 +68,7 @@
if (ret)
return ret;
- if (core->type == CLK_TYPE_GEN3_MDSEL) {
+ if (core->type == CLK_TYPE_GEN3_MDSEL || core->type == CLK_TYPE_GEN4_MDSEL) {
shift = priv->cpg_mode & BIT(core->offset) ? 0 : 16;
parent->dev = clk->dev;
parent->id = core->parent >> shift;
@@ -318,6 +318,8 @@
"FIXED");
case CLK_TYPE_GEN3_MDSEL:
+ fallthrough;
+ case CLK_TYPE_GEN4_MDSEL:
shift = priv->cpg_mode & BIT(core->offset) ? 0 : 16;
div = (core->div >> shift) & 0xffff;
rate = gen3_clk_get_rate64(&parent) / div;
diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index 344df94..8013afe 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -279,6 +279,101 @@
}
/**
+ * ti_sci_cmd_query_dm_cap() - Command to query DM firmware's capabilities
+ * @handle: Pointer to TI SCI handle
+ * @fw_caps: Pointer to firmware capabilities
+ *
+ * Return: 0 if all went fine, else return appropriate error.
+ */
+static int ti_sci_cmd_query_dm_cap(struct ti_sci_handle *handle, u64 *fw_caps)
+{
+ struct ti_sci_query_fw_caps_resp *cap_info;
+ struct ti_sci_msg_hdr hdr;
+ struct ti_sci_info *info;
+ struct ti_sci_xfer *xfer;
+ int ret;
+
+ if (IS_ERR(handle))
+ return PTR_ERR(handle);
+ if (!handle)
+ return -EINVAL;
+
+ info = handle_to_ti_sci_info(handle);
+
+ xfer = ti_sci_setup_one_xfer(info, TI_SCI_MSG_QUERY_FW_CAPS,
+ TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ (u32 *)&hdr, sizeof(struct ti_sci_msg_hdr),
+ sizeof(*cap_info));
+ if (IS_ERR(xfer)) {
+ ret = PTR_ERR(xfer);
+ return ret;
+ }
+
+ ret = ti_sci_do_xfer(info, xfer);
+ if (ret)
+ return ret;
+
+ cap_info = (struct ti_sci_query_fw_caps_resp *)xfer->tx_message.buf;
+
+ *fw_caps = cap_info->fw_caps;
+
+ return 0;
+}
+
+/**
+ * ti_sci_cmd_get_dm_version() - command to get the DM version of the SCI
+ * entity
+ * @handle: Pointer to TI SCI handle
+ * @dm_info: Pointer to DM version information structure
+ *
+ * Return: 0 if all went fine, else return appropriate error.
+ */
+
+static int ti_sci_cmd_get_dm_version(struct ti_sci_handle *handle,
+ struct ti_sci_dm_version_info *dm_info)
+{
+ struct ti_sci_msg_dm_resp_version *ver_info;
+ struct ti_sci_msg_hdr hdr;
+ struct ti_sci_info *info;
+ struct ti_sci_xfer *xfer;
+ int ret;
+
+ if (IS_ERR(handle))
+ return PTR_ERR(handle);
+ if (!handle || !dm_info)
+ return -EINVAL;
+
+ info = handle_to_ti_sci_info(handle);
+
+ xfer = ti_sci_setup_one_xfer(info, TI_SCI_MSG_DM_VERSION,
+ TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ (u32 *)&hdr, sizeof(struct ti_sci_msg_hdr),
+ sizeof(*ver_info));
+ if (IS_ERR(xfer)) {
+ ret = PTR_ERR(xfer);
+ return ret;
+ }
+
+ ret = ti_sci_do_xfer(info, xfer);
+ if (ret)
+ return ret;
+
+ ver_info = (struct ti_sci_msg_dm_resp_version *)xfer->tx_message.buf;
+
+ dm_info->abi_major = ver_info->abi_major;
+ dm_info->abi_minor = ver_info->abi_minor;
+ dm_info->dm_ver = ver_info->version;
+ dm_info->patch_ver = ver_info->patch_version;
+ dm_info->sub_ver = ver_info->sub_version;
+ strlcpy(dm_info->sci_server_version, ver_info->sci_server_version,
+ sizeof(ver_info->sci_server_version));
+ strlcpy(dm_info->rm_pm_hal_version, ver_info->rm_pm_hal_version,
+ sizeof(ver_info->rm_pm_hal_version));
+
+ return 0;
+}
+
+/**
* ti_sci_cmd_get_revision() - command to get the revision of the SCI entity
* @handle: pointer to TI SCI handle
*
@@ -2624,6 +2719,7 @@
struct ti_sci_dev_ops *dops = &ops->dev_ops;
struct ti_sci_clk_ops *cops = &ops->clk_ops;
struct ti_sci_core_ops *core_ops = &ops->core_ops;
+ struct ti_sci_firmware_ops *fw_ops = &ops->fw_ops;
struct ti_sci_rm_core_ops *rm_core_ops = &ops->rm_core_ops;
struct ti_sci_proc_ops *pops = &ops->proc_ops;
struct ti_sci_rm_ringacc_ops *rops = &ops->rm_ring_ops;
@@ -2694,6 +2790,9 @@
fwl_ops->set_fwl_region = ti_sci_cmd_set_fwl_region;
fwl_ops->get_fwl_region = ti_sci_cmd_get_fwl_region;
fwl_ops->change_fwl_owner = ti_sci_cmd_change_fwl_owner;
+
+ fw_ops->get_dm_version = ti_sci_cmd_get_dm_version;
+ fw_ops->query_dm_cap = ti_sci_cmd_query_dm_cap;
}
/**
diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
index bb8bc7b..ce50bf6 100644
--- a/drivers/firmware/ti_sci.h
+++ b/drivers/firmware/ti_sci.h
@@ -26,7 +26,9 @@
#define TI_SCI_MSG_BOARD_CONFIG_RM 0x000c
#define TI_SCI_MSG_BOARD_CONFIG_SECURITY 0x000d
#define TI_SCI_MSG_BOARD_CONFIG_PM 0x000e
+#define TI_SCI_MSG_DM_VERSION 0x000f
#define TISCI_MSG_QUERY_MSMC 0x0020
+#define TI_SCI_MSG_QUERY_FW_CAPS 0x0022
/* Device requests */
#define TI_SCI_MSG_SET_DEVICE_STATE 0x0200
@@ -135,6 +137,46 @@
} __packed;
/**
+ * struct ti_sci_msg_dm_resp_version - Response for a message
+ * @hdr: Generic header
+ * @version: Version number of the firmware
+ * @sub_version: Sub-version number of the firmware
+ * @patch_version: Patch version number of the firmware
+ * @abi_major: Major version of the ABI that firmware supports
+ * @abi_minor: Minor version of the ABI that firmware supports
+ * @sci_server_version: String describing the SCI server version
+ * @rm_pm_hal_version: String describing the RM PM HAL version
+ *
+ * In general, ABI version changes follow the rule that minor version increments
+ * are backward compatible. Major revision changes in ABI may not be
+ * backward compatible.
+ *
+ * Response to a message with message type TI_SCI_MSG_DM_VERSION
+ */
+struct ti_sci_msg_dm_resp_version {
+ struct ti_sci_msg_hdr hdr;
+ u16 version;
+ u8 sub_version;
+ u8 patch_version;
+ u8 abi_major;
+ u8 abi_minor;
+ char rm_pm_hal_version[12];
+ char sci_server_version[26];
+} __packed;
+
+/**
+ * struct ti_sci_query_fw_caps_resp - Response for a message
+ * @hdr: Generic header
+ * @fw_caps: 64-bit value representing the FW/SOC capabilities.
+ *
+ * Response to a message with message type TI_SCI_MSG_QUERY_FW_CAPS
+ */
+struct ti_sci_query_fw_caps_resp {
+ struct ti_sci_msg_hdr hdr;
+ u64 fw_caps;
+} __packed;
+
+/**
* struct ti_sci_msg_req_reboot - Reboot the SoC
* @hdr: Generic Header
* @domain: Domain to be reset, 0 for full SoC reboot.
diff --git a/drivers/remoteproc/ti_k3_r5f_rproc.c b/drivers/remoteproc/ti_k3_r5f_rproc.c
index 57268e7..f4bab68 100644
--- a/drivers/remoteproc/ti_k3_r5f_rproc.c
+++ b/drivers/remoteproc/ti_k3_r5f_rproc.c
@@ -834,8 +834,14 @@
return 0;
}
+ ret = k3_r5f_proc_request(core);
+ if (ret)
+ return ret;
+
/* Make sure Local reset is asserted. Redundant? */
reset_assert(&core->reset);
+
+ ti_sci_proc_release(&core->tsp);
}
ret = k3_r5f_rproc_configure(core);
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 1bb67f5..a0f2948 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -335,6 +335,14 @@
endif
+config WDT_RENESAS
+ bool "Renesas watchdog timer support"
+ depends on WDT && R8A779F0
+ select CLK
+ select CLK_RENESAS
+ help
+ Enables Renesas SoC R8A779F0 watchdog timer support.
+
config WDT_SANDBOX
bool "Enable Watchdog Timer support for Sandbox"
depends on SANDBOX && WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index e6bd4c5..c4467d6 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -43,6 +43,7 @@
obj-$(CONFIG_WDT_NPCM) += npcm_wdt.o
obj-$(CONFIG_WDT_OCTEONTX) += octeontx_wdt.o
obj-$(CONFIG_WDT_OMAP3) += omap_wdt.o
+obj-$(CONFIG_WDT_RENESAS) += renesas_wdt.o
obj-$(CONFIG_WDT_SBSA) += sbsa_gwdt.o
obj-$(CONFIG_WDT_K3_RTI) += rti_wdt.o
obj-$(CONFIG_WDT_SIEMENS_PMIC) += siemens_pmic_wdt.o
diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c
new file mode 100644
index 0000000..046e119
--- /dev/null
+++ b/drivers/watchdog/renesas_wdt.c
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright 2025 Red Hat, Inc., Shmuel Leib Melamud <smelamud@redhat.com>
+
+#include <asm/io.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+#include <wdt.h>
+
+#define usleep_range(a, b) udelay((a))
+
+struct rwdt {
+ u32 cnt;
+ u32 csra;
+ u32 csrb;
+};
+
+#define RWTCSRA_WOVF BIT(4)
+#define RWTCSRA_WRFLG BIT(5)
+#define RWTCSRA_TME BIT(7)
+
+#define CSR_MASK 0xA5A5A500
+#define CNT_MASK 0x5A5A0000
+
+#define MAX_CNT_VALUE 65536
+/*
+ * In probe, clk_rate is checked to be not more than 16 bit * biggest clock
+ * divider (12 bits). d is only a factor to fully utilize the WDT counter and
+ * will not exceed its 16 bits. Thus, no overflow, we stay below 32 bits.
+ */
+#define MUL_BY_CLKS_PER_SEC(p, d) \
+ DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
+
+/* d is 16 bit, clk_divs 12 bit -> no 32 bit overflow */
+#define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
+
+static const unsigned int clk_divs[] = { 1, 4, 16, 32, 64, 128, 1024, 4096 };
+
+struct rwdt_priv {
+ struct rwdt __iomem *wdt;
+ unsigned long clk_rate;
+ u8 cks;
+ struct clk clk;
+};
+
+static void rwdt_wait_cycles(struct rwdt_priv *priv, unsigned int cycles)
+{
+ unsigned int delay;
+
+ delay = DIV_ROUND_UP(cycles * 1000000, priv->clk_rate);
+
+ usleep_range(delay, 2 * delay);
+}
+
+static int rwdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+ struct rwdt_priv *priv = dev_get_priv(dev);
+ u64 max_timeout;
+ u8 val;
+
+ max_timeout = DIV_BY_CLKS_PER_SEC(priv, MAX_CNT_VALUE);
+ timeout = min(max_timeout, timeout / 1000);
+
+ /* Stop the timer before we modify any register */
+ val = readb_relaxed(&priv->wdt->csra) & ~RWTCSRA_TME;
+ writel_relaxed(val | CSR_MASK, &priv->wdt->csra);
+ /* Delay 2 cycles before setting watchdog counter */
+ rwdt_wait_cycles(priv, 2);
+
+ while (readb_relaxed(&priv->wdt->csra) & RWTCSRA_WRFLG)
+ cpu_relax();
+
+ writel_relaxed((MAX_CNT_VALUE - MUL_BY_CLKS_PER_SEC(priv, timeout))
+ | CNT_MASK, &priv->wdt->cnt);
+
+ writel_relaxed(priv->cks | RWTCSRA_TME | CSR_MASK, &priv->wdt->csra);
+
+ return 0;
+}
+
+static int rwdt_stop(struct udevice *dev)
+{
+ struct rwdt_priv *priv = dev_get_priv(dev);
+
+ writel_relaxed(priv->cks | CSR_MASK, &priv->wdt->csra);
+
+ return 0;
+}
+
+static int rwdt_reset(struct udevice *dev)
+{
+ struct rwdt_priv *priv = dev_get_priv(dev);
+ u8 val;
+
+ /* Stop the timer before we modify any register */
+ val = readb_relaxed(&priv->wdt->csra) & ~RWTCSRA_TME;
+ writel_relaxed(val | CSR_MASK, &priv->wdt->csra);
+ /* Delay 2 cycles before setting watchdog counter */
+ rwdt_wait_cycles(priv, 2);
+
+ writel_relaxed(0xffff | CNT_MASK, &priv->wdt->cnt);
+ /* smallest divider to reboot soon */
+ writel_relaxed(0 | CSR_MASK, &priv->wdt->csra);
+
+ readb_poll_timeout(&priv->wdt->csra, val, !(val & RWTCSRA_WRFLG), 100);
+
+ writel_relaxed(RWTCSRA_TME | CSR_MASK, &priv->wdt->csra);
+
+ /* wait 2 cycles, so watchdog will trigger */
+ rwdt_wait_cycles(priv, 2);
+
+ return 0;
+}
+
+static int rwdt_probe(struct udevice *dev)
+{
+ struct rwdt_priv *priv = dev_get_priv(dev);
+ unsigned long clks_per_sec;
+ int ret, i;
+
+ priv->wdt = dev_remap_addr(dev);
+ if (!priv->wdt)
+ return -EINVAL;
+
+ ret = clk_get_by_index(dev, 0, &priv->clk);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_enable(&priv->clk);
+ if (ret)
+ return ret;
+
+ priv->clk_rate = clk_get_rate(&priv->clk);
+ if (!priv->clk_rate) {
+ ret = -ENOENT;
+ goto err_clk_disable;
+ }
+
+ /*
+ * Find the largest possible divider that allows clock rate
+ * (clks_per_sec) to stay within 16 bits. In this case, we can still
+ * measure the smallest timeout (1s) and make the largest allowed
+ * timeout as large as possible.
+ */
+ for (i = ARRAY_SIZE(clk_divs) - 1; i >= 0; i--) {
+ clks_per_sec = priv->clk_rate / clk_divs[i];
+ if (clks_per_sec && clks_per_sec < 65536) {
+ priv->cks = i;
+ break;
+ }
+ }
+
+ /* can't find a suitable clock divider */
+ if (i < 0) {
+ ret = -ERANGE;
+ goto err_clk_disable;
+ }
+
+ return 0;
+
+err_clk_disable:
+ clk_disable(&priv->clk);
+
+ return ret;
+}
+
+static const struct wdt_ops rwdt_ops = {
+ .start = rwdt_start,
+ .reset = rwdt_reset,
+ .stop = rwdt_stop,
+};
+
+static const struct udevice_id rwdt_ids[] = {
+ { .compatible = "renesas,rcar-gen2-wdt" },
+ { .compatible = "renesas,rcar-gen3-wdt" },
+ { .compatible = "renesas,rcar-gen4-wdt" },
+ {}
+};
+
+U_BOOT_DRIVER(wdt_renesas) = {
+ .name = "wdt_renesas",
+ .id = UCLASS_WDT,
+ .of_match = rwdt_ids,
+ .ops = &rwdt_ops,
+ .probe = rwdt_probe,
+ .priv_auto = sizeof(struct rwdt_priv),
+};
diff --git a/dts/upstream/src/arm64/Makefile b/dts/upstream/src/arm64/Makefile
index b6db0dc..01a5265 100644
--- a/dts/upstream/src/arm64/Makefile
+++ b/dts/upstream/src/arm64/Makefile
@@ -6,5 +6,5 @@
DTC_FLAGS += -a 0x8
ifdef CONFIG_RCAR_64
-DTC_FLAGS += -R 4 -p 0x1000
+ DTC_FLAGS += -R 4
endif
diff --git a/dts/upstream/src/riscv/Makefile b/dts/upstream/src/riscv/Makefile
index 980617e..43351f8 100644
--- a/dts/upstream/src/riscv/Makefile
+++ b/dts/upstream/src/riscv/Makefile
@@ -2,5 +2,5 @@
include $(srctree)/scripts/Makefile.dts
-DTC_FLAGS += -R 4 -p 0x1000
+DTC_FLAGS += -R 4
diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h
index aa4d105..5269676 100644
--- a/include/linux/soc/ti/ti_sci_protocol.h
+++ b/include/linux/soc/ti/ti_sci_protocol.h
@@ -30,6 +30,28 @@
char firmware_description[32];
};
+/**
+ * struct ti_sci_dm_version_info - version information structure
+ * @abi_major: Major ABI version. Change here implies risk of backward
+ * compatibility break.
+ * @abi_minor: Minor ABI version. Change here implies new feature addition,
+ * or compatible change in ABI.
+ * @patch_ver: Patch version of the firmware.
+ * @sub_ver: Sub-version of the firmware.
+ * @dm_ver: DM version.
+ * @sci_server_version: Version string of the SCI server.
+ * @rm_pm_hal_version: Version string of the RM PM HAL.
+ */
+struct ti_sci_dm_version_info {
+ u8 abi_major;
+ u8 abi_minor;
+ u8 patch_ver;
+ u8 sub_ver;
+ u16 dm_ver;
+ char rm_pm_hal_version[12];
+ char sci_server_version[26];
+};
+
struct ti_sci_handle;
/**
@@ -262,6 +284,22 @@
};
/**
+ * struct ti_sci_firmware_ops - DM firmware operations
+ * @query_dm_cap: Query the DM capabilities
+ * Return 0 for successful query else appropriate error value.
+ * @get_dm_version: Get the DM version.
+ * Return 0 for successful request else appropriate error value.
+ */
+struct ti_sci_firmware_ops {
+ int (*query_dm_cap)(struct ti_sci_handle *handle,
+ u64 *dm_cap);
+ int (*get_dm_version)(struct ti_sci_handle *handle,
+ struct ti_sci_dm_version_info *get_dm_version);
+};
+
+#define TI_SCI_MSG_FLAG_FW_CAP_DM 0x100
+
+/**
* struct ti_sci_proc_ops - Processor specific operations.
*
* @proc_request: Request for controlling a physical processor.
@@ -609,6 +647,7 @@
struct ti_sci_dev_ops dev_ops;
struct ti_sci_clk_ops clk_ops;
struct ti_sci_core_ops core_ops;
+ struct ti_sci_firmware_ops fw_ops;
struct ti_sci_proc_ops proc_ops;
struct ti_sci_rm_core_ops rm_core_ops;
struct ti_sci_rm_ringacc_ops rm_ring_ops;
diff --git a/scripts/Makefile.dts b/scripts/Makefile.dts
index 685e337..3871a4a 100644
--- a/scripts/Makefile.dts
+++ b/scripts/Makefile.dts
@@ -16,6 +16,10 @@
endif
+ifneq ($(CONFIG_SYS_DTC_PAD_BYTES),0)
+DTC_FLAGS += -p $(CONFIG_SYS_DTC_PAD_BYTES)
+endif
+
targets += $(dtb-y)
PHONY += dtbs