armv8: Add workaround for USB erratum A-009798
The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receiver
Compliance test failure for a 100mV threshold.
Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE
to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 64eadfd..e77d886 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -19,6 +19,7 @@
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009660
select SYS_FSL_ERRATUM_A009663
+ select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009929
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
@@ -41,6 +42,7 @@
select SYS_FSL_ERRATUM_A008511
select SYS_FSL_ERRATUM_A008850
select SYS_FSL_ERRATUM_A009008
+ select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009801
select SYS_FSL_ERRATUM_A009803
select SYS_FSL_ERRATUM_A009942
@@ -105,6 +107,7 @@
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009635
select SYS_FSL_ERRATUM_A009663
+ select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009801
select SYS_FSL_ERRATUM_A009803
select SYS_FSL_ERRATUM_A009942
@@ -254,6 +257,9 @@
config SYS_FSL_ERRATUM_A009008
bool "Workaround for USB PHY erratum A009008"
+config SYS_FSL_ERRATUM_A009798
+ bool "Workaround for USB PHY erratum A009798"
+
config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"