Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net into next
- Fix some non-NULL terminated strings in the networking subsystem
- net: tsec: Mark tsec_get_interface as __maybe_unused
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 15507a7..4579cb7 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -2,7 +2,7 @@
windows_vm: vs2017-win2016
ubuntu_vm: ubuntu-18.04
macos_vm: macOS-10.15
- ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20210723-04Aug2021
+ ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20210827-11Sep2021
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
@@ -195,6 +195,9 @@
evb_ast2500:
TEST_PY_BD: "evb-ast2500"
TEST_PY_ID: "--id qemu"
+ vexpress_ca9x4:
+ TEST_PY_BD: "vexpress_ca9x4"
+ TEST_PY_ID: "--id qemu"
integratorcp_cm926ejs:
TEST_PY_BD: "integratorcp_cm926ejs"
TEST_PY_ID: "--id qemu"
@@ -254,6 +257,12 @@
r2dplus_tulip:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id tulip_qemu"
+ sifive_unleashed_sdcard:
+ TEST_PY_BD: "sifive_unleashed"
+ TEST_PY_ID: "--id sdcard_qemu"
+ sifive_unleashed_spi-nor:
+ TEST_PY_BD: "sifive_unleashed"
+ TEST_PY_ID: "--id spi-nor_qemu"
xilinx_zynq_virt:
TEST_PY_BD: "xilinx_zynq_virt"
TEST_PY_ID: "--id qemu"
@@ -289,7 +298,7 @@
wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
+ if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
@@ -302,6 +311,18 @@
cp /opt/grub/grubriscv64.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_riscv64.efi
cp /opt/grub/grubaa64.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_arm64.efi
cp /opt/grub/grubarm.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_arm.efi
+ # create sdcard / spi-nor images for sifive unleashed using genimage
+ if [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then
+ mkdir -p root;
+ cp ${UBOOT_TRAVIS_BUILD_DIR}/spl/u-boot-spl.bin .;
+ cp ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.itb .;
+ rm -rf tmp;
+ genimage --inputpath . --config board/sifive/unleashed/genimage_sdcard.cfg;
+ cp images/sdcard.img ${UBOOT_TRAVIS_BUILD_DIR}/;
+ rm -rf tmp;
+ genimage --inputpath . --config board/sifive/unleashed/genimage_spi-nor.cfg;
+ cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/;
+ fi
virtualenv -p /usr/bin/python3 /tmp/venv
. /tmp/venv/bin/activate
pip install -r test/py/requirements.txt
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index ffdeaae..1bd99c8 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -2,7 +2,7 @@
# Grab our configured image. The source for this is found at:
# https://source.denx.de/u-boot/gitlab-ci-runner
-image: trini/u-boot-gitlab-ci-runner:focal-20210723-04Aug2021
+image: trini/u-boot-gitlab-ci-runner:focal-20210827-11Sep2021
# We run some tests in different order, to catch some failures quicker.
stages:
@@ -23,7 +23,7 @@
wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
- - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
+ - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
@@ -40,6 +40,18 @@
- cp /opt/grub/grubriscv64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_riscv64.efi
- cp /opt/grub/grubaa64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi
- cp /opt/grub/grubarm.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi
+ # create sdcard / spi-nor images for sifive unleashed using genimage
+ - if [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then
+ mkdir -p root;
+ cp ${UBOOT_TRAVIS_BUILD_DIR}/spl/u-boot-spl.bin .;
+ cp ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.itb .;
+ rm -rf tmp;
+ genimage --inputpath . --config board/sifive/unleashed/genimage_sdcard.cfg;
+ cp images/sdcard.img ${UBOOT_TRAVIS_BUILD_DIR}/;
+ rm -rf tmp;
+ genimage --inputpath . --config board/sifive/unleashed/genimage_spi-nor.cfg;
+ cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/;
+ fi
- virtualenv -p /usr/bin/python3 /tmp/venv
- . /tmp/venv/bin/activate
- pip install -r test/py/requirements.txt
@@ -204,6 +216,12 @@
TEST_PY_BD: "sandbox_flattree"
<<: *buildman_and_testpy_dfn
+vexpress_ca9x4 test.py:
+ variables:
+ TEST_PY_BD: "vexpress_ca9x4"
+ TEST_PY_ID: "--id qemu"
+ <<: *buildman_and_testpy_dfn
+
integratorcp_cm926ejs test.py:
variables:
TEST_PY_BD: "integratorcp_cm926ejs"
@@ -317,6 +335,18 @@
TEST_PY_ID: "--id tulip_qemu"
<<: *buildman_and_testpy_dfn
+sifive_unleashed_sdcard test.py:
+ variables:
+ TEST_PY_BD: "sifive_unleashed"
+ TEST_PY_ID: "--id sdcard_qemu"
+ <<: *buildman_and_testpy_dfn
+
+sifive_unleashed_spi-nor test.py:
+ variables:
+ TEST_PY_BD: "sifive_unleashed"
+ TEST_PY_ID: "--id spi-nor_qemu"
+ <<: *buildman_and_testpy_dfn
+
xilinx_zynq_virt test.py:
variables:
TEST_PY_BD: "xilinx_zynq_virt"
diff --git a/.mailmap b/.mailmap
index b76f022..3d15a09 100644
--- a/.mailmap
+++ b/.mailmap
@@ -29,6 +29,7 @@
Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
+Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@toradex.com>
Markus Klotzbuecher <mk@denx.de>
diff --git a/Kconfig b/Kconfig
index a6c42b9..931a228 100644
--- a/Kconfig
+++ b/Kconfig
@@ -83,7 +83,6 @@
config OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in full U-Boot"
- default n
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
@@ -93,7 +92,6 @@
config SPL_OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in SPL"
depends on SPL
- default n
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
@@ -106,7 +104,6 @@
config LTO
bool "Enable Link Time Optimizations"
depends on ARCH_SUPPORTS_LTO
- default n
help
This option enables Link Time Optimization (LTO), a mechanism which
allows the compiler to optimize between different compilation units.
@@ -127,7 +124,6 @@
config TPL_OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in TPL"
depends on TPL
- default n
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
@@ -249,8 +245,11 @@
config SYS_MALLOC_LEN
hex "Define memory for Dynamic allocation"
- depends on ARCH_ZYNQ || ARCH_VERSAL || ARCH_STM32MP || ARCH_ROCKCHIP
- default 0x2000000 if ARCH_ROCKCHIP
+ default 0x2000000 if ARCH_ROCKCHIP || ARCH_OMAP2PLUS || ARCH_MESON
+ default 0x4020000 if ARCH_SUNXI && !MACH_SUN8I_V3S
+ default 0x200000 if ARCH_BMIPS || X86
+ default 0x220000 if ARCH_SUNXI && MACH_SUN8I_V3S
+ default 0x400000
help
This defines memory to be allocated for Dynamic allocation
TODO: Use for other architectures
@@ -307,7 +306,6 @@
config SYS_MALLOC_DEFAULT_TO_INIT
bool "Default malloc to init while reserving the memory for it"
- default n
help
It may happen that one needs to move the dynamic allocation
from one to another memory range, eg. when moving the malloc
@@ -389,6 +387,20 @@
Path within the source tree to the linker script to use for the
main U-Boot binary.
+config SYS_LOAD_ADDR
+ hex "Address in memory to use by default"
+ default 0x01000000 if ARCH_SOCFPGA
+ default 0x02000000 if PPC || X86
+ default 0x22000000 if MACH_SUN9I
+ default 0x42000000 if ARCH_SUNXI && !MACH_SUN9I
+ default 0x82000000 if ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
+ default 0x82000000 if ARCH_MX6 && (MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL)
+ default 0x12000000 if ARCH_MX6 && !(MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL)
+ default 0x80800000 if ARCH_MX7
+ default 0x90000000 if FSL_LSCH2 || FSL_LSCH3
+ help
+ Address in memory to use as the default safe load address.
+
config ERR_PTR_OFFSET
hex
default 0x0
@@ -423,7 +435,6 @@
default y if TARGET_PIC32MZDASK
default y if TARGET_DEVKIT8000
default y if TARGET_TRICORDER
- default n
help
Enable this to allow support for the on board SRAM.
SRAM base address is controlled by CONFIG_SYS_SRAM_BASE.
diff --git a/MAINTAINERS b/MAINTAINERS
index 5370b55..5a039b8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -312,6 +312,7 @@
F: board/atmel/
F: drivers/cpu/at91_cpu.c
F: drivers/misc/microchip_flexcom.c
+F: include/dt-bindings/mfd/atmel-flexcom.h
F: drivers/timer/mchp-pit64b-timer.c
ARM NEXELL S5P4418
@@ -525,7 +526,12 @@
S: Maintained
F: arch/arm/dts/ste-*
F: arch/arm/mach-u8500/
+F: drivers/gpio/nmk_gpio.c
+F: drivers/phy/phy-ab8500-usb.c
+F: drivers/power/pmic/ab8500.c
F: drivers/timer/nomadik-mtu-timer.c
+F: drivers/usb/musb-new/ux500.c
+F: drivers/video/mcde_simple.c
ARM UNIPHIER
S: Orphan (Since 2020-09)
diff --git a/Makefile b/Makefile
index 732d702..cf9466c 100644
--- a/Makefile
+++ b/Makefile
@@ -813,23 +813,9 @@
libs-y += net/
libs-y += disk/
libs-y += drivers/
-libs-y += drivers/dma/
-libs-y += drivers/gpio/
-libs-y += drivers/net/
-libs-y += drivers/net/phy/
-libs-y += drivers/power/ \
- drivers/power/domain/ \
- drivers/power/fuel_gauge/ \
- drivers/power/mfd/ \
- drivers/power/pmic/ \
- drivers/power/battery/ \
- drivers/power/regulator/
-libs-y += drivers/spi/
-libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
libs-$(CONFIG_SYS_FSL_MMDC) += drivers/ddr/fsl/
libs-$(CONFIG_$(SPL_)ALTERA_SDRAM) += drivers/ddr/altera/
-libs-y += drivers/serial/
libs-y += drivers/usb/cdns3/
libs-y += drivers/usb/dwc3/
libs-y += drivers/usb/common/
@@ -1306,10 +1292,6 @@
# Use 'make BINMAN_VERBOSE=3' to set vebosity level
default_dt := $(if $(DEVICE_TREE),$(DEVICE_TREE),$(CONFIG_DEFAULT_DEVICE_TREE))
-# Tell binman whether we have a devicetree for SPL and TPL
-have_spl_dt := $(if $(CONFIG_SPL_OF_PLATDATA),,$(CONFIG_SPL_OF_CONTROL))
-have_tpl_dt := $(if $(CONFIG_TPL_OF_PLATDATA),,$(CONFIG_TPL_OF_CONTROL))
-
quiet_cmd_binman = BINMAN $@
cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
--toolpath $(objtree)/tools \
@@ -1323,7 +1305,8 @@
-a scp-path=$(SCP) \
-a spl-bss-pad=$(if $(CONFIG_SPL_SEPARATE_BSS),,1) \
-a tpl-bss-pad=$(if $(CONFIG_TPL_SEPARATE_BSS),,1) \
- -a spl-dtb=$(have_spl_dt) -a tpl-dtb=$(have_tpl_dt) \
+ -a spl-dtb=$(CONFIG_SPL_OF_REAL) \
+ -a tpl-dtb=$(CONFIG_SPL_OF_REAL) \
$(BINMAN_$(@F))
OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex
diff --git a/README b/README
index a3f81e4..1ef8010 100644
--- a/README
+++ b/README
@@ -465,10 +465,6 @@
Board config to use DDR3L. It can be enabled for SoCs with
DDR3L controllers.
- CONFIG_SYS_FSL_DDR4
- Board config to use DDR4. It can be enabled for SoCs with
- DDR4 controllers.
-
CONFIG_SYS_FSL_IFC_BE
Defines the IFC controller register space as Big Endian
@@ -481,15 +477,6 @@
CONFIG_SYS_FSL_LBC_CLK_DIV
Defines divider of platform clock(clock input to eLBC controller).
- CONFIG_SYS_FSL_PBL_PBI
- It enables addition of RCW (Power on reset configuration) in built image.
- Please refer doc/README.pblimage for more details
-
- CONFIG_SYS_FSL_PBL_RCW
- It adds PBI(pre-boot instructions) commands in u-boot build image.
- PBI commands can be used to configure SoC before it starts the execution.
- Please refer doc/README.pblimage for more details
-
CONFIG_SYS_FSL_DDR_BE
Defines the DDR controller register space as Big Endian
@@ -599,16 +586,6 @@
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.
- CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
-
- This setting is mandatory for all boards that have only one
- machine type and must be used to specify the machine type
- number as it appears in the ARM machine registry
- (see https://www.arm.linux.org.uk/developer/machines/).
- Only boards that have multiple machine types supported
- in a single configuration file and the machine type is
- runtime discoverable, do not have to use this setting.
-
- vxWorks boot parameters:
bootvx constructs a valid bootline using the following
@@ -879,17 +856,6 @@
Support for National dp8382[01] gigabit chips.
- NETWORK Support (other):
-
- CONFIG_DRIVER_AT91EMAC
- Support for AT91RM9200 EMAC.
-
- CONFIG_RMII
- Define this to use reduced MII inteface
-
- CONFIG_DRIVER_AT91EMAC_QUIET
- If this defined, the driver is quiet.
- The driver doen't show link status messages.
-
CONFIG_CALXEDA_XGMAC
Support for the Calxeda XGMAC device
@@ -1461,129 +1427,7 @@
In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
with a list of GPIO LEDs that have inverted polarity.
-- I2C Support: CONFIG_SYS_I2C_LEGACY
-
- Note: This is deprecated in favour of driver model. Use
- CONFIG_DM_I2C instead.
-
- This enable the legacy i2c subsystem, and will allow you to use
- i2c commands at the u-boot command line (as long as you set
- CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
- for defining speed and slave address
- - activate second bus with I2C_SOFT_DECLARATIONS2 define
- CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
- for defining speed and slave address
- - activate third bus with I2C_SOFT_DECLARATIONS3 define
- CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
- for defining speed and slave address
- - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
- CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
- for defining speed and slave address
-
- - drivers/i2c/fsl_i2c.c:
- - activate i2c driver with CONFIG_SYS_I2C_FSL
- define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
- offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
- CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
- bus.
- - If your board supports a second fsl i2c bus, define
- CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
- CONFIG_SYS_FSL_I2C2_SPEED for the speed and
- CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
- second bus.
-
- - drivers/i2c/tegra_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_TEGRA
- - This driver adds 4 i2c buses with a fix speed from
- 100000 and the slave addr 0!
-
- - drivers/i2c/ppc4xx_i2c.c
- - activate this driver with CONFIG_SYS_I2C_PPC4XX
- - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
-
- - drivers/i2c/i2c_mxc.c
- - activate this driver with CONFIG_SYS_I2C_MXC
- - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
- - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
- - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
- - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
- - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
- - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
- - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
- - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
- - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
- - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
- - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
- - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
- If those defines are not set, default value is 100000
- for speed, and 0 for slave.
-
- - drivers/i2c/rcar_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_RCAR
- - This driver adds 4 i2c buses
-
- - drivers/i2c/sh_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_SH
- - This driver adds from 2 to 5 i2c buses
-
- - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
- - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
- - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
- - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
- - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
- - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
- - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
- - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
- - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
- - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
- - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
-
- - drivers/i2c/omap24xx_i2c.c
- - activate this driver with CONFIG_SYS_I2C_OMAP24XX
- - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
- - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
- - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
- - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
- - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
- - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
- - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
- - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
- - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
- - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
-
- - drivers/i2c/s3c24x0_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_S3C24X0
- - This driver adds i2c buses (11 for Exynos5250, Exynos5420
- 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
- with a fix speed from 100000 and the slave addr 0!
-
- - drivers/i2c/ihs_i2c.c
- - activate this driver with CONFIG_SYS_I2C_IHS
- - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
- - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
- - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
- - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
- - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
- - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
- - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
- - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
- - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
- - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
- - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
- - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
- - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
- - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
- - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
- - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
- - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
- - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
- - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
- - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
- - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
-
- additional defines:
-
+- I2C Support:
CONFIG_SYS_NUM_I2C_BUSES
Hold the number of i2c buses you want to use.
@@ -2873,22 +2717,6 @@
This only takes effect if the memory commands are activated
globally (CONFIG_CMD_MEMORY).
-- CONFIG_SKIP_LOWLEVEL_INIT
- [ARM, NDS32, MIPS, RISC-V only] If this variable is defined, then certain
- low level initializations (like setting up the memory
- controller) are omitted and/or U-Boot does not
- relocate itself into RAM.
-
- Normally this variable MUST NOT be defined. The only
- exception is when U-Boot is loaded (to RAM) by some
- other boot loader or by a debugger which performs
- these initializations itself.
-
-- CONFIG_SKIP_LOWLEVEL_INIT_ONLY
- [ARM926EJ-S only] This allows just the call to lowlevel_init()
- to be skipped. The normal CP15 init (such as enabling the
- instruction cache) is still performed.
-
- CONFIG_SPL_BUILD
Set when the currently-running compilation is for an artifact
that will end up in the SPL (as opposed to the TPL or U-Boot
diff --git a/api/Kconfig b/api/Kconfig
index 16731d3..382aa4a 100644
--- a/api/Kconfig
+++ b/api/Kconfig
@@ -2,7 +2,6 @@
config API
bool "Enable U-Boot API"
- default n
help
This option enables the U-Boot API. See api/README for more information.
diff --git a/arch/Kconfig b/arch/Kconfig
index 8f8daad..3e2cc84 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -7,6 +7,27 @@
config NEEDS_MANUAL_RELOC
bool
+config SYS_CACHE_SHIFT_4
+ bool
+
+config SYS_CACHE_SHIFT_5
+ bool
+
+config SYS_CACHE_SHIFT_6
+ bool
+
+config SYS_CACHE_SHIFT_7
+ bool
+
+config SYS_CACHELINE_SIZE
+ int
+ default 128 if SYS_CACHE_SHIFT_7
+ default 64 if SYS_CACHE_SHIFT_6
+ default 32 if SYS_CACHE_SHIFT_5
+ default 16 if SYS_CACHE_SHIFT_4
+ # Fall-back for MIPS
+ default 32 if MIPS
+
config LINKER_LIST_ALIGN
int
default 32 if SANDBOX
@@ -29,6 +50,7 @@
select DM
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
+ select SYS_CACHE_SHIFT_7
select TIMER
config ARM
@@ -44,6 +66,7 @@
select NEEDS_MANUAL_RELOC
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
+ select SYS_CACHE_SHIFT_4
select SUPPORT_OF_CONTROL
config MICROBLAZE
@@ -97,7 +120,7 @@
imply SPL_OF_CONTROL
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply SPL_TIMER
config SANDBOX
@@ -122,6 +145,7 @@
select SPI
select SUPPORT_OF_CONTROL
select SYSRESET_CMD_POWEROFF
+ select SYS_CACHE_SHIFT_4
select IRQ
select SUPPORT_EXTENSION_SCAN
imply BITREVERSE
@@ -187,6 +211,7 @@
select OF_CONTROL
select PCI
select SUPPORT_OF_CONTROL
+ select SYS_CACHE_SHIFT_6
select TIMER
select USE_PRIVATE_LIBGCC
select X86_TSC_TIMER
@@ -233,9 +258,9 @@
imply SPL_PINCTRL
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply SPL_SPI_FLASH_SUPPORT
- imply SPL_SPI_SUPPORT
+ imply SPL_SPI
imply SPL_OF_CONTROL
imply SPL_TIMER
imply SPL_REGMAP
@@ -247,7 +272,7 @@
imply TPL_PINCTRL
imply TPL_LIBCOMMON_SUPPORT
imply TPL_LIBGENERIC_SUPPORT
- imply TPL_SERIAL_SUPPORT
+ imply TPL_SERIAL
imply TPL_OF_CONTROL
imply TPL_TIMER
imply TPL_REGMAP
@@ -325,6 +350,63 @@
Note that, its up to the individual architectures to implement
this functionality.
+config SKIP_LOWLEVEL_INIT
+ bool "Skip the calls to certain low level initialization functions"
+ depends on ARM || NDS32 || MIPS || RISCV
+ help
+ If enabled, then certain low level initializations (like setting up
+ the memory controller) are omitted and/or U-Boot does not relocate
+ itself into RAM.
+ Normally this variable MUST NOT be defined. The only exception is
+ when U-Boot is loaded (to RAM) by some other boot loader or by a
+ debugger which performs these initializations itself.
+
+config SPL_SKIP_LOWLEVEL_INIT
+ bool "Skip the calls to certain low level initialization functions"
+ depends on SPL && (ARM || NDS32 || MIPS || RISCV)
+ help
+ If enabled, then certain low level initializations (like setting up
+ the memory controller) are omitted and/or U-Boot does not relocate
+ itself into RAM.
+ Normally this variable MUST NOT be defined. The only exception is
+ when U-Boot is loaded (to RAM) by some other boot loader or by a
+ debugger which performs these initializations itself.
+
+config TPL_SKIP_LOWLEVEL_INIT
+ bool "Skip the calls to certain low level initialization functions"
+ depends on SPL && ARM
+ help
+ If enabled, then certain low level initializations (like setting up
+ the memory controller) are omitted and/or U-Boot does not relocate
+ itself into RAM.
+ Normally this variable MUST NOT be defined. The only exception is
+ when U-Boot is loaded (to RAM) by some other boot loader or by a
+ debugger which performs these initializations itself.
+
+config SKIP_LOWLEVEL_INIT_ONLY
+ bool "Skip the call to lowlevel_init during early boot ONLY"
+ depends on ARM
+ help
+ This allows just the call to lowlevel_init() to be skipped. The
+ normal CP15 init (such as enabling the instruction cache) is still
+ performed.
+
+config SPL_SKIP_LOWLEVEL_INIT_ONLY
+ bool "Skip the call to lowlevel_init during early boot ONLY"
+ depends on SPL && ARM
+ help
+ This allows just the call to lowlevel_init() to be skipped. The
+ normal CP15 init (such as enabling the instruction cache) is still
+ performed.
+
+config TPL_SKIP_LOWLEVEL_INIT_ONLY
+ bool "Skip the call to lowlevel_init during early boot ONLY"
+ depends on TPL && ARM
+ help
+ This allows just the call to lowlevel_init() to be skipped. The
+ normal CP15 init (such as enabling the instruction cache) is still
+ performed.
+
source "arch/arc/Kconfig"
source "arch/arm/Kconfig"
source "arch/m68k/Kconfig"
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 6ff201f..1a7c525 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -104,13 +104,11 @@
config CPU_BIG_ENDIAN
bool "Enable Big Endian Mode"
- default n
help
Build kernel for Big Endian Mode of ARC CPU
config SYS_ICACHE_OFF
bool "Do not enable icache"
- default n
help
Do not enable instruction cache in U-Boot.
@@ -123,7 +121,6 @@
config SYS_DCACHE_OFF
bool "Do not enable dcache"
- default n
help
Do not enable data cache in U-Boot.
@@ -136,14 +133,12 @@
menuconfig ARC_DBG
bool "ARC debugging"
- default n
if ARC_DBG
config ARC_DBG_IOC_ENABLE
bool "Enable IO coherency unit"
depends on CPU_ARCHS38
- default n
help
Enable IO coherency unit to debug problems with caches and
DMA peripherals.
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index ab61846..a48e1ae 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -16,9 +16,6 @@
*/
#define ARCH_DMA_MINALIGN 128
-/* CONFIG_SYS_CACHELINE_SIZE is used a lot in drivers */
-#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
-
#if defined(ARC_MMU_ABSENT)
#define CONFIG_ARC_MMU_VER 0
#elif defined(CONFIG_ARC_MMU_V2)
diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index 8a8d394..41408c2 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -8,42 +8,12 @@
#include <env.h>
#include <image.h>
#include <irq_func.h>
-#include <lmb.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
-static ulong get_sp(void)
-{
- ulong ret;
-
- asm("mov %0, sp" : "=r"(ret) : );
- return ret;
-}
-
-void arch_lmb_reserve(struct lmb *lmb)
-{
- ulong sp;
-
- /*
- * Booting a (Linux) kernel image
- *
- * Allocate space for command line and board info - the
- * address should be as high as possible within the reach of
- * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
- * memory, which means far enough below the current stack
- * pointer.
- */
- sp = get_sp();
- debug("## Current stack ends at 0x%08lx ", sp);
-
- /* adjust sp by 4K to be safe */
- sp -= 4096;
- lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
-}
-
static int cleanup_before_linux(void)
{
disable_interrupts();
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index f807cd8..4c696cb 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -11,6 +11,7 @@
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/log2.h>
+#include <lmb.h>
#include <asm/arcregs.h>
#include <asm/arc-bcr.h>
#include <asm/cache.h>
@@ -820,3 +821,16 @@
__ic_entire_invalidate();
}
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mov %0, sp" : "=r"(ret) : );
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
+}
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b5bd328..79e29ee 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -9,9 +9,19 @@
select PHYS_64BIT
select SYS_CACHE_SHIFT_6
-if ARM64
+config ARM64_CRC32
+ bool "Enable support for CRC32 instruction"
+ depends on ARM64
+ default y
+ help
+ ARMv8 implements dedicated crc32 instruction for crc32 calculation.
+ This is faster than software crc32 calculation. This instruction may
+ not be present on all ARMv8.0, but is always present on ARMv8.1 and
+ newer.
+
config POSITION_INDEPENDENT
bool "Generate position-independent pre-relocation code"
+ depends on ARM64 || CPU_V7A
help
U-Boot expects to be linked to a specific hard-coded address, and to
be loaded to and run from that address. This option lifts that
@@ -22,6 +32,7 @@
config INIT_SP_RELATIVE
bool "Specify the early stack pointer relative to the .bss section"
+ depends on ARM64
default n if ARCH_QEMU
default y if POSITION_INDEPENDENT
help
@@ -37,6 +48,7 @@
config SYS_INIT_SP_BSS_OFFSET
int "Early stack offset from the .bss base address"
+ depends on ARM64
depends on INIT_SP_RELATIVE
default 524288
help
@@ -46,6 +58,7 @@
do not overlap any appended DTB.
config LINUX_KERNEL_IMAGE_HEADER
+ depends on ARM64
bool
help
Place a Linux kernel image header at the start of the U-Boot binary.
@@ -54,14 +67,18 @@
image header reports the amount of memory (BSS and similar) that
U-Boot needs to use, but which isn't part of the binary.
-if LINUX_KERNEL_IMAGE_HEADER
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
+ depends on LINUX_KERNEL_IMAGE_HEADER
hex
help
The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
TEXT_OFFSET value written to the Linux kernel image header.
-endif
-endif
+
+config GICV2
+ bool
+
+config GICV3
+ bool
config GIC_V3_ITS
bool "ARM GICV3 ITS"
@@ -104,7 +121,6 @@
config SYS_ICACHE_OFF
bool "Do not enable icache"
- default n
help
Do not enable instruction cache in U-Boot.
@@ -117,7 +133,6 @@
config SYS_DCACHE_OFF
bool "Do not enable dcache"
- default n
help
Do not enable data cache in U-Boot.
@@ -332,21 +347,6 @@
default 4 if CPU_SA1100
default 8 if ARM64
-config SYS_CACHE_SHIFT_5
- bool
-
-config SYS_CACHE_SHIFT_6
- bool
-
-config SYS_CACHE_SHIFT_7
- bool
-
-config SYS_CACHELINE_SIZE
- int
- default 128 if SYS_CACHE_SHIFT_7
- default 64 if SYS_CACHE_SHIFT_6
- default 32 if SYS_CACHE_SHIFT_5
-
choice
prompt "Select the ARM data write cache policy"
default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
@@ -452,12 +452,11 @@
config ARM_CORTEX_CPU_IS_UP
bool
- default n
config USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy"
- default y
- depends on !ARM64
+ default y if !ARM64
+ depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
help
Enable the generation of an optimized version of memcpy.
Such an implementation may be faster under some conditions
@@ -466,7 +465,7 @@
config SPL_USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy for SPL"
default y if USE_ARCH_MEMCPY
- depends on !ARM64 && SPL
+ depends on SPL
help
Enable the generation of an optimized version of memcpy.
Such an implementation may be faster under some conditions
@@ -475,16 +474,43 @@
config TPL_USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy for TPL"
default y if USE_ARCH_MEMCPY
- depends on !ARM64 && TPL
+ depends on TPL
help
Enable the generation of an optimized version of memcpy.
Such an implementation may be faster under some conditions
but may increase the binary size.
+config USE_ARCH_MEMMOVE
+ bool "Use an assembly optimized implementation of memmove" if !ARM64
+ default USE_ARCH_MEMCPY if ARM64
+ depends on ARM64
+ help
+ Enable the generation of an optimized version of memmove.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config SPL_USE_ARCH_MEMMOVE
+ bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
+ default SPL_USE_ARCH_MEMCPY if ARM64
+ depends on SPL && ARM64
+ help
+ Enable the generation of an optimized version of memmove.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config TPL_USE_ARCH_MEMMOVE
+ bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
+ default TPL_USE_ARCH_MEMCPY if ARM64
+ depends on TPL && ARM64
+ help
+ Enable the generation of an optimized version of memmove.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
config USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset"
- default y
- depends on !ARM64
+ default y if !ARM64
+ depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
help
Enable the generation of an optimized version of memset.
Such an implementation may be faster under some conditions
@@ -493,7 +519,7 @@
config SPL_USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset for SPL"
default y if USE_ARCH_MEMSET
- depends on !ARM64 && SPL
+ depends on SPL
help
Enable the generation of an optimized version of memset.
Such an implementation may be faster under some conditions
@@ -502,7 +528,7 @@
config TPL_USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset for TPL"
default y if USE_ARCH_MEMSET
- depends on !ARM64 && TPL
+ depends on TPL
help
Enable the generation of an optimized version of memset.
Such an implementation may be faster under some conditions
@@ -626,6 +652,11 @@
This enables support for Broadcom ARM-based set-top box
chipsets, including the 7445 family of chips.
+config TARGET_VEXPRESS_CA9X4
+ bool "Support vexpress_ca9x4"
+ select CPU_V7A
+ select PL011_SERIAL
+
config TARGET_BCMCYGNUS
bool "Support bcmcygnus"
select CPU_V7A
@@ -723,6 +754,7 @@
bool "TI Keystone"
select CMD_POWEROFF
select CPU_V7A
+ select DDR_SPD
select GPIO_EXTRA_HEADER
select SUPPORT_SPL
select SYS_ARCH_TIMER
@@ -787,6 +819,7 @@
select ARM64
select DM
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select OF_CONTROL
select ENABLE_ARM_SOC_BOOT0_HOOK
@@ -794,9 +827,11 @@
bool "NXP i.MX8M platform"
select ARM64
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
+ select SYS_I2C_MXC
select DM
select SUPPORT_SPL
imply CMD_DM
@@ -805,6 +840,7 @@
bool "NXP i.MX8ULP platform"
select ARM64
select DM
+ select MACH_IMX
select OF_CONTROL
select SUPPORT_SPL
select GPIO_EXTRA_HEADER
@@ -816,6 +852,7 @@
select DM
select DM_SERIAL
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SUPPORT_SPL
imply CMD_DM
@@ -823,6 +860,7 @@
bool "NXP i.MX23 family"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select PL011_SERIAL
select SUPPORT_SPL
@@ -830,6 +868,7 @@
bool "NXP MX25"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
+ select MACH_IMX
imply MXC_GPIO
config ARCH_MX28
@@ -837,17 +876,20 @@
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
select PL011_SERIAL
+ select MACH_IMX
select SUPPORT_SPL
config ARCH_MX31
bool "NXP i.MX31 family"
select CPU_ARM1136
select GPIO_EXTRA_HEADER
+ select MACH_IMX
config ARCH_MX7ULP
bool "NXP MX7ULP"
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
@@ -860,6 +902,7 @@
select ARCH_MISC_INIT
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
@@ -871,6 +914,7 @@
bool "Freescale MX6"
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
@@ -887,6 +931,7 @@
select BOARD_EARLY_INIT_F
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
imply MXC_GPIO
config ARCH_NEXELL
@@ -952,6 +997,7 @@
select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select DM
select DM_SERIAL
+ select GICV2
select GPIO_EXTRA_HEADER
select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select OF_CONTROL
@@ -962,7 +1008,7 @@
select SPL_NAND_SUPPORT if SPL_NAND_DENALI
select SPL_OF_CONTROL
select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
- select SPL_SERIAL_SUPPORT
+ select SPL_SERIAL
select SPL_SYSRESET
select SPL_WATCHDOG
select SUPPORT_SPL
@@ -982,11 +1028,11 @@
imply SPL_DM_SPI
imply SPL_DM_SPI_FLASH
imply SPL_LIBDISK_SUPPORT
- imply SPL_MMC_SUPPORT
+ imply SPL_MMC
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
imply SPL_SPI_FLASH_SUPPORT
- imply SPL_SPI_SUPPORT
+ imply SPL_SPI
imply L2X0_CACHE
config ARCH_SUNXI
@@ -1032,9 +1078,9 @@
imply SPL_GPIO
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT if MMC
+ imply SPL_MMC if MMC
imply SPL_POWER
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply USB_GADGET
config ARCH_U8500
@@ -1044,14 +1090,22 @@
select DM_GPIO
select DM_MMC if MMC
select DM_SERIAL
+ select DM_USB_GADGET if DM_USB
select OF_CONTROL
select SYSRESET
select TIMER
+ imply AB8500_USB_PHY
imply ARM_PL180_MMCI
+ imply CLK
+ imply DM_PMIC
imply DM_RTC
+ imply NOMADIK_GPIO
imply NOMADIK_MTU_TIMER
+ imply PHY
imply PL01X_SERIAL
+ imply PMIC_AB8500
imply RTC_PL031
+ imply SYS_THUMB_BUILD
imply SYSRESET_SYSCON
config ARCH_VERSAL
@@ -1062,6 +1116,7 @@
select DM_ETH if NET
select DM_MMC if MMC
select DM_SERIAL
+ select GICV3
select GPIO_EXTRA_HEADER
select OF_CONTROL
select SOC_DEVICE
@@ -1072,6 +1127,7 @@
bool "Freescale Vybrid"
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
imply MTD_RAW_NAND
@@ -1131,6 +1187,7 @@
select DM_SPI if SPI
select DM_SPI_FLASH if DM_SPI
select FIRMWARE
+ select GICV2
select GPIO_EXTRA_HEADER
select OF_CONTROL
select SPL_BOARD_INIT if SPL
@@ -1880,6 +1937,7 @@
config TARGET_PRESIDIO_ASIC
bool "Support Cortina Presidio ASIC Platform"
select ARM64
+ select GICV2
config TARGET_XENGUEST_ARM64
bool "Xen guest ARM64"
@@ -1891,13 +1949,56 @@
select SSCANF
endchoice
+config SUPPORT_PASSING_ATAGS
+ bool "Support pre-devicetree ATAG-based booting"
+ depends on !ARM64
+ imply SETUP_MEMORY_TAGS
+ help
+ Support for booting older Linux kernels, using ATAGs rather than
+ passing a devicetree. This is option is rarely used, and the
+ semantics are defined at
+ https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
+
+config SETUP_MEMORY_TAGS
+ bool "Pass memory size information via ATAG"
+ depends on SUPPORT_PASSING_ATAGS
+
+config CMDLINE_TAG
+ bool "Pass Linux kernel cmdline via ATAG"
+ depends on SUPPORT_PASSING_ATAGS
+
+config INITRD_TAG
+ bool "Pass initrd starting point and size via ATAG"
+ depends on SUPPORT_PASSING_ATAGS
+
+config REVISION_TAG
+ bool "Pass system revision via ATAG"
+ depends on SUPPORT_PASSING_ATAGS
+
+config SERIAL_TAG
+ bool "Pass system serial number via ATAG"
+ depends on SUPPORT_PASSING_ATAGS
+
+config STATIC_MACH_TYPE
+ bool "Statically define the Machine ID number"
+ help
+ When booting via ATAGs, enable this option if we know the correct
+ machine ID number to use at compile time. Some systems will be
+ passed the number dynamically by whatever loads U-Boot.
+
+config MACH_TYPE
+ int "Machine ID number"
+ depends on STATIC_MACH_TYPE
+ help
+ When booting via ATAGs, the machine type must be passed as a number.
+ For the full list see https://www.arm.linux.org.uk/developer/machines
+
config ARCH_SUPPORT_TFABOOT
bool
config TFABOOT
bool "Support for booting from TF-A"
depends on ARCH_SUPPORT_TFABOOT
- default n
help
Some platforms support the setup of secure registers (for instance
for CPU errata handling) or provide secure services like PSCI.
@@ -2052,6 +2153,7 @@
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/octeontx/Kconfig"
source "board/Marvell/octeontx2/Kconfig"
+source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/cortina/presidio-asic/Kconfig"
source "board/broadcom/bcm963158/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c68e598..ce977bf 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -18,7 +18,11 @@
$(call cc-option, -march=armv7))
arch-$(CONFIG_CPU_V7M) =-march=armv7-m
arch-$(CONFIG_CPU_V7R) =-march=armv7-r
+ifeq ($(CONFIG_ARM64_CRC32),y)
+arch-$(CONFIG_ARM64) =-march=armv8-a+crc
+else
arch-$(CONFIG_ARM64) =-march=armv8-a
+endif
# On Tegra systems we must build SPL for the armv4 core on the device
# but otherwise we can use the value in CONFIG_SYS_ARM_ARCH
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 16c63e1..b107b1a 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -25,6 +25,7 @@
PLATFORM_RELFLAGS += -fno-common -ffixed-r9
PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
+ $(call cc-option,-mgeneral-regs-only) \
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
# LLVM support
@@ -158,7 +159,8 @@
OBJCOPYFLAGS += -j .efi_runtime -j .efi_runtime_rel
endif
-ifneq ($(CONFIG_IMX_CONFIG),)
+ifdef CONFIG_MACH_IMX
+ifneq ($(CONFIG_IMX_CONFIG),"")
ifdef CONFIG_SPL
ifndef CONFIG_SPL_BUILD
INPUTS-y += SPL
@@ -174,6 +176,7 @@
INPUTS-y += u-boot.vyb
endif
endif
+endif
EFI_LDS := elf_arm_efi.lds
EFI_CRT0 := crt0_arm_efi.o
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index da7278e..4bc27f6 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -39,7 +39,7 @@
msr cpsr,r0
/* the mask ROM code should have PLL and others stable */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@@ -62,7 +62,7 @@
*
*************************************************************************
*/
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
cpu_init_crit:
/*
* flush v4 I/D caches
@@ -81,7 +81,7 @@
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* Jump to board specific initialization... The Mask ROM will have already initialized
* basic memory. Go here to bump up clock rate and handle wake up conditions.
@@ -91,4 +91,4 @@
mov lr, ip /* restore link */
#endif
mov pc, lr /* back to my caller */
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index ecb4e44..9ad1f03 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -37,8 +37,8 @@
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
-#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
- !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) && \
+ !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
bl cpu_init_crit
#endif
@@ -62,8 +62,8 @@
*************************************************************************
*/
-#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
- !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) && \
+ !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
cpu_init_crit:
mov ip, lr
@@ -76,4 +76,4 @@
mov lr, ip
mov pc, lr
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index e2b5f2b..cba4a1f 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -35,25 +35,11 @@
orr r0, r0, #0xd3
msr cpsr, r0
-#if defined(CONFIG_AT91RM9200DK)
- /*
- * relocate exception table
- */
- ldr r0, =_start
- ldr r1, =0x0
- mov r2, #16
-copyex:
- subs r2, r2, #1
- ldr r3, [r0], #4
- str r3, [r1], #4
- bne copyex
-#endif
-
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@@ -78,7 +64,7 @@
*/
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
cpu_init_crit:
/*
* flush v4 I/D caches
@@ -97,7 +83,7 @@
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
@@ -109,4 +95,4 @@
mov lr, ip
#endif
mov pc, lr
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 0a8985b..763d79e 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -23,7 +23,7 @@
DECLARE_GLOBAL_DATA_PTR;
static gd_t gdata __section(".data");
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
+#ifdef CONFIG_SPL_SERIAL
static struct bd_info bdata __section(".data");
#endif
@@ -108,7 +108,7 @@
static void mxs_spl_console_init(void)
{
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
+#ifdef CONFIG_SPL_SERIAL
gd->bd = &bdata;
gd->baudrate = CONFIG_BAUDRATE;
serial_init();
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index ff592ba..0afcc47 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -46,7 +46,7 @@
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@@ -69,7 +69,7 @@
*
*************************************************************************
*/
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
cpu_init_crit:
/*
* flush D cache before disabling it
@@ -100,7 +100,7 @@
#endif
mcr p15, 0, r0, c1, c0, 0
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* Go setup Memory and board specific bits prior to relocation.
*/
@@ -109,4 +109,4 @@
mov lr, r4 /* restore link */
#endif
mov pc, lr /* back to my caller */
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 0ec340b..2d51867 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -45,7 +45,7 @@
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@@ -70,7 +70,7 @@
*/
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
cpu_init_crit:
/*
* flush v4 I/D caches
@@ -89,7 +89,7 @@
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
mcr p15, 0, r0, c1, c0, 0
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* Go setup Memory and board specific bits prior to relocation.
*/
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 0e83e39..bfbd85a 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -17,7 +17,7 @@
obj-$(CONFIG_ARMV7_NONSEC) += exception_level.o
endif
-ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
+ifneq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),y)
obj-y += lowlevel_init.o
endif
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 747059b..f919d02 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -20,6 +20,7 @@
select SYS_FSL_SEC_LE
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
+ select SYS_I2C_MXC
imply CMD_PCI
imply SCSI
imply SCSI_AHCI
diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c
index 940995e..984ae8b 100644
--- a/arch/arm/cpu/armv7/ls102xa/clock.c
+++ b/arch/arm/cpu/armv7/ls102xa/clock.c
@@ -42,8 +42,8 @@
unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
sys_info->freq_systembus = sysclk;
-#ifdef CONFIG_DDR_CLK_FREQ
- sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
+ sys_info->freq_ddrbus = get_board_ddr_clk();
#else
sys_info->freq_ddrbus = sysclk;
#endif
diff --git a/arch/arm/cpu/armv7/ls102xa/spl.c b/arch/arm/cpu/armv7/ls102xa/spl.c
index 308536c..a194968 100644
--- a/arch/arm/cpu/armv7/ls102xa/spl.c
+++ b/arch/arm/cpu/armv7/ls102xa/spl.c
@@ -8,7 +8,7 @@
u32 spl_boot_device(void)
{
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
return BOOT_DEVICE_MMC1;
#endif
return BOOT_DEVICE_NAND;
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index dcb4195..698e15b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -39,6 +39,42 @@
/* Allow the board to save important registers */
b save_boot_params
save_boot_params_ret:
+#ifdef CONFIG_POSITION_INDEPENDENT
+ /*
+ * Fix .rela.dyn relocations. This allows U-Boot to loaded to and
+ * executed at a different address than it was linked at.
+ */
+pie_fixup:
+ adr r0, reset /* r0 <- Runtime value of reset label */
+ ldr r1, =reset /* r1 <- Linked value of reset label */
+ subs r4, r0, r1 /* r4 <- Runtime-vs-link offset */
+ beq pie_fixup_done
+
+ adr r0, pie_fixup
+ ldr r1, _rel_dyn_start_ofs
+ add r2, r0, r1 /* r2 <- Runtime &__rel_dyn_start */
+ ldr r1, _rel_dyn_end_ofs
+ add r3, r0, r1 /* r3 <- Runtime &__rel_dyn_end */
+
+pie_fix_loop:
+ ldr r0, [r2] /* r0 <- Link location */
+ ldr r1, [r2, #4] /* r1 <- fixup */
+ cmp r1, #23 /* relative fixup? */
+ bne pie_skip_reloc
+
+ /* relative fix: increase location by offset */
+ add r0, r4
+ ldr r1, [r0]
+ add r1, r4
+ str r1, [r0]
+ str r0, [r2]
+ add r2, #8
+pie_skip_reloc:
+ cmp r2, r3
+ blo pie_fix_loop
+pie_fixup_done:
+#endif
+
#ifdef CONFIG_ARMV7_LPAE
/*
* check for Hypervisor support
@@ -80,11 +116,11 @@
#endif
/* the mask ROM code should have PLL and others stable */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
#ifdef CONFIG_CPU_V7A
bl cpu_init_cp15
#endif
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
bl cpu_init_crit
#endif
#endif
@@ -320,8 +356,8 @@
mov pc, r5 @ back to my caller
ENDPROC(cpu_init_cp15)
-#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
- !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) && \
+ !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*************************************************************************
*
* CPU_init_critical registers
@@ -340,3 +376,10 @@
b lowlevel_init @ go setup pll,mux,memory
ENDPROC(cpu_init_crit)
#endif
+
+#if CONFIG_POSITION_INDEPENDENT
+_rel_dyn_start_ofs:
+ .word __rel_dyn_start - pie_fixup
+_rel_dyn_end_ofs:
+ .word __rel_dyn_end - pie_fixup
+#endif
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index b7a10a8..0a3fdfa 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -3,7 +3,6 @@
config ARMV8_SPL_EXCEPTION_VECTORS
bool "Install crash dump exception vectors"
depends on SPL
- default n
help
The default exception vector table is only used for the crash
dump, but still takes quite a lot of space in the image size.
@@ -128,7 +127,6 @@
config ARMV8_PSCI
bool "Enable PSCI support" if EXPERT
- default n
help
PSCI is Power State Coordination Interface defined by ARM.
The PSCI in U-boot provides a general framework and each platform
@@ -156,7 +154,6 @@
config ARMV8_EA_EL3_FIRST
bool "External aborts and SError interrupt exception are taken in EL3"
- default n
help
Exception handling at all exception levels for External Abort and
SError interrupt exception are taken in EL3.
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S
index e04907d..d1cee23 100644
--- a/arch/arm/cpu/armv8/cache.S
+++ b/arch/arm/cpu/armv8/cache.S
@@ -27,13 +27,11 @@
msr csselr_el1, x12 /* select cache level */
isb /* sync change of cssidr_el1 */
mrs x6, ccsidr_el1 /* read the new cssidr_el1 */
- and x2, x6, #7 /* x2 <- log2(cache line size)-4 */
+ ubfx x2, x6, #0, #3 /* x2 <- log2(cache line size)-4 */
+ ubfx x3, x6, #3, #10 /* x3 <- number of cache ways - 1 */
+ ubfx x4, x6, #13, #15 /* x4 <- number of cache sets - 1 */
add x2, x2, #4 /* x2 <- log2(cache line size) */
- mov x3, #0x3ff
- and x3, x3, x6, lsr #3 /* x3 <- max number of #ways */
clz w5, w3 /* bit position of #ways */
- mov x4, #0x7fff
- and x4, x4, x6, lsr #13 /* x4 <- max number of #sets */
/* x12 <- cache level << 1 */
/* x2 <- line length offset */
/* x3 <- number of cache ways - 1 */
@@ -72,8 +70,7 @@
mov x1, x0
dsb sy
mrs x10, clidr_el1 /* read clidr_el1 */
- lsr x11, x10, #24
- and x11, x11, #0x7 /* x11 <- loc */
+ ubfx x11, x10, #24, #3 /* x11 <- loc */
cbz x11, finished /* if loc is 0, exit */
mov x15, lr
mov x0, #0 /* start flush at cache level 0 */
@@ -83,8 +80,7 @@
/* x15 <- return address */
loop_level:
- lsl x12, x0, #1
- add x12, x12, x0 /* x0 <- tripled cache level */
+ add x12, x0, x0, lsl #1 /* x12 <- tripled cache level */
lsr x12, x10, x12
and x12, x12, #7 /* x12 <- cache type */
cmp x12, #2
@@ -131,8 +127,7 @@
.pushsection .text.__asm_flush_dcache_range, "ax"
ENTRY(__asm_flush_dcache_range)
mrs x3, ctr_el0
- lsr x3, x3, #16
- and x3, x3, #0xf
+ ubfx x3, x3, #16, #4
mov x2, #4
lsl x2, x2, x3 /* cache line size */
@@ -158,7 +153,7 @@
.pushsection .text.__asm_invalidate_dcache_range, "ax"
ENTRY(__asm_invalidate_dcache_range)
mrs x3, ctr_el0
- ubfm x3, x3, #16, #19
+ ubfx x3, x3, #16, #4
mov x2, #4
lsl x2, x2, x3 /* cache line size */
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9cef363..1e166c7 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -4,6 +4,8 @@
select ARM_ERRATA_855873 if !TFABOOT
select FSL_LAYERSCAPE
select FSL_LSCH2
+ select GICV2
+ select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE
@@ -25,6 +27,7 @@
select ARMV8_SET_SMPEN
select FSL_LAYERSCAPE
select FSL_LSCH3
+ select GICV3
select NXP_LSCH3_2
select SYS_FSL_HAS_CCI400
select SYS_FSL_SRDS_1
@@ -58,7 +61,9 @@
select ARM_ERRATA_855873 if !TFABOOT
select FSL_LAYERSCAPE
select FSL_LSCH2
+ select GICV2
select HAS_FSL_XHCI_USB if USB_HOST
+ select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
@@ -84,13 +89,16 @@
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
imply CMD_PCI
+ imply ID_EEPROM
config ARCH_LS1046A
bool
select ARMV8_SET_SMPEN
select FSL_LAYERSCAPE
select FSL_LSCH2
+ select GICV2
select HAS_FSL_XHCI_USB if USB_HOST
+ select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
@@ -117,8 +125,10 @@
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
+ imply ID_EEPROM
imply SCSI
imply SCSI_AHCI
+ imply SPL_SYS_I2C_LEGACY
config ARCH_LS1088A
bool
@@ -126,6 +136,8 @@
select ARM_ERRATA_855873 if !TFABOOT
select FSL_LAYERSCAPE
select FSL_LSCH3
+ select GICV3
+ select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
@@ -158,7 +170,9 @@
select SYS_I2C_MXC_I2C3 if !TFABOOT
select SYS_I2C_MXC_I2C4 if !TFABOOT
select RESV_RAM if GIC_V3_ITS
+ imply ID_EEPROM
imply SCSI
+ imply SPL_SYS_I2C_LEGACY
imply PANIC_HANG
config ARCH_LS2080A
@@ -170,6 +184,8 @@
select ARM_ERRATA_833471
select FSL_LAYERSCAPE
select FSL_LSCH3
+ select GICV3
+ select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
@@ -210,12 +226,15 @@
select SYS_I2C_MXC_I2C4 if !TFABOOT
select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
+ imply ID_EEPROM
imply PANIC_HANG
+ imply SPL_SYS_I2C_LEGACY
config ARCH_LX2162A
bool
select ARMV8_SET_SMPEN
select FSL_LSCH3
+ select GICV3
select NXP_LSCH3_2
select SYS_HAS_SERDES
select SYS_FSL_SRDS_1
@@ -242,11 +261,13 @@
imply PANIC_HANG
imply SCSI
imply SCSI_AHCI
+ imply SPL_SYS_I2C_LEGACY
config ARCH_LX2160A
bool
select ARMV8_SET_SMPEN
select FSL_LSCH3
+ select GICV3
select HAS_FSL_XHCI_USB if USB_HOST
select NXP_LSCH3_2
select SYS_HAS_SERDES
@@ -272,12 +293,15 @@
select SYS_I2C_MXC
select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
+ imply ID_EEPROM
imply PANIC_HANG
imply SCSI
imply SCSI_AHCI
+ imply SPL_SYS_I2C_LEGACY
config FSL_LSCH2
bool
+ select SKIP_LOWLEVEL_INIT
select SYS_FSL_HAS_CCI400
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_5
@@ -429,7 +453,6 @@
config FSPI_AHB_EN_4BYTE
bool "Enable 4-byte Fast Read command for AHB mode"
- default n
help
The default setting for FlexSPI AHB bus just supports 3-byte addressing.
But some FlexSPI flash sizes are up to 64MBytes.
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 63d34e1..3f97c8a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -61,8 +61,8 @@
#endif
cluster_clk = CONFIG_CLUSTER_CLK_FREQ;
-#ifdef CONFIG_DDR_CLK_FREQ
- sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
+ sys_info->freq_ddrbus = get_board_ddr_clk();
#else
sys_info->freq_ddrbus = sysclk;
#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
index 25a1c36..6f50cba 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
@@ -78,10 +78,10 @@
void *offset;
sys_info->freq_systembus = sysclk;
-#ifdef CONFIG_DDR_CLK_FREQ
- sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
+ sys_info->freq_ddrbus = get_board_ddr_clk();
#ifdef CONFIG_SYS_FSL_HAS_DP_DDR
- sys_info->freq_ddrbus2 = CONFIG_DDR_CLK_FREQ;
+ sys_info->freq_ddrbus2 = get_board_ddr_clk();
#endif
#else
sys_info->freq_ddrbus = sysclk;
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 42a0968..41f3e95 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -329,7 +329,7 @@
#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
static void erratum_a009203(void)
{
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
u8 __iomem *ptr;
#ifdef I2C1_BASE_ADDR
ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spintable.S b/arch/arm/cpu/armv8/fsl-layerscape/spintable.S
index 363ded0..d6bd188 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spintable.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spintable.S
@@ -93,7 +93,7 @@
4:
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
switch_el x7, _dead_loop, 0f, _dead_loop
-0: armv8_switch_to_el1_m x4, x6, x7
+0: armv8_switch_to_el1_m x4, x6, x7, x9
#else
switch_el x7, 0f, _dead_loop, _dead_loop
0: armv8_switch_to_el2_m x4, x6, x7
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 1d5e344..68111b6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -27,7 +27,7 @@
u32 spl_boot_device(void)
{
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
return BOOT_DEVICE_MMC1;
#endif
#ifdef CONFIG_SPL_NAND_SUPPORT
@@ -88,7 +88,7 @@
preloader_console_init();
spl_set_bd();
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
#ifdef CONFIG_SPL_I2C
i2c_init_all();
#endif
diff --git a/arch/arm/cpu/armv8/transition.S b/arch/arm/cpu/armv8/transition.S
index a31af4f..9dbdff3 100644
--- a/arch/arm/cpu/armv8/transition.S
+++ b/arch/arm/cpu/armv8/transition.S
@@ -40,7 +40,7 @@
* now, jump to the address saved in x4.
*/
br x4
-1: armv8_switch_to_el1_m x4, x5, x6
+1: armv8_switch_to_el1_m x4, x5, x6, x7
ENDPROC(armv8_switch_to_el1)
.popsection
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 575abac..896e05f 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -45,7 +45,7 @@
orr r0,r0,#0xd3
msr cpsr,r0
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@@ -92,7 +92,7 @@
*
*************************************************************************
*/
-#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) || defined(CONFIG_CPU_PXA25X)
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || defined(CONFIG_CPU_PXA25X)
cpu_init_crit:
/*
* flush v4 I/D caches
@@ -111,7 +111,7 @@
mcr p15, 0, r0, c1, c0, 0
mov pc, lr /* back to my caller */
-#endif /* !CONFIG_SKIP_LOWLEVEL_INIT || CONFIG_CPU_PXA25X */
+#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || CONFIG_CPU_PXA25X */
/*
* Enable MMU to use DCache as DRAM.
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 8eb0053..2f84f20 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -39,7 +39,7 @@
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@@ -95,7 +95,7 @@
ldr r1, cpuspeed
str r1, [r0, #PPCR]
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fc16a57..9e44817 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -929,7 +929,7 @@
dtb-$(CONFIG_RZA1) += \
r7s72100-gr-peach-u-boot.dtb
-dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
+dtb-$(CONFIG_ARCH_KEYSTONE) += keystone-k2hk-evm.dtb \
keystone-k2l-evm.dtb \
keystone-k2e-evm.dtb \
keystone-k2g-evm.dtb \
@@ -1120,6 +1120,8 @@
dtb-$(CONFIG_TARGET_GE_B1X5V2) += imx6dl-b1x5v2.dtb
dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb
+dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
+
dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb
dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
diff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts b/arch/arm/dts/at91-sama5d27_som1_ek.dts
index ee851a1..efd1a5d 100644
--- a/arch/arm/dts/at91-sama5d27_som1_ek.dts
+++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts
@@ -68,7 +68,7 @@
};
ahb {
- usb1: ohci@00400000 {
+ usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <&pioA 42 0>;
pinctrl-names = "default";
@@ -76,7 +76,7 @@
status = "okay";
};
- usb2: ehci@00500000 {
+ usb2: ehci@500000 {
status = "okay";
};
diff --git a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
index 347fa81..b45de97 100644
--- a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
+++ b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi
@@ -13,18 +13,35 @@
};
};
-&sdmmc0 {
+&pinctrl_mikrobus1_uart {
u-boot,dm-pre-reloc;
};
-&uart0 { /* mikrobus1 uart */
+&pinctrl_qspi1_sck_cs_default {
u-boot,dm-pre-reloc;
};
+&pinctrl_qspi1_dat_default {
+ u-boot,dm-pre-reloc;
+};
+
&pinctrl_sdmmc0_default {
u-boot,dm-pre-reloc;
};
-&pinctrl_mikrobus1_uart {
+&qspi1 {
u-boot,dm-pre-reloc;
+
+ flash@0 {
+ u-boot,dm-pre-reloc;
+ };
};
+
+&sdmmc0 {
+ u-boot,dm-pre-reloc;
+};
+
+&uart0 { /* mikrobus1 uart */
+ u-boot,dm-pre-reloc;
+};
+
diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts
index f81fa60..4452219 100644
--- a/arch/arm/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/dts/at91-sama5d2_icp.dts
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* at91-sama5d2_icp.dts - Device Tree file for SAMA5D2 ICP board
- * SAMA5D2 Industrial Connectivity Board
+ * SAMA5D2 Industrial Connectivity Platform
*
* Copyright (c) 2018, Microchip Technology Inc.
* 2018, Eugen Hristev <eugen.hristev@microchip.com>
@@ -33,10 +33,19 @@
};
apb {
- uart0: serial@f801c000 { /* mikrobus1 uart */
+
+ qspi1: spi@f0024000 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mikrobus1_uart>;
+ pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>;
status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <83000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
};
macb0: ethernet@f8008000 {
@@ -46,6 +55,12 @@
status = "okay";
};
+ uart0: serial@f801c000 { /* mikrobus1 uart */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mikrobus1_uart>;
+ status = "okay";
+ };
+
i2c1: i2c@fc028000 {
dmas = <0>, <0>;
pinctrl-names = "default";
@@ -70,6 +85,7 @@
pagesize = <16>;
};
};
+
pioA: gpio@fc038000 {
status = "okay";
pinctrl {
@@ -109,6 +125,26 @@
bias-pull-up;
};
+ pinctrl_mikrobus1_uart: mikrobus1_uart {
+ pinmux = <PIN_PB26__URXD0>,
+ <PIN_PB27__UTXD0>;
+ bias-disable;
+ };
+
+ pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
+ pinmux = <PIN_PA6__QSPI1_SCK>,
+ <PIN_PA11__QSPI1_CS>;
+ bias-disable;
+ };
+
+ pinctrl_qspi1_dat_default: qspi1_dat_default {
+ pinmux = <PIN_PA7__QSPI1_IO0>,
+ <PIN_PA8__QSPI1_IO1>,
+ <PIN_PA9__QSPI1_IO2>,
+ <PIN_PA10__QSPI1_IO3>;
+ bias-pull-up;
+ };
+
pinctrl_sdmmc0_default: sdmmc0_default {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA2__SDMMC0_DAT0>,
@@ -119,12 +155,6 @@
<PIN_PA13__SDMMC0_CD>;
bias-disable;
};
-
- pinctrl_mikrobus1_uart: mikrobus1_uart {
- pinmux = <PIN_PB26__URXD0>,
- <PIN_PB27__UTXD0>;
- bias-disable;
- };
};
};
};
diff --git a/arch/arm/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/dts/at91-sama5d2_ptc_ek.dts
index cd3711a..f45fb1e 100644
--- a/arch/arm/dts/at91-sama5d2_ptc_ek.dts
+++ b/arch/arm/dts/at91-sama5d2_ptc_ek.dts
@@ -76,7 +76,7 @@
status = "okay";
};
- usb1: ohci@00400000 {
+ usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioA PIN_PB12 GPIO_ACTIVE_HIGH
@@ -87,7 +87,7 @@
status = "okay";
};
- usb2: ehci@00500000 {
+ usb2: ehci@500000 {
status = "okay";
};
diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts b/arch/arm/dts/at91-sama5d2_xplained.dts
index b733c4d..34b64a2 100644
--- a/arch/arm/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/dts/at91-sama5d2_xplained.dts
@@ -12,6 +12,10 @@
stdout-path = &uart1;
};
+ memory {
+ reg = <0x20000000 0x20000000>;
+ };
+
onewire_tm: onewire {
gpios = <&pioA PIN_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@@ -25,7 +29,7 @@
};
ahb {
- usb1: ohci@00400000 {
+ usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <&pioA 42 0>;
pinctrl-names = "default";
@@ -33,7 +37,7 @@
status = "okay";
};
- usb2: ehci@00500000 {
+ usb2: ehci@500000 {
status = "okay";
};
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 007646f..e801331 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -50,6 +50,18 @@
};
};
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ARM9260_0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,arm926ej-s";
+ clocks = <&pmc PMC_TYPE_CORE 19>, <&pmc PMC_TYPE_CORE 11>, <&main_xtal>;
+ clock-names = "cpu", "master", "xtal";
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
index 77edd59..32ffe93 100644
--- a/arch/arm/dts/sam9x60ek.dts
+++ b/arch/arm/dts/sam9x60ek.dts
@@ -7,6 +7,7 @@
* Author: Sandeep Sheriker M <Sandeepsheriker.mallikarjun@microchip.com>
*/
/dts-v1/;
+#include <dt-bindings/mfd/atmel-flexcom.h>
#include "sam9x60.dtsi"
/ {
@@ -57,7 +58,7 @@
};
flx0: flexcom@f801c600 {
- atmel,flexcom-mode = <3>;
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
i2c@600 {
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 6fb2cb2..d8a125b 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -32,7 +32,7 @@
#size-cells = <1>;
u-boot,dm-pre-reloc;
- usb1: ohci@00400000 {
+ usb1: ohci@400000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00400000 0x100000>;
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
@@ -40,7 +40,7 @@
status = "disabled";
};
- usb2: ehci@00500000 {
+ usb2: ehci@500000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00500000 0x100000>;
clocks = <&utmi>, <&uhphs_clk>;
diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts
index 3a4fdd3..1c59a8a 100644
--- a/arch/arm/dts/sama7g5ek.dts
+++ b/arch/arm/dts/sama7g5ek.dts
@@ -8,6 +8,7 @@
* 2020, Claudiu Beznea <claudiu.beznea@microchip.com>
*/
/dts-v1/;
+#include <dt-bindings/mfd/atmel-flexcom.h>
#include "sama7g5.dtsi"
#include "sama7g5-pinfunc.h"
@@ -64,7 +65,7 @@
};
&flx1 {
- atmel,flexcom-mode = <3>;
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
};
diff --git a/arch/arm/dts/ste-ab8500.dtsi b/arch/arm/dts/ste-ab8500.dtsi
index 14d4d86..dcc4a60 100644
--- a/arch/arm/dts/ste-ab8500.dtsi
+++ b/arch/arm/dts/ste-ab8500.dtsi
@@ -42,15 +42,15 @@
ab8500-rtc {
compatible = "stericsson,ab8500-rtc";
- interrupts = <17 IRQ_TYPE_LEVEL_HIGH
- 18 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
+ <18 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "60S", "ALARM";
};
gpadc: ab8500-gpadc {
compatible = "stericsson,ab8500-gpadc";
- interrupts = <32 IRQ_TYPE_LEVEL_HIGH
- 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <32 IRQ_TYPE_LEVEL_HIGH>,
+ <39 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "HW_CONV_END", "SW_CONV_END";
vddadc-supply = <&ab8500_ldo_tvout_reg>;
#address-cells = <1>;
@@ -122,9 +122,11 @@
ab8500_temp {
compatible = "stericsson,abx500-temp";
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ABX500_TEMP_WARM";
io-channels = <&gpadc 0x06>,
<&gpadc 0x07>;
- io-channel-name = "aux1", "aux2";
+ io-channel-names = "aux1", "aux2";
};
ab8500_battery: ab8500_battery {
@@ -134,29 +136,77 @@
ab8500_fg {
compatible = "stericsson,ab8500-fg";
- battery = <&ab8500_battery>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
+ <8 IRQ_TYPE_LEVEL_HIGH>,
+ <28 IRQ_TYPE_LEVEL_HIGH>,
+ <27 IRQ_TYPE_LEVEL_HIGH>,
+ <26 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "NCONV_ACCU",
+ "BATT_OVV",
+ "LOW_BAT_F",
+ "CC_INT_CALIB",
+ "CCEOC";
+ battery = <&ab8500_battery>;
io-channels = <&gpadc 0x08>;
- io-channel-name = "main_bat_v";
+ io-channel-names = "main_bat_v";
};
ab8500_btemp {
compatible = "stericsson,ab8500-btemp";
- battery = <&ab8500_battery>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH>,
+ <80 IRQ_TYPE_LEVEL_HIGH>,
+ <83 IRQ_TYPE_LEVEL_HIGH>,
+ <81 IRQ_TYPE_LEVEL_HIGH>,
+ <82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "BAT_CTRL_INDB",
+ "BTEMP_LOW",
+ "BTEMP_HIGH",
+ "BTEMP_LOW_MEDIUM",
+ "BTEMP_MEDIUM_HIGH";
+ battery = <&ab8500_battery>;
io-channels = <&gpadc 0x02>,
<&gpadc 0x01>;
- io-channel-name = "btemp_ball",
+ io-channel-names = "btemp_ball",
"bat_ctrl";
};
ab8500_charger {
- compatible = "stericsson,ab8500-charger";
+ compatible = "stericsson,ab8500-charger";
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
+ <11 IRQ_TYPE_LEVEL_HIGH>,
+ <0 IRQ_TYPE_LEVEL_HIGH>,
+ <107 IRQ_TYPE_LEVEL_HIGH>,
+ <106 IRQ_TYPE_LEVEL_HIGH>,
+ <14 IRQ_TYPE_LEVEL_HIGH>,
+ <15 IRQ_TYPE_LEVEL_HIGH>,
+ <79 IRQ_TYPE_LEVEL_HIGH>,
+ <105 IRQ_TYPE_LEVEL_HIGH>,
+ <104 IRQ_TYPE_LEVEL_HIGH>,
+ <89 IRQ_TYPE_LEVEL_HIGH>,
+ <22 IRQ_TYPE_LEVEL_HIGH>,
+ <21 IRQ_TYPE_LEVEL_HIGH>,
+ <16 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "MAIN_CH_UNPLUG_DET",
+ "MAIN_CHARGE_PLUG_DET",
+ "MAIN_EXT_CH_NOT_OK",
+ "MAIN_CH_TH_PROT_R",
+ "MAIN_CH_TH_PROT_F",
+ "VBUS_DET_F",
+ "VBUS_DET_R",
+ "USB_LINK_STATUS",
+ "USB_CH_TH_PROT_R",
+ "USB_CH_TH_PROT_F",
+ "USB_CHARGER_NOT_OKR",
+ "VBUS_OVV",
+ "CH_WD_EXP",
+ "VBUS_CH_DROP_END";
battery = <&ab8500_battery>;
vddadc-supply = <&ab8500_ldo_tvout_reg>;
io-channels = <&gpadc 0x03>,
<&gpadc 0x0a>,
<&gpadc 0x09>,
<&gpadc 0x0b>;
- io-channel-name = "main_charger_v",
+ io-channel-names = "main_charger_v",
"main_charger_c",
"vbus_v",
"usb_charger_c";
@@ -167,15 +217,15 @@
battery = <&ab8500_battery>;
};
- ab8500_usb {
+ ab8500_usb: ab8500_usb {
compatible = "stericsson,ab8500-usb";
- interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
- 96 IRQ_TYPE_LEVEL_HIGH
- 14 IRQ_TYPE_LEVEL_HIGH
- 15 IRQ_TYPE_LEVEL_HIGH
- 79 IRQ_TYPE_LEVEL_HIGH
- 74 IRQ_TYPE_LEVEL_HIGH
- 75 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <90 IRQ_TYPE_LEVEL_HIGH>,
+ <96 IRQ_TYPE_LEVEL_HIGH>,
+ <14 IRQ_TYPE_LEVEL_HIGH>,
+ <15 IRQ_TYPE_LEVEL_HIGH>,
+ <79 IRQ_TYPE_LEVEL_HIGH>,
+ <74 IRQ_TYPE_LEVEL_HIGH>,
+ <75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ID_WAKEUP_R",
"ID_WAKEUP_F",
"VBUS_DET_F",
@@ -188,12 +238,13 @@
musb_1v8-supply = <&db8500_vsmps2_reg>;
clocks = <&prcmu_clk PRCMU_SYSCLK>;
clock-names = "sysclk";
+ #phy-cells = <0>;
};
ab8500-ponkey {
compatible = "stericsson,ab8500-poweron-key";
- interrupts = <6 IRQ_TYPE_LEVEL_HIGH
- 7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>,
+ <7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
};
@@ -201,12 +252,24 @@
compatible = "stericsson,ab8500-sysctrl";
};
+ ab8500-pwm-1 {
+ compatible = "stericsson,ab8500-pwm";
+ clocks = <&ab8500_clock AB8500_SYSCLK_INT>;
+ clock-names = "intclk";
+ };
+
- ab8500-pwm {
+ ab8500-pwm-2 {
compatible = "stericsson,ab8500-pwm";
clocks = <&ab8500_clock AB8500_SYSCLK_INT>;
clock-names = "intclk";
};
+ ab8500-pwm-3 {
+ compatible = "stericsson,ab8500-pwm";
+ clocks = <&ab8500_clock AB8500_SYSCLK_INT>;
+ clock-names = "intclk";
+ };
+
ab8500-debugfs {
compatible = "stericsson,ab8500-debug";
};
@@ -255,8 +318,8 @@
// supplies to the display/camera
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2900000>;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <3300000>;
regulator-boot-on;
/* BUG: If turned off MMC will be affected. */
regulator-always-on;
@@ -324,5 +387,10 @@
vana-supply = <&ab8500_ldo_ana_reg>;
};
};
+
+ usb_per5@a03e0000 {
+ phys = <&ab8500_usb>;
+ phy-names = "usb";
+ };
};
};
diff --git a/arch/arm/dts/ste-ab8505.dtsi b/arch/arm/dts/ste-ab8505.dtsi
index c72aa25..a1197fd 100644
--- a/arch/arm/dts/ste-ab8505.dtsi
+++ b/arch/arm/dts/ste-ab8505.dtsi
@@ -13,7 +13,8 @@
<&gpadc 0x08>, /* Main battery voltage */
<&gpadc 0x09>, /* VBUS */
<&gpadc 0x0b>, /* Charger current */
- <&gpadc 0x0c>; /* Backup battery voltage */
+ <&gpadc 0x0c>, /* Backup battery voltage */
+ <&gpadc 0x0d>; /* Die temperature */
};
soc {
@@ -38,16 +39,15 @@
ab8500-rtc {
compatible = "stericsson,ab8500-rtc";
- interrupts = <17 IRQ_TYPE_LEVEL_HIGH
- 18 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
+ <18 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "60S", "ALARM";
};
gpadc: ab8500-gpadc {
compatible = "stericsson,ab8500-gpadc";
- interrupts = <32 IRQ_TYPE_LEVEL_HIGH
- 39 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "HW_CONV_END", "SW_CONV_END";
+ interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "SW_CONV_END";
vddadc-supply = <&ab8500_ldo_adc_reg>;
#address-cells = <1>;
#size-cells = <0>;
@@ -84,42 +84,93 @@
bk_bat_v: channel@0c {
reg = <0x0c>;
};
+ die_temp: channel@0d {
+ reg = <0x0d>;
+ };
usb_id: channel@0e {
reg = <0x0e>;
};
};
ab8500_battery: ab8500_battery {
- status = "disabled";
+ stericsson,battery-type = "LIPO";
thermistor-on-batctrl;
};
ab8500_fg {
status = "disabled";
compatible = "stericsson,ab8500-fg";
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
+ <8 IRQ_TYPE_LEVEL_HIGH>,
+ <28 IRQ_TYPE_LEVEL_HIGH>,
+ <27 IRQ_TYPE_LEVEL_HIGH>,
+ <26 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "NCONV_ACCU",
+ "BATT_OVV",
+ "LOW_BAT_F",
+ "CC_INT_CALIB",
+ "CCEOC";
battery = <&ab8500_battery>;
io-channels = <&gpadc 0x08>;
- io-channel-name = "main_bat_v";
+ io-channel-names = "main_bat_v";
};
ab8500_btemp {
status = "disabled";
compatible = "stericsson,ab8500-btemp";
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH>,
+ <80 IRQ_TYPE_LEVEL_HIGH>,
+ <83 IRQ_TYPE_LEVEL_HIGH>,
+ <81 IRQ_TYPE_LEVEL_HIGH>,
+ <82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "BAT_CTRL_INDB",
+ "BTEMP_LOW",
+ "BTEMP_HIGH",
+ "BTEMP_LOW_MEDIUM",
+ "BTEMP_MEDIUM_HIGH";
battery = <&ab8500_battery>;
io-channels = <&gpadc 0x02>,
<&gpadc 0x01>;
- io-channel-name = "btemp_ball",
+ io-channel-names = "btemp_ball",
"bat_ctrl";
};
ab8500_charger {
status = "disabled";
compatible = "stericsson,ab8500-charger";
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
+ <11 IRQ_TYPE_LEVEL_HIGH>,
+ <0 IRQ_TYPE_LEVEL_HIGH>,
+ <107 IRQ_TYPE_LEVEL_HIGH>,
+ <106 IRQ_TYPE_LEVEL_HIGH>,
+ <14 IRQ_TYPE_LEVEL_HIGH>,
+ <15 IRQ_TYPE_LEVEL_HIGH>,
+ <79 IRQ_TYPE_LEVEL_HIGH>,
+ <105 IRQ_TYPE_LEVEL_HIGH>,
+ <104 IRQ_TYPE_LEVEL_HIGH>,
+ <89 IRQ_TYPE_LEVEL_HIGH>,
+ <22 IRQ_TYPE_LEVEL_HIGH>,
+ <21 IRQ_TYPE_LEVEL_HIGH>,
+ <16 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "MAIN_CH_UNPLUG_DET",
+ "MAIN_CHARGE_PLUG_DET",
+ "MAIN_EXT_CH_NOT_OK",
+ "MAIN_CH_TH_PROT_R",
+ "MAIN_CH_TH_PROT_F",
+ "VBUS_DET_F",
+ "VBUS_DET_R",
+ "USB_LINK_STATUS",
+ "USB_CH_TH_PROT_R",
+ "USB_CH_TH_PROT_F",
+ "USB_CHARGER_NOT_OKR",
+ "VBUS_OVV",
+ "CH_WD_EXP",
+ "VBUS_CH_DROP_END";
battery = <&ab8500_battery>;
vddadc-supply = <&ab8500_ldo_adc_reg>;
io-channels = <&gpadc 0x09>,
<&gpadc 0x0b>;
- io-channel-name = "vbus_v",
+ io-channel-names = "vbus_v",
"usb_charger_c";
};
@@ -131,13 +182,13 @@
ab8500_usb: ab8500_usb {
compatible = "stericsson,ab8500-usb";
- interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
- 96 IRQ_TYPE_LEVEL_HIGH
- 14 IRQ_TYPE_LEVEL_HIGH
- 15 IRQ_TYPE_LEVEL_HIGH
- 79 IRQ_TYPE_LEVEL_HIGH
- 74 IRQ_TYPE_LEVEL_HIGH
- 75 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <90 IRQ_TYPE_LEVEL_HIGH>,
+ <96 IRQ_TYPE_LEVEL_HIGH>,
+ <14 IRQ_TYPE_LEVEL_HIGH>,
+ <15 IRQ_TYPE_LEVEL_HIGH>,
+ <79 IRQ_TYPE_LEVEL_HIGH>,
+ <74 IRQ_TYPE_LEVEL_HIGH>,
+ <75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ID_WAKEUP_R",
"ID_WAKEUP_F",
"VBUS_DET_F",
@@ -150,12 +201,13 @@
musb_1v8-supply = <&db8500_vsmps2_reg>;
clocks = <&prcmu_clk PRCMU_SYSCLK>;
clock-names = "sysclk";
+ #phy-cells = <0>;
};
ab8500-ponkey {
compatible = "stericsson,ab8500-poweron-key";
- interrupts = <6 IRQ_TYPE_LEVEL_HIGH
- 7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>,
+ <7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
};
@@ -271,5 +323,10 @@
vana-supply = <&ab8500_ldo_ana_reg>;
};
};
+
+ usb_per5@a03e0000 {
+ phys = <&ab8500_usb>;
+ phy-names = "usb";
+ };
};
};
diff --git a/arch/arm/dts/ste-dbx5x0-u-boot.dtsi b/arch/arm/dts/ste-dbx5x0-u-boot.dtsi
index 4a99ee5..e350175 100644
--- a/arch/arm/dts/ste-dbx5x0-u-boot.dtsi
+++ b/arch/arm/dts/ste-dbx5x0-u-boot.dtsi
@@ -4,8 +4,14 @@
#include "ste-dbx5x0.dtsi"
/ {
+ /* FIXME: Remove this when clk driver is implemented */
+ sdmmcclk: sdmmcclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+
soc {
- /* FIXME: Remove this when clk driver is implemented */
mtu@a03c6000 {
clock-frequency = <133000000>;
};
@@ -18,6 +24,9 @@
uart@80007000 {
clock = <38400000>;
};
+ mmc@80005000 {
+ clocks = <&sdmmcclk>;
+ };
};
reboot {
diff --git a/arch/arm/dts/ste-dbx5x0.dtsi b/arch/arm/dts/ste-dbx5x0.dtsi
index 6671f74..68607e4 100644
--- a/arch/arm/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/dts/ste-dbx5x0.dtsi
@@ -260,7 +260,7 @@
reg = <0x80150000 0x2000>;
};
- L2: l2-cache {
+ L2: cache-controller {
compatible = "arm,pl310-cache";
reg = <0xa0412000 0x1000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
@@ -883,7 +883,7 @@
status = "disabled";
};
- sdi0_per1@80126000 {
+ mmc@80126000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80126000 0x1000>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
@@ -899,7 +899,7 @@
status = "disabled";
};
- sdi1_per2@80118000 {
+ mmc@80118000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80118000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
@@ -915,7 +915,7 @@
status = "disabled";
};
- sdi2_per3@80005000 {
+ mmc@80005000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80005000 0x1000>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
@@ -931,7 +931,7 @@
status = "disabled";
};
- sdi3_per2@80119000 {
+ mmc@80119000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80119000 0x1000>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
@@ -947,7 +947,7 @@
status = "disabled";
};
- sdi4_per2@80114000 {
+ mmc@80114000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80114000 0x1000>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
@@ -963,7 +963,7 @@
status = "disabled";
};
- sdi5_per3@80008000 {
+ mmc@80008000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80008000 0x1000>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/ste-ux500-samsung-stemmy.dts b/arch/arm/dts/ste-ux500-samsung-stemmy.dts
index 7e7f4c8..14be860 100644
--- a/arch/arm/dts/ste-ux500-samsung-stemmy.dts
+++ b/arch/arm/dts/ste-ux500-samsung-stemmy.dts
@@ -12,9 +12,25 @@
};
soc {
+ /* eMMC */
+ mmc@80005000 {
+ status = "okay";
+
+ arm,primecell-periphid = <0x10480180>;
+ max-frequency = <100000000>;
+ bus-width = <8>;
+
+ non-removable;
+ cap-mmc-highspeed;
+ };
+
/* Debugging console UART */
uart@80007000 {
status = "okay";
};
+
+ mcde@a0350000 {
+ status = "okay";
+ };
};
};
diff --git a/arch/arm/dts/vexpress-v2m.dtsi b/arch/arm/dts/vexpress-v2m.dtsi
new file mode 100644
index 0000000..cc80146
--- /dev/null
+++ b/arch/arm/dts/vexpress-v2m.dtsi
@@ -0,0 +1,427 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ARM Ltd. Versatile Express
+ *
+ * Motherboard Express uATX
+ * V2M-P1
+ *
+ * HBI-0190D
+ *
+ * Original memory map ("Legacy memory map" in the board's
+ * Technical Reference Manual)
+ *
+ * WARNING! The hardware described in this file is independent from the
+ * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
+ * correspondence between the two configurations.
+ *
+ * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
+ * CHANGES TO vexpress-v2m-rs1.dtsi!
+ */
+
+/ {
+ smb@4000000 {
+ motherboard {
+ model = "V2M-P1";
+ arm,hbi = <0x190>;
+ arm,vexpress,site = <0>;
+ compatible = "arm,vexpress,v2m-p1", "simple-bus";
+ #address-cells = <2>; /* SMB chipselect number and offset */
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+
+ flash@0,00000000 {
+ compatible = "arm,vexpress-flash", "cfi-flash";
+ reg = <0 0x00000000 0x04000000>,
+ <1 0x00000000 0x04000000>;
+ bank-width = <4>;
+ };
+
+ psram@2,00000000 {
+ compatible = "arm,vexpress-psram", "mtd-ram";
+ reg = <2 0x00000000 0x02000000>;
+ bank-width = <4>;
+ };
+
+ ethernet@3,02000000 {
+ compatible = "smsc,lan9118", "smsc,lan9115";
+ reg = <3 0x02000000 0x10000>;
+ interrupts = <15>;
+ phy-mode = "mii";
+ reg-io-width = <4>;
+ smsc,irq-active-high;
+ smsc,irq-push-pull;
+ vdd33a-supply = <&v2m_fixed_3v3>;
+ vddvario-supply = <&v2m_fixed_3v3>;
+ };
+
+ usb@3,03000000 {
+ compatible = "nxp,usb-isp1761";
+ reg = <3 0x03000000 0x20000>;
+ interrupts = <16>;
+ port1-otg;
+ };
+
+ iofpga@7,00000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 7 0 0x20000>;
+
+ v2m_sysreg: sysreg@0 {
+ compatible = "arm,vexpress-sysreg";
+ reg = <0x00000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x1000>;
+
+ v2m_led_gpios: gpio@8 {
+ compatible = "arm,vexpress-sysreg,sys_led";
+ reg = <0x008 4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ v2m_mmc_gpios: gpio@48 {
+ compatible = "arm,vexpress-sysreg,sys_mci";
+ reg = <0x048 4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ v2m_flash_gpios: gpio@4c {
+ compatible = "arm,vexpress-sysreg,sys_flash";
+ reg = <0x04c 4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ v2m_sysctl: sysctl@1000 {
+ compatible = "arm,sp810", "arm,primecell";
+ reg = <0x01000 0x1000>;
+ clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
+ clock-names = "refclk", "timclk", "apb_pclk";
+ #clock-cells = <1>;
+ clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
+ assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
+ assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
+ };
+
+ /* PCI-E I2C bus */
+ v2m_i2c_pcie: i2c@2000 {
+ compatible = "arm,versatile-i2c";
+ reg = <0x02000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pcie-switch@60 {
+ compatible = "idt,89hpes32h8";
+ reg = <0x60>;
+ };
+ };
+
+ aaci@4000 {
+ compatible = "arm,pl041", "arm,primecell";
+ reg = <0x04000 0x1000>;
+ interrupts = <11>;
+ clocks = <&smbclk>;
+ clock-names = "apb_pclk";
+ };
+
+ mmc0: mmci@5000 {
+ compatible = "arm,pl180", "arm,primecell";
+ reg = <0x05000 0x1000>;
+ interrupts = <9>, <10>;
+ cd-gpios = <&v2m_mmc_gpios 0 0>;
+ wp-gpios = <&v2m_mmc_gpios 1 0>;
+ max-frequency = <12000000>;
+ vmmc-supply = <&v2m_fixed_3v3>;
+ clocks = <&v2m_clk24mhz>, <&smbclk>;
+ clock-names = "mclk", "apb_pclk";
+ };
+
+ v2m_serial0: uart@9000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x09000 0x1000>;
+ interrupts = <5>;
+ clocks = <&v2m_oscclk2>, <&smbclk>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+
+ v2m_serial1: uart@a000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0a000 0x1000>;
+ interrupts = <6>;
+ clocks = <&v2m_oscclk2>, <&smbclk>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+
+ v2m_serial2: uart@b000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0b000 0x1000>;
+ interrupts = <7>;
+ clocks = <&v2m_oscclk2>, <&smbclk>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+
+ v2m_serial3: uart@c000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0c000 0x1000>;
+ interrupts = <8>;
+ clocks = <&v2m_oscclk2>, <&smbclk>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+
+ v2m_timer01: timer@11000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x11000 0x1000>;
+ interrupts = <2>;
+ clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
+ clock-names = "timclken1", "timclken2", "apb_pclk";
+ };
+
+ v2m_timer23: timer@12000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <3>;
+ clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>;
+ clock-names = "timclken1", "timclken2", "apb_pclk";
+ };
+
+ /* DVI I2C bus */
+ v2m_i2c_dvi: i2c@16000 {
+ compatible = "arm,versatile-i2c";
+ reg = <0x16000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dvi-transmitter@39 {
+ compatible = "sil,sii9022-tpi", "sil,sii9022";
+ reg = <0x39>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /*
+ * Both the core tile and the motherboard routes their output
+ * pads to this transmitter. The motherboard system controller
+ * can select one of them as input using a mux register in
+ * "arm,vexpress-muxfpga". The Vexpress with the CA9 core tile is
+ * the only platform with this specific set-up.
+ */
+ port@0 {
+ reg = <0>;
+ dvi_bridge_in_ct: endpoint {
+ remote-endpoint = <&clcd_pads_ct>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ dvi_bridge_in_mb: endpoint {
+ remote-endpoint = <&clcd_pads_mb>;
+ };
+ };
+ };
+ };
+
+ dvi-transmitter@60 {
+ compatible = "sil,sii9022-cpi", "sil,sii9022";
+ reg = <0x60>;
+ };
+ };
+
+ rtc@17000 {
+ compatible = "arm,pl031", "arm,primecell";
+ reg = <0x17000 0x1000>;
+ interrupts = <4>;
+ clocks = <&smbclk>;
+ clock-names = "apb_pclk";
+ };
+
+ compact-flash@1a000 {
+ compatible = "arm,vexpress-cf", "ata-generic";
+ reg = <0x1a000 0x100
+ 0x1a100 0xf00>;
+ reg-shift = <2>;
+ };
+
+
+ clcd@1f000 {
+ compatible = "arm,pl111", "arm,primecell";
+ reg = <0x1f000 0x1000>;
+ interrupt-names = "combined";
+ interrupts = <14>;
+ clocks = <&v2m_oscclk1>, <&smbclk>;
+ clock-names = "clcdclk", "apb_pclk";
+ /* 800x600 16bpp @36MHz works fine */
+ max-memory-bandwidth = <54000000>;
+ memory-region = <&vram>;
+
+ port {
+ clcd_pads_mb: endpoint {
+ remote-endpoint = <&dvi_bridge_in_mb>;
+ arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+ };
+ };
+ };
+ };
+
+ v2m_fixed_3v3: fixed-regulator-0 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ v2m_clk24mhz: clk24mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ clock-output-names = "v2m:clk24mhz";
+ };
+
+ v2m_refclk1mhz: refclk1mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1000000>;
+ clock-output-names = "v2m:refclk1mhz";
+ };
+
+ v2m_refclk32khz: refclk32khz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "v2m:refclk32khz";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ user1 {
+ label = "v2m:green:user1";
+ gpios = <&v2m_led_gpios 0 0>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ user2 {
+ label = "v2m:green:user2";
+ gpios = <&v2m_led_gpios 1 0>;
+ linux,default-trigger = "mmc0";
+ };
+
+ user3 {
+ label = "v2m:green:user3";
+ gpios = <&v2m_led_gpios 2 0>;
+ linux,default-trigger = "cpu0";
+ };
+
+ user4 {
+ label = "v2m:green:user4";
+ gpios = <&v2m_led_gpios 3 0>;
+ linux,default-trigger = "cpu1";
+ };
+
+ user5 {
+ label = "v2m:green:user5";
+ gpios = <&v2m_led_gpios 4 0>;
+ linux,default-trigger = "cpu2";
+ };
+
+ user6 {
+ label = "v2m:green:user6";
+ gpios = <&v2m_led_gpios 5 0>;
+ linux,default-trigger = "cpu3";
+ };
+
+ user7 {
+ label = "v2m:green:user7";
+ gpios = <&v2m_led_gpios 6 0>;
+ linux,default-trigger = "cpu4";
+ };
+
+ user8 {
+ label = "v2m:green:user8";
+ gpios = <&v2m_led_gpios 7 0>;
+ linux,default-trigger = "cpu5";
+ };
+ };
+
+ mcc {
+ compatible = "arm,vexpress,config-bus";
+ arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+ oscclk0 {
+ /* MCC static memory clock */
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 0>;
+ freq-range = <25000000 60000000>;
+ #clock-cells = <0>;
+ clock-output-names = "v2m:oscclk0";
+ };
+
+ v2m_oscclk1: oscclk1 {
+ /* CLCD clock */
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 1>;
+ freq-range = <23750000 65000000>;
+ #clock-cells = <0>;
+ clock-output-names = "v2m:oscclk1";
+ };
+
+ v2m_oscclk2: oscclk2 {
+ /* IO FPGA peripheral clock */
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 2>;
+ freq-range = <24000000 24000000>;
+ #clock-cells = <0>;
+ clock-output-names = "v2m:oscclk2";
+ };
+
+ volt-vio {
+ /* Logic level voltage */
+ compatible = "arm,vexpress-volt";
+ arm,vexpress-sysreg,func = <2 0>;
+ regulator-name = "VIO";
+ regulator-always-on;
+ label = "VIO";
+ };
+
+ temp-mcc {
+ /* MCC internal operating temperature */
+ compatible = "arm,vexpress-temp";
+ arm,vexpress-sysreg,func = <4 0>;
+ label = "MCC";
+ };
+
+ reset {
+ compatible = "arm,vexpress-reset";
+ arm,vexpress-sysreg,func = <5 0>;
+ };
+
+ muxfpga {
+ compatible = "arm,vexpress-muxfpga";
+ arm,vexpress-sysreg,func = <7 0>;
+ };
+
+ shutdown {
+ compatible = "arm,vexpress-shutdown";
+ arm,vexpress-sysreg,func = <8 0>;
+ };
+
+ reboot {
+ compatible = "arm,vexpress-reboot";
+ arm,vexpress-sysreg,func = <9 0>;
+ };
+
+ dvimode {
+ compatible = "arm,vexpress-dvimode";
+ arm,vexpress-sysreg,func = <11 0>;
+ };
+ };
+ };
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/dts/vexpress-v2p-ca9.dts b/arch/arm/dts/vexpress-v2p-ca9.dts
new file mode 100644
index 0000000..bf00c62
--- /dev/null
+++ b/arch/arm/dts/vexpress-v2p-ca9.dts
@@ -0,0 +1,369 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ARM Ltd. Versatile Express
+ *
+ * CoreTile Express A9x4
+ * Cortex-A9 MPCore (V2P-CA9)
+ *
+ * HBI-0191B
+ */
+
+/dts-v1/;
+#include "vexpress-v2m.dtsi"
+
+/ {
+ model = "V2P-CA9";
+ arm,hbi = <0x191>;
+ arm,vexpress,site = <0xf>;
+ compatible = "arm,vexpress,v2p-ca9", "arm,vexpress";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen { };
+
+ aliases {
+ serial0 = &v2m_serial0;
+ serial1 = &v2m_serial1;
+ serial2 = &v2m_serial2;
+ serial3 = &v2m_serial3;
+ i2c0 = &v2m_i2c_dvi;
+ i2c1 = &v2m_i2c_pcie;
+ mmc0 = &mmc0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ A9_0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ next-level-cache = <&L2>;
+ };
+
+ A9_1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ next-level-cache = <&L2>;
+ };
+
+ A9_2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <2>;
+ next-level-cache = <&L2>;
+ };
+
+ A9_3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <3>;
+ next-level-cache = <&L2>;
+ };
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ /* Chipselect 3 is physically at 0x4c000000 */
+ vram: vram@4c000000 {
+ /* 8 MB of designated video RAM */
+ compatible = "shared-dma-pool";
+ reg = <0x4c000000 0x00800000>;
+ no-map;
+ };
+ };
+
+ clcd@10020000 {
+ compatible = "arm,pl111", "arm,primecell";
+ reg = <0x10020000 0x1000>;
+ interrupt-names = "combined";
+ interrupts = <0 44 4>;
+ clocks = <&oscclk1>, <&oscclk2>;
+ clock-names = "clcdclk", "apb_pclk";
+ /* 1024x768 16bpp @65MHz */
+ max-memory-bandwidth = <95000000>;
+
+ port {
+ clcd_pads_ct: endpoint {
+ remote-endpoint = <&dvi_bridge_in_ct>;
+ arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+ };
+ };
+ };
+
+ memory-controller@100e0000 {
+ compatible = "arm,pl341", "arm,primecell";
+ reg = <0x100e0000 0x1000>;
+ clocks = <&oscclk2>;
+ clock-names = "apb_pclk";
+ };
+
+ memory-controller@100e1000 {
+ compatible = "arm,pl354", "arm,primecell";
+ reg = <0x100e1000 0x1000>;
+ interrupts = <0 45 4>,
+ <0 46 4>;
+ clocks = <&oscclk2>;
+ clock-names = "apb_pclk";
+ };
+
+ timer@100e4000 {
+ compatible = "arm,sp804", "arm,primecell";
+ reg = <0x100e4000 0x1000>;
+ interrupts = <0 48 4>,
+ <0 49 4>;
+ clocks = <&oscclk2>, <&oscclk2>;
+ clock-names = "timclk", "apb_pclk";
+ status = "disabled";
+ };
+
+ watchdog@100e5000 {
+ compatible = "arm,sp805", "arm,primecell";
+ reg = <0x100e5000 0x1000>;
+ interrupts = <0 51 4>;
+ clocks = <&oscclk2>, <&oscclk2>;
+ clock-names = "wdogclk", "apb_pclk";
+ };
+
+ scu@1e000000 {
+ compatible = "arm,cortex-a9-scu";
+ reg = <0x1e000000 0x58>;
+ };
+
+ timer@1e000600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0x1e000600 0x20>;
+ interrupts = <1 13 0xf04>;
+ };
+
+ watchdog@1e000620 {
+ compatible = "arm,cortex-a9-twd-wdt";
+ reg = <0x1e000620 0x20>;
+ interrupts = <1 14 0xf04>;
+ };
+
+ gic: interrupt-controller@1e001000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1e001000 0x1000>,
+ <0x1e000100 0x100>;
+ };
+
+ L2: cache-controller@1e00a000 {
+ compatible = "arm,pl310-cache";
+ reg = <0x1e00a000 0x1000>;
+ interrupts = <0 43 4>;
+ cache-unified;
+ cache-level = <2>;
+ arm,data-latency = <1 1 1>;
+ arm,tag-latency = <1 1 1>;
+ };
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts = <0 60 4>,
+ <0 61 4>,
+ <0 62 4>,
+ <0 63 4>;
+ interrupt-affinity = <&A9_0>, <&A9_1>, <&A9_2>, <&A9_3>;
+
+ };
+
+ dcc {
+ compatible = "arm,vexpress,config-bus";
+ arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+ oscclk0: extsaxiclk {
+ /* ACLK clock to the AXI master port on the test chip */
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 0>;
+ freq-range = <30000000 50000000>;
+ #clock-cells = <0>;
+ clock-output-names = "extsaxiclk";
+ };
+
+ oscclk1: clcdclk {
+ /* Reference clock for the CLCD */
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 1>;
+ freq-range = <10000000 80000000>;
+ #clock-cells = <0>;
+ clock-output-names = "clcdclk";
+ };
+
+ smbclk: oscclk2: tcrefclk {
+ /* Reference clock for the test chip internal PLLs */
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 2>;
+ freq-range = <33000000 100000000>;
+ #clock-cells = <0>;
+ clock-output-names = "tcrefclk";
+ };
+
+ volt-vd10 {
+ /* Test Chip internal logic voltage */
+ compatible = "arm,vexpress-volt";
+ arm,vexpress-sysreg,func = <2 0>;
+ regulator-name = "VD10";
+ regulator-always-on;
+ label = "VD10";
+ };
+
+ volt-vd10-s2 {
+ /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
+ compatible = "arm,vexpress-volt";
+ arm,vexpress-sysreg,func = <2 1>;
+ regulator-name = "VD10_S2";
+ regulator-always-on;
+ label = "VD10_S2";
+ };
+
+ volt-vd10-s3 {
+ /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
+ compatible = "arm,vexpress-volt";
+ arm,vexpress-sysreg,func = <2 2>;
+ regulator-name = "VD10_S3";
+ regulator-always-on;
+ label = "VD10_S3";
+ };
+
+ volt-vcc1v8 {
+ /* DDR2 SDRAM and Test Chip DDR2 I/O supply */
+ compatible = "arm,vexpress-volt";
+ arm,vexpress-sysreg,func = <2 3>;
+ regulator-name = "VCC1V8";
+ regulator-always-on;
+ label = "VCC1V8";
+ };
+
+ volt-ddr2vtt {
+ /* DDR2 SDRAM VTT termination voltage */
+ compatible = "arm,vexpress-volt";
+ arm,vexpress-sysreg,func = <2 4>;
+ regulator-name = "DDR2VTT";
+ regulator-always-on;
+ label = "DDR2VTT";
+ };
+
+ volt-vcc3v3 {
+ /* Local board supply for miscellaneous logic external to the Test Chip */
+ arm,vexpress-sysreg,func = <2 5>;
+ compatible = "arm,vexpress-volt";
+ regulator-name = "VCC3V3";
+ regulator-always-on;
+ label = "VCC3V3";
+ };
+
+ amp-vd10-s2 {
+ /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
+ compatible = "arm,vexpress-amp";
+ arm,vexpress-sysreg,func = <3 0>;
+ label = "VD10_S2";
+ };
+
+ amp-vd10-s3 {
+ /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
+ compatible = "arm,vexpress-amp";
+ arm,vexpress-sysreg,func = <3 1>;
+ label = "VD10_S3";
+ };
+
+ power-vd10-s2 {
+ /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
+ compatible = "arm,vexpress-power";
+ arm,vexpress-sysreg,func = <12 0>;
+ label = "PVD10_S2";
+ };
+
+ power-vd10-s3 {
+ /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
+ compatible = "arm,vexpress-power";
+ arm,vexpress-sysreg,func = <12 1>;
+ label = "PVD10_S3";
+ };
+ };
+
+ smb: smb@4000000 {
+ compatible = "simple-bus";
+
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0 0x40000000 0x04000000>,
+ <1 0 0x44000000 0x04000000>,
+ <2 0 0x48000000 0x04000000>,
+ <3 0 0x4c000000 0x04000000>,
+ <7 0 0x10000000 0x00020000>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 63>;
+ interrupt-map = <0 0 0 &gic 0 0 4>,
+ <0 0 1 &gic 0 1 4>,
+ <0 0 2 &gic 0 2 4>,
+ <0 0 3 &gic 0 3 4>,
+ <0 0 4 &gic 0 4 4>,
+ <0 0 5 &gic 0 5 4>,
+ <0 0 6 &gic 0 6 4>,
+ <0 0 7 &gic 0 7 4>,
+ <0 0 8 &gic 0 8 4>,
+ <0 0 9 &gic 0 9 4>,
+ <0 0 10 &gic 0 10 4>,
+ <0 0 11 &gic 0 11 4>,
+ <0 0 12 &gic 0 12 4>,
+ <0 0 13 &gic 0 13 4>,
+ <0 0 14 &gic 0 14 4>,
+ <0 0 15 &gic 0 15 4>,
+ <0 0 16 &gic 0 16 4>,
+ <0 0 17 &gic 0 17 4>,
+ <0 0 18 &gic 0 18 4>,
+ <0 0 19 &gic 0 19 4>,
+ <0 0 20 &gic 0 20 4>,
+ <0 0 21 &gic 0 21 4>,
+ <0 0 22 &gic 0 22 4>,
+ <0 0 23 &gic 0 23 4>,
+ <0 0 24 &gic 0 24 4>,
+ <0 0 25 &gic 0 25 4>,
+ <0 0 26 &gic 0 26 4>,
+ <0 0 27 &gic 0 27 4>,
+ <0 0 28 &gic 0 28 4>,
+ <0 0 29 &gic 0 29 4>,
+ <0 0 30 &gic 0 30 4>,
+ <0 0 31 &gic 0 31 4>,
+ <0 0 32 &gic 0 32 4>,
+ <0 0 33 &gic 0 33 4>,
+ <0 0 34 &gic 0 34 4>,
+ <0 0 35 &gic 0 35 4>,
+ <0 0 36 &gic 0 36 4>,
+ <0 0 37 &gic 0 37 4>,
+ <0 0 38 &gic 0 38 4>,
+ <0 0 39 &gic 0 39 4>,
+ <0 0 40 &gic 0 40 4>,
+ <0 0 41 &gic 0 41 4>,
+ <0 0 42 &gic 0 42 4>;
+ };
+
+ site2: hsb@e0000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xe0000000 0x20000000>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 3>;
+ interrupt-map = <0 0 &gic 0 36 4>,
+ <0 1 &gic 0 37 4>,
+ <0 2 &gic 0 38 4>,
+ <0 3 &gic 0 39 4>;
+ };
+};
diff --git a/arch/arm/include/asm/arch-am33xx/chilisom.h b/arch/arm/include/asm/arch-am33xx/chilisom.h
index 493be64..e423c9d 100644
--- a/arch/arm/include/asm/arch-am33xx/chilisom.h
+++ b/arch/arm/include/asm/arch-am33xx/chilisom.h
@@ -6,7 +6,7 @@
#ifndef __ARCH_ARM_MACH_CHILISOM_SOM_H__
#define __ARCH_ARM_MACH_CHILISOM_SOM_H__
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
void chilisom_enable_pin_mux(void);
void chilisom_spl_board_init(void);
#endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 3675ce7..733373e 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -123,7 +123,6 @@
#elif defined(CONFIG_ARCH_LS1088A)
#define CONFIG_SYS_FSL_NUM_CC_PLLS 3
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
-#define CONFIG_GICV3
#define CONFIG_SYS_PAGE_SIZE 0x10000
#define SRDS_MAX_LANES 4
@@ -183,10 +182,6 @@
#elif defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
#define TZPC_BASE 0x02200000
#define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804)
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_EARLY_INIT
-#endif
#define SRDS_MAX_LANES 8
#ifndef L1_CACHE_BYTES
#define L1_CACHE_SHIFT 6
@@ -239,7 +234,6 @@
#elif defined(CONFIG_ARCH_LS1028A)
#define CONFIG_SYS_FSL_NUM_CC_PLLS 3
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
-#define CONFIG_GICV3
#define CONFIG_FSL_TZPC_BP147
#define CONFIG_FSL_TZASC_400
diff --git a/arch/arm/include/asm/bootm.h b/arch/arm/include/asm/bootm.h
index a2131ca..439e43c 100644
--- a/arch/arm/include/asm/bootm.h
+++ b/arch/arm/include/asm/bootm.h
@@ -10,11 +10,7 @@
extern void udc_disconnect(void);
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
- defined(CONFIG_CMDLINE_TAG) || \
- defined(CONFIG_INITRD_TAG) || \
- defined(CONFIG_SERIAL_TAG) || \
- defined(CONFIG_REVISION_TAG)
+#ifdef CONFIG_SUPPORT_PASSING_ATAGS
# define BOOTM_ENABLE_TAGS 1
#else
# define BOOTM_ENABLE_TAGS 0
@@ -41,9 +37,12 @@
struct tag_serialnr;
#ifdef CONFIG_SERIAL_TAG
#define BOOTM_ENABLE_SERIAL_TAG 1
-void get_board_serial(struct tag_serialnr *serialnr);
#else
#define BOOTM_ENABLE_SERIAL_TAG 0
+#endif
+#if defined(CONFIG_SERIAL_TAG) || defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
+void get_board_serial(struct tag_serialnr *serialnr);
+#else
static inline void get_board_serial(struct tag_serialnr *serialnr)
{
}
diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h
index 32532b3..2713b1d 100644
--- a/arch/arm/include/asm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -267,7 +267,6 @@
#define MACH_TYPE_BMS 259
#define MACH_TYPE_IXCDP1100 260
#define MACH_TYPE_PRPMC1100 261
-#define MACH_TYPE_AT91RM9200DK 262
#define MACH_TYPE_ARMSTICK 263
#define MACH_TYPE_ARMONIE 264
#define MACH_TYPE_MPORT1 265
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index 485310d..e1eefc2 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -256,7 +256,7 @@
* For loading 64-bit OS, x0 is physical address to the FDT blob.
* They will be passed to the guest.
*/
-.macro armv8_switch_to_el1_m, ep, flag, tmp
+.macro armv8_switch_to_el1_m, ep, flag, tmp, tmp2
/* Initialize Generic Timers */
mrs \tmp, cnthctl_el2
/* Enable EL1 access to timers */
@@ -306,7 +306,14 @@
b.eq 1f
/* Initialize HCR_EL2 */
- ldr \tmp, =(HCR_EL2_RW_AARCH64 | HCR_EL2_HCD_DIS)
+ /* Only disable PAuth traps if PAuth is supported */
+ mrs \tmp, id_aa64isar1_el1
+ ldr \tmp2, =(ID_AA64ISAR1_EL1_GPI | ID_AA64ISAR1_EL1_GPA | \
+ ID_AA64ISAR1_EL1_API | ID_AA64ISAR1_EL1_APA)
+ tst \tmp, \tmp2
+ mov \tmp2, #(HCR_EL2_RW_AARCH64 | HCR_EL2_HCD_DIS)
+ orr \tmp, \tmp2, #(HCR_EL2_APK | HCR_EL2_API)
+ csel \tmp, \tmp2, \tmp, eq
msr hcr_el2, \tmp
/* Return to the EL1_SP1 mode from EL2 */
diff --git a/arch/arm/include/asm/string.h b/arch/arm/include/asm/string.h
index 11eaa34..ead3f2c 100644
--- a/arch/arm/include/asm/string.h
+++ b/arch/arm/include/asm/string.h
@@ -19,7 +19,11 @@
#endif
extern void * memcpy(void *, const void *, __kernel_size_t);
+#if CONFIG_IS_ENABLED(USE_ARCH_MEMMOVE)
+#define __HAVE_ARCH_MEMMOVE
+#else
#undef __HAVE_ARCH_MEMMOVE
+#endif
extern void * memmove(void *, const void *, __kernel_size_t);
#undef __HAVE_ARCH_MEMCHR
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 8b3a54e..f75eea1 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -75,11 +75,26 @@
/*
* HCR_EL2 bits definitions
*/
+#define HCR_EL2_API (1 << 41) /* Trap pointer authentication
+ instructions */
+#define HCR_EL2_APK (1 << 40) /* Trap pointer authentication
+ key access */
#define HCR_EL2_RW_AARCH64 (1 << 31) /* EL1 is AArch64 */
#define HCR_EL2_RW_AARCH32 (0 << 31) /* Lower levels are AArch32 */
#define HCR_EL2_HCD_DIS (1 << 29) /* Hypervisor Call disabled */
/*
+ * ID_AA64ISAR1_EL1 bits definitions
+ */
+#define ID_AA64ISAR1_EL1_GPI (0xF << 28) /* Implementation-defined generic
+ code auth algorithm */
+#define ID_AA64ISAR1_EL1_GPA (0xF << 24) /* QARMA generic code auth
+ algorithm */
+#define ID_AA64ISAR1_EL1_API (0xF << 8) /* Implementation-defined address
+ auth algorithm */
+#define ID_AA64ISAR1_EL1_APA (0xF << 4) /* QARMA address auth algorithm */
+
+/*
* ID_AA64PFR0_EL1 bits definitions
*/
#define ID_AA64PFR0_EL1_EL3 (0xF << 12) /* EL3 implemented */
@@ -551,7 +566,6 @@
u32 psci_migrate_info_type(void);
void psci_system_off(void);
void psci_system_reset(void);
-s32 psci_features(u32 function_id, u32 psci_fid);
#endif
#endif /* __ASSEMBLY__ */
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 7f66332..c48e1f6 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -39,8 +39,13 @@
obj-$(CONFIG_SPL_FRAMEWORK) += zimage.o
obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
endif
+ifdef CONFIG_ARM64
+obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset-arm64.o
+obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy-arm64.o
+else
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
+endif
obj-$(CONFIG_SEMIHOSTING) += semihosting.o
obj-y += bdinfo.o
diff --git a/arch/arm/lib/asmdefs.h b/arch/arm/lib/asmdefs.h
new file mode 100644
index 0000000..d307a3a
--- /dev/null
+++ b/arch/arm/lib/asmdefs.h
@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Macros for asm code.
+ *
+ * Copyright (c) 2019, Arm Limited.
+ */
+
+#ifndef _ASMDEFS_H
+#define _ASMDEFS_H
+
+#if defined(__aarch64__)
+
+/* Branch Target Identitication support. */
+#define BTI_C hint 34
+#define BTI_J hint 36
+/* Return address signing support (pac-ret). */
+#define PACIASP hint 25; .cfi_window_save
+#define AUTIASP hint 29; .cfi_window_save
+
+/* GNU_PROPERTY_AARCH64_* macros from elf.h. */
+#define FEATURE_1_AND 0xc0000000
+#define FEATURE_1_BTI 1
+#define FEATURE_1_PAC 2
+
+/* Add a NT_GNU_PROPERTY_TYPE_0 note. */
+#define GNU_PROPERTY(type, value) \
+ .section .note.gnu.property, "a"; \
+ .p2align 3; \
+ .word 4; \
+ .word 16; \
+ .word 5; \
+ .asciz "GNU"; \
+ .word type; \
+ .word 4; \
+ .word value; \
+ .word 0; \
+ .text
+
+/* If set then the GNU Property Note section will be added to
+ mark objects to support BTI and PAC-RET. */
+#ifndef WANT_GNU_PROPERTY
+#define WANT_GNU_PROPERTY 1
+#endif
+
+#if WANT_GNU_PROPERTY
+/* Add property note with supported features to all asm files. */
+GNU_PROPERTY (FEATURE_1_AND, FEATURE_1_BTI|FEATURE_1_PAC)
+#endif
+
+#define ENTRY_ALIGN(name, alignment) \
+ .global name; \
+ .type name,%function; \
+ .align alignment; \
+ name: \
+ .cfi_startproc; \
+ BTI_C;
+
+#else
+
+#define END_FILE
+
+#define ENTRY_ALIGN(name, alignment) \
+ .global name; \
+ .type name,%function; \
+ .align alignment; \
+ name: \
+ .cfi_startproc;
+
+#endif
+
+#define ENTRY(name) ENTRY_ALIGN(name, 6)
+
+#define ENTRY_ALIAS(name) \
+ .global name; \
+ .type name,%function; \
+ name:
+
+#define END(name) \
+ .cfi_endproc; \
+ .size name, .-name;
+
+#define L(l) .L ## l
+
+#ifdef __ILP32__
+ /* Sanitize padding bits of pointer arguments as per aapcs64 */
+#define PTR_ARG(n) mov w##n, w##n
+#else
+#define PTR_ARG(n)
+#endif
+
+#ifdef __ILP32__
+ /* Sanitize padding bits of size arguments as per aapcs64 */
+#define SIZE_ARG(n) mov w##n, w##n
+#else
+#define SIZE_ARG(n)
+#endif
+
+#endif
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index f60ee3a..dd6a693 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -16,7 +16,6 @@
#include <command.h>
#include <cpu_func.h>
#include <dm.h>
-#include <lmb.h>
#include <log.h>
#include <asm/global_data.h>
#include <dm/root.h>
@@ -43,50 +42,6 @@
static struct tag *params;
-static ulong get_sp(void)
-{
- ulong ret;
-
- asm("mov %0, sp" : "=r"(ret) : );
- return ret;
-}
-
-void arch_lmb_reserve(struct lmb *lmb)
-{
- ulong sp, bank_end;
- int bank;
-
- /*
- * Booting a (Linux) kernel image
- *
- * Allocate space for command line and board info - the
- * address should be as high as possible within the reach of
- * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
- * memory, which means far enough below the current stack
- * pointer.
- */
- sp = get_sp();
- debug("## Current stack ends at 0x%08lx ", sp);
-
- /* adjust sp by 4K to be safe */
- sp -= 4096;
- for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
- if (!gd->bd->bi_dram[bank].size ||
- sp < gd->bd->bi_dram[bank].start)
- continue;
- /* Watch out for RAM at end of address space! */
- bank_end = gd->bd->bi_dram[bank].start +
- gd->bd->bi_dram[bank].size - 1;
- if (sp > bank_end)
- continue;
- if (bank_end > gd->ram_top)
- bank_end = gd->ram_top - 1;
-
- lmb_reserve(lmb, sp, bank_end - sp + 1);
- break;
- }
-}
-
__weak void board_quiesce_devices(void)
{
}
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 46b6be2..956d258 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -130,6 +130,14 @@
ldr r9, [r9, #GD_NEW_GD] /* r9 <- gd->new_gd */
adr lr, here
+#if defined(CONFIG_POSITION_INDEPENDENT)
+ adr r0, _main
+ ldr r1, _start_ofs
+ add r0, r1
+ ldr r1, =CONFIG_SYS_TEXT_BASE
+ sub r1, r0
+ add lr, r1
+#endif
ldr r0, [r9, #GD_RELOC_OFF] /* r0 = gd->reloc_off */
add lr, lr, r0
#if defined(CONFIG_CPU_V7M)
@@ -180,3 +188,6 @@
#endif
ENDPROC(_main)
+
+_start_ofs:
+ .word _start - _main
diff --git a/arch/arm/lib/memcpy-arm64.S b/arch/arm/lib/memcpy-arm64.S
new file mode 100644
index 0000000..507054d
--- /dev/null
+++ b/arch/arm/lib/memcpy-arm64.S
@@ -0,0 +1,242 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * memcpy - copy memory area
+ *
+ * Copyright (c) 2012-2020, Arm Limited.
+ */
+
+/* Assumptions:
+ *
+ * ARMv8-a, AArch64, unaligned accesses.
+ *
+ */
+
+#include "asmdefs.h"
+
+#define dstin x0
+#define src x1
+#define count x2
+#define dst x3
+#define srcend x4
+#define dstend x5
+#define A_l x6
+#define A_lw w6
+#define A_h x7
+#define B_l x8
+#define B_lw w8
+#define B_h x9
+#define C_l x10
+#define C_lw w10
+#define C_h x11
+#define D_l x12
+#define D_h x13
+#define E_l x14
+#define E_h x15
+#define F_l x16
+#define F_h x17
+#define G_l count
+#define G_h dst
+#define H_l src
+#define H_h srcend
+#define tmp1 x14
+
+/* This implementation handles overlaps and supports both memcpy and memmove
+ from a single entry point. It uses unaligned accesses and branchless
+ sequences to keep the code small, simple and improve performance.
+
+ Copies are split into 3 main cases: small copies of up to 32 bytes, medium
+ copies of up to 128 bytes, and large copies. The overhead of the overlap
+ check is negligible since it is only required for large copies.
+
+ Large copies use a software pipelined loop processing 64 bytes per iteration.
+ The destination pointer is 16-byte aligned to minimize unaligned accesses.
+ The loop tail is handled by always copying 64 bytes from the end.
+*/
+
+ENTRY_ALIAS (memmove)
+ENTRY (memcpy)
+ PTR_ARG (0)
+ PTR_ARG (1)
+ SIZE_ARG (2)
+ add srcend, src, count
+ add dstend, dstin, count
+ cmp count, 128
+ b.hi L(copy_long)
+ cmp count, 32
+ b.hi L(copy32_128)
+
+ /* Small copies: 0..32 bytes. */
+ cmp count, 16
+ b.lo L(copy16)
+ ldp A_l, A_h, [src]
+ ldp D_l, D_h, [srcend, -16]
+ stp A_l, A_h, [dstin]
+ stp D_l, D_h, [dstend, -16]
+ ret
+
+ /* Copy 8-15 bytes. */
+L(copy16):
+ tbz count, 3, L(copy8)
+ ldr A_l, [src]
+ ldr A_h, [srcend, -8]
+ str A_l, [dstin]
+ str A_h, [dstend, -8]
+ ret
+
+ .p2align 3
+ /* Copy 4-7 bytes. */
+L(copy8):
+ tbz count, 2, L(copy4)
+ ldr A_lw, [src]
+ ldr B_lw, [srcend, -4]
+ str A_lw, [dstin]
+ str B_lw, [dstend, -4]
+ ret
+
+ /* Copy 0..3 bytes using a branchless sequence. */
+L(copy4):
+ cbz count, L(copy0)
+ lsr tmp1, count, 1
+ ldrb A_lw, [src]
+ ldrb C_lw, [srcend, -1]
+ ldrb B_lw, [src, tmp1]
+ strb A_lw, [dstin]
+ strb B_lw, [dstin, tmp1]
+ strb C_lw, [dstend, -1]
+L(copy0):
+ ret
+
+ .p2align 4
+ /* Medium copies: 33..128 bytes. */
+L(copy32_128):
+ ldp A_l, A_h, [src]
+ ldp B_l, B_h, [src, 16]
+ ldp C_l, C_h, [srcend, -32]
+ ldp D_l, D_h, [srcend, -16]
+ cmp count, 64
+ b.hi L(copy128)
+ stp A_l, A_h, [dstin]
+ stp B_l, B_h, [dstin, 16]
+ stp C_l, C_h, [dstend, -32]
+ stp D_l, D_h, [dstend, -16]
+ ret
+
+ .p2align 4
+ /* Copy 65..128 bytes. */
+L(copy128):
+ ldp E_l, E_h, [src, 32]
+ ldp F_l, F_h, [src, 48]
+ cmp count, 96
+ b.ls L(copy96)
+ ldp G_l, G_h, [srcend, -64]
+ ldp H_l, H_h, [srcend, -48]
+ stp G_l, G_h, [dstend, -64]
+ stp H_l, H_h, [dstend, -48]
+L(copy96):
+ stp A_l, A_h, [dstin]
+ stp B_l, B_h, [dstin, 16]
+ stp E_l, E_h, [dstin, 32]
+ stp F_l, F_h, [dstin, 48]
+ stp C_l, C_h, [dstend, -32]
+ stp D_l, D_h, [dstend, -16]
+ ret
+
+ .p2align 4
+ /* Copy more than 128 bytes. */
+L(copy_long):
+ /* Use backwards copy if there is an overlap. */
+ sub tmp1, dstin, src
+ cbz tmp1, L(copy0)
+ cmp tmp1, count
+ b.lo L(copy_long_backwards)
+
+ /* Copy 16 bytes and then align dst to 16-byte alignment. */
+
+ ldp D_l, D_h, [src]
+ and tmp1, dstin, 15
+ bic dst, dstin, 15
+ sub src, src, tmp1
+ add count, count, tmp1 /* Count is now 16 too large. */
+ ldp A_l, A_h, [src, 16]
+ stp D_l, D_h, [dstin]
+ ldp B_l, B_h, [src, 32]
+ ldp C_l, C_h, [src, 48]
+ ldp D_l, D_h, [src, 64]!
+ subs count, count, 128 + 16 /* Test and readjust count. */
+ b.ls L(copy64_from_end)
+
+L(loop64):
+ stp A_l, A_h, [dst, 16]
+ ldp A_l, A_h, [src, 16]
+ stp B_l, B_h, [dst, 32]
+ ldp B_l, B_h, [src, 32]
+ stp C_l, C_h, [dst, 48]
+ ldp C_l, C_h, [src, 48]
+ stp D_l, D_h, [dst, 64]!
+ ldp D_l, D_h, [src, 64]!
+ subs count, count, 64
+ b.hi L(loop64)
+
+ /* Write the last iteration and copy 64 bytes from the end. */
+L(copy64_from_end):
+ ldp E_l, E_h, [srcend, -64]
+ stp A_l, A_h, [dst, 16]
+ ldp A_l, A_h, [srcend, -48]
+ stp B_l, B_h, [dst, 32]
+ ldp B_l, B_h, [srcend, -32]
+ stp C_l, C_h, [dst, 48]
+ ldp C_l, C_h, [srcend, -16]
+ stp D_l, D_h, [dst, 64]
+ stp E_l, E_h, [dstend, -64]
+ stp A_l, A_h, [dstend, -48]
+ stp B_l, B_h, [dstend, -32]
+ stp C_l, C_h, [dstend, -16]
+ ret
+
+ .p2align 4
+
+ /* Large backwards copy for overlapping copies.
+ Copy 16 bytes and then align dst to 16-byte alignment. */
+L(copy_long_backwards):
+ ldp D_l, D_h, [srcend, -16]
+ and tmp1, dstend, 15
+ sub srcend, srcend, tmp1
+ sub count, count, tmp1
+ ldp A_l, A_h, [srcend, -16]
+ stp D_l, D_h, [dstend, -16]
+ ldp B_l, B_h, [srcend, -32]
+ ldp C_l, C_h, [srcend, -48]
+ ldp D_l, D_h, [srcend, -64]!
+ sub dstend, dstend, tmp1
+ subs count, count, 128
+ b.ls L(copy64_from_start)
+
+L(loop64_backwards):
+ stp A_l, A_h, [dstend, -16]
+ ldp A_l, A_h, [srcend, -16]
+ stp B_l, B_h, [dstend, -32]
+ ldp B_l, B_h, [srcend, -32]
+ stp C_l, C_h, [dstend, -48]
+ ldp C_l, C_h, [srcend, -48]
+ stp D_l, D_h, [dstend, -64]!
+ ldp D_l, D_h, [srcend, -64]!
+ subs count, count, 64
+ b.hi L(loop64_backwards)
+
+ /* Write the last iteration and copy 64 bytes from the start. */
+L(copy64_from_start):
+ ldp G_l, G_h, [src, 48]
+ stp A_l, A_h, [dstend, -16]
+ ldp A_l, A_h, [src, 32]
+ stp B_l, B_h, [dstend, -32]
+ ldp B_l, B_h, [src, 16]
+ stp C_l, C_h, [dstend, -48]
+ ldp C_l, C_h, [src]
+ stp D_l, D_h, [dstend, -64]
+ stp G_l, G_h, [dstin, 48]
+ stp A_l, A_h, [dstin, 32]
+ stp B_l, B_h, [dstin, 16]
+ stp C_l, C_h, [dstin]
+ ret
+
+END (memcpy)
diff --git a/arch/arm/lib/memset-arm64.S b/arch/arm/lib/memset-arm64.S
new file mode 100644
index 0000000..ee9f9a9
--- /dev/null
+++ b/arch/arm/lib/memset-arm64.S
@@ -0,0 +1,148 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * memset - fill memory with a constant byte
+ *
+ * Copyright (c) 2012-2021, Arm Limited.
+ */
+
+/* Assumptions:
+ *
+ * ARMv8-a, AArch64, Advanced SIMD, unaligned accesses.
+ *
+ */
+
+#include <asm/macro.h>
+#include "asmdefs.h"
+
+#define dstin x0
+#define val x1
+#define valw w1
+#define count x2
+#define dst x3
+#define dstend x4
+#define zva_val x5
+
+ENTRY (memset)
+ PTR_ARG (0)
+ SIZE_ARG (2)
+
+ /*
+ * The optimized memset uses the dc opcode, which causes problems
+ * when the cache is disabled. Let's check if the cache is disabled
+ * and use a very simple memset implementation in this case. Otherwise
+ * jump to the optimized version.
+ */
+ switch_el x6, 3f, 2f, 1f
+3: mrs x6, sctlr_el3
+ b 0f
+2: mrs x6, sctlr_el2
+ b 0f
+1: mrs x6, sctlr_el1
+0:
+ tst x6, #CR_C
+ bne 9f
+
+ /*
+ * A very "simple" memset implementation without the use of the
+ * dc opcode. Can be run with caches disabled.
+ */
+ mov x3, #0x0
+ cmp count, x3 /* check for zero length */
+ beq 8f
+4: strb valw, [dstin, x3]
+ add x3, x3, #0x1
+ cmp count, x3
+ bne 4b
+8: ret
+9:
+
+ /* Here the optimized memset version starts */
+ dup v0.16B, valw
+ add dstend, dstin, count
+
+ cmp count, 96
+ b.hi L(set_long)
+ cmp count, 16
+ b.hs L(set_medium)
+ mov val, v0.D[0]
+
+ /* Set 0..15 bytes. */
+ tbz count, 3, 1f
+ str val, [dstin]
+ str val, [dstend, -8]
+ ret
+ .p2align 4
+1: tbz count, 2, 2f
+ str valw, [dstin]
+ str valw, [dstend, -4]
+ ret
+2: cbz count, 3f
+ strb valw, [dstin]
+ tbz count, 1, 3f
+ strh valw, [dstend, -2]
+3: ret
+
+ /* Set 17..96 bytes. */
+L(set_medium):
+ str q0, [dstin]
+ tbnz count, 6, L(set96)
+ str q0, [dstend, -16]
+ tbz count, 5, 1f
+ str q0, [dstin, 16]
+ str q0, [dstend, -32]
+1: ret
+
+ .p2align 4
+ /* Set 64..96 bytes. Write 64 bytes from the start and
+ 32 bytes from the end. */
+L(set96):
+ str q0, [dstin, 16]
+ stp q0, q0, [dstin, 32]
+ stp q0, q0, [dstend, -32]
+ ret
+
+ .p2align 4
+L(set_long):
+ and valw, valw, 255
+ bic dst, dstin, 15
+ str q0, [dstin]
+ cmp count, 160
+ ccmp valw, 0, 0, hs
+ b.ne L(no_zva)
+
+#ifndef SKIP_ZVA_CHECK
+ mrs zva_val, dczid_el0
+ and zva_val, zva_val, 31
+ cmp zva_val, 4 /* ZVA size is 64 bytes. */
+ b.ne L(no_zva)
+#endif
+ str q0, [dst, 16]
+ stp q0, q0, [dst, 32]
+ bic dst, dst, 63
+ sub count, dstend, dst /* Count is now 64 too large. */
+ sub count, count, 128 /* Adjust count and bias for loop. */
+
+ .p2align 4
+L(zva_loop):
+ add dst, dst, 64
+ dc zva, dst
+ subs count, count, 64
+ b.hi L(zva_loop)
+ stp q0, q0, [dstend, -64]
+ stp q0, q0, [dstend, -32]
+ ret
+
+L(no_zva):
+ sub count, dstend, dst /* Count is 16 too large. */
+ sub dst, dst, 16 /* Dst is biased by -32. */
+ sub count, count, 64 + 16 /* Adjust count and bias for loop. */
+L(no_zva_loop):
+ stp q0, q0, [dst, 32]
+ stp q0, q0, [dst, 64]!
+ subs count, count, 64
+ b.hi L(no_zva_loop)
+ stp q0, q0, [dstend, -64]
+ stp q0, q0, [dstend, -32]
+ ret
+
+END (memset)
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index e5f7267..14b7f61 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -78,22 +78,28 @@
*/
ENTRY(relocate_code)
- ldr r1, =__image_copy_start /* r1 <- SRC &__image_copy_start */
- subs r4, r0, r1 /* r4 <- relocation offset */
- beq relocate_done /* skip relocation */
- ldr r2, =__image_copy_end /* r2 <- SRC &__image_copy_end */
-
+ adr r3, relocate_code
+ ldr r1, _image_copy_start_ofs
+ add r1, r3 /* r1 <- Run &__image_copy_start */
+ subs r4, r0, r1 /* r4 <- Run to copy offset */
+ beq relocate_done /* skip relocation */
+ ldr r1, _image_copy_start_ofs
+ add r1, r3 /* r1 <- Run &__image_copy_start */
+ ldr r2, _image_copy_end_ofs
+ add r2, r3 /* r2 <- Run &__image_copy_end */
copy_loop:
- ldmia r1!, {r10-r11} /* copy from source address [r1] */
- stmia r0!, {r10-r11} /* copy to target address [r0] */
- cmp r1, r2 /* until source end address [r2] */
+ ldmia r1!, {r10-r11} /* copy from source address [r1] */
+ stmia r0!, {r10-r11} /* copy to target address [r0] */
+ cmp r1, r2 /* until source end address [r2] */
blo copy_loop
/*
* fix .rel.dyn relocations
*/
- ldr r2, =__rel_dyn_start /* r2 <- SRC &__rel_dyn_start */
- ldr r3, =__rel_dyn_end /* r3 <- SRC &__rel_dyn_end */
+ ldr r1, _rel_dyn_start_ofs
+ add r2, r1, r3 /* r2 <- Run &__rel_dyn_start */
+ ldr r1, _rel_dyn_end_ofs
+ add r3, r1, r3 /* r3 <- Run &__rel_dyn_end */
fixloop:
ldmia r2!, {r0-r1} /* (r0,r1) <- (SRC location,fixup) */
and r1, r1, #0xff
@@ -129,3 +135,12 @@
#endif
ENDPROC(relocate_code)
+
+_image_copy_start_ofs:
+ .word __image_copy_start - relocate_code
+_image_copy_end_ofs:
+ .word __image_copy_end - relocate_code
+_rel_dyn_start_ofs:
+ .word __rel_dyn_start - relocate_code
+_rel_dyn_end_ofs:
+ .word __rel_dyn_end - relocate_code
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index b03e1cf..656084c 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -12,6 +12,7 @@
*/
#include <common.h>
#include <init.h>
+#include <lmb.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -33,3 +34,16 @@
return 0;
}
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mov %0, sp" : "=r"(ret) : );
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 16384);
+}
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index c90505e..4448ca1 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -298,7 +298,6 @@
config ATMEL_SFR
bool
- default n
config SYS_SOC
default "at91"
diff --git a/arch/arm/mach-at91/arm920t/lowlevel_init.S b/arch/arm/mach-at91/arm920t/lowlevel_init.S
index de99c61..5e3cce0 100644
--- a/arch/arm/mach-at91/arm920t/lowlevel_init.S
+++ b/arch/arm/mach-at91/arm920t/lowlevel_init.S
@@ -10,7 +10,7 @@
#include <config.h>
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
#include <asm/arch/hardware.h>
#include <asm/arch/at91_mc.h>
@@ -148,4 +148,4 @@
.word CONFIG_SYS_SDRAM_VAL
SMRDATA1E:
/* SMRDATA1 is 176 bytes long */
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
diff --git a/arch/arm/mach-at91/armv7/Makefile b/arch/arm/mach-at91/armv7/Makefile
index f5b2665..246050b 100644
--- a/arch/arm/mach-at91/armv7/Makefile
+++ b/arch/arm/mach-at91/armv7/Makefile
@@ -11,7 +11,9 @@
obj-$(CONFIG_SAMA5D4) += sama5d4_devices.o clock.o
obj-$(CONFIG_SAMA7G5) += sama7g5_devices.o
obj-y += cpu.o
-obj-y += reset.o
+ifndef CONFIG_$(SPL_TPL_)SYSRESET
+obj-y += reset.o
+endif
ifneq ($(CONFIG_ATMEL_PIT_TIMER),y)
ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y)
# old non-DM timer driver
diff --git a/arch/arm/mach-at91/armv7/sama5d2_devices.c b/arch/arm/mach-at91/armv7/sama5d2_devices.c
index 9e9d026..edc2057 100644
--- a/arch/arm/mach-at91/armv7/sama5d2_devices.c
+++ b/arch/arm/mach-at91/armv7/sama5d2_devices.c
@@ -46,6 +46,8 @@
return "SAMA5D28-CU";
case ARCH_EXID_SAMA5D28CN:
return "SAMA5D28-CN";
+ case ARCH_EXID_SAMA5D29CN:
+ return "SAMA5D29-CN";
}
}
diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h
index d1b2e01..9d94627 100644
--- a/arch/arm/mach-at91/include/mach/sama5d2.h
+++ b/arch/arm/mach-at91/include/mach/sama5d2.h
@@ -215,6 +215,7 @@
#define ARCH_EXID_SAMA5D27CN 0x00000021
#define ARCH_EXID_SAMA5D28CU 0x00000010
#define ARCH_EXID_SAMA5D28CN 0x00000020
+#define ARCH_EXID_SAMA5D29CN 0x00000023
#define ARCH_ID_SAMA5D2_SIP 0x8a5c08c2
#define ARCH_EXID_SAMA5D225C_D1M 0x00000053
diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c
index d0c7325..ea19ec3 100644
--- a/arch/arm/mach-at91/spl_at91.c
+++ b/arch/arm/mach-at91/spl_at91.c
@@ -136,7 +136,7 @@
at91_periph_clk_enable(ATMEL_ID_PIOC);
#endif
-#if defined(CONFIG_SPL_SERIAL_SUPPORT)
+#if defined(CONFIG_SPL_SERIAL)
/* init console */
at91_seriald_hw_init();
preloader_console_init();
diff --git a/arch/arm/mach-davinci/include/mach/davinci_misc.h b/arch/arm/mach-davinci/include/mach/davinci_misc.h
index 48b11f7..a40de0c 100644
--- a/arch/arm/mach-davinci/include/mach/davinci_misc.h
+++ b/arch/arm/mach-davinci/include/mach/davinci_misc.h
@@ -35,7 +35,6 @@
const int lpsc_no;
};
-int dvevm_read_mac_address(uint8_t *buf);
void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr);
int davinci_configure_pin_mux(const struct pinmux_config *pins, int n_pins);
int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c
index 90b38b7..73fdd1f 100644
--- a/arch/arm/mach-davinci/misc.c
+++ b/arch/arm/mach-davinci/misc.c
@@ -42,33 +42,6 @@
#ifdef CONFIG_DRIVER_TI_EMAC
/*
- * Read ethernet MAC address from EEPROM for DVEVM compatible boards.
- * Returns 1 if found, 0 otherwise.
- */
-int dvevm_read_mac_address(uint8_t *buf)
-{
-#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
- /* Read MAC address. */
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x7F00,
- CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &buf[0], 6))
- goto i2cerr;
-
- /* Check that MAC address is valid. */
- if (!is_valid_ethaddr(buf))
- goto err;
-
- return 1; /* Found */
-
-i2cerr:
- printf("Read from EEPROM @ 0x%02x failed\n",
- CONFIG_SYS_I2C_EEPROM_ADDR);
-err:
-#endif /* CONFIG_SYS_I2C_EEPROM_ADDR */
-
- return 0;
-}
-
-/*
* Set the mii mode as MII or RMII
*/
void davinci_emac_mii_mode_sel(int mode_sel)
diff --git a/arch/arm/mach-davinci/spl.c b/arch/arm/mach-davinci/spl.c
index d0d7a81..54aff78 100644
--- a/arch/arm/mach-davinci/spl.c
+++ b/arch/arm/mach-davinci/spl.c
@@ -51,7 +51,7 @@
return BOOT_DEVICE_NAND;
#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
case DAVINCI_SD_OR_MMC_BOOT:
case DAVINCI_MMC_ONLY_BOOT:
return BOOT_DEVICE_MMC1;
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 0b4276c..7df0e17 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -141,7 +141,7 @@
choice
prompt "EXYNOS7 board select"
-config TARGET_ESPRESSO7420
+config TARGET_ESPRESSO7420
bool "ESPRESSO7420 board"
select ARM64
select ARMV8_MULTIENTRY
diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c
index 97d6ca8..2645a8f 100644
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -218,7 +218,7 @@
if (actions & DO_CLOCKS) {
system_clock_init();
#ifdef CONFIG_DEBUG_UART
-#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)) || \
+#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)) || \
!defined(CONFIG_SPL_BUILD)
exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
debug_uart_init();
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 653463a..dd4f027 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,8 +1,13 @@
+config MACH_IMX
+ bool
+
config HAS_CAAM
bool
config IMX_CONFIG
- string
+ string "DCD script to use"
+ depends on MACH_IMX
+ default "arch/arm/mach-imx/spl_sd.cfg"
config ROM_UNIFIED_SECTIONS
bool
diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c
index 68b30bc..0e76786 100644
--- a/arch/arm/mach-imx/image-container.c
+++ b/arch/arm/mach-imx/image-container.c
@@ -73,7 +73,7 @@
return -ENOMEM;
}
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
if (dev_type == MMC_DEV) {
unsigned long count = 0;
struct mmc *mmc = (struct mmc *)dev;
@@ -213,7 +213,7 @@
}
#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc,
unsigned long raw_sect)
{
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index 02db322..ee5cc47 100644
--- a/arch/arm/mach-imx/imx8/cpu.c
+++ b/arch/arm/mach-imx/imx8/cpu.c
@@ -172,7 +172,7 @@
return boot_dev;
}
-#ifdef CONFIG_SERIAL_TAG
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define FUSE_UNIQUE_ID_WORD0 16
#define FUSE_UNIQUE_ID_WORD1 17
void get_board_serial(struct tag_serialnr *serialnr)
@@ -201,7 +201,7 @@
serialnr->low = val1;
serialnr->high = val2;
}
-#endif /*CONFIG_SERIAL_TAG*/
+#endif /*CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG*/
#ifdef CONFIG_ENV_IS_IN_MMC
__weak int board_mmc_get_env_dev(int devno)
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 1c33acc..bba6323 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -405,7 +405,7 @@
return 0;
}
-#ifdef CONFIG_SERIAL_TAG
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
void get_board_serial(struct tag_serialnr *serialnr)
{
u32 uid[4];
diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c
index d82efa7..09a758f 100644
--- a/arch/arm/mach-imx/misc.c
+++ b/arch/arm/mach-imx/misc.c
@@ -77,33 +77,3 @@
return 0;
}
-
-static ulong get_sp(void)
-{
- ulong ret;
-
- asm("mov %0, sp" : "=r"(ret) : );
- return ret;
-}
-
-void board_lmb_reserve(struct lmb *lmb)
-{
- ulong sp, bank_end;
- int bank;
-
- sp = get_sp();
- debug("## Current stack ends at 0x%08lx ", sp);
-
- /* adjust sp by 16K to be safe */
- sp -= 4096 << 2;
- for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
- if (sp < gd->bd->bi_dram[bank].start)
- continue;
- bank_end = gd->bd->bi_dram[bank].start +
- gd->bd->bi_dram[bank].size;
- if (sp >= bank_end)
- continue;
- lmb_reserve(lmb, sp, bank_end - sp);
- break;
- }
-}
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 515c302..ee73006 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -102,7 +102,6 @@
config MX6_DDRCAL
bool "Include dynamic DDR calibration routines"
depends on SPL
- default n
help
Say "Y" if your board uses dynamic (per-boot) DDR calibration.
If unsure, say N.
@@ -305,12 +304,12 @@
select SPL_LIBCOMMON_SUPPORT if SPL
select SPL_LIBDISK_SUPPORT if SPL
select SPL_LIBGENERIC_SUPPORT if SPL
- select SPL_MMC_SUPPORT if SPL
+ select SPL_MMC if SPL
select SPL_OF_CONTROL if SPL
select SPL_OF_LIBFDT if SPL
select SPL_PINCTRL if SPL
select SPL_SEPARATE_BSS if SPL
- select SPL_SERIAL_SUPPORT if SPL
+ select SPL_SERIAL if SPL
select SPL_USB_GADGET if SPL
select SPL_USB_HOST if SPL
select SPL_USB_SDP_SUPPORT if SPL
diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig
index adedc01..059e658 100644
--- a/arch/arm/mach-imx/mx7/Kconfig
+++ b/arch/arm/mach-imx/mx7/Kconfig
@@ -91,6 +91,7 @@
select DM
select DM_SERIAL
select DM_THERMAL
+ select MX7D
imply CMD_DM
endchoice
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index fda25ba..9c7d5f1 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -15,6 +15,7 @@
#include <asm/arch/imx-rdc.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/arch/crm_regs.h>
+#include <asm/bootm.h>
#include <dm.h>
#include <env.h>
#include <imx_thermal.h>
@@ -224,7 +225,7 @@
};
#endif
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
/* enable all periherial can be accessed in nosec mode */
static void init_csu(void)
{
@@ -337,10 +338,19 @@
int arch_misc_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+ struct tag_serialnr serialnr;
+ char serial_string[0x20];
+
if (is_mx7d())
env_set("soc", "imx7d");
else
env_set("soc", "imx7s");
+
+ /* Set serial# standard environment variable based on OTP settings */
+ get_board_serial(&serialnr);
+ snprintf(serial_string, sizeof(serial_string), "0x%08x%08x",
+ serialnr.low, serialnr.high);
+ env_set("serial#", serial_string);
#endif
#ifdef CONFIG_FSL_CAAM
@@ -351,7 +361,7 @@
}
#endif
-#ifdef CONFIG_SERIAL_TAG
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/*
* OCOTP_TESTER
* i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1, 08/2016
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 36033d6..c284524 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -199,7 +199,7 @@
}
#endif
-#if defined(CONFIG_SPL_MMC_SUPPORT)
+#if defined(CONFIG_SPL_MMC)
/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
u32 spl_mmc_boot_mode(const u32 boot_device)
{
diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c
index 6dfed36..7c02e19 100644
--- a/arch/arm/mach-imx/syscounter.c
+++ b/arch/arm/mach-imx/syscounter.c
@@ -59,7 +59,7 @@
return usec;
}
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
int timer_init(void)
{
struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c
index d213e06..9ce5761 100644
--- a/arch/arm/mach-k3/sysfw-loader.c
+++ b/arch/arm/mach-k3/sysfw-loader.c
@@ -370,7 +370,7 @@
/* Load combined System Controller firmware and config data image */
switch (bootdev.boot_device) {
-#if CONFIG_IS_ENABLED(MMC_SUPPORT)
+#if CONFIG_IS_ENABLED(MMC)
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
case BOOT_DEVICE_MMC2_2:
diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig
index e06eba5..94e6fe1 100644
--- a/arch/arm/mach-keystone/Kconfig
+++ b/arch/arm/mach-keystone/Kconfig
@@ -6,6 +6,7 @@
config TARGET_K2HK_EVM
bool "TI Keystone 2 Kepler/Hawking EVM"
+ select SOC_K2HK
select SPL_BOARD_INIT if SPL
select CMD_DDR3
imply DM_I2C
@@ -14,6 +15,7 @@
config TARGET_K2E_EVM
bool "TI Keystone 2 Edison EVM"
+ select SOC_K2E
select SPL_BOARD_INIT if SPL
select CMD_DDR3
imply DM_I2C
@@ -22,6 +24,7 @@
config TARGET_K2L_EVM
bool "TI Keystone 2 Lamar EVM"
+ select SOC_K2L
select SPL_BOARD_INIT if SPL
select CMD_DDR3
imply DM_I2C
@@ -31,6 +34,7 @@
config TARGET_K2G_EVM
bool "TI Keystone 2 Galileo EVM"
select BOARD_LATE_INIT
+ select SOC_K2G
select SPL_BOARD_INIT if SPL
select TI_I2C_BOARD_DETECT
select CMD_DDR3
@@ -40,6 +44,18 @@
endchoice
+config SOC_K2E
+ bool
+
+config SOC_K2G
+ bool
+
+config SOC_K2HK
+ bool
+
+config SOC_K2L
+ bool
+
config SYS_SOC
default "keystone"
diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h
index a4b5630..9002e26 100644
--- a/arch/arm/mach-kirkwood/include/mach/config.h
+++ b/arch/arm/mach-kirkwood/include/mach/config.h
@@ -91,18 +91,6 @@
#define CONFIG_SYS_ATA_BASE_ADDR MV_SATA_BASE
#endif /* CONFIG_IDE */
-/*
- * I2C related stuff
- */
-#if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
-#ifndef CONFIG_SYS_I2C_SOFT
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MVTWSI
-#endif
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
-#endif
-
/* Use common timer */
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
index e067604..f79a5c6 100644
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -8,7 +8,6 @@
config MT8512
bool "MediaTek MT8512 SoC"
- default n
choice
prompt "MediaTek board select"
@@ -80,12 +79,40 @@
endchoice
-source "board/mediatek/mt7622/Kconfig"
-source "board/mediatek/mt7623/Kconfig"
-source "board/mediatek/mt7629/Kconfig"
-source "board/mediatek/mt8183/Kconfig"
-source "board/mediatek/mt8512/Kconfig"
-source "board/mediatek/mt8516/Kconfig"
-source "board/mediatek/mt8518/Kconfig"
+config SYS_BOARD
+ string "Board name"
+ default "mt7622" if TARGET_MT7622
+ default "mt7623" if TARGET_MT7623
+ default "mt7629" if TARGET_MT7629
+ default "mt8183" if TARGET_MT8183
+ default "mt8512" if TARGET_MT8512
+ default "mt8516" if TARGET_MT8516
+ default "mt8518" if TARGET_MT8518
+ default ""
+ help
+ This option contains information about board name.
+ Based on this option board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> will
+ be used.
+
+config SYS_CONFIG_NAME
+ string "Board configuration name"
+ default "mt7622" if TARGET_MT7622
+ default "mt7623" if TARGET_MT7623
+ default "mt7629" if TARGET_MT7629
+ default "mt8183" if TARGET_MT8183
+ default "mt8512" if TARGET_MT8512
+ default "mt8516" if TARGET_MT8516
+ default "mt8518" if TARGET_MT8518
+ default ""
+ help
+ This option contains information about board configuration name.
+ Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
+ will be used for board configuration.
+
+config MTK_BROM_HEADER_INFO
+ string
+ default "media=nor" if TARGET_MT8518 || TARGET_MT8512 || TARGET_MT7629 || TARGET_MT7622
+ default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || TARGET_MT8183
+ default "lk=1" if TARGET_MT7623
endif
diff --git a/arch/arm/mach-mediatek/spl.c b/arch/arm/mach-mediatek/spl.c
index 927175c..d3cda94 100644
--- a/arch/arm/mach-mediatek/spl.c
+++ b/arch/arm/mach-mediatek/spl.c
@@ -31,9 +31,9 @@
u32 spl_boot_device(void)
{
-#if defined(CONFIG_SPL_SPI_SUPPORT)
+#if defined(CONFIG_SPL_SPI)
return BOOT_DEVICE_SPI;
-#elif defined(CONFIG_SPL_MMC_SUPPORT)
+#elif defined(CONFIG_SPL_MMC)
return BOOT_DEVICE_MMC1;
#elif defined(CONFIG_SPL_NAND_SUPPORT)
return BOOT_DEVICE_NAND;
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 89737a3..0876437 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -2,7 +2,6 @@
config HAVE_MVEBU_EFUSE
bool
- default n
config ARMADA_32BIT
bool
@@ -184,6 +183,33 @@
endchoice
+choice
+ prompt "DDR bus width"
+ default DDR_64BIT
+ depends on ARMADA_XP
+
+config DDR_64BIT
+ bool "64bit bus width"
+
+config DDR_32BIT
+ bool "32bit bus width"
+
+endchoice
+
+config DDR_LOG_LEVEL
+ int "DDR training code log level"
+ depends on ARMADA_XP
+ default 0
+ range 0 3
+ help
+ Amount of information provided on error while running the DDR
+ training code. At level 0, provides an error code in a case of
+ failure, RL, WL errors and other algorithm failure. At level 1,
+ provides the D-Unit setup (SPD/Static configuration). At level 2,
+ provides the windows margin as a results of DQS centeralization.
+ At level 3, rovides the windows margin of each DQ as a results of
+ DQS centeralization.
+
config SYS_BOARD
default "clearfog" if TARGET_CLEARFOG
default "helios4" if TARGET_HELIOS4
@@ -256,7 +282,7 @@
imply SPL_DM_SPI
imply SPL_SPI_FLASH_SUPPORT
imply SPL_SPI_LOAD
- imply SPL_SPI_SUPPORT
+ imply SPL_SPI
select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_MMC
@@ -267,12 +293,12 @@
imply SPL_DM_MMC
imply SPL_GPIO
imply SPL_LIBDISK_SUPPORT
- imply SPL_MMC_SUPPORT
+ imply SPL_MMC
select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_SATA
bool "SATA"
- imply SPL_SATA_SUPPORT
+ imply SPL_SATA
imply SPL_LIBDISK_SUPPORT
select SPL_BOOTROM_SUPPORT
@@ -284,14 +310,12 @@
config MVEBU_EFUSE
bool "Enable eFuse support"
- default n
depends on HAVE_MVEBU_EFUSE
help
Enable support for reading and writing eFuses on mvebu SoCs.
config MVEBU_EFUSE_FAKE
bool "Fake eFuse access (dry run)"
- default n
depends on MVEBU_EFUSE
help
This enables a "dry run" mode where eFuses are not really programmed.
diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h
index 02a5b88..6ecd394 100644
--- a/arch/arm/mach-mvebu/include/mach/config.h
+++ b/arch/arm/mach-mvebu/include/mach/config.h
@@ -27,10 +27,6 @@
#define CONFIG_SYS_L2_PL310
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-#endif
-
/*
* By default the generated mvebu kwbimage.cfg is used
* If for some board, different configuration file need to be used,
@@ -63,8 +59,6 @@
#ifndef CONFIG_SYS_I2C_SOFT
#define CONFIG_I2C_MVTWSI
#endif
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
#endif
/* Use common timer */
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 8d6d490..b798c79 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -17,7 +17,8 @@
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
-#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC_SUPPORT) || defined(CONFIG_SPL_SATA_SUPPORT)
+#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC) || \
+ defined(CONFIG_SPL_SATA)
/*
* When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must
@@ -39,7 +40,7 @@
* and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the
* kwbimage main header.
*/
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
#endif
@@ -56,7 +57,7 @@
* stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be
* set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
*/
-#ifdef CONFIG_SPL_SATA_SUPPORT
+#ifdef CONFIG_SPL_SATA
#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
#error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
#endif
@@ -92,7 +93,7 @@
uint8_t checksum; /* 0x1F */
} __packed;
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
u32 spl_mmc_boot_mode(const u32 boot_device)
{
return MMCSD_MODE_RAW;
@@ -121,10 +122,10 @@
#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
mhdr->blockid != IBR_HDR_SPI_ID &&
#endif
-#ifdef CONFIG_SPL_SATA_SUPPORT
+#ifdef CONFIG_SPL_SATA
mhdr->blockid != IBR_HDR_SATA_ID &&
#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
mhdr->blockid != IBR_HDR_SDIO_ID &&
#endif
1
@@ -135,7 +136,7 @@
spl_image->offset = mhdr->srcaddr;
-#ifdef CONFIG_SPL_SATA_SUPPORT
+#ifdef CONFIG_SPL_SATA
/*
* For SATA srcaddr is specified in number of sectors.
* The main header is must be stored at sector number 1.
@@ -152,7 +153,7 @@
}
#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
/*
* For SDIO (eMMC) srcaddr is specified in number of sectors.
* This expects that sector size is 512 bytes and recalculates
@@ -193,11 +194,11 @@
* If SPL is compiled with chosen boot_device support
* then use SPL driver for loading U-Boot proper.
*/
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
case BOOT_DEVICE_MMC1:
return BOOT_DEVICE_MMC1;
#endif
-#ifdef CONFIG_SPL_SATA_SUPPORT
+#ifdef CONFIG_SPL_SATA
case BOOT_FROM_SATA:
return BOOT_FROM_SATA;
#endif
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 0863965..2631426 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -20,11 +20,11 @@
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT
+ imply SPL_MMC
imply SPL_NAND_SUPPORT
imply SPL_OMAP3_ID_NAND
imply SPL_POWER
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply TWL4030_POWER
@@ -42,11 +42,11 @@
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT
+ imply SPL_MMC
imply SPL_NAND_SIMPLE
imply SPL_NAND_SUPPORT
imply SPL_POWER
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
@@ -66,12 +66,12 @@
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT
+ imply SPL_MMC
imply SPL_NAND_AM33XX_BCH
imply SPL_NAND_AM33XX_BCH
imply SPL_NAND_SUPPORT
imply SPL_POWER
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply SYS_I2C_OMAP24XX
config TI814X
@@ -120,6 +120,7 @@
select SPECIFY_CONSOLE_INDEX
imply NAND_OMAP_ELM
imply NAND_OMAP_GPMC
+ imply SKIP_LOWLEVEL_INIT
imply SPL_NAND_AM33XX_BCH
imply SPL_NAND_SUPPORT
imply SYS_I2C_OMAP24XX
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index 4268419..1402376 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -46,12 +46,12 @@
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT
+ imply SPL_MMC
imply SPL_NAND_SUPPORT
imply SPL_OF_LIBFDT
imply SPL_POWER
imply SPL_SEPARATE_BSS
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply SPL_SYS_MALLOC_SIMPLE
imply SPL_WATCHDOG
imply SPL_YMODEM_SUPPORT
@@ -230,10 +230,10 @@
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT
+ imply SPL_MMC
imply SPL_NAND_SUPPORT
imply SPL_POWER
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply SPL_WATCHDOG
imply SPL_YMODEM_SUPPORT
help
diff --git a/arch/arm/mach-omap2/am33xx/Makefile b/arch/arm/mach-omap2/am33xx/Makefile
index 61c76d0..4e4f98e 100644
--- a/arch/arm/mach-omap2/am33xx/Makefile
+++ b/arch/arm/mach-omap2/am33xx/Makefile
@@ -13,7 +13,7 @@
obj-$(CONFIG_TI816X) += clock_ti816x.o
obj-y += sys_info.o
obj-y += ddr.o
-ifeq ($(CONFIG_TI816X)$(CONFIG_SKIP_LOWLEVEL_INIT),)
+ifeq ($(CONFIG_TI816X)$(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),)
obj-y += emif4.o
endif
obj-$(CONFIG_TI816X) += ti816x_emif4.o
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index d390f2e..c446676 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -65,7 +65,7 @@
int dram_init(void)
{
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
sdram_init();
#endif
@@ -351,7 +351,7 @@
#endif /* CONFIG_USB_MUSB_* && CONFIG_AM335X_USB* && !CONFIG_DM_USB */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
#if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC) || \
(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_RTC_DDR_SUPPORT))
@@ -599,7 +599,7 @@
int arch_cpu_init_dm(void)
{
hw_data_init();
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
early_system_init();
#endif
return 0;
diff --git a/arch/arm/mach-omap2/am33xx/chilisom.c b/arch/arm/mach-omap2/am33xx/chilisom.c
index 15b6b35..459bac1 100644
--- a/arch/arm/mach-omap2/am33xx/chilisom.c
+++ b/arch/arm/mach-omap2/am33xx/chilisom.c
@@ -22,7 +22,7 @@
#include <power/tps65217.h>
#include <spl.h>
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
@@ -182,4 +182,4 @@
&ddr3_chilisom_emif_reg_data, 0);
}
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index 7cdf7f1..fdb8b47 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -203,7 +203,7 @@
gpmc_init();
#endif
#if defined(CONFIG_SPL_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW)
arch_misc_init();
diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c
index 14b638a..73ab5fb 100644
--- a/arch/arm/mach-omap2/clocks-common.c
+++ b/arch/arm/mach-omap2/clocks-common.c
@@ -918,8 +918,8 @@
static int gpi2c = 1;
if (gpi2c) {
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
- CONFIG_SYS_OMAP24_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_I2C_SPEED,
+ CONFIG_SYS_I2C_SLAVE);
gpi2c = 0;
}
}
diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c
index 363af52..8b70251 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -76,8 +76,8 @@
hw_data_init();
}
-#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
- !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) && \
+ !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/******************************************************************************
* Routine: secure_unlock
diff --git a/arch/arm/mach-omap2/omap3/lowlevel_init.S b/arch/arm/mach-omap2/omap3/lowlevel_init.S
index 4fa8941..ab7cdcf 100644
--- a/arch/arm/mach-omap2/omap3/lowlevel_init.S
+++ b/arch/arm/mach-omap2/omap3/lowlevel_init.S
@@ -170,8 +170,8 @@
go_to_speed_end:
#endif
-#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
- !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) && \
+ !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
ENTRY(lowlevel_init)
ldr sp, SRAM_STACK
str ip, [sp] /* stash ip register */
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 606153e..a8b87f6 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -11,7 +11,7 @@
obj-y += dram.o
obj-y += timer.o
-ifndef CONFIG_SKIP_LOWLEVEL_INIT
+ifndef CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT
obj-y += lowlevel_init.o
endif
diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig
index 69e40cf..0e9c0fa 100644
--- a/arch/arm/mach-rmobile/Kconfig
+++ b/arch/arm/mach-rmobile/Kconfig
@@ -29,7 +29,7 @@
imply SPL_GZIP
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply SPL_SYS_MALLOC_SIMPLE
imply SPL_TINY_MEMSET
imply SPL_YMODEM_SUPPORT
diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32
index d5e437f..ea98bb0 100644
--- a/arch/arm/mach-rmobile/Kconfig.32
+++ b/arch/arm/mach-rmobile/Kconfig.32
@@ -133,7 +133,6 @@
config RMOBILE_EXTRAM_BOOT
bool "Enable boot from RAM"
depends on TARGET_ALT || TARGET_BLANCHE || TARGET_KOELSCH || TARGET_LAGER || TARGET_PORTER || TARGET_SILK || TARGET_STOUT
- default n
choice
prompt "Qos setting primary"
diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index a6dcce1..9854974 100644
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -4,61 +4,73 @@
config R8A774A1
bool "Renesas SoC R8A774A1"
+ select GICV2
imply CLK_R8A774A1
imply PINCTRL_PFC_R8A774A1
config R8A774B1
bool "Renesas SoC R8A774B1"
+ select GICV2
imply CLK_R8A774B1
imply PINCTRL_PFC_R8A774B1
config R8A774C0
bool "Renesas SoC R8A774C0"
+ select GICV2
imply CLK_R8A774C0
imply PINCTRL_PFC_R8A774C0
config R8A774E1
bool "Renesas SoC R8A774E1"
+ select GICV2
imply CLK_R8A774E1
imply PINCTRL_PFC_R8A774E1
config R8A7795
bool "Renesas SoC R8A7795"
+ select GICV2
imply CLK_R8A7795
imply PINCTRL_PFC_R8A7795
config R8A7796
bool "Renesas SoC R8A7796"
+ select GICV2
imply CLK_R8A7796
imply PINCTRL_PFC_R8A7796
config R8A77965
bool "Renesas SoC R8A77965"
+ select GICV2
imply CLK_R8A77965
imply PINCTRL_PFC_R8A77965
config R8A77970
bool "Renesas SoC R8A77970"
+ select GICV2
imply CLK_R8A77970
imply PINCTRL_PFC_R8A77970
config R8A77980
bool "Renesas SoC R8A77980"
+ select GICV2
imply CLK_R8A77980
imply PINCTRL_PFC_R8A77980
config R8A77990
bool "Renesas SoC R8A77990"
+ select GICV2
imply CLK_R8A77990
imply PINCTRL_PFC_R8A77990
config R8A77995
bool "Renesas SoC R8A77995"
+ select GICV2
imply CLK_R8A77995
imply PINCTRL_PFC_R8A77995
config R8A779A0
bool "Renesas SoC R8A779A0"
+ select GICV3
imply CLK_R8A779A0
imply PINCTRL_PFC_R8A779A0
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7790.h b/arch/arm/mach-rmobile/include/mach/r8a7790.h
index f3fbf77..ef74d59 100644
--- a/arch/arm/mach-rmobile/include/mach/r8a7790.h
+++ b/arch/arm/mach-rmobile/include/mach/r8a7790.h
@@ -10,10 +10,6 @@
#include "rcar-base.h"
-/* SH-I2C */
-#define CONFIG_SYS_I2C_SH_BASE2 0xE6520000
-#define CONFIG_SYS_I2C_SH_BASE3 0xE60B0000
-
/* Module stop control/status register bits */
#define MSTP0_BITS 0x00640801
#define MSTP1_BITS 0xDB6E9BDF
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7791.h b/arch/arm/mach-rmobile/include/mach/r8a7791.h
index fec9f7b..681d1ea 100644
--- a/arch/arm/mach-rmobile/include/mach/r8a7791.h
+++ b/arch/arm/mach-rmobile/include/mach/r8a7791.h
@@ -13,9 +13,6 @@
* R-Car (R8A7791) I/O Addresses
*/
-/* SH-I2C */
-#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
-
/* SDHI */
#define CONFIG_SYS_SH_SDHI1_BASE 0xEE140000
#define CONFIG_SYS_SH_SDHI2_BASE 0xEE160000
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7792.h b/arch/arm/mach-rmobile/include/mach/r8a7792.h
index 8acd7ba..06db64a 100644
--- a/arch/arm/mach-rmobile/include/mach/r8a7792.h
+++ b/arch/arm/mach-rmobile/include/mach/r8a7792.h
@@ -10,10 +10,6 @@
#include "rcar-base.h"
-/* SH-I2C */
-#define CONFIG_SYS_I2C_SH_BASE2 0xE6520000
-#define CONFIG_SYS_I2C_SH_BASE3 0xE60B0000
-
/* Module stop control/status register bits */
#define MSTP0_BITS 0x00400801
#define MSTP1_BITS 0x9B6F987F
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7793.h b/arch/arm/mach-rmobile/include/mach/r8a7793.h
index 278c776..31433c3 100644
--- a/arch/arm/mach-rmobile/include/mach/r8a7793.h
+++ b/arch/arm/mach-rmobile/include/mach/r8a7793.h
@@ -14,9 +14,6 @@
* R8A7793 I/O Addresses
*/
-/* SH-I2C */
-#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
-
/* SDHI */
#define CONFIG_SYS_SH_SDHI1_BASE 0xEE140000
#define CONFIG_SYS_SH_SDHI2_BASE 0xEE160000
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7794.h b/arch/arm/mach-rmobile/include/mach/r8a7794.h
index 73259c7..3baa423 100644
--- a/arch/arm/mach-rmobile/include/mach/r8a7794.h
+++ b/arch/arm/mach-rmobile/include/mach/r8a7794.h
@@ -10,9 +10,6 @@
#include "rcar-base.h"
-/* SH-I2C */
-#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
-
/* Module stop control/status register bits */
#define MSTP0_BITS 0x00440801
#define MSTP1_BITS 0x936899DA
diff --git a/arch/arm/mach-rmobile/include/mach/rcar-base.h b/arch/arm/mach-rmobile/include/mach/rcar-base.h
index a207406..4c98dff 100644
--- a/arch/arm/mach-rmobile/include/mach/rcar-base.h
+++ b/arch/arm/mach-rmobile/include/mach/rcar-base.h
@@ -70,14 +70,6 @@
#define SMSTPCR10 0xE6150998
#define SMSTPCR11 0xE615099C
-/*
- * SH-I2C
- * Ch2 and ch3 are different address. These are defined
- * in the header of each SoCs.
- */
-#define CONFIG_SYS_I2C_SH_BASE0 0xE6500000
-#define CONFIG_SYS_I2C_SH_BASE1 0xE6510000
-
/* RCAR-I2C */
#define CONFIG_SYS_RCAR_I2C0_BASE 0xE6508000
#define CONFIG_SYS_RCAR_I2C1_BASE 0xE6518000
diff --git a/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h b/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
index 5cd8a8c..ca12742 100644
--- a/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
+++ b/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
@@ -74,9 +74,6 @@
#define PUEN_USB1_OVC (1 << 2)
#define PUEN_USB1_PWEN (1 << 1)
-/* IICDVFS (I2C) */
-#define CONFIG_SYS_I2C_SH_BASE0 0xE60B0000
-
#ifndef __ASSEMBLY__
#include <asm/types.h>
#include <linux/bitops.h>
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index b164afb..da6871e 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -11,8 +11,8 @@
select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
select TPL_NEEDS_SEPARATE_STACK if TPL
imply SPL_SEPARATE_BSS
- select SPL_SERIAL_SUPPORT
- select TPL_SERIAL_SUPPORT
+ select SPL_SERIAL
+ select TPL_SERIAL
select DEBUG_UART_BOARD_INIT
imply ROCKCHIP_COMMON_BOARD
imply SPL_ROCKCHIP_COMMON_BOARD
@@ -84,9 +84,9 @@
select TPL_NEEDS_SEPARATE_STACK if TPL
select SPL_DRIVERS_MISC
imply ROCKCHIP_COMMON_BOARD
- imply SPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
imply SPL_ROCKCHIP_COMMON_BOARD
- imply TPL_SERIAL_SUPPORT
+ imply TPL_SERIAL
imply TPL_ROCKCHIP_COMMON_BOARD
select TPL_LIBCOMMON_SUPPORT
select TPL_LIBGENERIC_SUPPORT
@@ -100,6 +100,7 @@
bool "Support Rockchip RK3288"
select CPU_V7A
select OF_BOARD_SETUP
+ select SKIP_LOWLEVEL_INIT_ONLY
select SUPPORT_SPL
select SPL
select SUPPORT_TPL
@@ -118,7 +119,7 @@
imply TPL_RAM
imply TPL_REGMAP
imply TPL_ROCKCHIP_COMMON_BOARD
- imply TPL_SERIAL_SUPPORT
+ imply TPL_SERIAL
imply TPL_SYSCON
imply USB_FUNCTION_ROCKUSB
imply CMD_ROCKUSB
@@ -145,8 +146,8 @@
imply SPL_REGMAP
imply SPL_SYSCON
imply SPL_RAM
- imply SPL_SERIAL_SUPPORT
- imply TPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
+ imply TPL_SERIAL
imply SPL_SEPARATE_BSS
help
The Rockchip RK3308 is a ARM-based Soc which embedded with quad
@@ -164,8 +165,8 @@
imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_SDRAM_COMMON
imply SPL_ROCKCHIP_COMMON_BOARD
- imply SPL_SERIAL_SUPPORT
- imply TPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
+ imply TPL_SERIAL
imply SPL_SEPARATE_BSS
select ENABLE_ARM_SOC_BOOT0_HOOK
select DEBUG_UART_BOARD_INIT
@@ -187,8 +188,8 @@
imply ROCKCHIP_COMMON_BOARD
imply SPL_ROCKCHIP_COMMON_BOARD
imply SPL_SEPARATE_BSS
- imply SPL_SERIAL_SUPPORT
- imply TPL_SERIAL_SUPPORT
+ imply SPL_SERIAL
+ imply TPL_SERIAL
imply TPL_ROCKCHIP_COMMON_BOARD
help
The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
@@ -218,7 +219,7 @@
select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
select TPL_NEEDS_SEPARATE_STACK if TPL
select SPL_SEPARATE_BSS
- select SPL_SERIAL_SUPPORT
+ select SPL_SERIAL
select SPL_DRIVERS_MISC
select CLK
select FIT
@@ -234,7 +235,7 @@
imply ROCKCHIP_SDRAM_COMMON
imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
imply SPL_ROCKCHIP_COMMON_BOARD
- imply TPL_SERIAL_SUPPORT
+ imply TPL_SERIAL
imply TPL_LIBCOMMON_SUPPORT
imply TPL_LIBGENERIC_SUPPORT
imply TPL_SYS_MALLOC_SIMPLE
@@ -381,7 +382,7 @@
This enables support code in the BOOT0 hook for the TPL stage
to allow multiple entries.
-config SPL_MMC_SUPPORT
+config SPL_MMC
default y if !SPL_ROCKCHIP_BACK_TO_BROM
config ROCKCHIP_SPI_IMAGE
diff --git a/arch/arm/mach-rockchip/px30-board-tpl.c b/arch/arm/mach-rockchip/px30-board-tpl.c
index 085e650..637a5e1 100644
--- a/arch/arm/mach-rockchip/px30-board-tpl.c
+++ b/arch/arm/mach-rockchip/px30-board-tpl.c
@@ -9,7 +9,6 @@
#include <init.h>
#include <ram.h>
#include <spl.h>
-#include <version.h>
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/sdram_px30.h>
diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig
index 16090f5..aa5cc47 100644
--- a/arch/arm/mach-rockchip/px30/Kconfig
+++ b/arch/arm/mach-rockchip/px30/Kconfig
@@ -36,7 +36,7 @@
config SYS_MALLOC_F_LEN
default 0x400
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
default y
config TPL_LDSCRIPT
diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig
index 51cd43b..b746795 100644
--- a/arch/arm/mach-rockchip/rk3036/Kconfig
+++ b/arch/arm/mach-rockchip/rk3036/Kconfig
@@ -22,7 +22,7 @@
config SYS_MALLOC_F_LEN
default 0x400
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
default y
source "board/rockchip/evb_rk3036/Kconfig"
diff --git a/arch/arm/mach-rockchip/rk3188/Kconfig b/arch/arm/mach-rockchip/rk3188/Kconfig
index e24e68e..9a76490 100644
--- a/arch/arm/mach-rockchip/rk3188/Kconfig
+++ b/arch/arm/mach-rockchip/rk3188/Kconfig
@@ -24,7 +24,7 @@
config SPL_LIBGENERIC_SUPPORT
default y
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
default y
config TPL_LIBCOMMON_SUPPORT
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c
index ad8c6cd..5a02914 100644
--- a/arch/arm/mach-rockchip/rk3188/rk3188.c
+++ b/arch/arm/mach-rockchip/rk3188/rk3188.c
@@ -15,6 +15,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/grf_rk3188.h>
#include <asm/arch-rockchip/hardware.h>
+#include <dm/ofnode.h>
#include <linux/err.h>
#define GRF_BASE 0x20008000
@@ -107,7 +108,6 @@
}
#ifdef CONFIG_SPL_BUILD
-DECLARE_GLOBAL_DATA_PTR;
static int setup_led(void)
{
#ifdef CONFIG_SPL_LED
@@ -115,7 +115,7 @@
char *led_name;
int ret;
- led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
+ led_name = ofnode_conf_read_str("u-boot,boot-led");
if (!led_name)
return 0;
ret = led_get_by_label(led_name, &dev);
diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig
index 2fc6f6e..6458cd5 100644
--- a/arch/arm/mach-rockchip/rk322x/Kconfig
+++ b/arch/arm/mach-rockchip/rk322x/Kconfig
@@ -20,7 +20,7 @@
config SPL_LIBGENERIC_SUPPORT
default y
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
default y
config TPL_MAX_SIZE
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index a5db59a..f37b1bd 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -163,7 +163,7 @@
config SPL_LIBGENERIC_SUPPORT
default y
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
default y
config TPL_LDSCRIPT
diff --git a/arch/arm/mach-rockchip/rk3308/Kconfig b/arch/arm/mach-rockchip/rk3308/Kconfig
index b9fdfe2..8fa536e 100644
--- a/arch/arm/mach-rockchip/rk3308/Kconfig
+++ b/arch/arm/mach-rockchip/rk3308/Kconfig
@@ -14,7 +14,7 @@
config SYS_MALLOC_F_LEN
default 0x400
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
default y
config ROCKCHIP_BOOT_MODE_REG
diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index b360ca7..2b5746c 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -21,7 +21,7 @@
U_BOOT_DRIVER(syscon_rk3399) = {
.name = "rk3399_syscon",
.id = UCLASS_SYSCON,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.of_match = rk3399_syscon_ids,
diff --git a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
index 20adfd1..5407e78 100644
--- a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
@@ -18,7 +18,7 @@
.name = "rk3568_syscon",
.id = UCLASS_SYSCON,
.of_match = rk3568_syscon_ids,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
};
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index cc908e1..3c007bb 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -16,6 +16,10 @@
#include <asm/arch-rockchip/bootrom.h>
#include <linux/bitops.h>
+#if CONFIG_IS_ENABLED(BANNER_PRINT)
+#include <timestamp.h>
+#endif
+
#define TIMER_LOAD_COUNT_L 0x00
#define TIMER_LOAD_COUNT_H 0x04
#define TIMER_CONTROL_REG 0x10
@@ -48,7 +52,7 @@
struct udevice *dev;
int ret;
-#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
+#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL)
/*
* Debug UART can be used from here if required:
*
diff --git a/arch/arm/mach-snapdragon/misc.c b/arch/arm/mach-snapdragon/misc.c
index 985625a..7d452f4 100644
--- a/arch/arm/mach-snapdragon/misc.c
+++ b/arch/arm/mach-snapdragon/misc.c
@@ -9,6 +9,7 @@
#include <common.h>
#include <mmc.h>
#include <asm/arch/misc.h>
+#include <asm/unaligned.h>
/* UNSTUFF_BITS macro taken from Linux Kernel: drivers/mmc/core/sd.c */
#define UNSTUFF_BITS(resp, start, size) \
@@ -33,21 +34,22 @@
if (!mmc_dev)
return 0;
+ if (mmc_init(mmc_dev))
+ return 0;
+
return UNSTUFF_BITS(mmc_dev->cid, 16, 32);
}
void msm_generate_mac_addr(u8 *mac)
{
- int i;
- char sn[9];
-
- snprintf(sn, 9, "%08x", msm_board_serial());
-
- /* fill in the mac with serialno, use locally adminstrated pool */
+ /* use locally adminstrated pool */
mac[0] = 0x02;
- mac[1] = 00;
- for (i = 3; i >= 0; i--) {
- mac[i + 2] = hextoul(&sn[2 * i], NULL);
- sn[2 * i] = 0;
- }
+ mac[1] = 0x00;
+
+ /*
+ * Put the 32-bit serial number in the last 32-bit of the MAC address.
+ * Use big endian order so it is consistent with the serial number
+ * written as a hexadecimal string, e.g. 0x1234abcd -> 02:00:12:34:ab:cd
+ */
+ put_unaligned_be32(msm_board_serial(), &mac[2]);
}
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index b5f43f0..ecb656e 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -93,7 +93,7 @@
}
}
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
u32 spl_mmc_boot_mode(const u32 boot_device)
{
#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c
index 7c71611..441d893 100644
--- a/arch/arm/mach-socfpga/spl_gen5.c
+++ b/arch/arm/mach-socfpga/spl_gen5.c
@@ -52,7 +52,7 @@
}
}
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
u32 spl_mmc_boot_mode(const u32 boot_device)
{
#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
diff --git a/arch/arm/mach-socfpga/spl_soc64.c b/arch/arm/mach-socfpga/spl_soc64.c
index cb98ab3..ba6efc1 100644
--- a/arch/arm/mach-socfpga/spl_soc64.c
+++ b/arch/arm/mach-socfpga/spl_soc64.c
@@ -14,7 +14,7 @@
return BOOT_DEVICE_MMC1;
}
-#if IS_ENABLED(CONFIG_SPL_MMC_SUPPORT)
+#if IS_ENABLED(CONFIG_SPL_MMC)
u32 spl_boot_mode(const u32 boot_device)
{
if (IS_ENABLED(CONFIG_SPL_FS_FAT) || IS_ENABLED(CONFIG_SPL_FS_EXT4))
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index 2f1e7d3..a439dbd 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -41,7 +41,7 @@
select SPL_OF_TRANSLATE
select SPL_PINCTRL
select SPL_RAM
- select SPL_SERIAL_SUPPORT
+ select SPL_SERIAL
select SPL_SYS_MALLOC_SIMPLE
select SPL_TIMER
select SPL_XIP_SUPPORT
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 5d7eca6..69d56c2 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -15,14 +15,14 @@
select SPL_PINCTRL
select SPL_REGMAP
select SPL_DM_RESET
- select SPL_SERIAL_SUPPORT
+ select SPL_SERIAL
select SPL_SYSCON
select SPL_WATCHDOG if WATCHDOG
imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
imply SPL_BOOTSTAGE if BOOTSTAGE
imply SPL_DISPLAY_PRINT
imply SPL_LIBDISK_SUPPORT
- imply SPL_SPI_LOAD if SPL_SPI_SUPPORT
+ imply SPL_SPI_LOAD if SPL_SPI
config SYS_SOC
default "stm32mp"
@@ -190,7 +190,6 @@
config CMD_STM32KEY
bool "command stm32key to fuse public key hash"
- default n
help
fuse public key hash in corresponding fuse used to authenticate
binary.
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 49f94f0..1d4a4fd 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -209,6 +209,8 @@
select DRAM_SUN4I
select SUNXI_GEN_SUN4I
select SUPPORT_SPL
+ imply SPL_SYS_I2C_LEGACY
+ imply SYS_I2C_LEGACY
config MACH_SUN5I
bool "sun5i (Allwinner A13)"
@@ -219,6 +221,8 @@
select SUNXI_GEN_SUN4I
select SUPPORT_SPL
imply CONS_INDEX_2 if !DM_SERIAL
+ imply SPL_SYS_I2C_LEGACY
+ imply SYS_I2C_LEGACY
config MACH_SUN6I
bool "sun6i (Allwinner A31)"
@@ -245,6 +249,8 @@
select SUNXI_GEN_SUN4I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+ imply SPL_SYS_I2C_LEGACY
+ imply SYS_I2C_LEGACY
config MACH_SUN8I_A23
bool "sun8i (Allwinner A23)"
@@ -303,6 +309,7 @@
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_32BIT
select PHY_SUN4I_USB
+ imply SPL_SYS_I2C_LEGACY
config MACH_SUN8I_V3S
bool "sun8i (Allwinner V3/V3s/S3/S3L)"
@@ -622,7 +629,6 @@
config UART0_PORT_F
bool "UART0 on MicroSD breakout board"
- default n
---help---
Repurpose the SD card slot for getting access to the UART0 serial
console. Primarily useful only for low level u-boot debugging on
@@ -633,7 +639,6 @@
config OLD_SUNXI_KERNEL_COMPAT
bool "Enable workarounds for booting old kernels"
- default n
---help---
Set this to enable various workarounds for old kernels, this results in
sub-optimal settings for newer kernels, only enable if needed.
@@ -764,14 +769,12 @@
config I2C1_ENABLE
bool "Enable I2C/TWI controller 1"
- default n
select CMD_I2C
---help---
See I2C0_ENABLE help text.
config I2C2_ENABLE
bool "Enable I2C/TWI controller 2"
- default n
select CMD_I2C
---help---
See I2C0_ENABLE help text.
@@ -779,7 +782,6 @@
if MACH_SUN6I || MACH_SUN7I
config I2C3_ENABLE
bool "Enable I2C/TWI controller 3"
- default n
select CMD_I2C
---help---
See I2C0_ENABLE help text.
@@ -798,7 +800,6 @@
if MACH_SUN7I
config I2C4_ENABLE
bool "Enable I2C/TWI controller 4"
- default n
select CMD_I2C
---help---
See I2C0_ENABLE help text.
@@ -806,7 +807,6 @@
config AXP_GPIO
bool "Enable support for gpio-s on axp PMICs"
- default n
---help---
Say Y here to enable support for the gpio pins of the axp PMIC ICs.
@@ -838,14 +838,12 @@
config VIDEO_VGA
bool "VGA output support"
depends on VIDEO_SUNXI && (MACH_SUN4I || MACH_SUN7I)
- default n
---help---
Say Y here to add support for outputting video over VGA.
config VIDEO_VGA_VIA_LCD
bool "VGA via LCD controller support"
depends on VIDEO_SUNXI && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
- default n
---help---
Say Y here to add support for external DACs connected to the parallel
LCD interface driving a VGA connector, such as found on the
@@ -854,7 +852,6 @@
config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
bool "Force sync active high for VGA via LCD controller support"
depends on VIDEO_VGA_VIA_LCD
- default n
---help---
Say Y here if you've a board which uses opendrain drivers for the vga
hsync and vsync signals. Opendrain drivers cannot generate steep enough
@@ -872,7 +869,6 @@
config VIDEO_COMPOSITE
bool "Composite video output support"
depends on VIDEO_SUNXI && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
- default n
---help---
Say Y here to add support for outputting composite video.
@@ -936,7 +932,6 @@
config VIDEO_LCD_PANEL_I2C
bool "LCD panel needs to be configured via i2c"
depends on VIDEO_SUNXI
- default n
select CMD_I2C
---help---
Say y here if the LCD panel needs to be configured via i2c. This
@@ -969,7 +964,6 @@
config SUNXI_DE2
bool
- default n
config VIDEO_DE2
bool "Display Engine 2 video driver"
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 478c7a9..957e3ce 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -9,7 +9,7 @@
config SPL_LIBGENERIC_SUPPORT
default y
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
default y
config TEGRA_CLKRST
@@ -72,6 +72,7 @@
select CPU_V7A
select SPL
select SPL_BOARD_INIT if SPL
+ select SPL_SKIP_LOWLEVEL_INIT_ONLY if SPL
select SUPPORT_SPL
select TEGRA_CLKRST
select TEGRA_COMMON
@@ -124,6 +125,7 @@
config TEGRA210
bool "Tegra210 family"
+ select GICV2
select TEGRA_ARMV8_COMMON
select TEGRA_CLKRST
select TEGRA_GPIO
@@ -137,6 +139,7 @@
config TEGRA186
bool "Tegra186 family"
select DM_MAILBOX
+ select GICV2
select TEGRA186_BPMP
select TEGRA186_CLOCK
select TEGRA186_GPIO
diff --git a/arch/arm/mach-u8500/Kconfig b/arch/arm/mach-u8500/Kconfig
index db7a29a..b067a71 100644
--- a/arch/arm/mach-u8500/Kconfig
+++ b/arch/arm/mach-u8500/Kconfig
@@ -13,14 +13,15 @@
The Samsung "stemmy" board supports Samsung smartphones released with
the ST-Ericsson NovaThor U8500 SoC, e.g.
- - Samsung Galaxy S III mini (GT-I8190) "golden"
+ - Samsung Galaxy Ace 2 (GT-I8160) "codina"
+ - Samsung Galaxy Amp (SGH-I407) "kyle"
+ - Samsung Galaxy Beam (GT-I8530) "gavini"
+ - Samsung Galaxy Exhibit (SGH-T599) "codina" (TMO)
- Samsung Galaxy S Advance (GT-I9070) "janice"
+ - Samsung Galaxy S III mini (GT-I8190) "golden"
- Samsung Galaxy Xcover 2 (GT-S7710) "skomer"
- - Samsung Galaxy Ace 2 (GT-I8160) "codina"
-
- and likely others as well (untested).
- See board/ste/stemmy/README for details.
+ See doc/board/ste/stemmy.rst for details.
endchoice
diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index d333b70..5172efa 100644
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -6,7 +6,7 @@
obj-y += spl_board_init.o
obj-y += memconf.o
obj-y += bcu/
-obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc-boot-mode.o
+obj-$(CONFIG_SPL_MMC) += mmc-boot-mode.o
else
diff --git a/arch/arm/mach-versal/Kconfig b/arch/arm/mach-versal/Kconfig
index ebd2da3..0c6ad34 100644
--- a/arch/arm/mach-versal/Kconfig
+++ b/arch/arm/mach-versal/Kconfig
@@ -21,9 +21,6 @@
Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
will be used for board configuration.
-config GICV3
- def_bool y
-
config SYS_MALLOC_LEN
default 0x2000000
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index e543103..cf2e727 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -15,16 +15,16 @@
config SPL_LIBGENERIC_SUPPORT
default y
-config SPL_MMC_SUPPORT
+config SPL_MMC
default y if MMC_SDHCI_ZYNQ
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
default y
config SPL_SPI_FLASH_SUPPORT
default y if ZYNQ_QSPI
-config SPL_SPI_SUPPORT
+config SPL_SPI
default y if ZYNQ_QSPI
config ZYNQ_DDRC_INIT
diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c
index d09141c..b1a5184 100644
--- a/arch/arm/mach-zynq/spl.c
+++ b/arch/arm/mach-zynq/spl.c
@@ -45,7 +45,7 @@
u32 mode;
switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
-#ifdef CONFIG_SPL_SPI_SUPPORT
+#ifdef CONFIG_SPL_SPI
case ZYNQ_BM_QSPI:
mode = BOOT_DEVICE_SPI;
break;
@@ -56,7 +56,7 @@
case ZYNQ_BM_NOR:
mode = BOOT_DEVICE_NOR;
break;
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
case ZYNQ_BM_SD:
mode = BOOT_DEVICE_MMC1;
break;
diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig
index 39144d6..f7b08db 100644
--- a/arch/arm/mach-zynqmp/Kconfig
+++ b/arch/arm/mach-zynqmp/Kconfig
@@ -12,16 +12,16 @@
config SPL_LIBGENERIC_SUPPORT
default y
-config SPL_MMC_SUPPORT
+config SPL_MMC
default y if MMC_SDHCI_ZYNQ
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
default y
config SPL_SPI_FLASH_SUPPORT
default y if ZYNQ_QSPI
-config SPL_SPI_SUPPORT
+config SPL_SPI
default y if ZYNQ_QSPI
config SYS_BOARD
diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
index 8fcae2c..6b836cb 100644
--- a/arch/arm/mach-zynqmp/spl.c
+++ b/arch/arm/mach-zynqmp/spl.c
@@ -88,7 +88,7 @@
switch (bootmode) {
case JTAG_MODE:
return BOOT_DEVICE_RAM;
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
case SD_MODE1:
case SD1_LSHFT_MODE: /* not working on silicon v1 */
return BOOT_DEVICE_MMC2;
@@ -100,11 +100,11 @@
case USB_MODE:
return BOOT_DEVICE_DFU;
#endif
-#ifdef CONFIG_SPL_SATA_SUPPORT
+#ifdef CONFIG_SPL_SATA
case SW_SATA_MODE:
return BOOT_DEVICE_SATA;
#endif
-#ifdef CONFIG_SPL_SPI_SUPPORT
+#ifdef CONFIG_SPL_SPI
case QSPI_MODE_24BIT:
case QSPI_MODE_32BIT:
return BOOT_DEVICE_SPI;
diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S
index 86c93ba..5415c51 100644
--- a/arch/m68k/cpu/mcf5227x/start.S
+++ b/arch/m68k/cpu/mcf5227x/start.S
@@ -6,7 +6,6 @@
#include <asm-offsets.h>
#include <config.h>
-#include "version.h"
#include <asm/cache.h>
#define _START _start
@@ -489,7 +488,4 @@
/******************************************************************************/
-.globl version_string
-version_string:
-.ascii U_BOOT_VERSION_STRING, "\0"
.align 4
diff --git a/arch/m68k/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S
index 8c5a164..4c9c96d 100644
--- a/arch/m68k/cpu/mcf523x/start.S
+++ b/arch/m68k/cpu/mcf523x/start.S
@@ -6,7 +6,6 @@
#include <asm-offsets.h>
#include <config.h>
-#include "version.h"
#include <asm/cache.h>
#define _START _start
@@ -253,7 +252,4 @@
/******************************************************************************/
-.globl version_string
-version_string:
-.ascii U_BOOT_VERSION_STRING, "\0"
.align 4
diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S
index 747a518..d3cdc42 100644
--- a/arch/m68k/cpu/mcf52x2/start.S
+++ b/arch/m68k/cpu/mcf52x2/start.S
@@ -6,7 +6,6 @@
#include <asm-offsets.h>
#include <config.h>
-#include "version.h"
#include <asm/cache.h>
#define _START _start
@@ -335,7 +334,4 @@
/******************************************************************************/
-.globl version_string
-version_string:
-.ascii U_BOOT_VERSION_STRING, "\0"
.align 4
diff --git a/arch/m68k/cpu/mcf530x/start.S b/arch/m68k/cpu/mcf530x/start.S
index 32356d8..0daff5d 100644
--- a/arch/m68k/cpu/mcf530x/start.S
+++ b/arch/m68k/cpu/mcf530x/start.S
@@ -6,7 +6,6 @@
#include <asm-offsets.h>
#include <config.h>
-#include "version.h"
#include <asm/cache.h>
#define _START _start
@@ -258,9 +257,4 @@
/******************************************************************************/
-.globl version_string
-version_string:
-.ascii U_BOOT_VERSION
-.ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
-.ascii CONFIG_IDENT_STRING, "\0"
.align 4
diff --git a/arch/m68k/cpu/mcf532x/start.S b/arch/m68k/cpu/mcf532x/start.S
index e2d7c72..2672891 100644
--- a/arch/m68k/cpu/mcf532x/start.S
+++ b/arch/m68k/cpu/mcf532x/start.S
@@ -9,7 +9,6 @@
#include <asm-offsets.h>
#include <config.h>
-#include "version.h"
#include <asm/cache.h>
#define _START _start
@@ -268,7 +267,4 @@
/******************************************************************************/
-.globl version_string
-version_string:
-.ascii U_BOOT_VERSION_STRING, "\0"
.align 4
diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S
index 7007d78..e010ac0 100644
--- a/arch/m68k/cpu/mcf5445x/start.S
+++ b/arch/m68k/cpu/mcf5445x/start.S
@@ -10,8 +10,6 @@
#include <common.h>
#include <asm-offsets.h>
#include <config.h>
-#include <timestamp.h>
-#include "version.h"
#include <asm/cache.h>
#define _START _start
@@ -610,7 +608,4 @@
/******************************************************************************/
-.globl version_string
-version_string:
-.ascii U_BOOT_VERSION_STRING, "\0"
.align 4
diff --git a/arch/m68k/cpu/u-boot.lds b/arch/m68k/cpu/u-boot.lds
index 64cf2ff..affb2d9 100644
--- a/arch/m68k/cpu/u-boot.lds
+++ b/arch/m68k/cpu/u-boot.lds
@@ -9,6 +9,7 @@
#include <config.h>
OUTPUT_ARCH(m68k)
+ENTRY(_start)
#ifndef LDS_BOARD_TEXT
#define LDS_BOARD_TEXT
diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c
index 51a6f93..27729db 100644
--- a/arch/m68k/lib/bootm.c
+++ b/arch/m68k/lib/bootm.c
@@ -32,23 +32,7 @@
void arch_lmb_reserve(struct lmb *lmb)
{
- ulong sp;
-
- /*
- * Booting a (Linux) kernel image
- *
- * Allocate space for command line and board info - the
- * address should be as high as possible within the reach of
- * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
- * memory, which means far enough below the current stack
- * pointer.
- */
- sp = get_sp();
- debug ("## Current stack ends at 0x%08lx ", sp);
-
- /* adjust sp by 1K to be safe */
- sp -= 1024;
- lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 1024);
}
int do_bootm_linux(int flag, int argc, char *const argv[],
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 6695ac6..3a6da6e 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -34,33 +34,7 @@
void arch_lmb_reserve(struct lmb *lmb)
{
- ulong sp, bank_end;
- int bank;
-
- /*
- * Booting a (Linux) kernel image
- *
- * Allocate space for command line and board info - the
- * address should be as high as possible within the reach of
- * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
- * memory, which means far enough below the current stack
- * pointer.
- */
- sp = get_sp();
- debug("## Current stack ends at 0x%08lx ", sp);
-
- /* adjust sp by 4K to be safe */
- sp -= 4096;
- for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
- if (sp < gd->bd->bi_dram[bank].start)
- continue;
- bank_end = gd->bd->bi_dram[bank].start +
- gd->bd->bi_dram[bank].size;
- if (sp >= bank_end)
- continue;
- lmb_reserve(lmb, sp, bank_end - sp);
- break;
- }
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
}
static void boot_jump_linux(bootm_headers_t *images, int flag)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a5cec38..28234aa 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -22,7 +22,7 @@
select DYNAMIC_IO_PORT_BASE
select MIPS_CM
select MIPS_INSERT_BOOT_CONFIG
- select MIPS_L1_CACHE_SHIFT_6
+ select SYS_CACHE_SHIFT_6
select MIPS_L2_CACHE
select OF_CONTROL
select OF_ISA_BUS
@@ -132,7 +132,7 @@
select DM
select DM_SERIAL
select MIPS_CM
- select MIPS_L1_CACHE_SHIFT_6
+ select SYS_CACHE_SHIFT_6
select MIPS_L2_CACHE
select OF_BOARD_SETUP
select OF_CONTROL
@@ -153,7 +153,7 @@
select DM_ETH
select DM_GPIO
select DM_SERIAL
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select OF_CONTROL
select ROM_EXCEPTION_VECTORS
select SUPPORTS_CPU_MIPS32_R1
@@ -346,7 +346,6 @@
config RESTORE_EXCEPTION_VECTOR_BASE
bool "Restore exception vector base before booting linux kernel"
- default n
help
In U-Boot the exception vector base will be moved to top of memory,
to be used to display register dump when exception occurs.
@@ -361,7 +360,6 @@
config OVERRIDE_EXCEPTION_VECTOR_BASE
bool "Override the exception vector base to be restored"
depends on RESTORE_EXCEPTION_VECTOR_BASE
- default n
help
Enable this option if you want to use a different exception vector
base rather than the previously saved one.
@@ -376,7 +374,6 @@
config INIT_STACK_WITHOUT_MALLOC_F
bool "Do not reserve malloc space on initial stack"
- default n
help
Enable this option if you don't want to reserve malloc space on
initial stack. This is useful if the initial stack can't hold large
@@ -385,7 +382,6 @@
config SPL_INIT_STACK_WITHOUT_MALLOC_F
bool "Do not reserve malloc space on initial stack in SPL"
- default n
help
Enable this option if you don't want to reserve malloc space on
initial stack. This is useful if the initial stack can't hold large
@@ -394,7 +390,6 @@
config SPL_LOADER_SUPPORT
bool
- default n
help
Enable this option if you want to use SPL loaders without DM enabled.
@@ -422,7 +417,6 @@
config MIPS_BOOT_FDT
bool "Hand over a flattened device tree to Linux kernel"
- default n
help
Enable this option if you want U-Boot to hand over a flattened
device tree to the kernel. According to UHI register $a0 will be set
@@ -501,7 +495,6 @@
config MIPS_INIT_STACK_IN_SRAM
bool
- default n
help
Select this if the initial stack frame could be setup in SRAM.
Normally the initial stack frame is set up in DRAM which is often
@@ -512,7 +505,6 @@
config MIPS_SRAM_INIT
bool
- default n
depends on MIPS_INIT_STACK_IN_SRAM
help
Select this if the SRAM for initial stack needs to be initialized
@@ -566,26 +558,6 @@
so if you know the cache configuration for your system at compile
time it would be beneficial to configure it.
-config MIPS_L1_CACHE_SHIFT_4
- bool
-
-config MIPS_L1_CACHE_SHIFT_5
- bool
-
-config MIPS_L1_CACHE_SHIFT_6
- bool
-
-config MIPS_L1_CACHE_SHIFT_7
- bool
-
-config MIPS_L1_CACHE_SHIFT
- int
- default "7" if MIPS_L1_CACHE_SHIFT_7
- default "6" if MIPS_L1_CACHE_SHIFT_6
- default "5" if MIPS_L1_CACHE_SHIFT_5
- default "4" if MIPS_L1_CACHE_SHIFT_4
- default "5"
-
config MIPS_L2_CACHE
bool
help
@@ -604,7 +576,6 @@
config MIPS_INSERT_BOOT_CONFIG
bool
- default n
help
Enable this to insert some board-specific boot configuration in
the U-Boot binary at offset 0x10.
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S
index 335aafa..47251a5 100644
--- a/arch/mips/cpu/start.S
+++ b/arch/mips/cpu/start.S
@@ -233,7 +233,7 @@
# endif
#endif
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
# ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD
/* Initialize any external memory */
PTR_LA t9, lowlevel_init
@@ -254,7 +254,7 @@
nop
#endif
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
# ifndef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD
/* Initialize any external memory */
PTR_LA t9, lowlevel_init
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
index 00696e6..d3e8a8c 100644
--- a/arch/mips/include/asm/cache.h
+++ b/arch/mips/include/asm/cache.h
@@ -6,17 +6,7 @@
#ifndef __MIPS_CACHE_H__
#define __MIPS_CACHE_H__
-#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
-
-#define ARCH_DMA_MINALIGN (L1_CACHE_BYTES)
-
-/*
- * CONFIG_SYS_CACHELINE_SIZE is still used in various drivers primarily for
- * DMA buffer alignment. Satisfy those drivers by providing it as a synonym
- * of ARCH_DMA_MINALIGN for now.
- */
-#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
+#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
#ifndef __ASSEMBLY__
/**
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index fde90fc..cab8da4 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -39,14 +39,7 @@
void arch_lmb_reserve(struct lmb *lmb)
{
- ulong sp;
-
- sp = arch_get_sp();
- debug("## Current stack ends at 0x%08lx\n", sp);
-
- /* adjust sp by 4K to be safe */
- sp -= 4096;
- lmb_reserve(lmb, sp, gd->ram_top - sp);
+ arch_lmb_reserve_generic(lmb, arch_get_sp(), gd->ram_top, 4096);
}
static void linux_cmdline_init(void)
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index b259a93..01d919f 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -21,7 +21,7 @@
config SOC_BMIPS_BCM3380
bool "BMIPS BCM3380 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -31,7 +31,7 @@
config SOC_BMIPS_BCM6318
bool "BMIPS BCM6318 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -41,7 +41,7 @@
config SOC_BMIPS_BCM6328
bool "BMIPS BCM6328 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -51,7 +51,7 @@
config SOC_BMIPS_BCM6338
bool "BMIPS BCM6338 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -61,7 +61,7 @@
config SOC_BMIPS_BCM6348
bool "BMIPS BCM6348 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -71,7 +71,7 @@
config SOC_BMIPS_BCM6358
bool "BMIPS BCM6358 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -81,7 +81,7 @@
config SOC_BMIPS_BCM6368
bool "BMIPS BCM6368 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -91,7 +91,7 @@
config SOC_BMIPS_BCM6362
bool "BMIPS BCM6362 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -101,7 +101,7 @@
config SOC_BMIPS_BCM63268
bool "BMIPS BCM63268 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -112,7 +112,7 @@
config SOC_BMIPS_BCM6838
bool "BMIPS BCM6838 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index 8756cadb..151b004 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -1,6 +1,9 @@
menu "MediaTek MIPS platforms"
depends on ARCH_MTMIPS
+config SYS_VENDOR
+ default "mediatek" if BOARD_MT7628_RFB || BOARD_MT7620_RFB || BOARD_MT7620_MT7530_RFB
+
config SYS_MALLOC_F_LEN
default 0x1000
@@ -39,7 +42,7 @@
config SOC_MT7620
bool "MT7620"
- select MIPS_L1_CACHE_SHIFT_5
+ select SYS_CACHE_SHIFT_5
select SYS_MIPS_CACHE_INIT_RAM_LOAD
select PINCTRL_MT7620
select MT7620_SERIAL
@@ -54,7 +57,7 @@
config SOC_MT7628
bool "MT7628"
- select MIPS_L1_CACHE_SHIFT_5
+ select SYS_CACHE_SHIFT_5
select MIPS_INIT_STACK_IN_SRAM
select MIPS_SRAM_INIT
select SYS_MIPS_CACHE_INIT_RAM_LOAD
@@ -68,7 +71,7 @@
select SPL_OF_CONTROL if SPL_DM
select SPL_SIMPLE_BUS if SPL_DM
select SPL_DM_SERIAL if SPL_DM
- select SPL_CLK if SPL_DM && SPL_SERIAL_SUPPORT
+ select SPL_CLK if SPL_DM && SPL_SERIAL
select SPL_SYSRESET if SPL_DM
select SPL_OF_LIBFDT if SPL_OF_CONTROL
help
diff --git a/arch/mips/mach-mtmips/mt7620/Kconfig b/arch/mips/mach-mtmips/mt7620/Kconfig
index 5db83eb..3ca711a 100644
--- a/arch/mips/mach-mtmips/mt7620/Kconfig
+++ b/arch/mips/mach-mtmips/mt7620/Kconfig
@@ -66,6 +66,12 @@
default 6 if CPU_FREQ_600MHZ
default 7 if CPU_FREQ_620MHZ
-source "board/mediatek/mt7620/Kconfig"
+config SYS_CONFIG_NAME
+ string "Board configuration name"
+ default "mt7620" if BOARD_MT7620_RFB || BOARD_MT7620_MT7530_RFB
+
+config SYS_BOARD
+ string "Board name"
+ default "mt7620" if BOARD_MT7620_RFB || BOARD_MT7620_MT7530_RFB
endif
diff --git a/arch/mips/mach-mtmips/mt7620/serial.c b/arch/mips/mach-mtmips/mt7620/serial.c
index 44f061c..35544b8 100644
--- a/arch/mips/mach-mtmips/mt7620/serial.c
+++ b/arch/mips/mach-mtmips/mt7620/serial.c
@@ -23,7 +23,7 @@
void mtmips_spl_serial_init(void)
{
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
+#ifdef CONFIG_SPL_SERIAL
void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE);
#if CONFIG_CONS_INDEX == 1
@@ -32,5 +32,5 @@
clrsetbits_32(base + SYSCTL_GPIOMODE_REG, UARTF_SHARE_MODE_M,
UARTF_MODE_UARTF_GPIO << UARTF_SHARE_MODE_S);
#endif
-#endif /* CONFIG_SPL_SERIAL_SUPPORT */
+#endif /* CONFIG_SPL_SERIAL */
}
diff --git a/arch/mips/mach-mtmips/mt7628/Kconfig b/arch/mips/mach-mtmips/mt7628/Kconfig
index e3f56e7..e727359 100644
--- a/arch/mips/mach-mtmips/mt7628/Kconfig
+++ b/arch/mips/mach-mtmips/mt7628/Kconfig
@@ -29,7 +29,7 @@
config BOARD_VOCORE2
bool "VoCore2"
- select SPL_SERIAL_SUPPORT
+ select SPL_SERIAL
select SPL_UART2_SPIS_PINMUX
help
VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM
@@ -39,14 +39,20 @@
config SPL_UART2_SPIS_PINMUX
bool "Use alternative pinmux for UART2 in SPL stage"
- depends on SPL_SERIAL_SUPPORT
- default n
+ depends on SPL_SERIAL
help
Select this if the UART2 of your board is connected to GPIO 16/17
(shared with SPIS) rather than the usual GPIO 20/21.
+config SYS_BOARD
+ string "Board name"
+ default "mt7628" if BOARD_MT7628_RFB
+
+config SYS_CONFIG_NAME
+ string "Board configuration name"
+ default "mt7628" if BOARD_MT7628_RFB
+
source "board/gardena/smart-gateway-mt7688/Kconfig"
-source "board/mediatek/mt7628/Kconfig"
source "board/seeed/linkit-smart-7688/Kconfig"
source "board/vocore/vocore2/Kconfig"
diff --git a/arch/mips/mach-mtmips/mt7628/lowlevel_init.S b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S
index e4a6c03..83cd8fa 100644
--- a/arch/mips/mach-mtmips/mt7628/lowlevel_init.S
+++ b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S
@@ -28,7 +28,7 @@
.set noreorder
LEAF(mips_sram_init)
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
/* Setup CPU PLL */
li t0, DELAY_USEC(1000000)
li t1, KSEG1ADDR(SYSCTL_BASE + SYSCTL_ROM_STATUS_REG)
@@ -116,7 +116,7 @@
sub a1, CONFIG_SYS_DCACHE_LINE_SIZE
bnez a1, 3b
nop
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
jr ra
nop
diff --git a/arch/mips/mach-mtmips/mt7628/serial.c b/arch/mips/mach-mtmips/mt7628/serial.c
index a7d3247..e5f3f87 100644
--- a/arch/mips/mach-mtmips/mt7628/serial.c
+++ b/arch/mips/mach-mtmips/mt7628/serial.c
@@ -11,7 +11,7 @@
void mtmips_spl_serial_init(void)
{
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
+#ifdef CONFIG_SPL_SERIAL
void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE);
#if CONFIG_CONS_INDEX == 1
@@ -30,5 +30,5 @@
1 << SPIS_MODE_S);
#endif /* CONFIG_SPL_UART2_SPIS_PINMUX */
#endif /* CONFIG_CONS_INDEX */
-#endif /* CONFIG_SPL_SERIAL_SUPPORT */
+#endif /* CONFIG_SPL_SERIAL */
}
diff --git a/arch/mips/mach-mtmips/spl.c b/arch/mips/mach-mtmips/spl.c
index 95201b8..fe5b49e 100644
--- a/arch/mips/mach-mtmips/spl.c
+++ b/arch/mips/mach-mtmips/spl.c
@@ -17,7 +17,7 @@
{
spl_init();
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
+#ifdef CONFIG_SPL_SERIAL
/*
* mtmips_spl_serial_init() is useful if debug uart is enabled,
* or DM based serial is not enabled.
diff --git a/arch/mips/mach-pic32/Kconfig b/arch/mips/mach-pic32/Kconfig
index 5f13bf1..2afa972 100644
--- a/arch/mips/mach-pic32/Kconfig
+++ b/arch/mips/mach-pic32/Kconfig
@@ -9,7 +9,7 @@
config SOC_PIC32MZDA
bool "Microchip PIC32MZ[DA] family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select ROM_EXCEPTION_VECTORS
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
diff --git a/arch/nds32/Kconfig b/arch/nds32/Kconfig
index b6f16bf..4353337 100644
--- a/arch/nds32/Kconfig
+++ b/arch/nds32/Kconfig
@@ -18,7 +18,6 @@
config SYS_ICACHE_OFF
bool "Do not enable icache"
- default n
help
Do not enable instruction cache in U-Boot.
@@ -31,7 +30,6 @@
config SYS_DCACHE_OFF
bool "Do not enable dcache"
- default n
help
Do not enable data cache in U-Boot.
diff --git a/arch/nds32/cpu/n1213/ae3xx/lowlevel_init.S b/arch/nds32/cpu/n1213/ae3xx/lowlevel_init.S
index 507d79e..25ec185 100644
--- a/arch/nds32/cpu/n1213/ae3xx/lowlevel_init.S
+++ b/arch/nds32/cpu/n1213/ae3xx/lowlevel_init.S
@@ -94,7 +94,7 @@
move $lp, $r11
ret
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
.globl lowlevel_init
lowlevel_init:
move $r10, $lp
@@ -144,4 +144,4 @@
ret
#endif
-#endif /* #ifndef CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
diff --git a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
index 73f1f52..ce5fefd 100644
--- a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
+++ b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
@@ -164,7 +164,7 @@
ret
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
.globl lowlevel_init
lowlevel_init:
@@ -314,4 +314,4 @@
li $r8, (CONFIG_DEBUG_LED)
swi $r7, [$r8]
ret
-#endif /* #ifndef CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S
index 3395721..f02508f 100644
--- a/arch/nds32/cpu/n1213/start.S
+++ b/arch/nds32/cpu/n1213/start.S
@@ -174,7 +174,7 @@
jal mem_init
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
jal lowlevel_init
/*
* gp = ~VMA for burn mode
diff --git a/arch/nds32/include/asm/bootm.h b/arch/nds32/include/asm/bootm.h
index 804f858..c956fdd 100644
--- a/arch/nds32/include/asm/bootm.h
+++ b/arch/nds32/include/asm/bootm.h
@@ -12,11 +12,7 @@
extern void udc_disconnect(void);
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
- defined(CONFIG_CMDLINE_TAG) || \
- defined(CONFIG_INITRD_TAG) || \
- defined(CONFIG_SERIAL_TAG) || \
- defined(CONFIG_REVISION_TAG)
+#ifdef CONFIG_SUPPORT_PASSING_ATAGS
# define BOOTM_ENABLE_TAGS 1
#else
# define BOOTM_ENABLE_TAGS 0
diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c
index 4cb0f53..1c7f785 100644
--- a/arch/nds32/lib/bootm.c
+++ b/arch/nds32/lib/bootm.c
@@ -19,11 +19,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
- defined(CONFIG_CMDLINE_TAG) || \
- defined(CONFIG_INITRD_TAG) || \
- defined(CONFIG_SERIAL_TAG) || \
- defined(CONFIG_REVISION_TAG)
+#ifdef CONFIG_SUPPORT_PASSING_ATAGS
static void setup_start_tag(struct bd_info *bd);
# ifdef CONFIG_SETUP_MEMORY_TAGS
@@ -38,7 +34,7 @@
static void setup_end_tag(struct bd_info *bd);
static struct tag *params;
-#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
+#endif /* CONFIG_SUPPORT_PASSING_ATAGS */
int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
{
@@ -82,11 +78,7 @@
}
#endif
} else if (BOOTM_ENABLE_TAGS) {
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
- defined(CONFIG_CMDLINE_TAG) || \
- defined(CONFIG_INITRD_TAG) || \
- defined(CONFIG_SERIAL_TAG) || \
- defined(CONFIG_REVISION_TAG)
+#ifdef CONFIG_SUPPORT_PASSING_ATAGS
setup_start_tag(bd);
#ifdef CONFIG_SERIAL_TAG
setup_serial_tag(¶ms);
@@ -127,11 +119,7 @@
return 1;
}
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
- defined(CONFIG_CMDLINE_TAG) || \
- defined(CONFIG_INITRD_TAG) || \
- defined(CONFIG_SERIAL_TAG) || \
- defined(CONFIG_REVISION_TAG)
+#ifdef CONFIG_SUPPORT_PASSING_ATAGS
static void setup_start_tag(struct bd_info *bd)
{
params = (struct tag *)bd->bi_boot_params;
@@ -244,4 +232,17 @@
params->hdr.size = 0;
}
-#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
+#endif /* CONFIG_SUPPORT_PASSING_ATAGS */
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("move %0, $sp" : "=r"(ret) : );
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
+}
diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S
index f5ad184..acb8ca6 100644
--- a/arch/nios2/cpu/start.S
+++ b/arch/nios2/cpu/start.S
@@ -6,7 +6,6 @@
#include <asm-offsets.h>
#include <config.h>
-#include <version.h>
/*
* icache and dcache configuration used only for start.S.
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
index 5037467..3cb59bd 100644
--- a/arch/nios2/lib/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -10,6 +10,9 @@
#include <image.h>
#include <irq_func.h>
#include <log.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
#define NIOS_MAGIC 0x534f494e /* enable command line and initrd passing */
@@ -60,3 +63,16 @@
return 1;
}
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mov %0, sp" : "=r"(ret) : );
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
+}
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 083febe..fcf4ef2 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -119,7 +119,7 @@
config MPC83XX_SDHC_SUPPORT
bool
-config MPC83XX_SATA_SUPPORT
+config MPC83XX_SATA
bool
config MPC83XX_SECOND_I2C
@@ -131,6 +131,7 @@
config ARCH_MPC830X
bool
select MPC83XX_SDHC_SUPPORT
+ select SYS_CACHE_SHIFT_5
config ARCH_MPC8308
bool
@@ -154,6 +155,7 @@
select MPC83XX_PCI_SUPPORT
select MPC83XX_TSEC1_SUPPORT
select MPC83XX_TSEC2_SUPPORT
+ select SYS_CACHE_SHIFT_5
config ARCH_MPC8313
bool
@@ -165,9 +167,11 @@
bool
select MPC83XX_QUICC_ENGINE
select MPC83XX_PCI_SUPPORT
+ select SYS_CACHE_SHIFT_5
config ARCH_MPC834X
bool
+ select SYS_CACHE_SHIFT_5
config ARCH_MPC8349
bool
@@ -184,6 +188,7 @@
select MPC83XX_PCI_SUPPORT
select MPC83XX_LDP_PIN
select MPC83XX_SECOND_I2C
+ select SYS_CACHE_SHIFT_5
config ARCH_MPC837X
bool
@@ -193,9 +198,10 @@
select MPC83XX_PCIE1_SUPPORT
select MPC83XX_PCIE2_SUPPORT
select MPC83XX_SDHC_SUPPORT
- select MPC83XX_SATA_SUPPORT
+ select MPC83XX_SATA
select MPC83XX_LDP_PIN
select MPC83XX_SECOND_I2C
+ select SYS_CACHE_SHIFT_5
select FSL_ELBC
config SYS_IMMR
diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index aeb42b1..7c4ef76 100644
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
@@ -26,7 +26,7 @@
obj-y += cpu_init.o
obj-y += speed.o
obj-y += interrupts.o
-obj-y += ecc.o
+obj-$(CONFIG_DDR_ECC_CMD) += ecc.o
ifndef CONFIG_PINCTRL
obj-$(CONFIG_QE) += qe_io.o
endif
diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c
index 7a8ec7f..3e24752 100644
--- a/arch/powerpc/cpu/mpc83xx/ecc.c
+++ b/arch/powerpc/cpu/mpc83xx/ecc.c
@@ -11,7 +11,6 @@
#include <mpc83xx.h>
#include <command.h>
-#if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD)
void ecc_print_status(void)
{
immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
@@ -386,4 +385,3 @@
" - writes pattern injecting errors with word access\n"
" - writes pattern with word access, generates error\n"
" - disables injects\n" " - re-inits memory");
-#endif
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 84797c8..c386e4e 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -34,148 +34,6 @@
#endif
};
-#ifdef CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
-
-/* private structure for mpc83xx pcie hose */
-static struct mpc83xx_pcie_priv {
- u8 index;
-} pcie_priv[PCIE_MAX_BUSES] = {
- {
- /* pcie controller 1 */
- .index = 0,
- },
- {
- /* pcie controller 2 */
- .index = 1,
- },
-};
-
-static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)
-{
- int bus = PCI_BUS(dev) - hose->first_busno;
- immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
- struct mpc83xx_pcie_priv *pcie_priv = hose->priv_data;
- pex83xx_t *pex = &immr->pciexp[pcie_priv->index];
- struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0];
- u8 devfn = PCI_DEV(dev) << 3 | PCI_FUNC(dev);
- u32 dev_base = bus << 24 | devfn << 16;
-
- if (hose->indirect_type == INDIRECT_TYPE_NO_PCIE_LINK)
- return -1;
- /*
- * Workaround for the HW bug: for Type 0 configure transactions the
- * PCI-E controller does not check the device number bits and just
- * assumes that the device number bits are 0.
- */
- if (devfn & 0xf8)
- return -1;
-
- out_le32(&out_win->tarl, dev_base);
- return 0;
-}
-
-#define cfg_read(val, addr, type, op) \
- do { *val = op((type)(addr)); } while (0)
-#define cfg_write(val, addr, type, op) \
- do { op((type *)(addr), (val)); } while (0)
-
-#define cfg_read_err(val) do { *val = -1; } while (0)
-#define cfg_write_err(val) do { } while (0)
-
-#define PCIE_OP(rw, size, type, op) \
-static int pcie_##rw##_config_##size(struct pci_controller *hose, \
- pci_dev_t dev, int offset, \
- type val) \
-{ \
- int ret; \
- \
- ret = mpc83xx_pcie_remap_cfg(hose, dev); \
- if (ret) { \
- cfg_##rw##_err(val); \
- return ret; \
- } \
- cfg_##rw(val, (void *)hose->cfg_addr + offset, type, op); \
- return 0; \
-}
-
-PCIE_OP(read, byte, u8 *, in_8)
-PCIE_OP(read, word, u16 *, in_le16)
-PCIE_OP(read, dword, u32 *, in_le32)
-PCIE_OP(write, byte, u8, out_8)
-PCIE_OP(write, word, u16, out_le16)
-PCIE_OP(write, dword, u32, out_le32)
-
-static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg,
- u8 link)
-{
- extern void disable_addr_trans(void); /* start.S */
- static struct pci_controller pcie_hose[PCIE_MAX_BUSES];
- struct pci_controller *hose = &pcie_hose[bus];
- int i;
-
- /*
- * There are no spare BATs to remap all PCI-E windows for U-Boot, so
- * disable translations. In general, this is not great solution, and
- * that's why we don't register PCI-E hoses by default.
- */
- disable_addr_trans();
-
- for (i = 0; i < 2; i++, reg++) {
- if (reg->size == 0)
- break;
-
- hose->regions[i] = *reg;
- hose->region_count++;
- }
-
- i = hose->region_count++;
- hose->regions[i].bus_start = 0;
- hose->regions[i].phys_start = 0;
- hose->regions[i].size = gd->ram_size;
- hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_SYS_MEMORY;
-
- i = hose->region_count++;
- hose->regions[i].bus_start = CONFIG_SYS_IMMR;
- hose->regions[i].phys_start = CONFIG_SYS_IMMR;
- hose->regions[i].size = 0x100000;
- hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_SYS_MEMORY;
-
- hose->first_busno = pci_last_busno() + 1;
- hose->last_busno = 0xff;
-
- hose->cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base;
-
- hose->priv_data = &pcie_priv[bus];
-
- pci_set_ops(hose,
- pcie_read_config_byte,
- pcie_read_config_word,
- pcie_read_config_dword,
- pcie_write_config_byte,
- pcie_write_config_word,
- pcie_write_config_dword);
-
- if (!link)
- hose->indirect_type = INDIRECT_TYPE_NO_PCIE_LINK;
-
- pci_register_hose(hose);
-
-#ifdef CONFIG_PCI_SCAN_SHOW
- printf("PCI: Bus Dev VenId DevId Class Int\n");
-#endif
- /*
- * Hose scan.
- */
- hose->last_busno = pci_hose_scan(hose);
-}
-
-#else
-
-static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg,
- u8 link) {}
-
-#endif /* CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES */
-
int get_pcie_clk(int index)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
@@ -340,8 +198,6 @@
printf("link\n");
else
printf("No link\n");
-
- mpc83xx_pcie_register_hose(bus, reg, reg16 >= PCI_LTSSM_L0);
}
/*
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index a861e8d..e12043b 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -834,12 +834,6 @@
#endif
debug(" DDRC ECC mode: %s\n", ddrc_ecc_enable ? "ON":"OFF");
-#if defined(CONFIG_DDR_2T_TIMING)
- /*
- * Enable 2T timing by setting sdram_cfg[16].
- */
- sdram_cfg |= SDRAM_CFG_2T_EN;
-#endif
/* Enable controller, and GO! */
ddr->sdram_cfg = sdram_cfg;
sync();
@@ -914,16 +908,12 @@
pattern[0] = 0xdeadbeef;
pattern[1] = 0xdeadbeef;
-#if defined(CONFIG_DDR_ECC_INIT_VIA_DMA)
- dma_meminit(pattern[0], dram_size);
-#else
debug("ddr init: CPU FP write method\n");
size = dram_size;
for (p = 0; p < (u64*)(size); p++) {
ppcDWstore((u32*)p, pattern);
}
sync();
-#endif
t_end = get_tbms();
icache_disable();
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 9da22ce..c4953df 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -13,7 +13,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <mpc83xx.h>
-#include <version.h>
#define CONFIG_83XX 1 /* needed for Linux kernel header files*/
@@ -92,12 +91,6 @@
*/
.long 0x27051956 /* U-Boot Magic Number */
- .globl version_string
-version_string:
- .ascii U_BOOT_VERSION_STRING, "\0"
-
- .align 2
-
.globl enable_addr_trans
enable_addr_trans:
/* enable address translation */
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 66ebaf5..836aedd 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -48,6 +48,7 @@
bool "Support MPC8548CDS"
select ARCH_MPC8548
select FSL_VIA
+ select SYS_CACHE_SHIFT_5
config TARGET_P1010RDB_PA
bool "Support P1010RDB_PA"
@@ -316,6 +317,7 @@
config ARCH_MPC8544
bool
select FSL_LAW
+ select SYS_CACHE_SHIFT_5
select SYS_FSL_ERRATUM_A005125
select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
@@ -350,6 +352,7 @@
config ARCH_P1010
bool
select FSL_LAW
+ select SYS_CACHE_SHIFT_5
select SYS_FSL_ERRATUM_A004477
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
@@ -395,6 +398,7 @@
config ARCH_P1020
bool
select FSL_LAW
+ select SYS_CACHE_SHIFT_5
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
@@ -490,6 +494,7 @@
config ARCH_P2020
bool
select FSL_LAW
+ select SYS_CACHE_SHIFT_5
select SYS_FSL_ERRATUM_A004477
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
@@ -510,6 +515,7 @@
bool
select E500MC
select FSL_LAW
+ select SYS_CACHE_SHIFT_6
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
select SYS_FSL_ERRATUM_A005275
@@ -534,6 +540,7 @@
bool
select E500MC
select FSL_LAW
+ select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
@@ -563,6 +570,7 @@
bool
select E500MC
select FSL_LAW
+ select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004580
@@ -601,6 +609,7 @@
bool
select E500MC
select FSL_LAW
+ select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004699
@@ -624,11 +633,13 @@
config ARCH_QEMU_E500
bool
+ select SYS_CACHE_SHIFT_5
config ARCH_T1024
bool
select E500MC
select FSL_LAW
+ select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008378
select SYS_FSL_ERRATUM_A008109
@@ -651,6 +662,7 @@
bool
select E500MC
select FSL_LAW
+ select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
@@ -673,6 +685,7 @@
bool
select E500MC
select FSL_LAW
+ select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
@@ -696,6 +709,7 @@
select E500MC
select E6500
select FSL_LAW
+ select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_47
select SYS_FSL_ERRATUM_A006379
select SYS_FSL_ERRATUM_A006593
@@ -718,12 +732,14 @@
imply CMD_NAND
imply CMD_REGINFO
imply FSL_SATA
+ imply ID_EEPROM
config ARCH_T4240
bool
select E500MC
select E6500
select FSL_LAW
+ select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_47
select SYS_FSL_ERRATUM_A004468
select SYS_FSL_ERRATUM_A005871
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 15248a4..6f4ad1f 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -29,7 +29,6 @@
endif
obj-$(CONFIG_CPM2) += commproc.o
-obj-$(CONFIG_CPM2) += ether_fcc.o
obj-$(CONFIG_OF_LIBFDT) += fdt.o
obj-$(CONFIG_FSL_CORENET) += liodn.o
obj-$(CONFIG_MP) += mp.o
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 610a8ec..cd32290 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -11,6 +11,7 @@
#include <config.h>
#include <common.h>
#include <cpu_func.h>
+#include <clock_legacy.h>
#include <init.h>
#include <irq_func.h>
#include <log.h>
@@ -52,7 +53,8 @@
uint major, minor;
struct cpu_type *cpu;
char buf1[32], buf2[32];
-#if defined(CONFIG_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET)
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || \
+ defined(CONFIG_STATIC_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET)
ccsr_gur_t __iomem *gur =
(void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
#endif
@@ -70,12 +72,12 @@
>> FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT;
#endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
#else /* CONFIG_FSL_CORENET */
-#ifdef CONFIG_DDR_CLK_FREQ
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
>> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
#else
u32 ddr_ratio = 0;
-#endif /* CONFIG_DDR_CLK_FREQ */
+#endif /* CONFIG_DYNAMIC_DDR_CLK_FREQ || CONFIG_STATIC_DDR_CLK_FREQ */
#endif /* CONFIG_FSL_CORENET */
unsigned int i, core, nr_cores = cpu_numcores();
diff --git a/arch/powerpc/cpu/mpc85xx/ether_fcc.c b/arch/powerpc/cpu/mpc85xx/ether_fcc.c
deleted file mode 100644
index 5cf0a3f..0000000
--- a/arch/powerpc/cpu/mpc85xx/ether_fcc.c
+++ /dev/null
@@ -1,462 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * MPC8560 FCC Fast Ethernet
- * Copyright (c) 2003 Motorola,Inc.
- * Xianghua Xiao, (X.Xiao@motorola.com)
- *
- * Copyright (c) 2000 MontaVista Software, Inc. Dan Malek (dmalek@jlc.net)
- *
- * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- */
-
-/*
- * MPC8560 FCC Fast Ethernet
- * Basic ET HW initialization and packet RX/TX routines
- *
- * This code will not perform the IO port configuration. This should be
- * done in the iop_conf_t structure specific for the board.
- *
- * TODO:
- * add a PHY driver to do the negotiation
- * reflect negotiation results in FPSMR
- * look for ways to configure the board specific stuff elsewhere, eg.
- * config_xxx.h or the board directory
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <asm/cpm_85xx.h>
-#include <command.h>
-#include <config.h>
-#include <net.h>
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-#include <miiphy.h>
-#endif
-
-#if defined(CONFIG_ETHER_ON_FCC) && defined(CONFIG_CMD_NET)
-
-static struct ether_fcc_info_s
-{
- int ether_index;
- int proff_enet;
- ulong cpm_cr_enet_sblock;
- ulong cpm_cr_enet_page;
- ulong cmxfcr_mask;
- ulong cmxfcr_value;
-}
- ether_fcc_info[] =
-{
-#ifdef CONFIG_ETHER_ON_FCC1
-{
- 0,
- PROFF_FCC1,
- CPM_CR_FCC1_SBLOCK,
- CPM_CR_FCC1_PAGE,
- CONFIG_SYS_CMXFCR_MASK1,
- CONFIG_SYS_CMXFCR_VALUE1
-},
-#endif
-
-#ifdef CONFIG_ETHER_ON_FCC2
-{
- 1,
- PROFF_FCC2,
- CPM_CR_FCC2_SBLOCK,
- CPM_CR_FCC2_PAGE,
- CONFIG_SYS_CMXFCR_MASK2,
- CONFIG_SYS_CMXFCR_VALUE2
-},
-#endif
-
-#ifdef CONFIG_ETHER_ON_FCC3
-{
- 2,
- PROFF_FCC3,
- CPM_CR_FCC3_SBLOCK,
- CPM_CR_FCC3_PAGE,
- CONFIG_SYS_CMXFCR_MASK3,
- CONFIG_SYS_CMXFCR_VALUE3
-},
-#endif
-};
-
-/*---------------------------------------------------------------------*/
-
-/* Maximum input DMA size. Must be a should(?) be a multiple of 4. */
-#define PKT_MAXDMA_SIZE 1520
-
-/* The FCC stores dest/src/type, data, and checksum for receive packets. */
-#define PKT_MAXBUF_SIZE 1518
-#define PKT_MINBUF_SIZE 64
-
-/* Maximum input buffer size. Must be a multiple of 32. */
-#define PKT_MAXBLR_SIZE 1536
-
-#define TOUT_LOOP 1000000
-
-#define TX_BUF_CNT 2
-
-static uint rxIdx; /* index of the current RX buffer */
-static uint txIdx; /* index of the current TX buffer */
-
-/*
- * FCC Ethernet Tx and Rx buffer descriptors.
- * Provide for Double Buffering
- * Note: PKTBUFSRX is defined in net.h
- */
-
-typedef volatile struct rtxbd {
- cbd_t rxbd[PKTBUFSRX];
- cbd_t txbd[TX_BUF_CNT];
-} RTXBD;
-
-/* Good news: the FCC supports external BDs! */
-#ifdef __GNUC__
-static RTXBD rtx __attribute__ ((aligned(8)));
-#else
-#error "rtx must be 64-bit aligned"
-#endif
-
-#undef ET_DEBUG
-
-static int fec_send(struct eth_device *dev, void *packet, int length)
-{
- int i = 0;
- int result = 0;
-
- if (length <= 0) {
- printf("fec: bad packet size: %d\n", length);
- goto out;
- }
-
- for(i=0; rtx.txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
- if (i >= TOUT_LOOP) {
- printf("fec: tx buffer not ready\n");
- goto out;
- }
- }
-
- rtx.txbd[txIdx].cbd_bufaddr = (uint)packet;
- rtx.txbd[txIdx].cbd_datlen = length;
- rtx.txbd[txIdx].cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_LAST | \
- BD_ENET_TX_TC | BD_ENET_TX_PAD);
-
- for(i=0; rtx.txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
- if (i >= TOUT_LOOP) {
- printf("fec: tx error\n");
- goto out;
- }
- }
-
-#ifdef ET_DEBUG
- printf("cycles: 0x%x txIdx=0x%04x status: 0x%04x\n", i, txIdx,rtx.txbd[txIdx].cbd_sc);
- printf("packets at 0x%08x, length_in_bytes=0x%x\n",(uint)packet,length);
- for(i=0;i<(length/16 + 1);i++) {
- printf("%08x %08x %08x %08x\n",*((uint *)rtx.txbd[txIdx].cbd_bufaddr+i*4),\
- *((uint *)rtx.txbd[txIdx].cbd_bufaddr + i*4 + 1),*((uint *)rtx.txbd[txIdx].cbd_bufaddr + i*4 + 2), \
- *((uint *)rtx.txbd[txIdx].cbd_bufaddr + i*4 + 3));
- }
-#endif
-
- /* return only status bits */
- result = rtx.txbd[txIdx].cbd_sc & BD_ENET_TX_STATS;
- txIdx = (txIdx + 1) % TX_BUF_CNT;
-
-out:
- return result;
-}
-
-static int fec_recv(struct eth_device* dev)
-{
- int length;
-
- for (;;)
- {
- if (rtx.rxbd[rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
- length = -1;
- break; /* nothing received - leave for() loop */
- }
- length = rtx.rxbd[rxIdx].cbd_datlen;
-
- if (rtx.rxbd[rxIdx].cbd_sc & 0x003f) {
- printf("fec: rx error %04x\n", rtx.rxbd[rxIdx].cbd_sc);
- }
- else {
- /* Pass the packet up to the protocol layers. */
- net_process_received_packet(net_rx_packets[rxIdx], length - 4);
- }
-
-
- /* Give the buffer back to the FCC. */
- rtx.rxbd[rxIdx].cbd_datlen = 0;
-
- /* wrap around buffer index when necessary */
- if ((rxIdx + 1) >= PKTBUFSRX) {
- rtx.rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY);
- rxIdx = 0;
- }
- else {
- rtx.rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY;
- rxIdx++;
- }
- }
- return length;
-}
-
-
-static int fec_init(struct eth_device* dev, struct bd_info *bis)
-{
- struct ether_fcc_info_s * info = dev->priv;
- int i;
- volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR;
- volatile ccsr_cpm_cp_t *cp = &(cpm->im_cpm_cp);
- fcc_enet_t *pram_ptr;
- unsigned long mem_addr;
-
-#if 0
- mii_discover_phy();
-#endif
-
- /* 28.9 - (1-2): ioports have been set up already */
-
- /* 28.9 - (3): connect FCC's tx and rx clocks */
- cpm->im_cpm_mux.cmxuar = 0; /* ATM */
- cpm->im_cpm_mux.cmxfcr = (cpm->im_cpm_mux.cmxfcr & ~info->cmxfcr_mask) |
- info->cmxfcr_value;
-
- /* 28.9 - (4): GFMR: disable tx/rx, CCITT CRC, set Mode Ethernet */
- if(info->ether_index == 0) {
- cpm->im_cpm_fcc1.gfmr = FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
- } else if (info->ether_index == 1) {
- cpm->im_cpm_fcc2.gfmr = FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
- } else if (info->ether_index == 2) {
- cpm->im_cpm_fcc3.gfmr = FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
- }
-
- /* 28.9 - (5): FPSMR: enable full duplex, select CCITT CRC for Ethernet,MII */
- if(info->ether_index == 0) {
- cpm->im_cpm_fcc1.fpsmr = CONFIG_SYS_FCC_PSMR | FCC_PSMR_ENCRC;
- } else if (info->ether_index == 1){
- cpm->im_cpm_fcc2.fpsmr = CONFIG_SYS_FCC_PSMR | FCC_PSMR_ENCRC;
- } else if (info->ether_index == 2){
- cpm->im_cpm_fcc3.fpsmr = CONFIG_SYS_FCC_PSMR | FCC_PSMR_ENCRC;
- }
-
- /* 28.9 - (6): FDSR: Ethernet Syn */
- if(info->ether_index == 0) {
- cpm->im_cpm_fcc1.fdsr = 0xD555;
- } else if (info->ether_index == 1) {
- cpm->im_cpm_fcc2.fdsr = 0xD555;
- } else if (info->ether_index == 2) {
- cpm->im_cpm_fcc3.fdsr = 0xD555;
- }
-
- /* reset indeces to current rx/tx bd (see eth_send()/eth_rx()) */
- rxIdx = 0;
- txIdx = 0;
-
- /* Setup Receiver Buffer Descriptors */
- for (i = 0; i < PKTBUFSRX; i++)
- {
- rtx.rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
- rtx.rxbd[i].cbd_datlen = 0;
- rtx.rxbd[i].cbd_bufaddr = (uint)net_rx_packets[i];
- }
- rtx.rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
-
- /* Setup Ethernet Transmitter Buffer Descriptors */
- for (i = 0; i < TX_BUF_CNT; i++)
- {
- rtx.txbd[i].cbd_sc = 0;
- rtx.txbd[i].cbd_datlen = 0;
- rtx.txbd[i].cbd_bufaddr = 0;
- }
- rtx.txbd[TX_BUF_CNT - 1].cbd_sc |= BD_ENET_TX_WRAP;
-
- /* 28.9 - (7): initialize parameter ram */
- pram_ptr = (fcc_enet_t *)&(cpm->im_dprambase[info->proff_enet]);
-
- /* clear whole structure to make sure all reserved fields are zero */
- memset((void*)pram_ptr, 0, sizeof(fcc_enet_t));
-
- /*
- * common Parameter RAM area
- *
- * Allocate space in the reserved FCC area of DPRAM for the
- * internal buffers. No one uses this space (yet), so we
- * can do this. Later, we will add resource management for
- * this area.
- * CPM_FCC_SPECIAL_BASE: 0xB000 for MPC8540, MPC8560
- * 0x9000 for MPC8541, MPC8555
- */
- mem_addr = CPM_FCC_SPECIAL_BASE + ((info->ether_index) * 64);
- pram_ptr->fen_genfcc.fcc_riptr = mem_addr;
- pram_ptr->fen_genfcc.fcc_tiptr = mem_addr+32;
- /*
- * Set maximum bytes per receive buffer.
- * It must be a multiple of 32.
- */
- pram_ptr->fen_genfcc.fcc_mrblr = PKT_MAXBLR_SIZE; /* 1536 */
- /* localbus SDRAM should be preferred */
- pram_ptr->fen_genfcc.fcc_rstate = (CPMFCR_GBL | CPMFCR_EB |
- CONFIG_SYS_CPMFCR_RAMTYPE) << 24;
- pram_ptr->fen_genfcc.fcc_rbase = (unsigned int)(&rtx.rxbd[rxIdx]);
- pram_ptr->fen_genfcc.fcc_rbdstat = 0;
- pram_ptr->fen_genfcc.fcc_rbdlen = 0;
- pram_ptr->fen_genfcc.fcc_rdptr = 0;
- /* localbus SDRAM should be preferred */
- pram_ptr->fen_genfcc.fcc_tstate = (CPMFCR_GBL | CPMFCR_EB |
- CONFIG_SYS_CPMFCR_RAMTYPE) << 24;
- pram_ptr->fen_genfcc.fcc_tbase = (unsigned int)(&rtx.txbd[txIdx]);
- pram_ptr->fen_genfcc.fcc_tbdstat = 0;
- pram_ptr->fen_genfcc.fcc_tbdlen = 0;
- pram_ptr->fen_genfcc.fcc_tdptr = 0;
-
- /* protocol-specific area */
- pram_ptr->fen_statbuf = 0x0;
- pram_ptr->fen_cmask = 0xdebb20e3; /* CRC mask */
- pram_ptr->fen_cpres = 0xffffffff; /* CRC preset */
- pram_ptr->fen_crcec = 0;
- pram_ptr->fen_alec = 0;
- pram_ptr->fen_disfc = 0;
- pram_ptr->fen_retlim = 15; /* Retry limit threshold */
- pram_ptr->fen_retcnt = 0;
- pram_ptr->fen_pper = 0;
- pram_ptr->fen_boffcnt = 0;
- pram_ptr->fen_gaddrh = 0;
- pram_ptr->fen_gaddrl = 0;
- pram_ptr->fen_mflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
- /*
- * Set Ethernet station address.
- *
- * This is supplied in the board information structure, so we
- * copy that into the controller.
- * So far we have only been given one Ethernet address. We make
- * it unique by setting a few bits in the upper byte of the
- * non-static part of the address.
- */
-#define ea eth_get_ethaddr()
- pram_ptr->fen_paddrh = (ea[5] << 8) + ea[4];
- pram_ptr->fen_paddrm = (ea[3] << 8) + ea[2];
- pram_ptr->fen_paddrl = (ea[1] << 8) + ea[0];
-#undef ea
- pram_ptr->fen_ibdcount = 0;
- pram_ptr->fen_ibdstart = 0;
- pram_ptr->fen_ibdend = 0;
- pram_ptr->fen_txlen = 0;
- pram_ptr->fen_iaddrh = 0; /* disable hash */
- pram_ptr->fen_iaddrl = 0;
- pram_ptr->fen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register: 64 */
- /* pad pointer. use tiptr since we don't need a specific padding char */
- pram_ptr->fen_padptr = pram_ptr->fen_genfcc.fcc_tiptr;
- pram_ptr->fen_maxd1 = PKT_MAXDMA_SIZE; /* maximum DMA1 length:1520 */
- pram_ptr->fen_maxd2 = PKT_MAXDMA_SIZE; /* maximum DMA2 length:1520 */
-
-#if defined(ET_DEBUG)
- printf("parm_ptr(0xff788500) = %p\n",pram_ptr);
- printf("pram_ptr->fen_genfcc.fcc_rbase %08x\n",
- pram_ptr->fen_genfcc.fcc_rbase);
- printf("pram_ptr->fen_genfcc.fcc_tbase %08x\n",
- pram_ptr->fen_genfcc.fcc_tbase);
-#endif
-
- /* 28.9 - (8)(9): clear out events in FCCE */
- /* 28.9 - (9): FCCM: mask all events */
- if(info->ether_index == 0) {
- cpm->im_cpm_fcc1.fcce = ~0x0;
- cpm->im_cpm_fcc1.fccm = 0;
- } else if (info->ether_index == 1) {
- cpm->im_cpm_fcc2.fcce = ~0x0;
- cpm->im_cpm_fcc2.fccm = 0;
- } else if (info->ether_index == 2) {
- cpm->im_cpm_fcc3.fcce = ~0x0;
- cpm->im_cpm_fcc3.fccm = 0;
- }
-
- /* 28.9 - (10-12): we don't use ethernet interrupts */
-
- /* 28.9 - (13)
- *
- * Let's re-initialize the channel now. We have to do it later
- * than the manual describes because we have just now finished
- * the BD initialization.
- */
- cp->cpcr = mk_cr_cmd(info->cpm_cr_enet_page,
- info->cpm_cr_enet_sblock,
- 0x0c,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- do {
- __asm__ __volatile__ ("eieio");
- } while (cp->cpcr & CPM_CR_FLG);
-
- /* 28.9 - (14): enable tx/rx in gfmr */
- if(info->ether_index == 0) {
- cpm->im_cpm_fcc1.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR;
- } else if (info->ether_index == 1) {
- cpm->im_cpm_fcc2.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR;
- } else if (info->ether_index == 2) {
- cpm->im_cpm_fcc3.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR;
- }
-
- return 1;
-}
-
-static void fec_halt(struct eth_device* dev)
-{
- struct ether_fcc_info_s * info = dev->priv;
- volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR;
-
- /* write GFMR: disable tx/rx */
- if(info->ether_index == 0) {
- cpm->im_cpm_fcc1.gfmr &= ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
- } else if(info->ether_index == 1) {
- cpm->im_cpm_fcc2.gfmr &= ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
- } else if(info->ether_index == 2) {
- cpm->im_cpm_fcc3.gfmr &= ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
- }
-}
-
-int fec_initialize(struct bd_info *bis)
-{
- struct eth_device* dev;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++)
- {
- dev = (struct eth_device*) malloc(sizeof *dev);
- memset(dev, 0, sizeof *dev);
-
- sprintf(dev->name, "FCC%d",
- ether_fcc_info[i].ether_index + 1);
- dev->priv = ðer_fcc_info[i];
- dev->init = fec_init;
- dev->halt = fec_halt;
- dev->send = fec_send;
- dev->recv = fec_recv;
-
- eth_register(dev);
-
-#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
- && defined(CONFIG_BITBANGMII)
- int retval;
- struct mii_dev *mdiodev = mdio_alloc();
- if (!mdiodev)
- return -ENOMEM;
- strlcpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
- mdiodev->read = bb_miiphy_read;
- mdiodev->write = bb_miiphy_write;
-
- retval = mdio_register(mdiodev);
- if (retval < 0) {
- mdio_free(mdiodev);
- return retval;
- }
-#endif
- }
-
- return 1;
-}
-
-#endif
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index e229a5c..1fe914a 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -11,6 +11,7 @@
#include <common.h>
#include <cpu_func.h>
+#include <clock_legacy.h>
#include <ppc_asm.tmpl>
#include <asm/global_data.h>
#include <linux/compiler.h>
@@ -104,8 +105,8 @@
sys_info->freq_ddrbus = CONFIG_SYS_CLK_FREQ;
else
#endif
-#ifdef CONFIG_DDR_CLK_FREQ
- sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
+ sys_info->freq_ddrbus = get_board_ddr_clk();
#else
sys_info->freq_ddrbus = sysclk;
#endif
@@ -538,12 +539,12 @@
/* Note: freq_ddrbus is the MCLK frequency, not the data rate. */
sys_info->freq_ddrbus = sys_info->freq_systembus;
-#ifdef CONFIG_DDR_CLK_FREQ
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
{
u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
>> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
if (ddr_ratio != 0x7)
- sys_info->freq_ddrbus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
+ sys_info->freq_ddrbus = ddr_ratio * get_board_ddr_clk();
}
#endif
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index f41e82a..aca31b2 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -14,7 +14,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <mpc85xx.h>
-#include <version.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
@@ -1138,11 +1137,7 @@
.globl _start
_start:
.long 0x27051956 /* U-BOOT Magic Number */
- .globl version_string
-version_string:
- .ascii U_BOOT_VERSION_STRING, "\0"
- .align 4
.globl _start_cont
_start_cont:
/* Setup the stack in initial RAM,could be L2-as-SRAM or L1 dcache*/
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index f112317..936cbda 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -19,9 +19,11 @@
config MPC866
bool "MPC866"
+ select SYS_CACHE_SHIFT_4
config MPC885
bool "MPC885"
+ select SYS_CACHE_SHIFT_4
endchoice
diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S
index ed735cd..0ebb7b3 100644
--- a/arch/powerpc/cpu/mpc8xx/start.S
+++ b/arch/powerpc/cpu/mpc8xx/start.S
@@ -23,7 +23,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <mpc8xx.h>
-#include <version.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
@@ -62,9 +61,6 @@
*/
.text
.long 0x27051956 /* U-Boot Magic Number */
- .globl version_string
-version_string:
- .ascii U_BOOT_VERSION_STRING, "\0"
. = EXC_OFF_SYS_RESET
.globl _start
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index eda6486..0985fb2 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -351,10 +351,6 @@
*/
int cpu_eth_init(struct bd_info *bis)
{
-#if defined(CONFIG_ETHER_ON_FCC)
- fec_initialize(bis);
-#endif
-
#if defined(CONFIG_UEC_ETH)
uec_standard_init(bis);
#endif
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index ac8eeb4..f753ddf 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -25,13 +25,6 @@
*/
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
-/*
- * For compatibility reasons support the CONFIG_SYS_CACHELINE_SIZE too
- */
-#ifndef CONFIG_SYS_CACHELINE_SIZE
-#define CONFIG_SYS_CACHELINE_SIZE L1_CACHE_BYTES
-#endif
-
#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
#define L1_CACHE_PAGES 8
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index 2c96378..a97b72d 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -26,15 +26,6 @@
#endif
#endif
-/* Check if boards need to enable FSL DMA engine for SDRAM init */
-#if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
-#if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
- ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
- !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
-#define CONFIG_FSL_DMA
-#endif
-#endif
-
/*
* Provide a default boot page translation virtual address that lines up with
* Freescale's default e500 reset page.
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index e03ab21..b6944d8 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -46,11 +46,7 @@
#define MSR_RI (1<<1) /* Recoverable Exception */
#define MSR_LE (1<<0) /* Little Endian */
-#ifdef CONFIG_APUS_FAST_EXCEPT
-#define MSR_ MSR_ME|MSR_IP|MSR_RI
-#else
#define MSR_ MSR_ME|MSR_RI
-#endif
#ifndef CONFIG_E500
#define MSR_KERNEL MSR_|MSR_IR|MSR_DR
#else
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 31c17b5..8d65047 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -119,7 +119,7 @@
void arch_lmb_reserve(struct lmb *lmb)
{
phys_size_t bootm_size;
- ulong size, sp, bootmap_base;
+ ulong size, bootmap_base;
bootmap_base = env_get_bootm_low();
bootm_size = env_get_bootm_size();
@@ -141,21 +141,7 @@
lmb_reserve(lmb, base, bootm_size - size);
}
- /*
- * Booting a (Linux) kernel image
- *
- * Allocate space for command line and board info - the
- * address should be as high as possible within the reach of
- * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
- * memory, which means far enough below the current stack
- * pointer.
- */
- sp = get_sp();
- debug("## Current stack ends at 0x%08lx\n", sp);
-
- /* adjust sp by 4K to be safe */
- sp -= 4096;
- lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - sp));
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
#ifdef CONFIG_MP
cpu_mp_lmb_reserve(lmb);
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ec651fe..ba29e70 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -22,9 +22,11 @@
config TARGET_SIFIVE_UNMATCHED
bool "Support SiFive Unmatched Board"
+ select SYS_CACHE_SHIFT_6
config TARGET_SIPEED_MAIX
bool "Support Sipeed Maix Board"
+ select SYS_CACHE_SHIFT_6
config TARGET_OPENPITON_RISCV64
bool "Support RISC-V cores on OpenPiton SoC"
@@ -33,7 +35,6 @@
config SYS_ICACHE_OFF
bool "Do not enable icache"
- default n
help
Do not enable instruction cache in U-Boot.
@@ -46,7 +47,6 @@
config SYS_DCACHE_OFF
bool "Do not enable dcache"
- default n
help
Do not enable data cache in U-Boot.
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 8dd1820..ff1bdf7 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -135,3 +135,16 @@
{
return do_bootm_linux(flag, argc, argv, images);
}
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mv %0, sp" : "=r"(ret) : );
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
+}
diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c
index 1103530..b72dafc 100644
--- a/arch/sandbox/cpu/os.c
+++ b/arch/sandbox/cpu/os.c
@@ -133,6 +133,19 @@
return 0;
}
+int os_filesize(int fd)
+{
+ off_t size;
+
+ size = os_lseek(fd, 0, OS_SEEK_END);
+ if (size < 0)
+ return -errno;
+ if (os_lseek(fd, 0, OS_SEEK_SET) < 0)
+ return -errno;
+
+ return size;
+}
+
int os_read_file(const char *fname, void **bufp, int *sizep)
{
off_t size;
@@ -144,15 +157,12 @@
printf("Cannot open file '%s'\n", fname);
goto err;
}
- size = os_lseek(fd, 0, OS_SEEK_END);
+ size = os_filesize(fd);
if (size < 0) {
- printf("Cannot seek to end of file '%s'\n", fname);
- goto err;
- }
- if (os_lseek(fd, 0, OS_SEEK_SET) < 0) {
- printf("Cannot seek to start of file '%s'\n", fname);
+ printf("Cannot get file size of '%s'\n", fname);
goto err;
}
+
*bufp = os_malloc(size);
if (!*bufp) {
printf("Not enough memory to read file '%s'\n", fname);
@@ -172,6 +182,35 @@
return ret;
}
+int os_map_file(const char *pathname, int os_flags, void **bufp, int *sizep)
+{
+ void *ptr;
+ int size;
+ int ifd;
+
+ ifd = os_open(pathname, os_flags);
+ if (ifd < 0) {
+ printf("Cannot open file '%s'\n", pathname);
+ return -EIO;
+ }
+ size = os_filesize(ifd);
+ if (size < 0) {
+ printf("Cannot get file size of '%s'\n", pathname);
+ return -EIO;
+ }
+
+ ptr = mmap(0, size, PROT_READ | PROT_WRITE, MAP_SHARED, ifd, 0);
+ if (ptr == MAP_FAILED) {
+ printf("Can't map file '%s': %s\n", pathname, strerror(errno));
+ return -EPERM;
+ }
+
+ *bufp = ptr;
+ *sizep = size;
+
+ return 0;
+}
+
/* Restore tty state when we exit */
static struct termios orig_term;
static bool term_setup;
@@ -690,7 +729,6 @@
continue;
}
} else if (!strcmp(arg, "--rm_memory")) {
- ap++;
continue;
}
argv[argc++] = arg;
diff --git a/arch/sandbox/dts/overlay0.dts b/arch/sandbox/dts/overlay0.dts
index 70c6cf7..9e5f389 100644
--- a/arch/sandbox/dts/overlay0.dts
+++ b/arch/sandbox/dts/overlay0.dts
@@ -1,3 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Overlay test file
+ */
+
/dts-v1/;
/plugin/;
diff --git a/arch/sandbox/dts/overlay1.dts b/arch/sandbox/dts/overlay1.dts
index 51621b3..303e713 100644
--- a/arch/sandbox/dts/overlay1.dts
+++ b/arch/sandbox/dts/overlay1.dts
@@ -1,3 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Overlay test file
+ */
+
/dts-v1/;
/plugin/;
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index a8938a3..127f168 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -1,3 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Main sandbox devicetree
+ */
+
/dts-v1/;
#include <config.h>
diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index 200fcab..66b813f 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* This is the common sandbox device-tree nodes. This is shared between sandbox
* and sandbox64 builds.
@@ -65,7 +66,7 @@
};
gpio_b: gpios@1 {
- u-boot,dm-pre-proper;
+ u-boot,dm-spl;
gpio-controller;
compatible = "sandbox,gpio";
#gpio-cells = <2>;
@@ -73,6 +74,12 @@
sandbox,gpio-count = <10>;
};
+ gpio-test {
+ u-boot,dm-spl;
+ compatible = "sandbox,gpio-test";
+ test-gpios = <&gpio_b 3 0>;
+ };
+
hexagon {
compatible = "demo-simple";
colour = "white";
@@ -123,6 +130,19 @@
#sound-dai-cells = <1>;
};
+ irq_sandbox: irq-sbox {
+ u-boot,dm-spl;
+ compatible = "sandbox,irq";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ irq-test {
+ u-boot,dm-spl;
+ compatible = "sandbox,irq-test";
+ interrupts-extended = <&irq_sandbox 3 0>;
+ };
+
lcd {
u-boot,dm-pre-proper;
compatible = "sandbox,lcd-sdl";
diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts
index a39f94f..ec53106 100644
--- a/arch/sandbox/dts/sandbox64.dts
+++ b/arch/sandbox/dts/sandbox64.dts
@@ -1,3 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Main sandbox64 devicetree
+ */
/dts-v1/;
#include <config.h>
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 962bdbe..e27d106 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1,3 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Devicetree file for running sandbox tests
+ *
+ * This includes lots of extra devices used by various tests.
+ *
+ * Note that SPL use the main sandbox.dts file
+ */
+
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
@@ -53,6 +62,9 @@
};
config {
+ testing-bool;
+ testing-int = <123>;
+ testing-str = "testing";
environment {
from_fdt = "yes";
fdt_env_path = "";
@@ -793,6 +805,13 @@
};
};
+ gpio-wdt {
+ gpios = <&gpio_a 7 0>;
+ compatible = "linux,wdt-gpio";
+ hw_margin_ms = <100>;
+ always-running;
+ };
+
mbox: mbox {
compatible = "sandbox,mbox";
#mbox-cells = <1>;
@@ -805,19 +824,27 @@
};
cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
timebase-frequency = <2000000>;
- cpu-test1 {
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ reg = <0x1>;
timebase-frequency = <3000000>;
compatible = "sandbox,cpu_sandbox";
u-boot,dm-pre-reloc;
};
- cpu-test2 {
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ reg = <0x2>;
compatible = "sandbox,cpu_sandbox";
u-boot,dm-pre-reloc;
};
- cpu-test3 {
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ reg = <0x3>;
compatible = "sandbox,cpu_sandbox";
u-boot,dm-pre-reloc;
};
@@ -1272,6 +1299,7 @@
wdt0: wdt@0 {
compatible = "sandbox,wdt";
+ hw_margin_ms = <200>;
};
axi: axi@0 {
diff --git a/arch/sandbox/include/asm/cache.h b/arch/sandbox/include/asm/cache.h
index 9348a13..609a835 100644
--- a/arch/sandbox/include/asm/cache.h
+++ b/arch/sandbox/include/asm/cache.h
@@ -19,6 +19,5 @@
#else
#define ARCH_DMA_MINALIGN 16
#endif
-#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
#endif /* __SANDBOX_CACHE_H__ */
diff --git a/arch/sandbox/include/asm/irq.h b/arch/sandbox/include/asm/irq.h
new file mode 100644
index 0000000..f73fec7
--- /dev/null
+++ b/arch/sandbox/include/asm/irq.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2021 Google LLC
+ */
+
+#ifndef __SANDBOX_IRQ_H
+#define __SANDBOX_IRQ_H
+
+/**
+ * struct sandbox_irq_priv - private data for this driver
+ *
+ * @count: Counts the number calls to the read_and_clear() method
+ * @pending: true if an interrupt is pending, else false
+ */
+struct sandbox_irq_priv {
+ int count;
+ bool pending;
+};
+
+#endif /* __SANDBOX_IRQ_H */
diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c
index dc94f83..9b71424 100644
--- a/arch/sh/lib/bootm.c
+++ b/arch/sh/lib/bootm.c
@@ -12,8 +12,11 @@
#include <env.h>
#include <image.h>
#include <asm/byteorder.h>
+#include <asm/global_data.h>
#include <asm/zimage.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_SYS_DEBUG
static void hexdump(unsigned char *buf, int len)
{
@@ -111,3 +114,16 @@
/* does not return */
return 1;
}
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mov r15, %0" : "=r"(ret) : );
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
+}
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 300b485..b8d8ee3 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -146,14 +146,12 @@
config SMM_TSEG
bool
- default n
config SMM_TSEG_SIZE
hex
config X86_RESET_VECTOR
bool
- default n
select BINMAN
# The following options control where the 16-bit and 32-bit init lies
@@ -490,7 +488,7 @@
config FSP_USE_UPD
bool
depends on FSP_VERSION1
- default y
+ default y if !NORTHBRIDGE_INTEL_IVYBRIDGE
help
Most FSPs use UPD data region for some FSP customization. But there
are still some FSPs that might not even have UPD. For such FSPs,
@@ -536,7 +534,6 @@
config CACHE_MRC_BIN
bool
depends on HAVE_MRC
- default n
help
Enable caching for the memory reference code binary. This uses an
MTRR (memory type range register) to turn on caching for the section
@@ -605,7 +602,6 @@
config SMP
bool "Enable Symmetric Multiprocessing"
- default n
help
Enable use of more than one CPU in U-Boot and the Operating System
when loaded. Each CPU will be started up and information can be
@@ -745,7 +741,6 @@
config GENERATE_PIRQ_TABLE
bool "Generate a PIRQ table"
- default n
help
Generate a PIRQ routing table for this board. The PIRQ routing table
is generated by U-Boot in the system memory from 0xf0000 to 0xfffff
@@ -769,7 +764,6 @@
config GENERATE_MP_TABLE
bool "Generate an MP (Multi-Processor) table"
- default n
help
Generate an MP (Multi-Processor) table for this board. The MP table
provides a way for the operating system to support for symmetric
@@ -778,7 +772,6 @@
config GENERATE_ACPI_TABLE
bool "Generate an ACPI (Advanced Configuration and Power Interface) table"
- default n
select QFW if QEMU
help
The Advanced Configuration and Power Interface (ACPI) specification
diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig
index b3ce053..c7f26d1 100644
--- a/arch/x86/cpu/apollolake/Kconfig
+++ b/arch/x86/cpu/apollolake/Kconfig
@@ -12,10 +12,10 @@
select INTEL_SOC
select INTEL_PMC
select TPL_X86_TSC_TIMER_NATIVE
- select SPL_PCH_SUPPORT
- select TPL_PCH_SUPPORT
+ select SPL_PCH
+ select TPL_PCH
select PCIEX_LENGTH_256MB
- select PCH_SUPPORT
+ select PCH
select P2SB
select SMP_AP_WORK
select INTEL_GMA_SWSMISCI
@@ -88,7 +88,7 @@
config APL_SPI_FLASH_BOOT
bool "Support booting with SPI-flash driver instead memory-mapped SPI"
select TPL_SPI_FLASH_SUPPORT
- select TPL_SPI_SUPPORT
+ select TPL_SPI
select TPL_DM_SPI
select TPL_DM_SPI_FLASH
help
diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c
index 9decab7..2405dec 100644
--- a/arch/x86/cpu/apollolake/hostbridge.c
+++ b/arch/x86/cpu/apollolake/hostbridge.c
@@ -220,7 +220,7 @@
ret = uclass_first_device_err(UCLASS_PINCTRL, &pinctrl);
if (ret)
return log_msg_ret("no hostbridge PINCTRL", ret);
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
int root;
/* Get length of PCI Express Region */
@@ -375,7 +375,7 @@
#endif
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_hostbridge_ids[] = {
{ .compatible = "intel,apl-hostbridge" },
{ }
diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c
index e085890..4be6366 100644
--- a/arch/x86/cpu/apollolake/lpc.c
+++ b/arch/x86/cpu/apollolake/lpc.c
@@ -128,7 +128,7 @@
.inject_dsdt = southbridge_inject_dsdt,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_lpc_ids[] = {
{ .compatible = "intel,apl-lpc" },
{ }
diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c
index 39d6ad5..a0f9b03 100644
--- a/arch/x86/cpu/apollolake/pch.c
+++ b/arch/x86/cpu/apollolake/pch.c
@@ -23,7 +23,7 @@
.set_spi_protect = apl_set_spi_protect,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_pch_ids[] = {
{ .compatible = "intel,apl-pch" },
{ }
diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c
index 1d21187..163119e 100644
--- a/arch/x86/cpu/apollolake/pmc.c
+++ b/arch/x86/cpu/apollolake/pmc.c
@@ -107,7 +107,7 @@
struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
struct apl_pmc_plat *plat = dev_get_plat(dev);
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
u32 base[6];
int size;
int ret;
@@ -206,7 +206,7 @@
.global_reset_set_enable = apl_global_reset_set_enable,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_pmc_ids[] = {
{ .compatible = "intel,apl-pmc" },
{ }
diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c
index 876fa59..a936243 100644
--- a/arch/x86/cpu/apollolake/uart.c
+++ b/arch/x86/cpu/apollolake/uart.c
@@ -123,7 +123,7 @@
return 0;
}
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_ns16550_serial_ids[] = {
{ .compatible = "intel,apl-ns16550" },
{ },
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 69cf8f4..aaa5ae1 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -16,8 +16,7 @@
#include <asm/mtrr.h>
#include <asm/cb_sysinfo.h>
#include <asm/arch/timestamp.h>
-
-DECLARE_GLOBAL_DATA_PTR;
+#include <dm/ofnode.h>
int arch_cpu_init(void)
{
@@ -65,7 +64,7 @@
mtrr_close(&state, true);
}
- if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
+ if (!ofnode_conf_read_bool("u-boot,no-apm-finalize")) {
/*
* Issue SMI to coreboot to lock down ME and registers
* when allowed via device tree
diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c
index 1eff030..ec73b3d 100644
--- a/arch/x86/cpu/intel_common/itss.c
+++ b/arch/x86/cpu/intel_common/itss.c
@@ -213,7 +213,7 @@
#endif
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id itss_ids[] = {
{ .compatible = "intel,itss", .data = X86_IRQT_ITSS },
{ }
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index d73ae43..5a7b30d 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -88,7 +88,7 @@
struct p2sb_uc_priv *upriv = dev_get_uclass_priv(dev);
struct p2sb_plat *plat = dev_get_plat(dev);
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
int ret;
u32 base[2];
@@ -159,16 +159,16 @@
static int p2sb_child_post_bind(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct p2sb_child_plat *pplat = dev_get_parent_plat(dev);
- int ret;
- u32 pid;
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct p2sb_child_plat *pplat = dev_get_parent_plat(dev);
+ int ret;
+ u32 pid;
- ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid);
- if (ret)
- return ret;
- pplat->pid = pid;
-#endif
+ ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid);
+ if (ret)
+ return ret;
+ pplat->pid = pid;
+ }
return 0;
}
@@ -177,7 +177,7 @@
.set_hide = intel_p2sb_set_hide,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id p2sb_ids[] = {
{ .compatible = "intel,p2sb" },
{ }
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig
index 2f42393..be3ef5e 100644
--- a/arch/x86/cpu/ivybridge/Kconfig
+++ b/arch/x86/cpu/ivybridge/Kconfig
@@ -45,7 +45,6 @@
config ENABLE_VMX
bool "Enable VMX for virtualization"
- default n
help
Virtual Machine Extensions are provided in many x86 CPUs. These
provide various facilities for allowing a host OS to provide an
@@ -64,10 +63,6 @@
hex
default 0xfff80000
-config FSP_USE_UPD
- bool
- default n
-
config FSP_BROKEN_HOB
bool
default y
diff --git a/arch/x86/cpu/quark/mrc.c b/arch/x86/cpu/quark/mrc.c
index 3e8c0bc..ce3c2b8 100644
--- a/arch/x86/cpu/quark/mrc.c
+++ b/arch/x86/cpu/quark/mrc.c
@@ -33,7 +33,6 @@
*/
#include <common.h>
-#include <version.h>
#include <asm/arch/mrc.h>
#include <asm/arch/msg_port.h>
#include "mrc_util.h"
@@ -191,8 +190,7 @@
{
ENTERFN();
- DPF(D_INFO, "MRC Version %04x %s %s\n", MRC_VERSION,
- U_BOOT_DATE, U_BOOT_TIME);
+ DPF(D_INFO, "MRC Version %04x\n", MRC_VERSION);
/* Set up the data structures used by mrc_mem_init() */
mrc_adjust_params(mrc_params);
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h
index 145b878..256a3c0 100644
--- a/arch/x86/include/asm/cache.h
+++ b/arch/x86/include/asm/cache.h
@@ -7,13 +7,8 @@
#define __X86_CACHE_H__
/*
- * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise
- * use 64-bytes, a safe default for x86.
+ * Use CONFIG_SYS_CACHELINE_SIZE (which is set to 64-bytes) for DMA alignment.
*/
-#ifndef CONFIG_SYS_CACHELINE_SIZE
-#define CONFIG_SYS_CACHELINE_SIZE 64
-#endif
-
#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
static inline void wbinvd(void)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 5ec3130..3f84771 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -16,7 +16,6 @@
#include <dm/uclass-internal.h>
#include <mapmem.h>
#include <serial.h>
-#include <version.h>
#include <acpi/acpigen.h>
#include <acpi/acpi_device.h>
#include <acpi/acpi_table.h>
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 733dd71..667e5e6 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -223,3 +223,21 @@
return boot_jump_linux(images);
}
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+#if CONFIG_IS_ENABLED(X86_64)
+ ret = gd->start_addr_sp;
+#else
+ asm("mov %%esp, %0" : "=r"(ret) : );
+#endif
+
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
+}
diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c
index 1302a6e..67b931d 100644
--- a/arch/x86/lib/lpc-uclass.c
+++ b/arch/x86/lib/lpc-uclass.c
@@ -10,7 +10,7 @@
UCLASS_DRIVER(lpc) = {
.id = UCLASS_LPC,
.name = "lpc",
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
};
diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c
index b3e5f9c..5b57e53 100644
--- a/arch/x86/lib/tpl.c
+++ b/arch/x86/lib/tpl.c
@@ -139,7 +139,7 @@
* for devices, so the TPL BARs continue to be used. Once U-Boot starts it does
* the auto allocation (after relocation).
*/
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id tpl_fake_pci_ids[] = {
{ .compatible = "pci-x86" },
{ }
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 6de31e8..35e5b89 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -18,7 +18,6 @@
config SYS_ICACHE_OFF
bool "Do not enable icache"
- default n
help
Do not enable instruction cache in U-Boot.
@@ -31,7 +30,6 @@
config SYS_DCACHE_OFF
bool "Do not enable dcache"
- default n
help
Do not enable data cache in U-Boot.
diff --git a/arch/xtensa/lib/bootm.c b/arch/xtensa/lib/bootm.c
index bb1e288..277af18 100644
--- a/arch/xtensa/lib/bootm.c
+++ b/arch/xtensa/lib/bootm.c
@@ -197,3 +197,15 @@
return 1;
}
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mov %0, a1" : "=r"(ret) : );
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
+}
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
index 81b0ee9..15da58a 100644
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -109,7 +109,7 @@
#ifdef CONFIG_SPL_RAM_SUPPORT
BOOT_DEVICE_RAM,
#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
BOOT_DEVICE_MMC1,
#endif
};
diff --git a/board/CarMediaLab/flea3/flea3.c b/board/CarMediaLab/flea3/flea3.c
index 12c5ac3..ecd70ec 100644
--- a/board/CarMediaLab/flea3/flea3.c
+++ b/board/CarMediaLab/flea3/flea3.c
@@ -196,12 +196,14 @@
return 0;
}
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
int rev = 0;
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
+#endif
/*
* called prior to booting kernel or by 'fdt boardsetup' command
diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c
index 730eab7..22bb008 100644
--- a/board/LaCie/netspace_v2/netspace_v2.c
+++ b/board/LaCie/netspace_v2/netspace_v2.c
@@ -73,8 +73,10 @@
int board_init(void)
{
+#ifdef CONFIG_MACH_TYPE
/* Machine number */
gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
+#endif
/* Boot parameters address */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
diff --git a/board/Synology/common/Makefile b/board/Synology/common/Makefile
index 62354cc..f688b54 100644
--- a/board/Synology/common/Makefile
+++ b/board/Synology/common/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2021 Phil Sutter <phil@nwl.cc>
-obj-y += legacy.o
+obj-$(SUPPORT_PASSING_ATAGS) += legacy.o
diff --git a/board/Synology/common/legacy.c b/board/Synology/common/legacy.c
index 3c89e92..06f964f 100644
--- a/board/Synology/common/legacy.c
+++ b/board/Synology/common/legacy.c
@@ -15,14 +15,15 @@
static unsigned int syno_board_id(void)
{
+#ifdef CONFIG_MACH_TYPE
switch (CONFIG_MACH_TYPE) {
case 527:
return SYNO_DS109_ID;
case 3036:
return SYNO_AXP_4BAY_2BAY;
- default:
- return 0;
}
+#endif
+ return 0;
}
static unsigned int usb_port_modes(void)
diff --git a/board/advantech/imx8qm_rom7720_a1/Kconfig b/board/advantech/imx8qm_rom7720_a1/Kconfig
index cf3869e..8bf3a7d 100644
--- a/board/advantech/imx8qm_rom7720_a1/Kconfig
+++ b/board/advantech/imx8qm_rom7720_a1/Kconfig
@@ -9,6 +9,9 @@
config SYS_CONFIG_NAME
default "imx8qm_rom7720"
+config IMX_CONFIG
+ default "board/advantech/imx8qm_rom7720_a1/imximage.cfg"
+
source "board/freescale/common/Kconfig"
endif
diff --git a/board/advantech/imx8qm_rom7720_a1/spl.c b/board/advantech/imx8qm_rom7720_a1/spl.c
index 8493bb0..5fd6021 100644
--- a/board/advantech/imx8qm_rom7720_a1/spl.c
+++ b/board/advantech/imx8qm_rom7720_a1/spl.c
@@ -172,7 +172,7 @@
void spl_board_init(void)
{
-#if defined(CONFIG_SPL_SPI_SUPPORT)
+#if defined(CONFIG_SPL_SPI)
if (sc_rm_is_resource_owned(-1, SC_R_FSPI_0)) {
if (sc_pm_set_resource_power_mode(-1, SC_R_FSPI_0, SC_PM_PW_MODE_ON)) {
puts("Warning: failed to initialize FSPI0\n");
@@ -185,7 +185,7 @@
void spl_board_prepare_for_boot(void)
{
-#if defined(CONFIG_SPL_SPI_SUPPORT)
+#if defined(CONFIG_SPL_SPI)
if (sc_rm_is_resource_owned(-1, SC_R_FSPI_0)) {
if (sc_pm_set_resource_power_mode(-1, SC_R_FSPI_0, SC_PM_PW_MODE_OFF)) {
puts("Warning: failed to turn off FSPI0\n");
diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c
index 7bcfa82..8b31045 100644
--- a/board/alliedtelesis/x530/x530.c
+++ b/board/alliedtelesis/x530/x530.c
@@ -121,9 +121,8 @@
void arch_preboot_os(void)
{
-#ifdef CONFIG_WATCHDOG
- wdt_stop(gd->watchdog_dev);
-#endif
+ if (CONFIG_IS_ENABLED(WDT))
+ wdt_stop_all();
}
static int led_7seg_init(unsigned int segments)
diff --git a/board/aristainetos/Kconfig b/board/aristainetos/Kconfig
index cc603c1..2d8fcc5 100644
--- a/board/aristainetos/Kconfig
+++ b/board/aristainetos/Kconfig
@@ -8,6 +8,9 @@
config SYS_BOARD_VERSION
default 5
+config IMX_CONFIG
+ default "board/aristainetos/aristainetos2.cfg"
+
endif
if TARGET_ARISTAINETOS2CCSLB
@@ -20,4 +23,7 @@
config SYS_BOARD_VERSION
default 6
+config IMX_CONFIG
+ default "board/aristainetos/aristainetos2.cfg"
+
endif
diff --git a/board/armadeus/opos6uldev/Kconfig b/board/armadeus/opos6uldev/Kconfig
index e66f060..2a96c004 100644
--- a/board/armadeus/opos6uldev/Kconfig
+++ b/board/armadeus/opos6uldev/Kconfig
@@ -9,7 +9,4 @@
config SYS_CONFIG_NAME
default "opos6uldev"
-config IMX_CONFIG
- default "arch/arm/mach-imx/spl_sd.cfg"
-
endif
diff --git a/board/armltd/vexpress/Kconfig b/board/armltd/vexpress/Kconfig
new file mode 100644
index 0000000..1b0dcf9
--- /dev/null
+++ b/board/armltd/vexpress/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_VEXPRESS_CA9X4
+
+config SYS_BOARD
+ default "vexpress"
+
+config SYS_VENDOR
+ default "armltd"
+
+config SYS_CONFIG_NAME
+ default "vexpress_ca9x4"
+
+endif
diff --git a/board/armltd/vexpress/MAINTAINERS b/board/armltd/vexpress/MAINTAINERS
new file mode 100644
index 0000000..2b3e491
--- /dev/null
+++ b/board/armltd/vexpress/MAINTAINERS
@@ -0,0 +1,6 @@
+VERSATILE EXPRESS BOARDS
+M: Kristian Amlie <kristian.amlie@northern.tech>
+S: Maintained
+F: board/armltd/vexpress/
+F: include/configs/vexpress_ca9x4.h
+F: configs/vexpress_ca9x4_defconfig
diff --git a/board/armltd/vexpress/Makefile b/board/armltd/vexpress/Makefile
new file mode 100644
index 0000000..84804f5
--- /dev/null
+++ b/board/armltd/vexpress/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+
+obj-y := vexpress_common.o
diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c
new file mode 100644
index 0000000..1c83019
--- /dev/null
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+ *
+ * (C) Copyright 2003
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * (C) Copyright 2004
+ * ARM Ltd.
+ * Philippe Robin, <philippe.robin@arm.com>
+ */
+#include <common.h>
+#include <bootstage.h>
+#include <cpu_func.h>
+#include <init.h>
+#include <malloc.h>
+#include <errno.h>
+#include <net.h>
+#include <netdev.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/arch/systimer.h>
+#include <asm/arch/sysctrl.h>
+#include <asm/arch/wdt.h>
+
+static struct systimer *systimer_base = (struct systimer *)V2M_TIMER01;
+static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
+
+static void flash__init(void);
+static void vexpress_timer_init(void);
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_SHOW_BOOT_PROGRESS)
+void show_boot_progress(int progress)
+{
+ printf("Boot reached stage %d\n", progress);
+}
+#endif
+
+static inline void delay(ulong loops)
+{
+ __asm__ volatile ("1:\n"
+ "subs %0, %1, #1\n"
+ "bne 1b" : "=r" (loops) : "0" (loops));
+}
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+ gd->bd->bi_arch_number = MACH_TYPE_VEXPRESS;
+
+ icache_enable();
+ flash__init();
+ vexpress_timer_init();
+
+ return 0;
+}
+
+static void flash__init(void)
+{
+ /* Setup the sytem control register to allow writing to flash */
+ writel(readl(&sysctrl_base->scflashctrl) | VEXPRESS_FLASHPROG_FLVPPEN,
+ &sysctrl_base->scflashctrl);
+}
+
+int dram_init(void)
+{
+ gd->ram_size =
+ get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size =
+ get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size =
+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+
+ return 0;
+}
+
+/*
+ * Start timer:
+ * Setup a 32 bit timer, running at 1KHz
+ * Versatile Express Motherboard provides 1 MHz timer
+ */
+static void vexpress_timer_init(void)
+{
+ /*
+ * Set clock frequency in system controller:
+ * VEXPRESS_REFCLK is 32KHz
+ * VEXPRESS_TIMCLK is 1MHz
+ */
+ writel(SP810_TIMER0_ENSEL | SP810_TIMER1_ENSEL |
+ SP810_TIMER2_ENSEL | SP810_TIMER3_ENSEL |
+ readl(&sysctrl_base->scctrl), &sysctrl_base->scctrl);
+
+ /*
+ * Set Timer0 to be:
+ * Enabled, free running, no interrupt, 32-bit, wrapping
+ */
+ writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
+ writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
+ writel(SYSTIMER_EN | SYSTIMER_32BIT |
+ readl(&systimer_base->timer0control),
+ &systimer_base->timer0control);
+}
+
+int v2m_cfg_write(u32 devfn, u32 data)
+{
+ /* Configuration interface broken? */
+ u32 val;
+
+ devfn |= SYS_CFG_START | SYS_CFG_WRITE;
+
+ val = readl(V2M_SYS_CFGSTAT);
+ writel(val & ~SYS_CFG_COMPLETE, V2M_SYS_CFGSTAT);
+
+ writel(data, V2M_SYS_CFGDATA);
+ writel(devfn, V2M_SYS_CFGCTRL);
+
+ do {
+ val = readl(V2M_SYS_CFGSTAT);
+ } while (val == 0);
+
+ return !!(val & SYS_CFG_ERR);
+}
+
+/* Use the ARM Watchdog System to cause reset */
+void reset_cpu(void)
+{
+ if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
+ printf("Unable to reboot\n");
+}
+
+void lowlevel_init(void)
+{
+}
+
+ulong get_board_rev(void){
+ return readl((u32 *)SYS_ID);
+}
+
+#ifdef CONFIG_ARMV7_NONSEC
+/* Setting the address at which secondary cores start from.
+ * Versatile Express uses one address for all cores, so ignore corenr
+ */
+void smp_set_core_boot_addr(unsigned long addr, int corenr)
+{
+ /* The SYSFLAGS register on VExpress needs to be cleared first
+ * by writing to the next address, since any writes to the address
+ * at offset 0 will only be ORed in
+ */
+ writel(~0, CONFIG_SYSFLAGS_ADDR + 4);
+ writel(addr, CONFIG_SYSFLAGS_ADDR);
+}
+#endif
diff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
index 1b7d946..8c0cf3d 100644
--- a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
+++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <debug_uart.h>
+#include <fdtdec.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
@@ -68,7 +69,7 @@
int board_init(void)
{
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
#ifdef CONFIG_CMD_USB
board_usb_hw_init();
@@ -77,11 +78,14 @@
return 0;
}
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
+
int dram_init(void)
{
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
+ return fdtdec_setup_mem_size_base();
}
#define MAC24AA_MAC_OFFSET 0xfa
diff --git a/board/atmel/sama5d2_icp/MAINTAINERS b/board/atmel/sama5d2_icp/MAINTAINERS
index db984b6..4a65c65 100644
--- a/board/atmel/sama5d2_icp/MAINTAINERS
+++ b/board/atmel/sama5d2_icp/MAINTAINERS
@@ -4,4 +4,5 @@
F: board/atmel/sama5d2_icp/
F: include/configs/sama5d2_icp.h
F: configs/sama5d2_icp_mmc_defconfig
+F: configs/sama5d2_icp_qspiflash_defconfig
diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
index a6937e7..2a2439c 100644
--- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
+++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
@@ -10,7 +10,6 @@
#include <i2c.h>
#include <init.h>
#include <nand.h>
-#include <version.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 5110ec8..8b5cd53 100644
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -68,7 +68,7 @@
int board_init(void)
{
/* address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
#ifdef CONFIG_CMD_USB
board_usb_hw_init();
@@ -77,11 +77,14 @@
return 0;
}
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
+
int dram_init(void)
{
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- CONFIG_SYS_SDRAM_SIZE);
- return 0;
+ return fdtdec_setup_mem_size_base();
}
#define AT24MAC_MAC_OFFSET 0x9a
diff --git a/board/beacon/imx8mm/Kconfig b/board/beacon/imx8mm/Kconfig
index df3125e..58799c1 100644
--- a/board/beacon/imx8mm/Kconfig
+++ b/board/beacon/imx8mm/Kconfig
@@ -9,6 +9,9 @@
config SYS_CONFIG_NAME
default "imx8mm_beacon"
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
+
source "board/freescale/common/Kconfig"
endif
diff --git a/board/beacon/imx8mn/Kconfig b/board/beacon/imx8mn/Kconfig
index 2bcfb25..65d2923 100644
--- a/board/beacon/imx8mn/Kconfig
+++ b/board/beacon/imx8mn/Kconfig
@@ -11,11 +11,12 @@
config IMX8MN_FORCE_NOM_SOC
bool "Force to use nominal mode for SOC and ARM"
- default n
config IMX8MN_BEACON_2GB_LPDDR
bool "Enable 2GB LPDDR"
- default n
+
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg"
source "board/freescale/common/Kconfig"
diff --git a/board/beckhoff/mx53cx9020/Kconfig b/board/beckhoff/mx53cx9020/Kconfig
index dcdafb6..d4416cf 100644
--- a/board/beckhoff/mx53cx9020/Kconfig
+++ b/board/beckhoff/mx53cx9020/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "mx53cx9020"
+config IMX_CONFIG
+ default "board/beckhoff/mx53cx9020/imximage.cfg"
+
endif
diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c
index a3657db..e7b1318 100644
--- a/board/beckhoff/mx53cx9020/mx53cx9020.c
+++ b/board/beckhoff/mx53cx9020/mx53cx9020.c
@@ -48,6 +48,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@@ -59,6 +60,7 @@
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
+#endif
/*
* Set CCAT mode
diff --git a/board/bosch/guardian/Makefile b/board/bosch/guardian/Makefile
index 11625c9..20cecbf 100644
--- a/board/bosch/guardian/Makefile
+++ b/board/bosch/guardian/Makefile
@@ -5,7 +5,7 @@
# Copyright (C) 2018 Robert Bosch Power Tools GmbH
#
-ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
+ifeq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c
index 179511a..105b75e 100644
--- a/board/bosch/guardian/board.c
+++ b/board/bosch/guardian/board.c
@@ -40,7 +40,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
static const struct ddr_data ddr3_data = {
@@ -142,7 +142,7 @@
const struct dpll_params *get_dpll_ddr_params(void)
{
enable_i2c0_pin_mux();
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
return &dpll_ddr;
}
diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c
index 13fd25e..a7a9775 100644
--- a/board/bosch/shc/board.c
+++ b/board/bosch/shc/board.c
@@ -51,16 +51,17 @@
/*
* Read header information from EEPROM into global structure.
*/
+#define EEPROM_ADDR 0x50
static int read_eeprom(void)
{
/* Check if baseboard eeprom is available */
- if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
+ if (i2c_probe(EEPROM_ADDR)) {
puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
return -ENODEV;
}
/* read the eeprom using i2c */
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
+ if (i2c_read(EEPROM_ADDR, 0, 2, (uchar *)&header,
sizeof(header))) {
puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n");
return -EIO;
diff --git a/board/boundary/nitrogen6x/Kconfig b/board/boundary/nitrogen6x/Kconfig
index f4db56d..9c176c0 100644
--- a/board/boundary/nitrogen6x/Kconfig
+++ b/board/boundary/nitrogen6x/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "nitrogen6x"
+config DDR_MB
+ int "Memory size in MB"
+
endif
diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c
index 076ac94..276e59b 100644
--- a/board/broadcom/bcmstb/bcmstb.c
+++ b/board/broadcom/bcmstb/bcmstb.c
@@ -38,11 +38,6 @@
return 0;
}
-u32 get_board_rev(void)
-{
- return 0;
-}
-
void reset_cpu(void)
{
}
diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c
index 454c93a..3ee1335 100644
--- a/board/compulab/cl-som-imx7/cl-som-imx7.c
+++ b/board/compulab/cl-som-imx7/cl-som-imx7.c
@@ -267,7 +267,7 @@
return 0;
}
-#ifdef CONFIG_POWER
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
#define I2C_PMIC 0
int power_init_board(void)
{
@@ -293,7 +293,7 @@
return 0;
}
-#endif /* CONFIG_POWER */
+#endif /* CONFIG_IS_ENABLED(POWER_LEGACY) */
/*
* cl_som_imx7_setup_wdog() - watchdog configuration.
diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c
index 9c7332b..5d4c4d3 100644
--- a/board/compulab/cl-som-imx7/spl.c
+++ b/board/compulab/cl-som-imx7/spl.c
@@ -157,15 +157,15 @@
}
}
-#ifdef CONFIG_SPL_SPI_SUPPORT
+#ifdef CONFIG_SPL_SPI
static void cl_som_imx7_spl_spi_init(void)
{
cl_som_imx7_espi1_pads_set();
}
-#else /* !CONFIG_SPL_SPI_SUPPORT */
+#else /* !CONFIG_SPL_SPI */
static void cl_som_imx7_spl_spi_init(void) {}
-#endif /* CONFIG_SPL_SPI_SUPPORT */
+#endif /* CONFIG_SPL_SPI */
void board_init_f(ulong dummy)
{
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index f29b082..c54bffd 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -720,10 +720,12 @@
return 0;
}
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS);
}
+#endif
static struct mxc_serial_plat cm_fx6_mxc_serial_plat = {
.reg = (struct mxc_uart *)UART4_BASE,
diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c
index c3c8161..079f196 100644
--- a/board/compulab/cm_fx6/spl.c
+++ b/board/compulab/cm_fx6/spl.c
@@ -302,7 +302,7 @@
enable_uart_clk(1);
}
-#ifdef CONFIG_SPL_SPI_SUPPORT
+#ifdef CONFIG_SPL_SPI
static void cm_fx6_setup_ecspi(void)
{
cm_fx6_set_ecspi_iomux();
@@ -350,7 +350,7 @@
}
}
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
static struct fsl_esdhc_cfg usdhc_cfg = {
.esdhc_base = USDHC3_BASE_ADDR,
.max_bus_width = 4,
diff --git a/board/compulab/cm_t43/cm_t43.c b/board/compulab/cm_t43/cm_t43.c
index efdade1..bcfe1bf 100644
--- a/board/compulab/cm_t43/cm_t43.c
+++ b/board/compulab/cm_t43/cm_t43.c
@@ -48,7 +48,7 @@
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gpmc_init();
set_i2c_pin_mux();
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
i2c_probe(TPS65218_CHIP_PM);
return 0;
diff --git a/board/compulab/cm_t43/spl.c b/board/compulab/cm_t43/spl.c
index 016c63a..9c6806c 100644
--- a/board/compulab/cm_t43/spl.c
+++ b/board/compulab/cm_t43/spl.c
@@ -106,7 +106,7 @@
void scale_vcores(void)
{
set_i2c_pin_mux();
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
if (i2c_probe(TPS65218_CHIP_PM))
return;
diff --git a/board/compulab/common/Makefile b/board/compulab/common/Makefile
index 842fb3b..25dad49 100644
--- a/board/compulab/common/Makefile
+++ b/board/compulab/common/Makefile
@@ -5,6 +5,6 @@
# Author: Igor Grinberg <grinberg@compulab.co.il>
obj-y += common.o
-obj-$(CONFIG_SYS_I2C_LEGACY) += eeprom.o
+obj-$(CONFIG_$(SPL_)SYS_I2C_LEGACY) += eeprom.o
obj-$(CONFIG_LCD) += omap3_display.o
obj-$(CONFIG_SMC911X) += omap3_smc911x.o
diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c
index b41c64d..c4b257f 100644
--- a/board/compulab/common/eeprom.c
+++ b/board/compulab/common/eeprom.c
@@ -15,15 +15,6 @@
#include <linux/kernel.h>
#include "eeprom.h"
-#ifndef CONFIG_SYS_I2C_EEPROM_ADDR
-# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#endif
-
-#ifndef CONFIG_SYS_I2C_EEPROM_BUS
-#define CONFIG_SYS_I2C_EEPROM_BUS 0
-#endif
-
#define EEPROM_LAYOUT_VER_OFFSET 44
#define BOARD_SERIAL_OFFSET 20
#define BOARD_SERIAL_OFFSET_LEGACY 8
@@ -394,43 +385,8 @@
#define LAYOUT_VERSION_VER2 3
#define LAYOUT_VERSION_VER3 4
-extern struct eeprom_field layout_unknown[1];
-
#define DEFINE_PRINT_UPDATE(x) eeprom_field_print_##x, eeprom_field_update_##x
-#ifdef CONFIG_CM_T3X
-struct eeprom_field layout_legacy[5] = {
- { "MAC address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
- { "Board Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin) },
- { "Serial Number", 8, NULL, DEFINE_PRINT_UPDATE(bin) },
- { "Board Configuration", 64, NULL, DEFINE_PRINT_UPDATE(ascii) },
- { RESERVED_FIELDS, 176, NULL, eeprom_field_print_reserved,
- eeprom_field_update_ascii },
-};
-#else
-#define layout_legacy layout_unknown
-#endif
-
-#if defined(CONFIG_CM_T3X)
-struct eeprom_field layout_v1[12] = {
- { "Major Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
- { "Minor Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
- { "1st MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
- { "2nd MAC Address", 6, NULL, DEFINE_PRINT_UPDATE(mac) },
- { "Production Date", 4, NULL, DEFINE_PRINT_UPDATE(date) },
- { "Serial Number", 12, NULL, DEFINE_PRINT_UPDATE(bin_rev) },
- { RESERVED_FIELDS, 96, NULL, DEFINE_PRINT_UPDATE(reserved) },
- { "Product Name", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
- { "Product Options #1", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
- { "Product Options #2", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
- { "Product Options #3", 16, NULL, DEFINE_PRINT_UPDATE(ascii) },
- { RESERVED_FIELDS, 64, NULL, eeprom_field_print_reserved,
- eeprom_field_update_ascii },
-};
-#else
-#define layout_v1 layout_unknown
-#endif
-
struct eeprom_field layout_v2[15] = {
{ "Major Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
{ "Minor Revision", 2, NULL, DEFINE_PRINT_UPDATE(bin_ver) },
@@ -473,14 +429,6 @@
void eeprom_layout_assign(struct eeprom_layout *layout, int layout_version)
{
switch (layout->layout_version) {
- case LAYOUT_VERSION_LEGACY:
- layout->fields = layout_legacy;
- layout->num_of_fields = ARRAY_SIZE(layout_legacy);
- break;
- case LAYOUT_VERSION_VER1:
- layout->fields = layout_v1;
- layout->num_of_fields = ARRAY_SIZE(layout_v1);
- break;
case LAYOUT_VERSION_VER2:
layout->fields = layout_v2;
layout->num_of_fields = ARRAY_SIZE(layout_v2);
diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h
index 51c8acf..9bd7604 100644
--- a/board/compulab/common/eeprom.h
+++ b/board/compulab/common/eeprom.h
@@ -10,7 +10,7 @@
#define _EEPROM_
#include <errno.h>
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus);
u32 cl_eeprom_get_board_rev(uint eeprom_bus);
int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus);
diff --git a/board/compulab/imx8mm-cl-iot-gate/Kconfig b/board/compulab/imx8mm-cl-iot-gate/Kconfig
index 7f5c794..30760cb 100644
--- a/board/compulab/imx8mm-cl-iot-gate/Kconfig
+++ b/board/compulab/imx8mm-cl-iot-gate/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "imx8mm-cl-iot-gate"
+config IMX_CONFIG
+ default "board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg"
+
endif
diff --git a/board/compulab/imx8mm-cl-iot-gate/spl.c b/board/compulab/imx8mm-cl-iot-gate/spl.c
index 8f59245..2dc62d6 100644
--- a/board/compulab/imx8mm-cl-iot-gate/spl.c
+++ b/board/compulab/imx8mm-cl-iot-gate/spl.c
@@ -176,7 +176,7 @@
enable_tzc380();
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+ setup_i2c(1, 100000, 0x7f, &i2c_pad_info1);
power_init_board();
diff --git a/board/congatec/cgtqmx8/Kconfig b/board/congatec/cgtqmx8/Kconfig
index 7273039..74e9838 100644
--- a/board/congatec/cgtqmx8/Kconfig
+++ b/board/congatec/cgtqmx8/Kconfig
@@ -9,6 +9,9 @@
config SYS_CONFIG_NAME
default "cgtqmx8"
+config IMX_CONFIG
+ default "board/congatec/cgtqmx8/imximage.cfg"
+
source "board/congatec/common/Kconfig"
endif
diff --git a/board/congatec/common/Kconfig b/board/congatec/common/Kconfig
index 5c205bd..d4a238d 100644
--- a/board/congatec/common/Kconfig
+++ b/board/congatec/common/Kconfig
@@ -28,7 +28,6 @@
config VOL_MONITOR_LTC3882_READ
depends on VID
bool "Enable the LTC3882 voltage monitor read"
- default n
help
This option enables LTC3882 voltage monitor read
functionality. It is used by common VID driver.
@@ -36,13 +35,11 @@
config VOL_MONITOR_LTC3882_SET
depends on VID
bool "Enable the LTC3882 voltage monitor set"
- default n
help
This option enables LTC3882 voltage monitor set
functionality. It is used by common VID driver.
config USB_TCPC
bool "USB Typec port controller simple driver"
- default n
help
Enable USB type-c port controller (TCPC) driver
diff --git a/board/davinci/da8xxevm/Kconfig b/board/davinci/da8xxevm/Kconfig
index bb1188b..c5499a6 100644
--- a/board/davinci/da8xxevm/Kconfig
+++ b/board/davinci/da8xxevm/Kconfig
@@ -22,15 +22,6 @@
their MAC address in SPI Flash from the factory
Enable this option to read the MAC from SPI Flash
-config MAC_ADDR_IN_EEPROM
- bool "MAC address in EEPROM"
- help
- The DA850 EVM comes with SoM are programmed with
- their MAC address in SPI Flash from the factory,
- but the kit has an optional expansion board with
- EEPROM available. Enable this option to read the
- MAC from the EEPROM
-
endif
endif
diff --git a/board/davinci/da8xxevm/Makefile b/board/davinci/da8xxevm/Makefile
index 3fac615..8187c8d 100644
--- a/board/davinci/da8xxevm/Makefile
+++ b/board/davinci/da8xxevm/Makefile
@@ -7,4 +7,4 @@
obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o
obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o
-obj-$(CONFIG_MACH_OMAPL138_LCDK) += omapl138_lcdk.o
+obj-$(CONFIG_TARGET_OMAPL138_LCDK) += omapl138_lcdk.o
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index 6c75231..2436aab 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -129,19 +129,12 @@
{
dspwake();
-#if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
-
- uchar env_enetaddr[6];
- int enetaddr_found;
+#if defined(CONFIG_MAC_ADDR_IN_SPIFLASH)
+ uchar env_enetaddr[6], buff[6];
+ int enetaddr_found, spi_mac_read;
enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr);
-#endif
-
-#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
- int spi_mac_read;
- uchar buff[6];
-
spi_mac_read = get_mac_addr(buff);
buff[0] = 0;
@@ -173,34 +166,6 @@
"with the MAC address in the environment\n");
printf("Default using MAC address from environment\n");
}
-
-#elif defined(CONFIG_MAC_ADDR_IN_EEPROM)
- uint8_t enetaddr[8];
- int eeprom_mac_read;
-
- /* Read Ethernet MAC address from EEPROM */
- eeprom_mac_read = dvevm_read_mac_address(enetaddr);
-
- /*
- * MAC address not present in the environment
- * try and read the MAC address from EEPROM flash
- * and set it.
- */
- if (!enetaddr_found) {
- if (eeprom_mac_read)
- /* Set Ethernet MAC address from EEPROM */
- davinci_sync_env_enetaddr(enetaddr);
- } else {
- /*
- * MAC address present in environment compare it with
- * the MAC address in EEPROM and warn on mismatch
- */
- if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
- printf("Warning: MAC address in EEPROM don't match "
- "with the MAC address in the environment\n");
- printf("Default using MAC address from environment\n");
- }
-
#endif
return 0;
}
@@ -267,6 +232,7 @@
#define REV_AM18X_EVM 0x100
+#ifdef CONFIG_REVISION_TAG
/*
* get_board_rev() - setup to pass kernel board revision information
* Returns:
@@ -294,6 +260,7 @@
rev = 1;
return rev;
}
+#endif
int board_early_init_f(void)
{
diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c
index d5f43bf..cd021cc 100644
--- a/board/davinci/da8xxevm/omapl138_lcdk.c
+++ b/board/davinci/da8xxevm/omapl138_lcdk.c
@@ -143,20 +143,6 @@
#define CONFIG_DA850_EVM_MAX_CPU_CLK 456000000
#endif
-/*
- * get_board_rev() - setup to pass kernel board revision information
- * Returns:
- * bit[0-3] Maximum cpu clock rate supported by onboard SoC
- * 0000b - 300 MHz
- * 0001b - 372 MHz
- * 0010b - 408 MHz
- * 0011b - 456 MHz
- */
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_early_init_f(void)
{
/*
@@ -236,12 +222,6 @@
#define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
-static int get_mac_addr(u8 *addr)
-{
- /* Need to find a way to get MAC ADDRESS */
- return 0;
-}
-
void dsp_lpsc_on(unsigned domain, unsigned int id)
{
dv_reg_p mdstat, mdctl, ptstat, ptcmd;
@@ -304,29 +284,6 @@
int misc_init_r(void)
{
- uint8_t tmp[20], addr[10];
-
-
- if (env_get("ethaddr") == NULL) {
- /* Read Ethernet MAC address from EEPROM */
- if (dvevm_read_mac_address(addr)) {
- /* Set Ethernet MAC address from EEPROM */
- davinci_sync_env_enetaddr(addr);
- } else {
- get_mac_addr(addr);
- }
-
- if (!is_multicast_ethaddr(addr) && !is_zero_ethaddr(addr)) {
- sprintf((char *)tmp, "%02x:%02x:%02x:%02x:%02x:%02x",
- addr[0], addr[1], addr[2], addr[3], addr[4],
- addr[5]);
-
- env_set("ethaddr", (char *)tmp);
- } else {
- printf("Invalid MAC address read.\n");
- }
- }
-
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
/* Select RMII fucntion through the expander */
if (rmii_hw_init())
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index d7c1857..4b3167f 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -42,6 +42,7 @@
#include <usb.h>
#include <usb/dwc2_udc.h>
#include <watchdog.h>
+#include <dm/ofnode.h>
#include "../../st/common/stpmic1.h"
/* SYSCFG registers */
@@ -382,10 +383,10 @@
#ifdef CONFIG_LED
static int get_led(struct udevice **dev, char *led_string)
{
- char *led_name;
+ const char *led_name;
int ret;
- led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
+ led_name = ofnode_conf_read_str(led_string);
if (!led_name) {
pr_debug("%s: could not find %s config string\n",
__func__, led_string);
diff --git a/board/ea/mx7ulp_com/Kconfig b/board/ea/mx7ulp_com/Kconfig
index 90883ac..f7b1f1b 100644
--- a/board/ea/mx7ulp_com/Kconfig
+++ b/board/ea/mx7ulp_com/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "mx7ulp_com"
+config IMX_CONFIG
+ default "board/ea/mx7ulp_com/imximage.cfg"
+
endif
diff --git a/board/eets/pdu001/Makefile b/board/eets/pdu001/Makefile
index 08c6d53..a5990ce3 100644
--- a/board/eets/pdu001/Makefile
+++ b/board/eets/pdu001/Makefile
@@ -6,7 +6,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
-ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
+ifeq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c
index f806d1e..9f3cfd4 100644
--- a/board/eets/pdu001/board.c
+++ b/board/eets/pdu001/board.c
@@ -162,7 +162,7 @@
}
}
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
static const struct ddr_data ddr2_data = {
.datardsratio0 = MT47H128M16RT25E_RD_DQS,
.datafwsratio0 = MT47H128M16RT25E_PHY_FIFO_WE,
@@ -235,7 +235,7 @@
config_ddr(266, &ioregs, &ddr2_data,
&ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0);
}
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
#ifdef CONFIG_DEBUG_UART
void board_debug_uart_init(void)
diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c
index dda8502..a3c23bd 100644
--- a/board/embest/mx6boards/mx6boards.c
+++ b/board/embest/mx6boards/mx6boards.c
@@ -473,7 +473,7 @@
/* setup GP timer */
timer_init();
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
+#ifdef CONFIG_SPL_SERIAL
setup_iomux_uart();
preloader_console_init();
#endif
diff --git a/board/engicam/imx8mm/Kconfig b/board/engicam/imx8mm/Kconfig
index ed68516..5495b3b 100644
--- a/board/engicam/imx8mm/Kconfig
+++ b/board/engicam/imx8mm/Kconfig
@@ -9,6 +9,9 @@
config SYS_CONFIG_NAME
default "imx8mm_icore_mx8mm"
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
+
source "board/freescale/common/Kconfig"
endif
diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c
index 41c49e5..95d8b00 100644
--- a/board/firefly/firefly-rk3288/firefly-rk3288.c
+++ b/board/firefly/firefly-rk3288/firefly-rk3288.c
@@ -8,9 +8,9 @@
#include <led.h>
#include <log.h>
#include <asm/global_data.h>
+#include <dm/ofnode.h>
#ifdef CONFIG_SPL_BUILD
-DECLARE_GLOBAL_DATA_PTR;
static int setup_led(void)
{
#ifdef CONFIG_SPL_LED
@@ -18,7 +18,7 @@
char *led_name;
int ret;
- led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
+ led_name = ofnode_conf_read_str("u-boot,boot-led");
if (!led_name)
return 0;
ret = led_get_by_label(led_name, &dev);
diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig
index 35a6115..69620db 100644
--- a/board/freescale/common/Kconfig
+++ b/board/freescale/common/Kconfig
@@ -24,7 +24,6 @@
config FSL_USE_PCA9547_MUX
bool "Enable PCA9547 I2C Mux on Freescale boards"
- default n
help
This option enables the PCA9547 I2C mux on Freescale boards.
diff --git a/board/freescale/common/ics307_clk.h b/board/freescale/common/ics307_clk.h
index 81d1aa7..1634969 100644
--- a/board/freescale/common/ics307_clk.h
+++ b/board/freescale/common/ics307_clk.h
@@ -8,7 +8,6 @@
#ifndef __ASSEMBLY__
extern unsigned long get_board_sys_clk(void);
-extern unsigned long get_board_ddr_clk(void);
extern unsigned long ics307_sysclk_calculator(unsigned long out_freq);
#endif
diff --git a/board/freescale/imx8mm_evk/Kconfig b/board/freescale/imx8mm_evk/Kconfig
index 299691a..24cc526 100644
--- a/board/freescale/imx8mm_evk/Kconfig
+++ b/board/freescale/imx8mm_evk/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "imx8mm_evk"
+config IMX_CONFIG
+ default "board/freescale/imx8mm_evk/imximage-8mm-lpddr4.cfg"
+
endif
diff --git a/board/freescale/imx8mn_evk/Kconfig b/board/freescale/imx8mn_evk/Kconfig
index 478f4ed..0adf87b 100644
--- a/board/freescale/imx8mn_evk/Kconfig
+++ b/board/freescale/imx8mn_evk/Kconfig
@@ -11,7 +11,9 @@
config IMX8MN_LOW_DRIVE_MODE
bool "Enable the low drive mode of iMX8MN on EVK board"
- default n
+
+config IMX_CONFIG
+ default "board/freescale/imx8mn_evk/imximage-8mn-ddr4.cfg"
source "board/freescale/common/Kconfig"
diff --git a/board/freescale/imx8mp_evk/Kconfig b/board/freescale/imx8mp_evk/Kconfig
index 49bb29a..42625fd 100644
--- a/board/freescale/imx8mp_evk/Kconfig
+++ b/board/freescale/imx8mp_evk/Kconfig
@@ -9,6 +9,9 @@
config SYS_CONFIG_NAME
default "imx8mp_evk"
+config IMX_CONFIG
+ default "board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg"
+
source "board/freescale/common/Kconfig"
endif
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index a7564e9..eca42c7 100644
--- a/board/freescale/imx8mp_evk/spl.c
+++ b/board/freescale/imx8mp_evk/spl.c
@@ -63,7 +63,7 @@
},
};
-#ifdef CONFIG_POWER
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
#define I2C_PMIC 0
int power_init_board(void)
{
diff --git a/board/freescale/imx8mq_evk/Kconfig b/board/freescale/imx8mq_evk/Kconfig
index 421b081..c4d20ad 100644
--- a/board/freescale/imx8mq_evk/Kconfig
+++ b/board/freescale/imx8mq_evk/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "imx8mq_evk"
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage.cfg"
+
endif
diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c
index e8e0efe..67d069b 100644
--- a/board/freescale/imx8mq_evk/spl.c
+++ b/board/freescale/imx8mq_evk/spl.c
@@ -156,7 +156,7 @@
return 0;
}
-#ifdef CONFIG_POWER
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
#define I2C_PMIC 0
int power_init_board(void)
{
diff --git a/board/freescale/imx8qm_mek/Kconfig b/board/freescale/imx8qm_mek/Kconfig
index 93d7d5f..aed6ab2 100644
--- a/board/freescale/imx8qm_mek/Kconfig
+++ b/board/freescale/imx8qm_mek/Kconfig
@@ -9,6 +9,9 @@
config SYS_CONFIG_NAME
default "imx8qm_mek"
+config IMX_CONFIG
+ default "board/freescale/imx8qm_mek/imximage.cfg"
+
source "board/freescale/common/Kconfig"
endif
diff --git a/board/freescale/imx8qxp_mek/Kconfig b/board/freescale/imx8qxp_mek/Kconfig
index b67300d..b9aab37 100644
--- a/board/freescale/imx8qxp_mek/Kconfig
+++ b/board/freescale/imx8qxp_mek/Kconfig
@@ -9,6 +9,9 @@
config SYS_CONFIG_NAME
default "imx8qxp_mek"
+config IMX_CONFIG
+ default "board/freescale/imx8qxp_mek/imximage.cfg"
+
source "board/freescale/common/Kconfig"
endif
diff --git a/board/freescale/imxrt1020-evk/imxrt1020-evk.c b/board/freescale/imxrt1020-evk/imxrt1020-evk.c
index 479e66b..54a733b 100644
--- a/board/freescale/imxrt1020-evk/imxrt1020-evk.c
+++ b/board/freescale/imxrt1020-evk/imxrt1020-evk.c
@@ -71,11 +71,6 @@
}
#endif
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
diff --git a/board/freescale/imxrt1050-evk/imxrt1050-evk.c b/board/freescale/imxrt1050-evk/imxrt1050-evk.c
index eb49239..6132916 100644
--- a/board/freescale/imxrt1050-evk/imxrt1050-evk.c
+++ b/board/freescale/imxrt1050-evk/imxrt1050-evk.c
@@ -71,11 +71,6 @@
}
#endif
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
diff --git a/board/freescale/ls1021aqds/README b/board/freescale/ls1021aqds/README
index 6cf7146..e2ce001 100644
--- a/board/freescale/ls1021aqds/README
+++ b/board/freescale/ls1021aqds/README
@@ -113,6 +113,5 @@
LS1021a rev1.0 Soc specific Options/Settings
--------------------------------------------
-If the LS1021a Soc is rev1.0, you need modify the configure file.
-Add the following define in include/configs/ls1021aqds.h:
-#define CONFIG_SKIP_LOWLEVEL_INIT
+If the LS1021a Soc is rev1.0, you need modify the configuration and enable
+CONFIG_SPL_SKIP_LOWLEVEL_INIT in menuconfig or similar.
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 711d8c2..fbbd27d 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -127,6 +127,7 @@
return 66666666;
}
+#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
unsigned long get_board_ddr_clk(void)
{
u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
@@ -141,6 +142,7 @@
}
return 66666666;
}
+#endif
int dram_init(void)
{
diff --git a/board/freescale/ls1021atwr/README b/board/freescale/ls1021atwr/README
index 896a659..a4639cd 100644
--- a/board/freescale/ls1021atwr/README
+++ b/board/freescale/ls1021atwr/README
@@ -110,6 +110,5 @@
LS1021a rev1.0 Soc specific Options/Settings
--------------------------------------------
-If the LS1021a Soc is rev1.0, you need modify the configure file.
-Add the following define in include/configs/ls1021atwr.h:
-#define CONFIG_SKIP_LOWLEVEL_INIT
+If the LS1021a Soc is rev1.0, you need modify the configuration and enable
+CONFIG_SPL_SKIP_LOWLEVEL_INIT in menuconfig or similar.
diff --git a/board/freescale/ls1028a/Kconfig b/board/freescale/ls1028a/Kconfig
index ca22c92..4093981 100644
--- a/board/freescale/ls1028a/Kconfig
+++ b/board/freescale/ls1028a/Kconfig
@@ -14,7 +14,6 @@
config EMMC_BOOT
bool "Support for booting from EMMC"
- default n
config SYS_TEXT_BASE
default 0x96000000 if SD_BOOT || EMMC_BOOT
@@ -53,7 +52,6 @@
config EMMC_BOOT
bool "Support for booting from EMMC"
- default n
config SYS_TEXT_BASE
default 0x96000000 if SD_BOOT || EMMC_BOOT
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c
index 5269fd3..461c571 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -137,7 +137,7 @@
u8 uart;
#endif
-#ifdef CONFIG_SYS_I2C_EARLY_INIT
+#if defined(CONFIG_SYS_I2C_EARLY_INIT) && defined(CONFIG_SPL_BUILD)
i2c_early_init_f();
#endif
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 76bbb60..2d53224 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -52,10 +52,6 @@
#define CFG_UART_MUX_SHIFT 1
#define CFG_LPUART_EN 0x1
-#ifdef CONFIG_SYS_I2C_EARLY_INIT
-void i2c_early_init_f(void);
-#endif
-
#ifdef CONFIG_TFABOOT
struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
{
@@ -447,7 +443,7 @@
*/
out_le32(cntcr, 0x1);
-#ifdef CONFIG_SYS_I2C_EARLY_INIT
+#if defined(CONFIG_SYS_I2C_EARLY_INIT)
i2c_early_init_f();
#endif
fsl_lsch2_early_init_f();
diff --git a/board/freescale/ls1043ardb/Kconfig b/board/freescale/ls1043ardb/Kconfig
index 3d9e295..778b8d8 100644
--- a/board/freescale/ls1043ardb/Kconfig
+++ b/board/freescale/ls1043ardb/Kconfig
@@ -16,7 +16,6 @@
config SYS_HAS_ARMV8_SECURE_BASE
bool "Enable secure address for PSCI image"
depends on ARMV8_PSCI
- default n
help
PSCI image can be re-located to secure RAM.
If enabled, please also define the value for ARMV8_SECURE_BASE,
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 2b0786a..cc95d44 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -37,10 +37,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_SYS_I2C_EARLY_INIT
-void i2c_early_init_f(void);
-#endif
-
#ifdef CONFIG_TFABOOT
struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
{
@@ -318,7 +314,7 @@
*/
out_le32(cntcr, 0x1);
-#ifdef CONFIG_SYS_I2C_EARLY_INIT
+#if defined(CONFIG_SYS_I2C_EARLY_INIT)
i2c_early_init_f();
#endif
fsl_lsch2_early_init_f();
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index c48b01f..62658c4 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -241,7 +241,7 @@
int board_early_init_f(void)
{
-#ifdef CONFIG_SYS_I2C_EARLY_INIT
+#if defined(CONFIG_SYS_I2C_EARLY_INIT)
i2c_early_init_f();
#endif
fsl_lsch3_early_init_f();
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index e8722f2..58b8523 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -314,7 +314,7 @@
int board_early_init_f(void)
{
-#ifdef CONFIG_SYS_I2C_EARLY_INIT
+#if defined(CONFIG_SYS_I2C_EARLY_INIT)
i2c_early_init_f();
#endif
fsl_lsch3_early_init_f();
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index f505e82..e61289d 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -89,7 +89,7 @@
int board_early_init_f(void)
{
-#ifdef CONFIG_SYS_I2C_EARLY_INIT
+#if defined(CONFIG_SYS_I2C_EARLY_INIT) && defined(CONFIG_SPL_BUILD)
i2c_early_init_f();
#endif
/* get required clock for UART IP */
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 5f38639..eff2481 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -50,8 +50,6 @@
return 0;
}
-#define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1)
-
int dram_init(void)
{
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
@@ -102,21 +100,6 @@
#if (CONFIG_SYS_DDR_SIZE != 256)
#warning Currenly any ddr size other than 256 is not supported
#endif
-#ifdef CONFIG_DDR_II
- im->ddr.csbnds[2].csbnds = CONFIG_SYS_DDR_CS2_BNDS;
- im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS2_CONFIG;
- im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
- im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
- im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
- im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
- im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
- im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
- im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
- im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;
- im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
- im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL;
-#else
-
#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0)
#warning Chip select bounds is only configurable in 16MB increments
#endif
@@ -136,18 +119,10 @@
im->ddr.sdram_cfg =
SDRAM_CFG_SREN
-#if defined(CONFIG_DDR_2T_TIMING)
- | SDRAM_CFG_2T_EN
-#endif
| 2 << SDRAM_CFG_SDRAM_TYPE_SHIFT;
-#if defined (CONFIG_DDR_32BIT)
- /* for 32-bit mode burst length is 8 */
- im->ddr.sdram_cfg |= (SDRAM_CFG_32_BE | SDRAM_CFG_8_BE);
-#endif
im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
-#endif
udelay(200);
/* enable DDR controller */
diff --git a/board/freescale/mx51evk/Kconfig b/board/freescale/mx51evk/Kconfig
index f9b69cb..a26b539 100644
--- a/board/freescale/mx51evk/Kconfig
+++ b/board/freescale/mx51evk/Kconfig
@@ -12,4 +12,7 @@
config SYS_CONFIG_NAME
default "mx51evk"
+config IMX_CONFIG
+ default "board/freescale/mx51evk/imximage.cfg"
+
endif
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index c8439a6..46095ac 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -35,6 +35,7 @@
return 0;
}
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
u32 rev = get_cpu_rev();
@@ -42,6 +43,7 @@
rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
return rev;
}
+#endif
#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH)
diff --git a/board/freescale/mx53loco/Kconfig b/board/freescale/mx53loco/Kconfig
index 5ca1672..a690a60 100644
--- a/board/freescale/mx53loco/Kconfig
+++ b/board/freescale/mx53loco/Kconfig
@@ -12,4 +12,7 @@
config SYS_CONFIG_NAME
default "mx53loco"
+config IMX_CONFIG
+ default "board/freescale/mx53loco/imximage.cfg"
+
endif
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index 0888630..a9800ed 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -32,6 +32,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@@ -46,6 +47,7 @@
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
+#endif
#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
diff --git a/board/freescale/mx6memcal/Kconfig b/board/freescale/mx6memcal/Kconfig
index 9987cba..2d5c206 100644
--- a/board/freescale/mx6memcal/Kconfig
+++ b/board/freescale/mx6memcal/Kconfig
@@ -87,12 +87,12 @@
help
Select the type of DDR (DDR3 or LPDDR2) used on your design
-config DDR3
+config DDR3
bool "DDR3"
help
Select this if your board design uses DDR3.
-config LPDDR2
+config LPDDR2
bool "LPDDR2"
help
Select this if your board design uses LPDDR2.
@@ -223,5 +223,8 @@
details.
endmenu
-endif
+config IMX_CONFIG
+ default "arch/arm/mach-imx/spl_sd.cfg"
+
+endif
diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index e92ef26..9155dcf 100644
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -321,12 +321,14 @@
}
#endif
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
int rev = nxp_board_rev();
return (get_cpu_rev() & ~(0xF << 8)) | rev;
}
+#endif
static int ar8031_phy_fixup(struct phy_device *phydev)
{
diff --git a/board/freescale/mx6slevk/Kconfig b/board/freescale/mx6slevk/Kconfig
index 18482b5..e6bbb41 100644
--- a/board/freescale/mx6slevk/Kconfig
+++ b/board/freescale/mx6slevk/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "mx6slevk"
+config IMX_CONFIG
+ default "board/freescale/mx6slevk/imximage.cfg"
+
endif
diff --git a/board/freescale/mx6sllevk/Kconfig b/board/freescale/mx6sllevk/Kconfig
index 4ba9bbf..d47f1fa 100644
--- a/board/freescale/mx6sllevk/Kconfig
+++ b/board/freescale/mx6sllevk/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "mx6sllevk"
+config IMX_CONFIG
+ default "board/freescale/mx6sllevk/imximage.cfg"
+
endif
diff --git a/board/freescale/mx6sxsabreauto/Kconfig b/board/freescale/mx6sxsabreauto/Kconfig
index ae2ea02..e6da7b3 100644
--- a/board/freescale/mx6sxsabreauto/Kconfig
+++ b/board/freescale/mx6sxsabreauto/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "mx6sxsabreauto"
+config IMX_CONFIG
+ default "board/freescale/mx6sxsabreauto/imximage.cfg"
+
endif
diff --git a/board/freescale/mx6sxsabresd/Kconfig b/board/freescale/mx6sxsabresd/Kconfig
index fcfac0a..88ac7ee 100644
--- a/board/freescale/mx6sxsabresd/Kconfig
+++ b/board/freescale/mx6sxsabresd/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "mx6sxsabresd"
+config IMX_CONFIG
+ default "board/freescale/mx6sxsabresd/imximage.cfg"
+
endif
diff --git a/board/freescale/mx6ullevk/Kconfig b/board/freescale/mx6ullevk/Kconfig
index 7eec497..49aa3025 100644
--- a/board/freescale/mx6ullevk/Kconfig
+++ b/board/freescale/mx6ullevk/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "mx6ullevk"
+config IMX_CONFIG
+ default "board/freescale/mx6ullevk/imximage.cfg"
+
endif
diff --git a/board/freescale/mx7dsabresd/Kconfig b/board/freescale/mx7dsabresd/Kconfig
index c6a969c..bf3ceaf 100644
--- a/board/freescale/mx7dsabresd/Kconfig
+++ b/board/freescale/mx7dsabresd/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "mx7dsabresd"
+config IMX_CONFIG
+ default "board/freescale/mx7dsabresd/imximage.cfg"
+
endif
diff --git a/board/freescale/mx7ulp_evk/Kconfig b/board/freescale/mx7ulp_evk/Kconfig
index ff44831..5916970 100644
--- a/board/freescale/mx7ulp_evk/Kconfig
+++ b/board/freescale/mx7ulp_evk/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "mx7ulp_evk"
+config IMX_CONFIG
+ default "board/freescale/mx7ulp_evk/imximage.cfg"
+
endif
diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c
index 84fc891..c796330 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -427,7 +427,7 @@
dm_i2c_write(dev, 2, &val, 1);
#else
i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
- i2c_init(CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_FSL_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
val = 0x0; /* no polarity inversion */
i2c_write(I2C_PCA9557_ADDR2, 2, 1, &val, 1);
#endif
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
index 90188b0..1184684 100644
--- a/board/freescale/p1_p2_rdb_pc/spl.c
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -99,7 +99,7 @@
env_relocate();
#endif
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
i2c_init_all();
#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c
index 7156685..ac373d7 100644
--- a/board/freescale/t102xrdb/spl.c
+++ b/board/freescale/t102xrdb/spl.c
@@ -30,11 +30,6 @@
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
#if defined(CONFIG_SPL_MMC_BOOT)
#define GPIO1_SD_SEL 0x00020000
int board_mmc_getcd(struct mmc *mmc)
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index 51a36ab..ab7675e 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -167,11 +167,6 @@
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
#ifdef CONFIG_TARGET_T1024RDB
void board_reset(void)
{
diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index f5fe73e..c7df111 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -30,11 +30,6 @@
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
#define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000
void board_init_f(ulong bootflag)
{
diff --git a/board/freescale/t208xrdb/Kconfig b/board/freescale/t208xrdb/Kconfig
index 8249c5d..d4c061a 100644
--- a/board/freescale/t208xrdb/Kconfig
+++ b/board/freescale/t208xrdb/Kconfig
@@ -11,7 +11,6 @@
config T2080RDB_REV_D
bool "Support for T2080RDB revisions D and up"
- default n
source "board/freescale/common/Kconfig"
diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c
index b0ce9af..2204a98 100644
--- a/board/freescale/t208xrdb/spl.c
+++ b/board/freescale/t208xrdb/spl.c
@@ -29,11 +29,6 @@
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
void board_init_f(ulong bootflag)
{
u32 plat_ratio, sys_clk, ccb_clk;
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index 73ebb4a..3611dbb 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -114,11 +114,6 @@
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
int misc_init_r(void)
{
u8 reg;
diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c
index e2f9c9b..69d1449 100644
--- a/board/freescale/t4rdb/spl.c
+++ b/board/freescale/t4rdb/spl.c
@@ -35,11 +35,6 @@
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
void board_init_f(ulong bootflag)
{
u32 plat_ratio, sys_clk, ccb_clk;
diff --git a/board/freescale/vf610twr/Kconfig b/board/freescale/vf610twr/Kconfig
index 3b90ed6..208c7ae 100644
--- a/board/freescale/vf610twr/Kconfig
+++ b/board/freescale/vf610twr/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "vf610twr"
+config IMX_CONFIG
+ default "board/freescale/vf610twr/imximage.cfg"
+
endif
diff --git a/board/friendlyarm/nanopi2/board.c b/board/friendlyarm/nanopi2/board.c
index c0fe2d5..70e4dfc 100644
--- a/board/friendlyarm/nanopi2/board.c
+++ b/board/friendlyarm/nanopi2/board.c
@@ -295,12 +295,12 @@
env_set("ethaddr", ethaddr);
}
-#ifdef CONFIG_REVISION_TAG
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
static void set_board_rev(void)
{
char info[64] = {0, };
- snprintf(info, ARRAY_SIZE(info), "%02x", get_board_rev());
+ snprintf(info, ARRAY_SIZE(info), "%02x", get_board_revision());
env_set("board_rev", info);
}
#endif
@@ -310,7 +310,7 @@
char info[64] = {0, };
snprintf(info, ARRAY_SIZE(info),
- "s5p4418-nanopi2-rev%02x.dtb", get_board_rev());
+ "s5p4418-nanopi2-rev%02x.dtb", get_board_revision());
env_set("dtb_name", info);
}
@@ -436,7 +436,7 @@
{
bd_update_env();
-#ifdef CONFIG_REVISION_TAG
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
set_board_rev();
#endif
set_dtb_name();
diff --git a/board/friendlyarm/nanopi2/hwrev.c b/board/friendlyarm/nanopi2/hwrev.c
index b1e23a4..585e08c 100644
--- a/board/friendlyarm/nanopi2/hwrev.c
+++ b/board/friendlyarm/nanopi2/hwrev.c
@@ -80,10 +80,17 @@
}
/* To override __weak symbols */
-u32 get_board_rev(void)
+u32 get_board_revision(void)
{
return (base_rev << 8) | pcb_rev;
}
+
+#ifdef CONFIG_REVISION_TAG
+u32 get_board_rev(void)
+{
+ return get_board_revision();
+}
+#endif
const char *get_board_name(void)
{
diff --git a/board/friendlyarm/nanopi2/hwrev.h b/board/friendlyarm/nanopi2/hwrev.h
index 1b1a828..4033031 100644
--- a/board/friendlyarm/nanopi2/hwrev.h
+++ b/board/friendlyarm/nanopi2/hwrev.h
@@ -9,7 +9,7 @@
extern void bd_hwrev_init(void);
extern void bd_base_rev_init(void);
-extern u32 get_board_rev(void);
+extern u32 get_board_revision(void);
extern const char *get_board_name(void);
#endif /* __BD_HW_REV_H__ */
diff --git a/board/gateworks/venice/Kconfig b/board/gateworks/venice/Kconfig
index 64cb97c..639bf35 100644
--- a/board/gateworks/venice/Kconfig
+++ b/board/gateworks/venice/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "imx8mm_venice"
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
+
endif
diff --git a/board/ge/b1x5v2/b1x5v2.c b/board/ge/b1x5v2/b1x5v2.c
index de4cb0d..a2cbd15 100644
--- a/board/ge/b1x5v2/b1x5v2.c
+++ b/board/ge/b1x5v2/b1x5v2.c
@@ -30,7 +30,7 @@
#include <panel.h>
#include <rtc.h>
#include <spi_flash.h>
-#include <version.h>
+#include <version_string.h>
#include "../common/vpd_reader.h"
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 7fcebba..ed700f4 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -34,7 +34,7 @@
#include <power/pmic.h>
#include <input.h>
#include <pwm.h>
-#include <version.h>
+#include <version_string.h>
#include <stdlib.h>
#include <dm/root.h>
#include "../common/ge_rtc.h"
diff --git a/board/ge/mx53ppd/Kconfig b/board/ge/mx53ppd/Kconfig
index bebb2fa..728e9a9 100644
--- a/board/ge/mx53ppd/Kconfig
+++ b/board/ge/mx53ppd/Kconfig
@@ -1,4 +1,3 @@
-
if TARGET_MX53PPD
config SYS_BOARD
@@ -13,6 +12,9 @@
config SYS_CONFIG_NAME
default "mx53ppd"
+config IMX_CONFIG
+ default "board/ge/mx53ppd/imximage.cfg"
+
source "board/ge/common/Kconfig"
endif
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index 6174125..cc462d5 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -33,7 +33,7 @@
#include <fsl_pmic.h>
#include <linux/fb.h>
#include <ipu_pixfmt.h>
-#include <version.h>
+#include <version_string.h>
#include <watchdog.h>
#include "ppd_gpio.h"
#include <stdlib.h>
@@ -81,10 +81,12 @@
return 0;
}
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return get_cpu_rev() & ~(0xF << 8);
}
+#endif
#ifdef CONFIG_USB_EHCI_MX5
int board_ehci_hcd_init(int port)
diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c
index 85cba50..53c5171 100644
--- a/board/google/chromebook_coral/coral.c
+++ b/board/google/chromebook_coral/coral.c
@@ -300,7 +300,7 @@
.get_str = coral_get_str,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id coral_ids[] = {
{ .compatible = "google,coral" },
{ }
diff --git a/board/google/imx8mq_phanbell/Kconfig b/board/google/imx8mq_phanbell/Kconfig
index fba2e9c..54cfb99 100644
--- a/board/google/imx8mq_phanbell/Kconfig
+++ b/board/google/imx8mq_phanbell/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "imx8mq_phanbell"
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage.cfg"
+
endif
diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c
index 12480f5..6423c1e 100644
--- a/board/grinn/chiliboard/board.c
+++ b/board/grinn/chiliboard/board.c
@@ -30,7 +30,7 @@
static __maybe_unused struct ctrl_dev *cdev =
(struct ctrl_dev *)CTRL_DEVICE_BASE;
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
static struct module_pin_mux uart0_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
@@ -69,9 +69,7 @@
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
}
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
void set_uart_mux_conf(void)
{
configure_module_pin_mux(uart0_pin_mux);
@@ -86,7 +84,7 @@
{
chilisom_spl_board_init();
}
-#endif
+#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
/*
* Basic board specific setup. Pinmux has been handled already.
diff --git a/board/imgtec/ci20/ci20.c b/board/imgtec/ci20/ci20.c
index 7ee175d..7cbe49a 100644
--- a/board/imgtec/ci20/ci20.c
+++ b/board/imgtec/ci20/ci20.c
@@ -254,7 +254,7 @@
#ifdef CONFIG_SPL_BUILD
-#if defined(CONFIG_SPL_MMC_SUPPORT)
+#if defined(CONFIG_SPL_MMC)
int board_mmc_init(struct bd_info *bd)
{
ci20_mux_mmc();
diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c
index 086d052..7dbb3a9 100644
--- a/board/inversepath/usbarmory/usbarmory.c
+++ b/board/inversepath/usbarmory/usbarmory.c
@@ -27,6 +27,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@@ -38,6 +39,7 @@
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
+#endif
struct fsl_esdhc_cfg esdhc_cfg[1] = {
{MMC_SDHC1_BASE_ADDR}
diff --git a/board/k+p/kp_imx53/Kconfig b/board/k+p/kp_imx53/Kconfig
index 017c1e3..fb35127 100644
--- a/board/k+p/kp_imx53/Kconfig
+++ b/board/k+p/kp_imx53/Kconfig
@@ -12,4 +12,7 @@
config SYS_CONFIG_NAME
default "kp_imx53"
+config IMX_CONFIG
+ default "board/freescale/mx53loco/imximage.cfg"
+
endif
diff --git a/board/k+p/kp_imx53/kp_id_rev.c b/board/k+p/kp_imx53/kp_id_rev.c
index 7103a3e..9f93cf0 100644
--- a/board/k+p/kp_imx53/kp_id_rev.c
+++ b/board/k+p/kp_imx53/kp_id_rev.c
@@ -64,6 +64,10 @@
eth_env_set_enetaddr("ethaddr", p);
}
+#define I2C_EEPROM_BUS_NUM 1
+#define I2C_EEPROM_ADDR 0x50
+#define I2C_EEPROM_ADDR_LEN 2
+
int read_eeprom(void)
{
struct udevice *dev;
@@ -72,9 +76,8 @@
if (eeprom_has_been_read)
return 0;
- ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
- CONFIG_SYS_I2C_EEPROM_ADDR,
- CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &dev);
+ ret = i2c_get_chip_for_busnum(I2C_EEPROM_BUS_NUM, I2C_EEPROM_ADDR,
+ I2C_EEPROM_ADDR_LEN, &dev);
if (ret) {
printf("Cannot find EEPROM !\n");
return ret;
diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c
index 14c70b9..ff550f7 100644
--- a/board/keymile/common/ivm.c
+++ b/board/keymile/common/ivm.c
@@ -346,17 +346,17 @@
struct udevice *eedev = NULL;
ret = i2c_get_chip_for_busnum(CONFIG_KM_IVM_BUS,
- CONFIG_SYS_I2C_EEPROM_ADDR, 1, &eedev);
+ CONFIG_SYS_IVM_EEPROM_ADR, 1, &eedev);
if (ret) {
printf("failed to get device for EEPROM at address 0x%02x\n",
- CONFIG_SYS_I2C_EEPROM_ADDR);
+ CONFIG_SYS_IVM_EEPROM_ADR);
return 1;
}
ret = dm_i2c_read(eedev, 0, buf, len);
if (ret != 0) {
printf("Error: Unable to read from I2C EEPROM at address %02X:%02X\n",
- CONFIG_SYS_I2C_EEPROM_ADDR, 0);
+ CONFIG_SYS_IVM_EEPROM_ADR, 0);
return 1;
}
#else
diff --git a/board/keymile/km83xx/km83xx_i2c.c b/board/keymile/km83xx/km83xx_i2c.c
index 62100b1..b80672d 100644
--- a/board/keymile/km83xx/km83xx_i2c.c
+++ b/board/keymile/km83xx/km83xx_i2c.c
@@ -15,7 +15,7 @@
{
struct fsl_i2c_base *base;
base = (struct fsl_i2c_base *)(CONFIG_SYS_IMMR +
- CONFIG_SYS_I2C_OFFSET);
+ CONFIG_SYS_FSL_I2C_OFFSET);
udelay(DELAY_ABORT_SEQ);
out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA));
udelay(DELAY_ABORT_SEQ);
@@ -26,7 +26,7 @@
{
struct fsl_i2c_base *base;
base = (struct fsl_i2c_base *)(CONFIG_SYS_IMMR +
- CONFIG_SYS_I2C_OFFSET);
+ CONFIG_SYS_FSL_I2C_OFFSET);
uchar last;
int nbr_read = 0;
int i = 0;
diff --git a/board/keymile/km_arm/Kconfig b/board/keymile/km_arm/Kconfig
index 6f55cfa..c52b365 100644
--- a/board/keymile/km_arm/Kconfig
+++ b/board/keymile/km_arm/Kconfig
@@ -3,37 +3,31 @@
config KM_FPGA_CONFIG
bool "FPGA Configuration"
- default n
help
Include capability to change FPGA configuration.
config KM_FPGA_FORCE_CONFIG
bool "FPGA reconfiguration"
- default n
help
If yes we force to reconfigure the FPGA always
config KM_FPGA_NO_RESET
bool "FPGA skip reset"
- default n
help
If yes we skip triggering a reset of the FPGA
config KM_ENV_IS_IN_SPI_NOR
bool "Environment in SPI NOR"
- default n
help
Put the U-Boot environment in the SPI NOR flash.
config KM_PIGGY4_88E6061
bool "Piggy via Switch 88E6061"
- default n
help
The Piggy4 board is connected via a Marvell 88E6061 switch.
config KM_PIGGY4_88E6352
bool "Piggy via Switch 88E6352"
- default n
help
The Piggy4 board is connected via a Marvell 88E6352 switch.
diff --git a/board/l+g/vinco/vinco.c b/board/l+g/vinco/vinco.c
index f221f05..9c4c5fd 100644
--- a/board/l+g/vinco/vinco.c
+++ b/board/l+g/vinco/vinco.c
@@ -30,7 +30,6 @@
#include <netdev.h>
#include <nand.h>
#include <spi.h>
-#include <version.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c
index a70166a..86032d7 100644
--- a/board/lg/sniper/sniper.c
+++ b/board/lg/sniper/sniper.c
@@ -156,11 +156,13 @@
return 0;
}
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
/* Sold devices are expected to be at least revision F. */
return 6;
}
+#endif
void get_board_serial(struct tag_serialnr *serialnr)
{
diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c
index 39f70f5..d5fe336 100644
--- a/board/liebherr/display5/spl.c
+++ b/board/liebherr/display5/spl.c
@@ -273,7 +273,7 @@
#endif
}
-#ifdef CONFIG_SPL_SPI_SUPPORT
+#ifdef CONFIG_SPL_SPI
static void displ5_init_ecspi(void)
{
displ5_set_iomux_ecspi_spl();
@@ -283,7 +283,7 @@
static inline void displ5_init_ecspi(void) { }
#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
static struct fsl_esdhc_cfg usdhc_cfg = {
.esdhc_base = USDHC4_BASE_ADDR,
.max_bus_width = 8,
diff --git a/board/mediatek/mt7620/Kconfig b/board/mediatek/mt7620/Kconfig
deleted file mode 100644
index b9137ad..0000000
--- a/board/mediatek/mt7620/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if BOARD_MT7620_RFB || BOARD_MT7620_MT7530_RFB
-
-config SYS_BOARD
- default "mt7620"
-
-config SYS_VENDOR
- default "mediatek"
-
-config SYS_CONFIG_NAME
- default "mt7620"
-
-endif
diff --git a/board/mediatek/mt7622/Kconfig b/board/mediatek/mt7622/Kconfig
deleted file mode 100644
index d0abdc0..0000000
--- a/board/mediatek/mt7622/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-if TARGET_MT7622
-
-config SYS_BOARD
- default "mt7622"
-
-config SYS_CONFIG_NAME
- default "mt7622"
-
-config MTK_BROM_HEADER_INFO
- string
- default "lk=1"
-
-config MTK_BROM_HEADER_INFO
- string
- default "media=nor"
-
-endif
diff --git a/board/mediatek/mt7623/Kconfig b/board/mediatek/mt7623/Kconfig
deleted file mode 100644
index a8c670e..0000000
--- a/board/mediatek/mt7623/Kconfig
+++ /dev/null
@@ -1,13 +0,0 @@
-if TARGET_MT7623
-
-config SYS_BOARD
- default "mt7623"
-
-config SYS_CONFIG_NAME
- default "mt7623"
-
-config MTK_BROM_HEADER_INFO
- string
- default "lk=1"
-
-endif
diff --git a/board/mediatek/mt7628/Kconfig b/board/mediatek/mt7628/Kconfig
deleted file mode 100644
index d6b6f9d..0000000
--- a/board/mediatek/mt7628/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if BOARD_MT7628_RFB
-
-config SYS_BOARD
- default "mt7628"
-
-config SYS_VENDOR
- default "mediatek"
-
-config SYS_CONFIG_NAME
- default "mt7628"
-
-endif
diff --git a/board/mediatek/mt7629/Kconfig b/board/mediatek/mt7629/Kconfig
deleted file mode 100644
index 6055164..0000000
--- a/board/mediatek/mt7629/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-if TARGET_MT7629
-
-config SYS_BOARD
- default "mt7629"
-
-config SYS_CONFIG_NAME
- default "mt7629"
-
-config MTK_SPL_PAD_SIZE
- hex
- default 0x10000
-
-config MTK_BROM_HEADER_INFO
- string
- default "media=nor"
-
-endif
diff --git a/board/mediatek/mt8183/Kconfig b/board/mediatek/mt8183/Kconfig
deleted file mode 100644
index b75c3b8..0000000
--- a/board/mediatek/mt8183/Kconfig
+++ /dev/null
@@ -1,13 +0,0 @@
-if TARGET_MT8183
-
-config SYS_BOARD
- default "mt8183"
-
-config SYS_CONFIG_NAME
- default "mt8183"
-
-config MTK_BROM_HEADER_INFO
- string
- default "media=emmc"
-
-endif
diff --git a/board/mediatek/mt8512/Kconfig b/board/mediatek/mt8512/Kconfig
deleted file mode 100644
index 87bd1fb..0000000
--- a/board/mediatek/mt8512/Kconfig
+++ /dev/null
@@ -1,14 +0,0 @@
-if TARGET_MT8512
-
-config SYS_BOARD
- default "mt8512"
-
-config SYS_CONFIG_NAME
- default "mt8512"
-
-
-config MTK_BROM_HEADER_INFO
- string
- default "media=nor"
-
-endif
diff --git a/board/mediatek/mt8516/Kconfig b/board/mediatek/mt8516/Kconfig
deleted file mode 100644
index a87d387..0000000
--- a/board/mediatek/mt8516/Kconfig
+++ /dev/null
@@ -1,13 +0,0 @@
-if TARGET_MT8516
-
-config SYS_BOARD
- default "mt8516"
-
-config SYS_CONFIG_NAME
- default "mt8516"
-
-config MTK_BROM_HEADER_INFO
- string
- default "media=emmc"
-
-endif
diff --git a/board/mediatek/mt8518/Kconfig b/board/mediatek/mt8518/Kconfig
deleted file mode 100644
index 1971c4d..0000000
--- a/board/mediatek/mt8518/Kconfig
+++ /dev/null
@@ -1,14 +0,0 @@
-if TARGET_MT8518
-
-config SYS_BOARD
- default "mt8518"
-
-config SYS_CONFIG_NAME
- default "mt8518"
-
-
-config MTK_BROM_HEADER_INFO
- string
- default "media=nor"
-
-endif
diff --git a/board/menlo/m53menlo/Kconfig b/board/menlo/m53menlo/Kconfig
index 1953f50..34c92f4 100644
--- a/board/menlo/m53menlo/Kconfig
+++ b/board/menlo/m53menlo/Kconfig
@@ -12,4 +12,7 @@
config SYS_CONFIG_NAME
default "m53menlo"
+config IMX_CONFIG
+ default "board/menlo/m53menlo/imximage.cfg"
+
endif
diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c
index fd3cec8..99ca36f 100644
--- a/board/nokia/rx51/rx51.c
+++ b/board/nokia/rx51/rx51.c
@@ -241,6 +241,7 @@
return 0;
}
+#ifdef CONFIG_REVISION_TAG
/*
* Routine: get_board_revision
* Description: Return board revision.
@@ -249,6 +250,7 @@
{
return simple_strtol(hw_build_ptr, NULL, 16);
}
+#endif
/*
* Routine: setup_board_tags
diff --git a/board/novtech/meerkat96/Kconfig b/board/novtech/meerkat96/Kconfig
index b0e46fc..23b0ba3 100644
--- a/board/novtech/meerkat96/Kconfig
+++ b/board/novtech/meerkat96/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "meerkat96"
+config IMX_CONFIG
+ default "board/novtech/meerkat96/imximage.cfg"
+
endif
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index b88aa8e..8297511 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -16,7 +16,7 @@
#include <asm/gpio.h>
/* TODO: Remove this code when the SPI switch is working */
-#if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA)
+#ifndef CONFIG_TARGET_VENTANA
void gpio_early_init_uart(void)
{
/* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
diff --git a/board/phytec/pcm052/Kconfig b/board/phytec/pcm052/Kconfig
index 4fde21c..23f2565 100644
--- a/board/phytec/pcm052/Kconfig
+++ b/board/phytec/pcm052/Kconfig
@@ -13,6 +13,9 @@
int
default 256
+config IMX_CONFIG
+ default "board/phytec/pcm052/imximage.cfg"
+
endif
if TARGET_BK4R1
@@ -30,4 +33,7 @@
int
default 512
+config IMX_CONFIG
+ default "board/phytec/pcm052/imximage.cfg"
+
endif
diff --git a/board/phytec/phycore_imx8mm/Kconfig b/board/phytec/phycore_imx8mm/Kconfig
index 92f5524..9868e98 100644
--- a/board/phytec/phycore_imx8mm/Kconfig
+++ b/board/phytec/phycore_imx8mm/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "phycore_imx8mm"
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
+
endif
diff --git a/board/phytec/phycore_imx8mp/Kconfig b/board/phytec/phycore_imx8mp/Kconfig
index 7a20d6e..c053a46 100644
--- a/board/phytec/phycore_imx8mp/Kconfig
+++ b/board/phytec/phycore_imx8mp/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "phycore_imx8mp"
+config IMX_CONFIG
+ default "board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg"
+
endif
diff --git a/board/qca/ap152/ap152.c b/board/qca/ap152/ap152.c
index 1064705..82458c3 100644
--- a/board/qca/ap152/ap152.c
+++ b/board/qca/ap152/ap152.c
@@ -66,7 +66,7 @@
void __iomem *rst_regs = map_physmem(AR71XX_RESET_BASE,
AR71XX_RESET_SIZE, MAP_NOCACHE);
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
/* CPU:775, DDR:650, AHB:258 */
qca956x_pll_init();
qca956x_ddr_init();
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 372b26b..0c7d58d 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -419,7 +419,7 @@
return 0;
}
-static void get_board_rev(void)
+static void get_board_revision(void)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_board_rev, msg, 1);
int ret;
@@ -478,7 +478,7 @@
hw_watchdog_init();
#endif
- get_board_rev();
+ get_board_revision();
gd->bd->bi_boot_params = 0x100;
diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index 3d00652..71efeaf 100644
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -38,7 +38,7 @@
int board_early_init_f(void)
{
-#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
diff --git a/board/renesas/grpeach/lowlevel_init.S b/board/renesas/grpeach/lowlevel_init.S
index 9a66dfa..b83c4e8 100644
--- a/board/renesas/grpeach/lowlevel_init.S
+++ b/board/renesas/grpeach/lowlevel_init.S
@@ -4,7 +4,6 @@
* Copyright (C) 2017 Chris Brandt
*/
#include <config.h>
-#include <version.h>
#include <asm/macro.h>
/* Watchdog Registers */
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index d4752e5..c27eb3f 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -37,7 +37,7 @@
int board_early_init_f(void)
{
-#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
@@ -75,7 +75,7 @@
void reset_cpu(void)
{
-#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
#else
/* only CA57 ? */
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index 4626d22..1477750 100644
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -35,7 +35,7 @@
int board_early_init_f(void)
{
-#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
diff --git a/board/ronetix/imx8mq-cm/Kconfig b/board/ronetix/imx8mq-cm/Kconfig
index 9dd6a86..f0a240c 100644
--- a/board/ronetix/imx8mq-cm/Kconfig
+++ b/board/ronetix/imx8mq-cm/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "imx8mq_cm"
+config IMX_CONFIG
+ default "board/ronetix/imx8mq-cm/imximage-8mq-lpddr4.cfg"
+
endif
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 1c2fe02..97791aa 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -185,7 +185,7 @@
}
#endif
-#if defined(CONFIG_POWER) || defined(CONFIG_DM_PMIC)
+#if CONFIG_IS_ENABLED(POWER_LEGACY) || CONFIG_IS_ENABLED(DM_PMIC)
int power_init_board(void)
{
set_ps_hold_ctrl();
diff --git a/board/samsung/common/exynos5-dt-types.c b/board/samsung/common/exynos5-dt-types.c
index e2d5a7c..554fc91 100644
--- a/board/samsung/common/exynos5-dt-types.c
+++ b/board/samsung/common/exynos5-dt-types.c
@@ -47,18 +47,6 @@
{ EXYNOS5_BOARD_ODROID_UNKNOWN, 0, 4095, "unknown" },
};
-static unsigned int odroid_get_rev(void)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(odroid_info); i++) {
- if (odroid_info[i].board_type == gd->board_type)
- return odroid_info[i].board_rev;
- }
-
- return 0;
-}
-
/*
* Read ADC at least twice and check the resuls. If regulator providing voltage
* on to measured point was just turned on, first reads might require time
@@ -200,6 +188,19 @@
return false;
}
+#ifdef CONFIG_REVISION_TAG
+static unsigned int odroid_get_rev(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(odroid_info); i++) {
+ if (odroid_info[i].board_type == gd->board_type)
+ return odroid_info[i].board_rev;
+ }
+
+ return 0;
+}
+
/**
* get_board_rev() - return detected board revision.
*
@@ -212,6 +213,7 @@
return odroid_get_rev();
}
+#endif
/**
* get_board_type() - returns board type string.
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index b32b82f..ba25ba2 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -24,11 +24,6 @@
DECLARE_GLOBAL_DATA_PTR;
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_init(void)
{
/* Set Initial global variables */
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index e17454a..7a91f44 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -12,11 +12,6 @@
#include <asm/arch/pinmux.h>
#include <usb.h>
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int exynos_init(void)
{
return 0;
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index 59e6fbf..a03dc87 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -67,10 +67,12 @@
board_rev = modelrev << 8;
}
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return board_rev;
}
+#endif
static inline u32 get_model_rev(void)
{
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 9ef11b8..3764b54 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -33,10 +33,12 @@
unsigned int board_rev;
static int init_pmic_lcd(void);
+#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return board_rev;
}
+#endif
int exynos_power_init(void)
{
diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c
index dcd7345..5d9a945 100644
--- a/board/sandbox/sandbox.c
+++ b/board/sandbox/sandbox.c
@@ -26,7 +26,10 @@
gd_t *gd;
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-/* Add a simple GPIO device */
+/*
+ * Add a simple GPIO device (don't use with of-platdata as it interferes with
+ * the auto-generated devices)
+ */
U_BOOT_DRVINFO(gpio_sandbox) = {
.name = "sandbox_gpio",
};
diff --git a/board/siemens/capricorn/Kconfig b/board/siemens/capricorn/Kconfig
index 21c3ef9..c5a28ff 100644
--- a/board/siemens/capricorn/Kconfig
+++ b/board/siemens/capricorn/Kconfig
@@ -9,6 +9,8 @@
config SYS_CONFIG_NAME
default "giedi"
+config IMX_CONFIG
+ default "board/siemens/capricorn/imximage.cfg"
endif
if TARGET_DENEB
@@ -22,4 +24,7 @@
config SYS_CONFIG_NAME
default "deneb"
+config IMX_CONFIG
+ default "board/siemens/capricorn/imximage.cfg"
+
endif
diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index 1bdf404..5628366 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -70,6 +70,7 @@
#endif /* #ifdef CONFIG_SPL_BUILD */
#ifndef CONFIG_SPL_BUILD
+#define FACTORYSET_EEPROM_ADDR 0x50
/*
* Basic board specific setup. Pinmux has been handled already.
*/
@@ -87,7 +88,7 @@
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_FACTORYSET
- factoryset_read_eeprom(CONFIG_SYS_I2C_EEPROM_ADDR);
+ factoryset_read_eeprom(FACTORYSET_EEPROM_ADDR);
#endif
gpmc_init();
diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c
index af35bc1..f898bba 100644
--- a/board/siemens/draco/board.c
+++ b/board/siemens/draco/board.c
@@ -132,12 +132,16 @@
u8 nand_bus;
};
+#define EEPROM_ADDR 0x50
+#define EEPROM_ADDR_DDR3 0x90
+#define EEPROM_ADDR_CHIP 0x120
+
static int draco_read_nand_geometry(void)
{
struct am335x_nand_geometry geo;
/* Read NAND geometry */
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x80, 2,
+ if (i2c_read(EEPROM_ADDR, 0x80, 2,
(uchar *)&geo, sizeof(struct am335x_nand_geometry))) {
printf("Could not read the NAND geomtery; something fundamentally wrong on the I2C bus.\n");
return -EIO;
@@ -160,20 +164,20 @@
static int read_eeprom(void)
{
/* Check if baseboard eeprom is available */
- if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
+ if (i2c_probe(EEPROM_ADDR)) {
printf("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
return 1;
}
#ifdef CONFIG_SPL_BUILD
/* Read Siemens eeprom data (DDR3) */
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, EEPROM_ADDR_DDR3, 2,
+ if (i2c_read(EEPROM_ADDR, EEPROM_ADDR_DDR3, 2,
(uchar *)&settings.ddr3, sizeof(struct ddr3_data))) {
printf("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\nUse default DDR3 timings\n");
set_default_ddr3_timings();
}
/* Read Siemens eeprom data (CHIP) */
- if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, EEPROM_ADDR_CHIP, 2,
+ if (i2c_read(EEPROM_ADDR, EEPROM_ADDR_CHIP, 2,
(uchar *)&settings.chip, sizeof(settings.chip)))
printf("Could not read chip settings\n");
diff --git a/board/sifive/unleashed/genimage_sdcard.cfg b/board/sifive/unleashed/genimage_sdcard.cfg
new file mode 100644
index 0000000..91c53bf
--- /dev/null
+++ b/board/sifive/unleashed/genimage_sdcard.cfg
@@ -0,0 +1,19 @@
+image sdcard.img {
+ size = 128M
+
+ hdimage {
+ gpt = true
+ }
+
+ partition u-boot-spl {
+ image = "u-boot-spl.bin"
+ offset = 17K
+ partition-type-uuid = 5B193300-FC78-40CD-8002-E86C45580B47
+ }
+
+ partition u-boot {
+ image = "u-boot.itb"
+ offset = 1041K
+ partition-type-uuid = 2E54B353-1271-4842-806F-E436D6AF6985
+ }
+}
diff --git a/board/sifive/unleashed/genimage_spi-nor.cfg b/board/sifive/unleashed/genimage_spi-nor.cfg
new file mode 100644
index 0000000..2e5d89b
--- /dev/null
+++ b/board/sifive/unleashed/genimage_spi-nor.cfg
@@ -0,0 +1,19 @@
+image spi-nor.img {
+ size = 32M
+
+ hdimage {
+ gpt = true
+ }
+
+ partition u-boot-spl {
+ image = "u-boot-spl.bin"
+ offset = 20K
+ partition-type-uuid = 5B193300-FC78-40CD-8002-E86C45580B47
+ }
+
+ partition u-boot {
+ image = "u-boot.itb"
+ offset = 1044K
+ partition-type-uuid = 2E54B353-1271-4842-806F-E436D6AF6985
+ }
+}
diff --git a/board/softing/vining_2000/Kconfig b/board/softing/vining_2000/Kconfig
index 90d45a7..36b20f8 100644
--- a/board/softing/vining_2000/Kconfig
+++ b/board/softing/vining_2000/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "vining_2000"
+config IMX_CONFIG
+ default "board/softing/vining_2000/imximage.cfg"
+
endif
diff --git a/board/somlabs/visionsom-6ull/Kconfig b/board/somlabs/visionsom-6ull/Kconfig
index 37408aa..374d427 100644
--- a/board/somlabs/visionsom-6ull/Kconfig
+++ b/board/somlabs/visionsom-6ull/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "somlabs_visionsom_6ull"
+config IMX_CONFIG
+ default "board/somlabs/visionsom-6ull/imximage.cfg"
+
endif
diff --git a/board/somlabs/visionsom-6ull/visionsom-6ull.c b/board/somlabs/visionsom-6ull/visionsom-6ull.c
index c26e7b0..38d14f6 100644
--- a/board/somlabs/visionsom-6ull/visionsom-6ull.c
+++ b/board/somlabs/visionsom-6ull/visionsom-6ull.c
@@ -104,7 +104,7 @@
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c
index 46fcf90..34f9d6b 100644
--- a/board/st/stm32f429-discovery/stm32f429-discovery.c
+++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
@@ -46,11 +46,6 @@
return 0;
}
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
index 3b6df1f..c170314 100644
--- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c
+++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
@@ -40,11 +40,6 @@
return 0;
}
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c b/board/st/stm32f469-discovery/stm32f469-discovery.c
index c5df9b0..122273a 100644
--- a/board/st/stm32f469-discovery/stm32f469-discovery.c
+++ b/board/st/stm32f469-discovery/stm32f469-discovery.c
@@ -40,11 +40,6 @@
return 0;
}
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index efa38a0..376bc06 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -77,12 +77,7 @@
{
return BOOT_DEVICE_XIP;
}
-
#endif
-u32 get_board_rev(void)
-{
- return 0;
-}
int board_late_init(void)
{
diff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c
index 4091d5f..cc87230 100644
--- a/board/st/stm32h743-disco/stm32h743-disco.c
+++ b/board/st/stm32h743-disco/stm32h743-disco.c
@@ -36,11 +36,6 @@
return 0;
}
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
diff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c
index 4091d5f..cc87230 100644
--- a/board/st/stm32h743-eval/stm32h743-eval.c
+++ b/board/st/stm32h743-eval/stm32h743-eval.c
@@ -36,11 +36,6 @@
return 0;
}
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
diff --git a/board/st/stm32h750-art-pi/stm32h750-art-pi.c b/board/st/stm32h750-art-pi/stm32h750-art-pi.c
index 5785b2e..0ece8e7 100644
--- a/board/st/stm32h750-art-pi/stm32h750-art-pi.c
+++ b/board/st/stm32h750-art-pi/stm32h750-art-pi.c
@@ -41,11 +41,6 @@
return 0;
}
-u32 get_board_rev(void)
-{
- return 0;
-}
-
int board_late_init(void)
{
return 0;
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 032f08d..1d4d7b4 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -37,6 +37,7 @@
#include <asm/gpio.h>
#include <asm/arch/stm32.h>
#include <asm/arch/sys_proto.h>
+#include <dm/ofnode.h>
#include <jffs2/load_kernel.h>
#include <linux/bitops.h>
#include <linux/delay.h>
@@ -235,10 +236,10 @@
static int get_led(struct udevice **dev, char *led_string)
{
- char *led_name;
+ const char *led_name;
int ret;
- led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
+ led_name = ofnode_conf_read_str(led_string);
if (!led_name) {
log_debug("could not find %s config string\n", led_string);
return -ENOENT;
diff --git a/board/ste/stemmy/MAINTAINERS b/board/ste/stemmy/MAINTAINERS
index 37daabe..fa06488 100644
--- a/board/ste/stemmy/MAINTAINERS
+++ b/board/ste/stemmy/MAINTAINERS
@@ -2,5 +2,6 @@
M: Stephan Gerhold <stephan@gerhold.net>
S: Maintained
F: board/ste/stemmy/
-F: include/configs/stemmy.h
F: configs/stemmy_defconfig
+F: doc/board/ste/stemmy.rst
+F: include/configs/stemmy.h
diff --git a/board/ste/stemmy/README b/board/ste/stemmy/README
deleted file mode 100644
index 1b83b83..0000000
--- a/board/ste/stemmy/README
+++ /dev/null
@@ -1,50 +0,0 @@
-ST-Ericsson U8500 Samsung "stemmy" board
-========================================
-
-The "stemmy" board supports Samsung smartphones released with
-the ST-Ericsson NovaThor U8500 SoC, e.g.
-
- - Samsung Galaxy S III mini (GT-I8190) "golden"
- - Samsung Galaxy S Advance (GT-I9070) "janice"
- - Samsung Galaxy Xcover 2 (GT-S7710) "skomer"
- - Samsung Galaxy Ace 2 (GT-I8160) "codina"
-
-and likely others as well (untested).
-
-At the moment, U-Boot is intended to be chain-loaded from
-the original Samsung bootloader, not replacing it entirely.
-
-Installation
-------------
-
-1. Setup cross compiler, e.g. export CROSS_COMPILE=arm-none-eabi-
-2. make stemmy_defconfig
-3. make
-
-For newer devices (golden and skomer), the U-Boot binary has to be packed into
-an Android boot image. janice boots the raw U-Boot binary from the boot partition.
-
-4. Obtain mkbootimg, e.g. https://android.googlesource.com/platform/system/core/+/refs/tags/android-7.1.2_r37/mkbootimg/mkbootimg
-5. mkbootimg \
- --kernel=u-boot.bin \
- --base=0x00000000 \
- --kernel_offset=0x00100000 \
- --ramdisk_offset=0x02000000 \
- --tags_offset=0x00000100 \
- --output=u-boot.img
-
-6. Enter Samsung download mode (press Power + Home + Volume Down)
-7. Flash U-Boot image to Android boot partition using Heimdall:
- https://gitlab.com/BenjaminDobell/Heimdall
-
- heimdall flash --Kernel u-boot.(bin|img)
-
-8. After reboot U-Boot prompt should appear via UART.
-
-UART
-----
-
-UART is available through the micro USB port, similar to the Carkit standard.
-With a ~619kOhm resistor between ID and GND, 1.8V RX/TX is available at D+/D-.
-
-Make sure to connect the UART cable *before* turning on the phone.
diff --git a/board/storopack/smegw01/Kconfig b/board/storopack/smegw01/Kconfig
index 4503b65..d8f2469 100644
--- a/board/storopack/smegw01/Kconfig
+++ b/board/storopack/smegw01/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "smegw01"
+config IMX_CONFIG
+ default "board/storopack/smegw01/imximage.cfg"
+
endif
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 1a46100..2b7d655 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -47,7 +47,7 @@
#include <sy8106a.h>
#include <asm/setup.h>
-#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
+#if defined(CONFIG_VIDEO_LCD_PANEL_I2C)
/* So that we can use pin names in Kconfig and sunxi_name_to_gpio() */
int soft_i2c_gpio_sda;
int soft_i2c_gpio_scl;
diff --git a/board/tcl/sl50/Makefile b/board/tcl/sl50/Makefile
index c2977d7..0ac0ba3 100644
--- a/board/tcl/sl50/Makefile
+++ b/board/tcl/sl50/Makefile
@@ -4,7 +4,7 @@
#
# Copyright (C) 2015 Toby Churchill Ltd - http://www.toby-churchill.com/
-ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
+ifeq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c
index d213608..b7ddc3b 100644
--- a/board/tcl/sl50/board.c
+++ b/board/tcl/sl50/board.c
@@ -40,7 +40,7 @@
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
static const struct ddr_data ddr3_sl50_data = {
.datardsratio0 = MT41K256M16HA125E_RD_DQS,
@@ -161,7 +161,7 @@
const struct dpll_params *get_dpll_ddr_params(void)
{
enable_i2c0_pin_mux();
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
return &dpll_ddr_sl50;
}
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c
index 2d749da..d97e13b 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -60,7 +60,7 @@
return 0;
}
-#ifdef CONFIG_POWER
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
#define I2C_PMIC 3
int power_init_board(void)
{
diff --git a/board/technexion/pico-imx8mq/Kconfig b/board/technexion/pico-imx8mq/Kconfig
index 031fc1d..628b051 100644
--- a/board/technexion/pico-imx8mq/Kconfig
+++ b/board/technexion/pico-imx8mq/Kconfig
@@ -9,4 +9,7 @@
config SYS_CONFIG_NAME
default "pico-imx8mq"
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage.cfg"
+
endif
diff --git a/board/ti/am335x/Makefile b/board/ti/am335x/Makefile
index c34b9b1..3ccf66b 100644
--- a/board/ti/am335x/Makefile
+++ b/board/ti/am335x/Makefile
@@ -4,7 +4,7 @@
#
# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
-ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
+ifeq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
diff --git a/board/ti/am335x/README b/board/ti/am335x/README
deleted file mode 100644
index 19e0ecc..0000000
--- a/board/ti/am335x/README
+++ /dev/null
@@ -1,205 +0,0 @@
-Summary
-=======
-
-This document covers various features of the 'am335x_evm' build, and some of
-the related build targets (am335x_evm_uartN, etc).
-
-Hardware
-========
-
-The binary produced by this board supports, based on parsing of the EEPROM
-documented in TI's reference designs:
-- AM335x GP EVM
-- AM335x EVM SK
-- Beaglebone White
-- Beaglebone Black
-
-Customization
-=============
-
-Given that all of the above boards are reference platforms (and the
-Beaglebone platforms are OSHA), it is likely that this platform code and
-configuration will be used as the basis of a custom platform. It is
-worth noting that aside from things such as NAND or MMC only being
-required if a custom platform makes use of these blocks, the following
-are required, depending on design:
-
-- GPIO is only required if DDR3 power is controlled in a way similar to
- EVM SK
-- SPI is only required for SPI flash, or exposing the SPI bus.
-
-The following blocks are required:
-- I2C, to talk with the PMIC and ensure that we do not run afoul of
- errata 1.0.24.
-
-When removing options as part of customization,
-CONFIG_EXTRA_ENV_SETTINGS will need additional care to update for your
-needs and to remove no longer relevant options as in some cases we
-define additional text blocks (such as for NAND or DFU strings). Also
-note that all of the SPL options are grouped together, rather than with
-the IP blocks, so both areas will need their choices updated to reflect
-the custom design.
-
-NAND
-====
-
-The AM335x GP EVM ships with a 256MiB NAND available in most profiles. In
-this example to program the NAND we assume that an SD card has been
-inserted with the files to write in the first SD slot and that mtdparts
-have been configured correctly for the board. All images are first loaded
-into memory, then written to NAND.
-
-Step-1: Building u-boot for NAND boot
- Set following CONFIGxx options for NAND device.
- CONFIG_SYS_NAND_PAGE_SIZE number of main bytes in NAND page
- CONFIG_SYS_NAND_OOBSIZE number of OOB bytes in NAND page
- CONFIG_SYS_NAND_BLOCK_SIZE number of bytes in NAND erase-block
- CONFIG_SYS_NAND_ECCPOS ECC map for NAND page
- CONFIG_NAND_OMAP_ECCSCHEME (refer doc/README.nand)
-
-Step-2: Flashing NAND via MMC/SD
- # select BOOTSEL to MMC/SD boot and boot from MMC/SD card
- U-Boot # mmc rescan
- # erase flash
- U-Boot # nand erase.chip
- U-Boot # env default -f -a
- U-Boot # saveenv
- # flash MLO. Redundant copies of MLO are kept for failsafe
- U-Boot # load mmc 0 0x82000000 MLO
- U-Boot # nand write 0x82000000 0x00000 0x20000
- U-Boot # nand write 0x82000000 0x20000 0x20000
- U-Boot # nand write 0x82000000 0x40000 0x20000
- U-Boot # nand write 0x82000000 0x60000 0x20000
- # flash u-boot.img
- U-Boot # load mmc 0 0x82000000 u-boot.img
- U-Boot # nand write 0x82000000 0x80000 0x60000
- # flash kernel image
- U-Boot # load mmc 0 0x82000000 uImage
- U-Boot # nand write 0x82000000 ${nandsrcaddr} ${nandimgsize}
- # flash filesystem image
- U-Boot # load mmc 0 0x82000000 filesystem.img
- U-Boot # nand write 0x82000000 ${loadaddress} 0x300000
-
-Step-3: Set BOOTSEL pin to select NAND boot, and POR the device.
- The device should boot from images flashed on NAND device.
-
-NOR
-===
-
-The Beaglebone White can be equipped with a "memory cape" that in turn can
-have a NOR module plugged into it. In this case it is then possible to
-program and boot from NOR. Note that due to how U-Boot is designed we
-must build a specific version of U-Boot that knows we have NOR flash. This
-build is named 'am335x_evm_nor'. Further, we have a 'am335x_evm_norboot'
-build that will assume that the environment is on NOR rather than NAND. In
-the following example we assume that and SD card has been populated with
-MLO and u-boot.img from a 'am335x_evm_nor' build and also contains the
-'u-boot.bin' from a 'am335x_evm_norboot' build. When booting from NOR, a
-binary must be written to the start of NOR, with no header or similar
-prepended. In the following example we use a size of 512KiB (0x80000)
-as that is how much space we set aside before the environment, as per
-the config file.
-
-U-Boot # mmc rescan
-U-Boot # load mmc 0 ${loadaddr} u-boot.bin
-U-Boot # protect off 08000000 +80000
-U-Boot # erase 08000000 +80000
-U-Boot # cp.b ${loadaddr} 08000000 ${filesize}
-
-Falcon Mode
-===========
-
-The default build includes "Falcon Mode" (see doc/README.falcon) via NAND,
-eMMC (or raw SD cards) and FAT SD cards. Our default behavior currently is
-to read a 'c' on the console while in SPL at any point prior to loading the
-OS payload (so as soon as possible) to opt to booting full U-Boot. Also
-note that while one can program Falcon Mode "in place" great care needs to
-be taken by the user to not 'brick' their setup. As these are all eval
-boards with multiple boot methods, recovery should not be an issue in this
-worst-case however.
-
-Falcon Mode: eMMC
-=================
-
-The recommended layout in this case is:
-
-MMC BLOCKS |--------------------------------| LOCATION IN BYTES
-0x0000 - 0x007F : MBR or GPT table : 0x000000 - 0x020000
-0x0080 - 0x00FF : ARGS or FDT file : 0x010000 - 0x020000
-0x0100 - 0x01FF : SPL.backup1 (first copy used) : 0x020000 - 0x040000
-0x0200 - 0x02FF : SPL.backup2 (second copy used) : 0x040000 - 0x060000
-0x0300 - 0x06FF : U-Boot : 0x060000 - 0x0e0000
-0x0700 - 0x08FF : U-Boot Env + Redundant : 0x0e0000 - 0x120000
-0x0900 - 0x28FF : Kernel : 0x120000 - 0x520000
-
-Note that when we run 'spl export' it will prepare to boot the kernel.
-This includes relocation of the uImage from where we loaded it to the entry
-point defined in the header. As these locations overlap by default, it
-would leave us with an image that if written to MMC will not boot, so
-instead of using the loadaddr variable we use 0x81000000 in the following
-example. In this example we are loading from the network, for simplicity,
-and assume a valid partition table already exists and 'mmc dev' has already
-been run to select the correct device. Also note that if you previously
-had a FAT partition (such as on a Beaglebone Black) it is not enough to
-write garbage into the area, you must delete it from the partition table
-first.
-
-# Ensure we are able to talk with this mmc device
-U-Boot # mmc rescan
-U-Boot # tftp 81000000 am335x/MLO
-# Write to two of the backup locations ROM uses
-U-Boot # mmc write 81000000 100 100
-U-Boot # mmc write 81000000 200 100
-# Write U-Boot to the location set in the config
-U-Boot # tftp 81000000 am335x/u-boot.img
-U-Boot # mmc write 81000000 300 400
-# Load kernel and device tree into memory, perform export
-U-Boot # tftp 81000000 am335x/uImage
-U-Boot # run findfdt
-U-Boot # tftp ${fdtaddr} am335x/${fdtfile}
-U-Boot # run mmcargs
-U-Boot # spl export fdt 81000000 - ${fdtaddr}
-# Write the updated device tree to MMC
-U-Boot # mmc write ${fdtaddr} 80 80
-# Write the uImage to MMC
-U-Boot # mmc write 81000000 900 2000
-
-Falcon Mode: FAT SD cards
-=========================
-
-In this case the additional file is written to the filesystem. In this
-example we assume that the uImage and device tree to be used are already on
-the FAT filesystem (only the uImage MUST be for this to function
-afterwards) along with a Falcon Mode aware MLO and the FAT partition has
-already been created and marked bootable:
-
-U-Boot # mmc rescan
-# Load kernel and device tree into memory, perform export
-U-Boot # load mmc 0:1 ${loadaddr} uImage
-U-Boot # run findfdt
-U-Boot # load mmc 0:1 ${fdtaddr} ${fdtfile}
-U-Boot # run mmcargs
-U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
-
-This will print a number of lines and then end with something like:
- Using Device Tree in place at 80f80000, end 80f85928
- Using Device Tree in place at 80f80000, end 80f88928
-So then you:
-
-U-Boot # fatwrite mmc 0:1 0x80f80000 args 8928
-
-Falcon Mode: NAND
-=================
-
-In this case the additional data is written to another partition of the
-NAND. In this example we assume that the uImage and device tree to be are
-already located on the NAND somewhere (such as filesystem or mtd partition)
-along with a Falcon Mode aware MLO written to the correct locations for
-booting and mtdparts have been configured correctly for the board:
-
-U-Boot # nand read ${loadaddr} kernel
-U-Boot # load nand rootfs ${fdtaddr} /boot/am335x-evm.dtb
-U-Boot # run nandargs
-U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
-U-Boot # nand erase.part u-boot-spl-os
-U-Boot # nand write ${fdtaddr} u-boot-spl-os
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 2e4f3d1..e8555de 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -79,10 +79,6 @@
{
enable_i2c0_pin_mux();
enable_i2c2_pin_mux();
-#if !CONFIG_IS_ENABLED(DM_I2C)
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED2, CONFIG_SYS_OMAP24_I2C_SLAVE2);
-#endif
if (ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
CONFIG_EEPROM_CHIP_ADDRESS))
printf("ti_i2c_eeprom_init failed\n");
@@ -99,7 +95,7 @@
}
#endif
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
static const struct ddr_data ddr2_data = {
.datardsratio0 = MT47H128M16RT25E_RD_DQS,
.datafwsratio0 = MT47H128M16RT25E_PHY_FIFO_WE,
@@ -253,7 +249,7 @@
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
+#ifdef CONFIG_SPL_SERIAL
/* break into full u-boot on 'c' */
if (serial_tstc() && serial_getc() == 'c')
return 1;
@@ -339,13 +335,8 @@
if (board_is_bone() && !strncmp(board_ti_get_rev(), "00A1", 4))
return;
-#if !CONFIG_IS_ENABLED(DM_I2C)
- if (i2c_probe(TPS65217_CHIP_PM))
- return;
-#else
if (power_tps65217_init(0))
return;
-#endif
/*
@@ -438,13 +429,8 @@
* 1.10V. For MPU voltage we need to switch based on
* the frequency we are running at.
*/
-#if !CONFIG_IS_ENABLED(DM_I2C)
- if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
- return;
-#else
if (power_tps65910_init(0))
return;
-#endif
/*
* Depending on MPU clock and PG we will need a different
* VDD to drive at that speed.
@@ -472,10 +458,6 @@
if (first_time) {
enable_i2c0_pin_mux();
-#if !CONFIG_IS_ENABLED(DM_I2C)
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
- CONFIG_SYS_OMAP24_I2C_SLAVE);
-#endif
first_time = false;
}
}
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index e450ff6..fed737f 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -345,14 +345,6 @@
static unsigned short detect_daughter_board_profile(void)
{
unsigned short val;
-
-#if !CONFIG_IS_ENABLED(DM_I2C)
- if (i2c_probe(I2C_CPLD_ADDR))
- return PROFILE_NONE;
-
- if (i2c_read(I2C_CPLD_ADDR, CFG_REG, 1, (unsigned char *)(&val), 2))
- return PROFILE_NONE;
-#else
struct udevice *dev = NULL;
int rc;
@@ -362,7 +354,6 @@
rc = dm_i2c_read(dev, CFG_REG, (unsigned char *)(&val), 2);
if (rc)
return PROFILE_NONE;
-#endif
return (1 << (val & PROFILE_MASK));
}
diff --git a/board/ti/am43xx/Makefile b/board/ti/am43xx/Makefile
index 60a11d8..8dc1d89 100644
--- a/board/ti/am43xx/Makefile
+++ b/board/ti/am43xx/Makefile
@@ -4,7 +4,7 @@
#
# Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
-ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
+ifeq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index a71b588..529129e 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -56,7 +56,7 @@
}
#endif
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
const struct dpll_params dpll_mpu[NUM_CRYSTAL_FREQ][NUM_OPPS] = {
{ /* 19.2 MHz */
@@ -393,13 +393,8 @@
{
int mpu_vdd, ddr_volt;
-#if !CONFIG_IS_ENABLED(DM_I2C)
- if (i2c_probe(TPS65218_CHIP_PM))
- return;
-#else
if (power_tps65218_init(0))
return;
-#endif
switch (m) {
case 1000:
@@ -451,13 +446,8 @@
{
int mpu_vdd;
-#if !CONFIG_IS_ENABLED(DM_I2C)
- if (i2c_probe(TPS62362_I2C_ADDR))
- return;
-#else
if (power_tps62362_init(0))
return;
-#endif
switch (m) {
case 1000:
@@ -492,10 +482,6 @@
if (first_time) {
enable_i2c0_pin_mux();
-#if !CONFIG_IS_ENABLED(DM_I2C)
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
- CONFIG_SYS_OMAP24_I2C_SLAVE);
-#endif
first_time = false;
}
}
@@ -632,28 +618,15 @@
int power_init_board(void)
{
int rc;
-#if !CONFIG_IS_ENABLED(DM_I2C)
- struct pmic *p = NULL;
-#endif
if (board_is_idk()) {
rc = power_tps62362_init(0);
if (rc)
goto done;
-#if !CONFIG_IS_ENABLED(DM_I2C)
- p = pmic_get("TPS62362");
- if (!p || pmic_probe(p))
- goto done;
-#endif
puts("PMIC: TPS62362\n");
} else {
rc = power_tps65218_init(0);
if (rc)
goto done;
-#if !CONFIG_IS_ENABLED(DM_I2C)
- p = pmic_get("TPS65218_PMIC");
- if (!p || pmic_probe(p))
- goto done;
-#endif
puts("PMIC: TPS65218\n");
}
done:
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index fda8d5f..d806299 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -312,6 +312,7 @@
#endif
#endif
+#ifdef CONFIG_REVISION_TAG
/*
* get_board_rev() - get board revision
*/
@@ -319,3 +320,4 @@
{
return 0x20;
}
+#endif
diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c
index 4895bfa..69726eb 100644
--- a/board/ti/sdp4430/sdp.c
+++ b/board/ti/sdp4430/sdp.c
@@ -104,6 +104,7 @@
}
#endif /* CONFIG_SPL_OS_BOOT */
+#ifdef CONFIG_REVISION_TAG
/*
* get_board_rev() - get board revision
*/
@@ -111,3 +112,4 @@
{
return 0x20;
}
+#endif
diff --git a/board/toradex/apalis-imx8/Kconfig b/board/toradex/apalis-imx8/Kconfig
index c680d63..b43d628 100644
--- a/board/toradex/apalis-imx8/Kconfig
+++ b/board/toradex/apalis-imx8/Kconfig
@@ -25,6 +25,9 @@
config TDX_CFG_BLOCK_OFFSET
default "-512"
+config IMX_CONFIG
+ default "board/toradex/apalis-imx8/apalis-imx8-imximage.cfg"
+
source "board/toradex/common/Kconfig"
endif
diff --git a/board/toradex/apalis-imx8x/Kconfig b/board/toradex/apalis-imx8x/Kconfig
index ee61e09..d6cda7e 100644
--- a/board/toradex/apalis-imx8x/Kconfig
+++ b/board/toradex/apalis-imx8x/Kconfig
@@ -25,6 +25,9 @@
config TDX_CFG_BLOCK_OFFSET
default "-512"
+config IMX_CONFIG
+ default "board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg"
+
source "board/toradex/common/Kconfig"
endif
diff --git a/board/toradex/apalis_imx6/Kconfig b/board/toradex/apalis_imx6/Kconfig
index 14f8c10..c6ff387 100644
--- a/board/toradex/apalis_imx6/Kconfig
+++ b/board/toradex/apalis_imx6/Kconfig
@@ -48,7 +48,6 @@
This option configures DCE mode unconditionally. Whithout this
option the config block stating V1.0 HW selects DCE mode,
otherwise the UARTs are configuered in DTE mode.
- default n
source "board/toradex/common/Kconfig"
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index 74060da..f4cd28d 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -707,12 +707,11 @@
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
-#if defined(CONFIG_REVISION_TAG) && \
- defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
+#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
char env_str[256];
u32 rev;
- rev = get_board_rev();
+ rev = get_board_revision();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
env_set("board_rev", env_str);
diff --git a/board/toradex/colibri-imx6ull/Kconfig b/board/toradex/colibri-imx6ull/Kconfig
index 3ce9885..e5e4af3 100644
--- a/board/toradex/colibri-imx6ull/Kconfig
+++ b/board/toradex/colibri-imx6ull/Kconfig
@@ -24,6 +24,9 @@
config TDX_CFG_BLOCK_2ND_ETHADDR
default y
+config IMX_CONFIG
+ default "board/toradex/colibri-imx6ull/imximage.cfg"
+
source "board/toradex/common/Kconfig"
endif
diff --git a/board/toradex/colibri-imx8x/Kconfig b/board/toradex/colibri-imx8x/Kconfig
index d97fed0..b89840a 100644
--- a/board/toradex/colibri-imx8x/Kconfig
+++ b/board/toradex/colibri-imx8x/Kconfig
@@ -25,6 +25,9 @@
config TDX_CFG_BLOCK_OFFSET
default "-512"
+config IMX_CONFIG
+ default "board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg"
+
source "board/toradex/common/Kconfig"
endif
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index 587d92a..3b55f6c 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -611,12 +611,11 @@
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
-#if defined(CONFIG_REVISION_TAG) && \
- defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
+#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
char env_str[256];
u32 rev;
- rev = get_board_rev();
+ rev = get_board_revision();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
env_set("board_rev", env_str);
#endif
diff --git a/board/toradex/colibri_imx7/Kconfig b/board/toradex/colibri_imx7/Kconfig
index d33ec63..87c416a 100644
--- a/board/toradex/colibri_imx7/Kconfig
+++ b/board/toradex/colibri_imx7/Kconfig
@@ -71,6 +71,9 @@
endif
+config IMX_CONFIG
+ default "board/toradex/colibri_imx7/imximage.cfg"
+
source "board/toradex/common/Kconfig"
endif
diff --git a/board/toradex/colibri_vf/Kconfig b/board/toradex/colibri_vf/Kconfig
index 5f7129d..83315d8 100644
--- a/board/toradex/colibri_vf/Kconfig
+++ b/board/toradex/colibri_vf/Kconfig
@@ -21,6 +21,9 @@
config TDX_CFG_BLOCK_2ND_ETHADDR
default y
+config IMX_CONFIG
+ default "board/toradex/colibri_vf/imximage.cfg"
+
source "board/toradex/common/Kconfig"
endif
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index e4f9a0d..fe47cdd 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -493,24 +493,24 @@
else
tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ;
}
-#ifdef CONFIG_MACH_TYPE
+#if defined(CONFIG_TARGET_APALIS_T30) || defined(CONFIG_TARGET_COLIBRI_T30)
else if (!strcmp("tegra30", soc)) {
- if (CONFIG_MACH_TYPE == MACH_TYPE_APALIS_T30) {
- if (it == 'y' || it == 'Y')
- tdx_hw_tag.prodid = APALIS_T30_IT;
+#ifdef CONFIG_TARGET_APALIS_T30
+ if (it == 'y' || it == 'Y')
+ tdx_hw_tag.prodid = APALIS_T30_IT;
+ else
+ if (gd->ram_size == 0x40000000)
+ tdx_hw_tag.prodid = APALIS_T30_1GB;
else
- if (gd->ram_size == 0x40000000)
- tdx_hw_tag.prodid = APALIS_T30_1GB;
- else
- tdx_hw_tag.prodid = APALIS_T30_2GB;
- } else {
- if (it == 'y' || it == 'Y')
- tdx_hw_tag.prodid = COLIBRI_T30_IT;
- else
- tdx_hw_tag.prodid = COLIBRI_T30;
- }
+ tdx_hw_tag.prodid = APALIS_T30_2GB;
+#else
+ if (it == 'y' || it == 'Y')
+ tdx_hw_tag.prodid = COLIBRI_T30_IT;
+ else
+ tdx_hw_tag.prodid = COLIBRI_T30;
+#endif
}
-#endif /* CONFIG_MACH_TYPE */
+#endif /* CONFIG_TARGET_APALIS_T30 || CONFIG_TARGET_COLIBRI_T30 */
else if (!strcmp("tegra124", soc)) {
tdx_hw_tag.prodid = APALIS_TK1_2GB;
} else if (!strcmp("vf500", soc)) {
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index 061abf7..9db4553 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -32,8 +32,8 @@
static char *tdx_carrier_board_name;
#endif
-#ifdef CONFIG_REVISION_TAG
-u32 get_board_rev(void)
+#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
+u32 get_board_revision(void)
{
/* Check validity */
if (!tdx_hw_tag.ver_major)
@@ -183,8 +183,8 @@
#else /* CONFIG_TDX_CFG_BLOCK */
-#ifdef CONFIG_REVISION_TAG
-u32 get_board_rev(void)
+#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
+u32 get_board_revision(void)
{
return 0;
}
diff --git a/board/toradex/common/tdx-common.h b/board/toradex/common/tdx-common.h
index 8020df5..c96e875 100644
--- a/board/toradex/common/tdx-common.h
+++ b/board/toradex/common/tdx-common.h
@@ -10,6 +10,7 @@
#define TDX_USB_VID 0x1B67
int ft_common_board_setup(void *blob, struct bd_info *bd);
+u32 get_board_revision(void);
#if defined(CONFIG_DM_VIDEO)
int show_boot_logo(void);
diff --git a/board/toradex/verdin-imx8mm/Kconfig b/board/toradex/verdin-imx8mm/Kconfig
index 149aed6..51e8ba6 100644
--- a/board/toradex/verdin-imx8mm/Kconfig
+++ b/board/toradex/verdin-imx8mm/Kconfig
@@ -31,6 +31,9 @@
config TDX_CFG_BLOCK_OFFSET
default "-512"
+config IMX_CONFIG
+ default "board/toradex/verdin-imx8mm/imximage.cfg"
+
source "board/toradex/common/Kconfig"
endif
diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
index f2b9210..f2de039 100644
--- a/board/tplink/wdr4300/wdr4300.c
+++ b/board/tplink/wdr4300/wdr4300.c
@@ -71,7 +71,7 @@
wdr4300_pinmux_config();
#endif
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
ar934x_pll_init(560, 480, 240);
ar934x_ddr_init(560, 480, 240);
#endif
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index 4f86a92..de9c001 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -171,7 +171,7 @@
#endif
#endif
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
static struct i2c_pads_info tqma6_i2c3_pads = {
/* I2C3: on board LM75, M24C64, */
.scl = {
@@ -216,7 +216,7 @@
#ifndef CONFIG_DM_SPI
tqma6_iomuxc_spi();
#endif
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
tqma6_setup_i2c();
#endif
@@ -247,7 +247,7 @@
};
}
-#ifdef CONFIG_POWER
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
/* setup board specific PMIC */
int power_init_board(void)
{
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 92a1e08..ce005d3 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -96,7 +96,7 @@
};
#endif
-#ifdef CONFIG_POWER
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
int power_init_board(void)
{
struct pmic *p;
diff --git a/board/varisys/common/Makefile b/board/varisys/common/Makefile
deleted file mode 100644
index b7358c7..0000000
--- a/board/varisys/common/Makefile
+++ /dev/null
@@ -1,21 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-MINIMAL=
-
-ifdef CONFIG_SPL_BUILD
-ifdef CONFIG_SPL_INIT_MINIMAL
-MINIMAL=y
-endif
-endif
-
-ifdef MINIMAL
-# necessary to create built-in.o
-obj- := __dummy__.o
-else
-ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_ID_EEPROM) += sys_eeprom.o
-endif
-endif
diff --git a/board/varisys/common/eeprom.h b/board/varisys/common/eeprom.h
deleted file mode 100644
index 004816a..0000000
--- a/board/varisys/common/eeprom.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* EEPROM init functions for Cyrus */
-
-
-void init_eeprom(int bus_num, int addr, int addr_len);
-void mac_read_from_fixed_id(void);
-int mac_read_from_eeprom_common(void);
diff --git a/board/varisys/common/sys_eeprom.c b/board/varisys/common/sys_eeprom.c
deleted file mode 100644
index 8f624e5..0000000
--- a/board/varisys/common/sys_eeprom.c
+++ /dev/null
@@ -1,500 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Based on board/freescale/common/sys_eeprom.c
- * Copyright 2006, 2008-2009, 2011 Freescale Semiconductor
- *
- * This defines the API for storing board information in the
- * eeprom. It has been adapted from an earlier version of the
- * Freescale API, but has a number of key differences. Because
- * the two APIs are independent and may diverge further, the
- * Varisys version of the API is implemented separately here.
- */
-
-#include <common.h>
-#include <command.h>
-#include <env.h>
-#include <i2c.h>
-#include <linux/ctype.h>
-#include <linux/delay.h>
-#include <u-boot/crc.h>
-
-#include "eeprom.h"
-
-#ifdef CONFIG_SYS_I2C_EEPROM_NXID_MAC
-#define MAX_NUM_PORTS CONFIG_SYS_I2C_EEPROM_NXID_MAC
-#else
-#define MAX_NUM_PORTS 8
-#endif
-#define NXID_VERSION 0
-
-/**
- * static eeprom: EEPROM layout for NXID formats
- *
- * See Freescale application note AN3638 for details.
- */
-static struct __attribute__ ((__packed__)) eeprom {
- u8 id[4]; /* 0x00 - 0x03 EEPROM Tag 'NXID' */
- u8 sn[12]; /* 0x04 - 0x0F Serial Number */
- u8 errata[5]; /* 0x10 - 0x14 Errata Level */
- u8 date[6]; /* 0x15 - 0x1a Build Date */
- u8 res_0; /* 0x1b Reserved */
- u32 version; /* 0x1c - 0x1f NXID Version */
- u8 tempcal[8]; /* 0x20 - 0x27 Temperature Calibration Factors */
- u8 tempcalsys[2]; /* 0x28 - 0x29 System Temperature Calibration Factors */
- u8 tempcalflags; /* 0x2a Temperature Calibration Flags */
- u8 res_1[21]; /* 0x2b - 0x3f Reserved */
- u8 mac_count; /* 0x40 Number of MAC addresses */
- u8 mac_flag; /* 0x41 MAC table flags */
- u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - x MAC addresses */
- u32 crc; /* x+1 CRC32 checksum */
-} e;
-
-/* Set to 1 if we've read EEPROM into memory */
-static int has_been_read;
-
-/* Is this a valid NXID EEPROM? */
-#define is_valid ((e.id[0] == 'N') || (e.id[1] == 'X') || \
- (e.id[2] == 'I') || (e.id[3] == 'D'))
-
-/** Fixed ID field in EEPROM */
-static unsigned char uid[16];
-
-static int eeprom_bus_num = -1;
-static int eeprom_addr;
-static int eeprom_addr_len;
-
-/**
- * This must be called before any eeprom access.
- */
-void init_eeprom(int bus_num, int addr, int addr_len)
-{
- eeprom_bus_num = bus_num;
- eeprom_addr = addr;
- eeprom_addr_len = addr_len;
-}
-
-/**
- * show_eeprom - display the contents of the EEPROM
- */
-void show_eeprom(void)
-{
- int i;
- unsigned int crc;
-
- /* EEPROM tag ID, either CCID or NXID */
- printf("ID: %c%c%c%c v%u\n", e.id[0], e.id[1], e.id[2], e.id[3],
- be32_to_cpu(e.version));
-
- /* Serial number */
- printf("SN: %s\n", e.sn);
-
- printf("UID: ");
- for (i = 0; i < 16; i++)
- printf("%02x", uid[i]);
- printf("\n");
-
- /* Errata level. */
- printf("Errata: %s\n", e.errata);
-
- /* Build date, BCD date values, as YYMMDDhhmmss */
- printf("Build date: 20%02x/%02x/%02x %02x:%02x:%02x %s\n",
- e.date[0], e.date[1], e.date[2],
- e.date[3] & 0x7F, e.date[4], e.date[5],
- e.date[3] & 0x80 ? "PM" : "");
-
- /* Show MAC addresses */
- for (i = 0; i < min(e.mac_count, (u8)MAX_NUM_PORTS); i++) {
- u8 *p = e.mac[i];
-
- printf("Eth%u: %02x:%02x:%02x:%02x:%02x:%02x\n", i,
- p[0], p[1], p[2], p[3], p[4], p[5]);
- }
-
- crc = crc32(0, (void *)&e, sizeof(e) - 4);
-
- if (crc == be32_to_cpu(e.crc))
- printf("CRC: %08x\n", be32_to_cpu(e.crc));
- else
- printf("CRC: %08x (should be %08x)\n",
- be32_to_cpu(e.crc), crc);
-
-#ifdef DEBUG
- printf("EEPROM dump: (0x%x bytes)\n", sizeof(e));
- for (i = 0; i < sizeof(e); i++) {
- if ((i % 16) == 0)
- printf("%02X: ", i);
- printf("%02X ", ((u8 *)&e)[i]);
- if (((i % 16) == 15) || (i == sizeof(e) - 1))
- printf("\n");
- }
-#endif
-}
-
-/**
- * read_eeprom - read the EEPROM into memory
- */
-int read_eeprom(void)
-{
- int ret;
- unsigned int bus;
-
- if (eeprom_bus_num < 0) {
- printf("EEPROM not configured\n");
- return -1;
- }
-
- if (has_been_read)
- return 0;
-
- bus = i2c_get_bus_num();
- i2c_set_bus_num(eeprom_bus_num);
-
- ret = i2c_read(eeprom_addr, 0, eeprom_addr_len,
- (void *)&e, sizeof(e));
-
-
- /* Fixed address of ID field */
- i2c_read(0x5f, 0x80, 1, uid, 16);
-
- i2c_set_bus_num(bus);
-
-#ifdef DEBUG
- show_eeprom();
-#endif
-
- has_been_read = (ret == 0) ? 1 : 0;
-
- return ret;
-}
-
-/**
- * update_crc - update the CRC
- *
- * This function should be called after each update to the EEPROM structure,
- * to make sure the CRC is always correct.
- */
-static void update_crc(void)
-{
- u32 crc, crc_offset = offsetof(struct eeprom, crc);
-
- crc = crc32(0, (void *)&e, crc_offset);
- e.crc = cpu_to_be32(crc);
-}
-
-/**
- * prog_eeprom - write the EEPROM from memory
- */
-static int prog_eeprom(void)
-{
- int ret = 0;
- int i;
- void *p;
- unsigned int bus;
-
- if (eeprom_bus_num < 0) {
- printf("EEPROM not configured\n");
- return -1;
- }
-
- /* Set the reserved values to 0xFF */
- e.res_0 = 0xFF;
- memset(e.res_1, 0xFF, sizeof(e.res_1));
- update_crc();
-
- bus = i2c_get_bus_num();
- i2c_set_bus_num(eeprom_bus_num);
-
- /*
- * The AT24C02 datasheet says that data can only be written in page
- * mode, which means 8 bytes at a time, and it takes up to 5ms to
- * complete a given write.
- */
- for (i = 0, p = &e; i < sizeof(e); i += 8, p += 8) {
- ret = i2c_write(eeprom_addr, i, eeprom_addr_len,
- p, min((int)(sizeof(e) - i), 8));
- if (ret)
- break;
- udelay(5000); /* 5ms write cycle timing */
- }
-
- if (!ret) {
- /* Verify the write by reading back the EEPROM and comparing */
- struct eeprom e2;
-
- ret = i2c_read(eeprom_addr, 0,
- eeprom_addr_len, (void *)&e2, sizeof(e2));
- if (!ret && memcmp(&e, &e2, sizeof(e)))
- ret = -1;
- }
-
- i2c_set_bus_num(bus);
-
- if (ret) {
- printf("Programming failed.\n");
- has_been_read = 0;
- return -1;
- }
-
- printf("Programming passed.\n");
- return 0;
-}
-
-/**
- * h2i - converts hex character into a number
- *
- * This function takes a hexadecimal character (e.g. '7' or 'C') and returns
- * the integer equivalent.
- */
-static inline u8 h2i(char p)
-{
- if ((p >= '0') && (p <= '9'))
- return p - '0';
-
- if ((p >= 'A') && (p <= 'F'))
- return (p - 'A') + 10;
-
- if ((p >= 'a') && (p <= 'f'))
- return (p - 'a') + 10;
-
- return 0;
-}
-
-/**
- * set_date - stores the build date into the EEPROM
- *
- * This function takes a pointer to a string in the format "YYMMDDhhmmss"
- * (2-digit year, 2-digit month, etc), converts it to a 6-byte BCD string,
- * and stores it in the build date field of the EEPROM local copy.
- */
-static void set_date(const char *string)
-{
- unsigned int i;
-
- if (strlen(string) != 12) {
- printf("Usage: mac date YYMMDDhhmmss\n");
- return;
- }
-
- for (i = 0; i < 6; i++)
- e.date[i] = h2i(string[2 * i]) << 4 | h2i(string[2 * i + 1]);
-
- update_crc();
-}
-
-/**
- * set_mac_address - stores a MAC address into the EEPROM
- *
- * This function takes a pointer to MAC address string
- * (i.e."XX:XX:XX:XX:XX:XX", where "XX" is a two-digit hex number) and
- * stores it in one of the MAC address fields of the EEPROM local copy.
- */
-static void set_mac_address(unsigned int index, const char *string)
-{
- char *p = (char *)string;
- unsigned int i;
-
- if ((index >= MAX_NUM_PORTS) || !string) {
- printf("Usage: mac <n> XX:XX:XX:XX:XX:XX\n");
- return;
- }
-
- for (i = 0; *p && (i < 6); i++) {
- e.mac[index][i] = hextoul(p, &p);
- if (*p == ':')
- p++;
- }
-
- update_crc();
-}
-
-int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-{
- char cmd;
-
- if (argc == 1) {
- show_eeprom();
- return 0;
- }
-
- cmd = argv[1][0];
-
- if (cmd == 'r') {
- read_eeprom();
- return 0;
- }
-
- if (cmd == 'i') {
- memcpy(e.id, "NXID", sizeof(e.id));
- e.version = NXID_VERSION;
- update_crc();
- return 0;
- }
-
- if (!is_valid) {
- printf("Please read the EEPROM ('r') and/or set the ID ('i') first.\n");
- return 0;
- }
-
- if (argc == 2) {
- switch (cmd) {
- case 's': /* save */
- prog_eeprom();
- break;
- default:
- return cmd_usage(cmdtp);
- }
-
- return 0;
- }
-
- /* We know we have at least one parameter */
-
- switch (cmd) {
- case 'n': /* serial number */
- memset(e.sn, 0, sizeof(e.sn));
- strncpy((char *)e.sn, argv[2], sizeof(e.sn) - 1);
- update_crc();
- break;
- case 'e': /* errata */
- memset(e.errata, 0, 5);
- strncpy((char *)e.errata, argv[2], 4);
- update_crc();
- break;
- case 'd': /* date BCD format YYMMDDhhmmss */
- set_date(argv[2]);
- break;
- case 'p': /* MAC table size */
- e.mac_count = hextoul(argv[2], NULL);
- update_crc();
- break;
- case '0' ... '9': /* "mac 0" through "mac 22" */
- set_mac_address(dectoul(argv[1], NULL), argv[2]);
- break;
- case 'h': /* help */
- default:
- return cmd_usage(cmdtp);
- }
-
- return 0;
-}
-
-int mac_read_from_generic_eeprom(const char *envvar, int chip,
- int address, int mac_bus)
-{
- int ret;
- unsigned int bus;
- unsigned char mac[6];
- char ethaddr[18];
-
- bus = i2c_get_bus_num();
- i2c_set_bus_num(mac_bus);
-
- ret = i2c_read(chip, address, 1, mac, 6);
-
- i2c_set_bus_num(bus);
-
- if (!ret) {
- sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
- mac[0],
- mac[1],
- mac[2],
- mac[3],
- mac[4],
- mac[5]);
-
- printf("MAC: %s\n", ethaddr);
- env_set(envvar, ethaddr);
- }
-
- return ret;
-}
-
-void mac_read_from_fixed_id(void)
-{
-#ifdef CONFIG_SYS_I2C_MAC1_CHIP_ADDR
- mac_read_from_generic_eeprom("ethaddr", CONFIG_SYS_I2C_MAC1_CHIP_ADDR,
- CONFIG_SYS_I2C_MAC1_DATA_ADDR, CONFIG_SYS_I2C_MAC1_BUS);
-#endif
-#ifdef CONFIG_SYS_I2C_MAC2_CHIP_ADDR
- mac_read_from_generic_eeprom("eth1addr", CONFIG_SYS_I2C_MAC2_CHIP_ADDR,
- CONFIG_SYS_I2C_MAC2_DATA_ADDR, CONFIG_SYS_I2C_MAC2_BUS);
-#endif
-}
-
-/**
- * mac_read_from_eeprom - read the MAC addresses from EEPROM
- *
- * This function reads the MAC addresses from EEPROM and sets the
- * appropriate environment variables for each one read.
- *
- * The environment variables are only set if they haven't been set already.
- * This ensures that any user-saved variables are never overwritten.
- *
- * This function must be called after relocation.
- *
- * For NXID v1 EEPROMs, we support loading and up-converting the older NXID v0
- * format. In a v0 EEPROM, there are only eight MAC addresses and the CRC is
- * located at a different offset.
- */
-int mac_read_from_eeprom_common(void)
-{
- unsigned int i;
- u32 crc, crc_offset = offsetof(struct eeprom, crc);
- u32 *crcp; /* Pointer to the CRC in the data read from the EEPROM */
-
- puts("EEPROM: ");
-
- if (read_eeprom()) {
- printf("Read failed.\n");
- return 0;
- }
-
- if (!is_valid) {
- printf("Invalid ID (%02x %02x %02x %02x)\n",
- e.id[0], e.id[1], e.id[2], e.id[3]);
- return 0;
- }
-
- crc = crc32(0, (void *)&e, crc_offset);
- crcp = (void *)&e + crc_offset;
- if (crc != be32_to_cpu(*crcp)) {
- printf("CRC mismatch (%08x != %08x)\n", crc,
- be32_to_cpu(e.crc));
- return 0;
- }
-
- /*
- * MAC address #9 in v1 occupies the same position as the CRC in v0.
- * Erase it so that it's not mistaken for a MAC address. We'll
- * update the CRC later.
- */
- if (e.version == 0)
- memset(e.mac[8], 0xff, 6);
-
- for (i = 0; i < min(e.mac_count, (u8)MAX_NUM_PORTS); i++) {
- if (memcmp(&e.mac[i], "\0\0\0\0\0\0", 6) &&
- memcmp(&e.mac[i], "\xFF\xFF\xFF\xFF\xFF\xFF", 6)) {
- char ethaddr[18];
- char enetvar[9];
-
- sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
- e.mac[i][0],
- e.mac[i][1],
- e.mac[i][2],
- e.mac[i][3],
- e.mac[i][4],
- e.mac[i][5]);
- sprintf(enetvar, i ? "eth%daddr" : "ethaddr", i);
- /* Only initialize environment variables that are blank
- * (i.e. have not yet been set)
- */
- if (!env_get(enetvar))
- env_set(enetvar, ethaddr);
- }
- }
-
- printf("%c%c%c%c v%u\n", e.id[0], e.id[1], e.id[2], e.id[3],
- be32_to_cpu(e.version));
-
- return 0;
-}
diff --git a/board/vscom/baltos/Makefile b/board/vscom/baltos/Makefile
index c34b9b1..3ccf66b 100644
--- a/board/vscom/baltos/Makefile
+++ b/board/vscom/baltos/Makefile
@@ -4,7 +4,7 @@
#
# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
-ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
+ifeq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index 0007cac..07fe454 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -187,7 +187,7 @@
*/
i2c_set_bus_num(1);
- printf("I2C speed: %d Hz\n", CONFIG_SYS_OMAP24_I2C_SPEED);
+ printf("I2C speed: %d Hz\n", CONFIG_SYS_I2C_SPEED);
if (i2c_probe(TPS65910_CTRL_I2C_ADDR)) {
puts("i2c: cannot access TPS65910\n");
diff --git a/board/warp/Kconfig b/board/warp/Kconfig
index dc02636..9c2fc9d 100644
--- a/board/warp/Kconfig
+++ b/board/warp/Kconfig
@@ -6,4 +6,7 @@
config SYS_CONFIG_NAME
default "warp"
+config IMX_CONFIG
+ default "board/warp/imximage.cfg"
+
endif
diff --git a/board/warp7/Kconfig b/board/warp7/Kconfig
index c089bca..e5051cd 100644
--- a/board/warp7/Kconfig
+++ b/board/warp7/Kconfig
@@ -20,4 +20,7 @@
help
The address the FDT file should be loaded to.
+config IMX_CONFIG
+ default "board/warp7/imximage.cfg"
+
endif
diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c
index 0f20224..c5c5433 100644
--- a/board/warp7/warp7.c
+++ b/board/warp7/warp7.c
@@ -134,7 +134,7 @@
int board_late_init(void)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-#ifdef CONFIG_SERIAL_TAG
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
struct tag_serialnr serialnr;
char serial_string[0x20];
#endif
@@ -156,7 +156,7 @@
env_set_ulong(HAB_ENABLED_ENVNAME, 0);
#endif
-#ifdef CONFIG_SERIAL_TAG
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Set serial# standard environment variable based on OTP settings */
get_board_serial(&serialnr);
snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
diff --git a/board/work-microwave/work_92105/work_92105_display.c b/board/work-microwave/work_92105/work_92105_display.c
index e8e559c..5f625e6 100644
--- a/board/work-microwave/work_92105/work_92105_display.c
+++ b/board/work-microwave/work_92105/work_92105_display.c
@@ -20,6 +20,7 @@
#include <env.h>
#include <spi.h>
#include <i2c.h>
+#include <timestamp.h>
#include <version.h>
#include <vsprintf.h>
#include <linux/delay.h>
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 3a857b3..5b30b13 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -471,7 +471,6 @@
config CMD_ERASEENV
bool "eraseenv"
- default n
depends on CMD_SAVEENV
help
Erase environment variables from the compiled-in persistent
@@ -614,6 +613,37 @@
Help printed with the LAYOUT VERSIONS part of the 'eeprom'
command's help.
+config SYS_I2C_EEPROM_BUS
+ int "I2C bus of the EEPROM device."
+ depends on CMD_EEPROM
+ default 0
+
+config SYS_I2C_EEPROM_ADDR_LEN
+ int "Length in bytes of the EEPROM memory array address"
+ depends on CMD_EEPROM || ID_EEPROM
+ default 1
+ range 1 2
+ help
+ Note: This is NOT the chip address length!
+
+config SYS_EEPROM_SIZE
+ depends on CMD_EEPROM
+ int "Size in bytes of the EEPROM device"
+ default 256
+
+config SYS_EEPROM_PAGE_WRITE_BITS
+ int "Number of bits used to address bytes in a single page"
+ depends on CMD_EEPROM
+ default 8
+ help
+ The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS.
+ A 64 byte page, for example would require six bits.
+
+config SYS_EEPROM_PAGE_WRITE_DELAY_MS
+ int "Number of milliseconds to delay between page writes"
+ depends on CMD_EEPROM || CMD_I2C
+ default 0
+
config LOOPW
bool "loopw"
help
@@ -621,14 +651,12 @@
config CMD_MD5SUM
bool "md5sum"
- default n
select MD5
help
Compute MD5 checksum.
config MD5SUM_VERIFY
bool "md5sum -v"
- default n
depends on CMD_MD5SUM
help
Add -v option to verify data against an MD5 checksum.
@@ -1088,7 +1116,6 @@
config CMD_BKOPS_ENABLE
bool "mmc bkops enable"
depends on CMD_MMC
- default n
help
Enable command for setting manual background operations handshake
on a eMMC device. The feature is optionally available on eMMC devices
@@ -1416,7 +1443,6 @@
config CMD_SETEXPR_FMT
bool "setexpr_fmt"
- default n
depends on CMD_SETEXPR
help
Evaluate format string expression and store result in an environment
@@ -1428,7 +1454,6 @@
config CMD_AB_SELECT
bool "ab_select"
- default n
depends on ANDROID_AB
help
On Android devices with more than one boot slot (multiple copies of
@@ -1733,7 +1758,6 @@
bool "efidebug - display/configure UEFI environment"
depends on EFI_LOADER
select EFI_DEVICE_PATH_TO_TEXT
- default n
help
Enable the 'efidebug' command which provides a subset of UEFI
shell utility with simplified functionality. It will be useful
@@ -2336,7 +2360,6 @@
config CMD_AVB
bool "avb - Android Verified Boot 2.0 operations"
depends on AVB_VERIFY
- default n
help
Enables a "avb" command to perform verification of partitions using
Android Verified Boot 2.0 functionality. It includes such subcommands:
@@ -2376,7 +2399,6 @@
config CMD_UBI_RENAME
bool "Enable rename"
depends on CMD_UBI
- default n
help
Enable a "ubi" command to rename ubi volume:
ubi rename <oldname> <newname>
diff --git a/cmd/date.c b/cmd/date.c
index 149ca42..0e2dfbc 100644
--- a/cmd/date.c
+++ b/cmd/date.c
@@ -49,7 +49,7 @@
return CMD_RET_FAILURE;
}
}
-#elif defined(CONFIG_SYS_I2C_LEGACY)
+#elif CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
old_bus = i2c_get_bus_num();
i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
#else
@@ -122,7 +122,7 @@
}
/* switch back to original I2C bus */
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
i2c_set_bus_num(old_bus);
#elif !defined(CONFIG_DM_RTC)
I2C_SET_BUS(old_bus);
diff --git a/cmd/eeprom.c b/cmd/eeprom.c
index efd6f3a..cdd65af 100644
--- a/cmd/eeprom.c
+++ b/cmd/eeprom.c
@@ -15,7 +15,7 @@
* degradation (typical for EEPROM) is incured for FRAM memory:
*
* #define CONFIG_SYS_I2C_FRAM
- * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
+ * Set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS to 0
*
*/
@@ -27,18 +27,6 @@
#include <eeprom_layout.h>
#include <linux/delay.h>
-#ifndef CONFIG_SYS_I2C_SPEED
-#define CONFIG_SYS_I2C_SPEED 50000
-#endif
-
-#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 0
-#endif
-
-#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 8
-#endif
-
#ifndef I2C_RXTX_LEN
#define I2C_RXTX_LEN 128
#endif
@@ -46,21 +34,6 @@
#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
-/*
- * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
- * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
- *
- * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
- * 0x00000nxx for EEPROM address selectors and page number at n.
- */
-#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || \
- (CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) || \
- (CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
-#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
-#endif
-#endif
-
#if CONFIG_IS_ENABLED(DM_I2C)
static int eeprom_i2c_bus;
#endif
@@ -75,13 +48,20 @@
/* I2C EEPROM */
#if CONFIG_IS_ENABLED(DM_I2C)
eeprom_i2c_bus = bus;
-#elif defined(CONFIG_SYS_I2C_LEGACY)
+#elif CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
if (bus >= 0)
i2c_set_bus_num(bus);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
}
+/*
+ * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
+ * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
+ *
+ * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
+ * 0x00000nxx for EEPROM address selectors and page number at n.
+ */
static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)
{
unsigned blk_off;
@@ -183,8 +163,10 @@
buffer += len;
offset += len;
+#if CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS > 0
if (!read)
udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+#endif
}
return rcode;
@@ -243,10 +225,10 @@
int argc_no_bus = argc_no_bus_addr + 1;
int argc_bus_addr = argc_no_bus_addr + 2;
-#ifdef CONFIG_SYS_DEF_EEPROM_ADDR
+#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
if (argc == argc_no_bus_addr) {
*i2c_bus = -1;
- *i2c_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
+ *i2c_addr = CONFIG_SYS_I2C_EEPROM_ADDR;
return 0;
}
diff --git a/cmd/fdt.c b/cmd/fdt.c
index c42f1c7..2a207bf 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -624,7 +624,7 @@
fdt_strerror(err));
return CMD_RET_FAILURE;
}
-#ifdef CONFIG_SOC_KEYSTONE
+#ifdef CONFIG_ARCH_KEYSTONE
ft_board_setup_ex(working_fdt, gd->bd);
#endif
}
diff --git a/cmd/i2c.c b/cmd/i2c.c
index c7c08c4..9050b2b 100644
--- a/cmd/i2c.c
+++ b/cmd/i2c.c
@@ -98,7 +98,7 @@
* pairs. The following macros take care of this */
#if defined(CONFIG_SYS_I2C_NOPROBES)
-#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
static struct
{
uchar bus;
@@ -114,7 +114,7 @@
#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
-#endif /* defined(CONFIG_SYS_I2C_LEGACY) */
+#endif /* CONFIG_IS_ENABLED(SYS_I2C_LEGACY) */
#endif
#define DISP_LINE_LEN 16
@@ -195,54 +195,6 @@
{
}
-/* TODO: Implement architecture-specific get/set functions */
-
-/**
- * i2c_get_bus_speed() - Return I2C bus speed
- *
- * This function is the default implementation of function for retrieveing
- * the current I2C bus speed in Hz.
- *
- * A driver implementing runtime switching of I2C bus speed must override
- * this function to report the speed correctly. Simple or legacy drivers
- * can use this fallback.
- *
- * Returns I2C bus speed in Hz.
- */
-#if !defined(CONFIG_SYS_I2C_LEGACY) && !CONFIG_IS_ENABLED(DM_I2C)
-/*
- * TODO: Implement architecture-specific get/set functions
- * Should go away, if we switched completely to new multibus support
- */
-__weak
-unsigned int i2c_get_bus_speed(void)
-{
- return CONFIG_SYS_I2C_SPEED;
-}
-
-/**
- * i2c_set_bus_speed() - Configure I2C bus speed
- * @speed: Newly set speed of the I2C bus in Hz
- *
- * This function is the default implementation of function for setting
- * the I2C bus speed in Hz.
- *
- * A driver implementing runtime switching of I2C bus speed must override
- * this function to report the speed correctly. Simple or legacy drivers
- * can use this fallback.
- *
- * Returns zero on success, negative value on error.
- */
-__weak
-int i2c_set_bus_speed(unsigned int speed)
-{
- if (speed != CONFIG_SYS_I2C_SPEED)
- return -1;
-
- return 0;
-}
-#endif
-
/**
* get_alen() - Small parser helper function to get address length
*
@@ -922,7 +874,7 @@
if (ret)
return i2c_report_err(ret,
I2C_ERR_WRITE);
-#ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
+#if CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS > 0
udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
#endif
if (incrflag)
@@ -1725,7 +1677,7 @@
*
* Returns zero always.
*/
-#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -1811,7 +1763,7 @@
* Returns zero on success, CMD_RET_USAGE in case of misuse and negative
* on error.
*/
-#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
@@ -1834,7 +1786,7 @@
printf("Current bus is %d\n", bus_no);
} else {
bus_no = dectoul(argv[1], NULL);
-#if defined(CONFIG_SYS_I2C_LEGACY)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
printf("Invalid bus %d\n", bus_no);
return -1;
@@ -1852,7 +1804,7 @@
return ret ? CMD_RET_FAILURE : 0;
}
-#endif /* defined(CONFIG_SYS_I2C_LEGACY) */
+#endif /* CONFIG_IS_ENABLED(SYS_I2C_LEGACY) */
/**
* do_i2c_bus_speed() - Handle the "i2c speed" command-line command
@@ -1951,20 +1903,18 @@
printf("Error: Not supported by the driver\n");
return CMD_RET_FAILURE;
}
-#elif defined(CONFIG_SYS_I2C_LEGACY)
+#elif CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
-#else
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
return 0;
}
static struct cmd_tbl cmd_i2c_sub[] = {
-#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
#endif
U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
-#if defined(CONFIG_SYS_I2C_LEGACY) || \
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || \
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
#endif /* CONFIG_I2C_MULTI_BUS */
@@ -2036,12 +1986,12 @@
/***************************************************/
#ifdef CONFIG_SYS_LONGHELP
static char i2c_help_text[] =
-#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
"i2c " /* That's the prefix for the crc32 command below. */
#endif
"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
-#if defined(CONFIG_SYS_I2C_LEGACY) || \
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || \
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
"i2c dev [dev] - show or set current I2C bus\n"
#endif /* CONFIG_I2C_MULTI_BUS */
diff --git a/cmd/load.c b/cmd/load.c
index 381ed1b..249ebd4 100644
--- a/cmd/load.c
+++ b/cmd/load.c
@@ -474,6 +474,14 @@
addr = load_serial_ymodem(offset, xyzModem_ymodem);
+ if (addr == ~0) {
+ image_load_addr = 0;
+ printf("## Binary (ymodem) download aborted\n");
+ rcode = 1;
+ } else {
+ printf("## Start Addr = 0x%08lX\n", addr);
+ image_load_addr = addr;
+ }
} else if (strcmp(argv[0],"loadx")==0) {
printf("## Ready for binary (xmodem) download "
"to 0x%08lX at %d bps...\n",
@@ -482,6 +490,14 @@
addr = load_serial_ymodem(offset, xyzModem_xmodem);
+ if (addr == ~0) {
+ image_load_addr = 0;
+ printf("## Binary (xmodem) download aborted\n");
+ rcode = 1;
+ } else {
+ printf("## Start Addr = 0x%08lX\n", addr);
+ image_load_addr = addr;
+ }
} else {
printf("## Ready for binary (kermit) download "
@@ -535,6 +551,9 @@
udelay(1000);
}
+ if (size == 0)
+ return ~0; /* Download aborted */
+
flush_cache(offset, size);
printf("## Total Size = 0x%08x = %d Bytes\n", size, size);
@@ -975,6 +994,7 @@
res = xyzModem_stream_open(&info, &err);
if (!res) {
+ err = 0;
while ((res =
xyzModem_stream_read(ymodemBuf, 1024, &err)) > 0) {
store_addr = addr + offset;
@@ -987,6 +1007,9 @@
rc = flash_write((char *) ymodemBuf,
store_addr, res);
if (rc != 0) {
+ xyzModem_stream_terminate(true, &getcxmodem);
+ xyzModem_stream_close(&err);
+ printf("\n");
flash_perror(rc);
return (~0);
}
@@ -998,16 +1021,24 @@
}
}
+ if (err) {
+ xyzModem_stream_terminate((err == xyzModem_cancel) ? false : true, &getcxmodem);
+ xyzModem_stream_close(&err);
+ printf("\n%s\n", xyzModem_error(err));
+ return (~0); /* Download aborted */
+ }
+
if (IS_ENABLED(CONFIG_CMD_BOOTEFI))
efi_set_bootdev("Uart", "", "",
map_sysmem(offset, 0), size);
} else {
- printf("%s\n", xyzModem_error(err));
+ printf("\n%s\n", xyzModem_error(err));
+ return (~0); /* Download aborted */
}
- xyzModem_stream_close(&err);
xyzModem_stream_terminate(false, &getcxmodem);
+ xyzModem_stream_close(&err);
flush_cache(offset, ALIGN(size, ARCH_DMA_MINALIGN));
diff --git a/cmd/mvebu/Kconfig b/cmd/mvebu/Kconfig
index 340fb3a..ac8b0af 100644
--- a/cmd/mvebu/Kconfig
+++ b/cmd/mvebu/Kconfig
@@ -3,7 +3,6 @@
config CMD_MVEBU_BUBT
bool "bubt"
- default n
select SHA256 if ARMADA_3700
help
bubt - Burn a u-boot image to flash
diff --git a/cmd/qfw.c b/cmd/qfw.c
index eb6a552..d586150 100644
--- a/cmd/qfw.c
+++ b/cmd/qfw.c
@@ -121,11 +121,7 @@
env = env_get("loadaddr");
load_addr = env ?
(void *)hextoul(env, NULL) :
-#ifdef CONFIG_LOADADDR
- (void *)CONFIG_LOADADDR;
-#else
- NULL;
-#endif
+ (void *)CONFIG_SYS_LOAD_ADDR;
env = env_get("ramdiskaddr");
initrd_addr = env ?
diff --git a/cmd/spl.c b/cmd/spl.c
index 472703f..8a2ded7 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -32,11 +32,7 @@
NULL,
},
[SPL_EXPORT_ATAGS] = (const char * []) {
-#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
- defined(CONFIG_CMDLINE_TAG) || \
- defined(CONFIG_INITRD_TAG) || \
- defined(CONFIG_SERIAL_TAG) || \
- defined(CONFIG_REVISION_TAG)
+#ifdef CONFIG_SUPPORT_PASSING_ATAGS
"start",
"loados",
#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
diff --git a/cmd/version.c b/cmd/version.c
index 685b458..f83f6af 100644
--- a/cmd/version.c
+++ b/cmd/version.c
@@ -6,13 +6,18 @@
#include <common.h>
#include <command.h>
+#include <timestamp.h>
#include <version.h>
+#include <version_string.h>
#include <linux/compiler.h>
#ifdef CONFIG_SYS_COREBOOT
#include <asm/cb_sysinfo.h>
#endif
-const char __weak version_string[] = U_BOOT_VERSION_STRING;
+#define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \
+ U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING
+
+const char version_string[] = U_BOOT_VERSION_STRING;
static int do_version(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/common/Kconfig b/common/Kconfig
index ee14d3a..0543b83 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -548,6 +548,12 @@
help
Enabling this option calls 'misc_init_r' function
+config ID_EEPROM
+ bool "Enable I2C connected system identifier EEPROM"
+ help
+ A number of different systems and vendors enable a vendor-specified
+ EEPROM that contains various identifying features.
+
config PCI_INIT_R
bool "Enumerate PCI buses during init"
depends on PCI
@@ -627,7 +633,6 @@
config STACKPROTECTOR
bool "Stack Protector buffer overflow detection"
- default n
help
Enable stack smash detection through compiler's stack-protector
canary logic
@@ -635,12 +640,10 @@
config SPL_STACKPROTECTOR
bool "Stack Protector buffer overflow detection for SPL"
depends on STACKPROTECTOR && SPL
- default n
config TPL_STACKPROTECTOR
bool "Stack Protector buffer overflow detection for TPL"
depends on STACKPROTECTOR && TPL
- default n
endmenu
@@ -648,7 +651,6 @@
config UPDATE_COMMON
bool
- default n
select DFU_WRITE_ALT
config UPDATE_TFTP
@@ -680,7 +682,6 @@
config ANDROID_AB
bool "Android A/B updates"
- default n
help
If enabled, adds support for the new Android A/B update model. This
allows the bootloader to select which slot to boot from based on the
diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index 902a5b8..f23b998 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -80,7 +80,6 @@
config FIT_RSASSA_PSS
bool "Support rsassa-pss signature scheme of FIT image contents"
depends on FIT_SIGNATURE
- default n
help
Enable this to support the pss padding algorithm as described
in the rfc8017 (https://tools.ietf.org/html/rfc8017).
@@ -373,6 +372,26 @@
distinguishing between booting Chrome OS in a basic way (developer
mode) and a full boot.
+config RAMBOOT_PBL
+ bool "Freescale PBL(pre-boot loader) image format support"
+ help
+ Some SoCs use PBL to load RCW and/or pre-initialization instructions.
+ For more details refer to doc/README.pblimage
+
+config SYS_FSL_PBL_PBI
+ string "PBI(pre-boot instructions) commands for the PBL image"
+ depends on RAMBOOT_PBL
+ help
+ PBI commands can be used to configure SoC before it starts the execution.
+ Please refer doc/README.pblimage for more details.
+
+config SYS_FSL_PBL_RCW
+ string "Aadditional RCW (Power on reset configuration) for the PBL image"
+ depends on RAMBOOT_PBL
+ help
+ Enables addition of RCW (Power on reset configuration) in built image.
+ Please refer doc/README.pblimage for more details.
+
endmenu # Boot images
menu "Boot timing"
@@ -682,7 +701,6 @@
config NAND_BOOT
bool "Support for booting from NAND flash"
- default n
imply MTD_RAW_NAND
help
Enabling this will make a U-Boot binary that is capable of being
@@ -691,7 +709,6 @@
config ONENAND_BOOT
bool "Support for booting from ONENAND"
- default n
imply MTD_RAW_NAND
help
Enabling this will make a U-Boot binary that is capable of being
@@ -700,7 +717,6 @@
config QSPI_BOOT
bool "Support for booting from QSPI flash"
- default n
help
Enabling this will make a U-Boot binary that is capable of being
booted via QSPI flash. This is not a must, some SoCs need this,
@@ -708,7 +724,6 @@
config SATA_BOOT
bool "Support for booting from SATA"
- default n
help
Enabling this will make a U-Boot binary that is capable of being
booted via SATA. This is not a must, some SoCs need this,
@@ -716,7 +731,6 @@
config SD_BOOT
bool "Support for booting from SD/EMMC"
- default n
help
Enabling this will make a U-Boot binary that is capable of being
booted via SD/EMMC. This is not a must, some SoCs need this,
@@ -724,7 +738,6 @@
config SPI_BOOT
bool "Support for booting from SPI flash"
- default n
help
Enabling this will make a U-Boot binary that is capable of being
booted via SPI flash. This is not a must, some SoCs need this,
@@ -758,7 +771,6 @@
config AUTOBOOT_KEYED
bool "Stop autobooting via specific input key / string"
- default n
help
This option enables stopping (aborting) of the automatic
boot feature only by issuing a specific input key or
@@ -845,7 +857,6 @@
config AUTOBOOT_KEYED_CTRLC
bool "Enable Ctrl-C autoboot interruption"
depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
- default n
help
This option allows for the boot sequence to be interrupted
by ctrl-c, in addition to the "bootdelaykey" and "bootstopkey".
diff --git a/common/Makefile b/common/Makefile
index ae0430c..fb8173a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -66,7 +66,7 @@
obj-$(CONFIG_DFU_OVER_USB) += dfu.o
endif
obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
-obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o
+obj-$(CONFIG_SPL_NET) += miiphyutil.o
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
ifdef CONFIG_SPL_USB_HOST
@@ -85,9 +85,9 @@
obj-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_TPL_BUILD
-obj-$(CONFIG_TPL_SERIAL_SUPPORT) += console.o
+obj-$(CONFIG_TPL_SERIAL) += console.o
else
-obj-$(CONFIG_SPL_SERIAL_SUPPORT) += console.o
+obj-$(CONFIG_SPL_SERIAL) += console.o
endif
else
obj-y += console.o
diff --git a/common/autoboot.c b/common/autoboot.c
index 5bb2e19..6251c68 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -24,6 +24,7 @@
#include <u-boot/sha256.h>
#include <bootcount.h>
#include <crypt.h>
+#include <dm/ofnode.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -424,12 +425,12 @@
ulong addr;
/* Add an env variable to point to a kernel payload, if available */
- addr = fdtdec_get_config_int(gd->fdt_blob, "kernel-offset", 0);
+ addr = ofnode_conf_read_int("kernel-offset", 0);
if (addr)
env_set_addr("kernaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
/* Add an env variable to point to a root disk, if available */
- addr = fdtdec_get_config_int(gd->fdt_blob, "rootdisk-offset", 0);
+ addr = ofnode_conf_read_int("rootdisk-offset", 0);
if (addr)
env_set_addr("rootaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
#endif /* CONFIG_SYS_TEXT_BASE */
@@ -446,8 +447,7 @@
bootdelay = s ? (int)simple_strtol(s, NULL, 10) : CONFIG_BOOTDELAY;
if (IS_ENABLED(CONFIG_OF_CONTROL))
- bootdelay = fdtdec_get_config_int(gd->fdt_blob, "bootdelay",
- bootdelay);
+ bootdelay = ofnode_conf_read_int("bootdelay", bootdelay);
debug("### main_loop entered: bootdelay=%d\n\n", bootdelay);
diff --git a/common/board_f.c b/common/board_f.c
index f274653..3dc0eaa 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -244,7 +244,7 @@
return 0;
}
-#if defined(CONFIG_SYS_I2C_LEGACY)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
static int init_func_i2c(void)
{
puts("I2C: ");
@@ -871,7 +871,7 @@
misc_init_f,
#endif
INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_SYS_I2C_LEGACY)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
init_func_i2c,
#endif
#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
diff --git a/common/board_r.c b/common/board_r.c
index 630c245..31a59c5 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -67,6 +67,7 @@
#endif
#include <asm/sections.h>
#include <dm/root.h>
+#include <dm/ofnode.h>
#include <linux/compiler.h>
#include <linux/err.h>
#include <efi_loader.h>
@@ -448,8 +449,7 @@
static int should_load_env(void)
{
if (IS_ENABLED(CONFIG_OF_CONTROL))
- return fdtdec_get_config_int(gd->fdt_blob,
- "load-environment", 1);
+ return ofnode_conf_read_int("load-environment", 1);
if (IS_ENABLED(CONFIG_DELAY_ENVIRONMENT))
return 0;
@@ -720,7 +720,7 @@
#endif
INIT_FUNC_WATCHDOG_RESET
cpu_secondary_init_r,
-#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
+#if defined(CONFIG_ID_EEPROM)
mac_read_from_eeprom,
#endif
INIT_FUNC_WATCHDOG_RESET
diff --git a/common/cli.c b/common/cli.c
index 048eacb..d86046a 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -19,8 +19,7 @@
#include <hang.h>
#include <malloc.h>
#include <asm/global_data.h>
-
-DECLARE_GLOBAL_DATA_PTR;
+#include <dm/ofnode.h>
#ifdef CONFIG_CMDLINE
/*
@@ -157,7 +156,7 @@
bool cli_process_fdt(const char **cmdp)
{
/* Allow the fdt to override the boot command */
- char *env = fdtdec_get_config_string(gd->fdt_blob, "bootcmd");
+ const char *env = ofnode_conf_read_str("bootcmd");
if (env)
*cmdp = env;
/*
@@ -165,7 +164,7 @@
* Always use 'env' in this case, since bootsecure requres that the
* bootcmd was specified in the FDT too.
*/
- return fdtdec_get_config_int(gd->fdt_blob, "bootsecure", 0) != 0;
+ return ofnode_conf_read_int("bootsecure", 0);
}
/*
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 9441e63..b698e96 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -628,7 +628,7 @@
if (!ft_verify_fdt(blob))
goto err;
-#if defined(CONFIG_SOC_KEYSTONE)
+#if defined(CONFIG_ARCH_KEYSTONE)
if (IMAGE_OF_BOARD_SETUP)
ft_board_setup_ex(blob, gd->bd);
#endif
diff --git a/common/image-fit.c b/common/image-fit.c
index f02d437..5a0a0cc 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -25,6 +25,10 @@
#include <asm/io.h>
#include <malloc.h>
#include <asm/global_data.h>
+#ifdef CONFIG_DM_HASH
+#include <dm.h>
+#include <u-boot/hash.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
#endif /* !USE_HOSTCC*/
@@ -1214,6 +1218,31 @@
int calculate_hash(const void *data, int data_len, const char *name,
uint8_t *value, int *value_len)
{
+#if !defined(USE_HOSTCC) && defined(CONFIG_DM_HASH)
+ int rc;
+ enum HASH_ALGO hash_algo;
+ struct udevice *dev;
+
+ rc = uclass_get_device(UCLASS_HASH, 0, &dev);
+ if (rc) {
+ debug("failed to get hash device, rc=%d\n", rc);
+ return -1;
+ }
+
+ hash_algo = hash_algo_lookup_by_name(algo);
+ if (hash_algo == HASH_ALGO_INVALID) {
+ debug("Unsupported hash algorithm\n");
+ return -1;
+ };
+
+ rc = hash_digest_wd(dev, hash_algo, data, data_len, value, CHUNKSZ);
+ if (rc) {
+ debug("failed to get hash value, rc=%d\n", rc);
+ return -1;
+ }
+
+ *value_len = hash_algo_digest_size(hash_algo);
+#else
struct hash_algo *algo;
int ret;
@@ -1225,6 +1254,7 @@
algo->hash_func_ws(data, data_len, value, algo->chunk_size);
*value_len = algo->digest_size;
+#endif
return 0;
}
diff --git a/common/image.c b/common/image.c
index 59c52a1..e199d61 100644
--- a/common/image.c
+++ b/common/image.c
@@ -216,6 +216,8 @@
{ IH_COMP_GZIP, "gzip", {0x1f, 0x8b},},
{ IH_COMP_LZMA, "lzma", {0x5d, 0x00},},
{ IH_COMP_LZO, "lzo", {0x89, 0x4c},},
+ { IH_COMP_LZ4, "lz4", {0x04, 0x22},},
+ { IH_COMP_ZSTD, "zstd", {0x28, 0xb5},},
{ IH_COMP_NONE, "none", {}, },
};
diff --git a/common/main.c b/common/main.c
index ae5bcdb..3f5214f 100644
--- a/common/main.c
+++ b/common/main.c
@@ -15,7 +15,7 @@
#include <env.h>
#include <init.h>
#include <net.h>
-#include <version.h>
+#include <version_string.h>
#include <efi_loader.h>
static void run_preboot_environment_command(void)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 29a46c4..34f6fc2 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -196,7 +196,7 @@
config SPL_RAW_IMAGE_SUPPORT
bool "Support SPL loading and booting of RAW images"
- default n if (ARCH_MX6 && (SPL_MMC_SUPPORT || SPL_SATA_SUPPORT))
+ default n if (ARCH_MX6 && (SPL_MMC || SPL_SATA))
default y if !TI_SECURE_DEVICE
help
SPL will support loading and booting a RAW image when this option
@@ -453,7 +453,7 @@
ensure this information is available to the next image
invoked).
-config SPL_CACHE_SUPPORT
+config SPL_CACHE
bool "Support CACHE drivers"
help
Enable CACHE drivers in SPL. These drivers can keep data so that
@@ -522,12 +522,13 @@
config SPL_ETH
bool "Support Ethernet"
depends on SPL_ENV_SUPPORT
+ depends on SPL_NET
help
Enable access to the network subsystem and associated Ethernet
drivers in SPL. This permits SPL to load U-Boot over an Ethernet
link rather than from an on-board peripheral. Environment support
is required since the network stack uses a number of environment
- variables. See also SPL_NET_SUPPORT.
+ variables. See also SPL_NET.
config SPL_FS_EXT4
bool "Support EXT filesystems"
@@ -637,7 +638,7 @@
this option to build the drivers in drivers/mailbox as part of
SPL build.
-config SPL_MMC_SUPPORT
+config SPL_MMC
bool "Support MMC"
depends on MMC
select HAVE_BLOCK_DEVICE
@@ -658,8 +659,7 @@
config SPL_MMC_TINY
bool "Tiny MMC framework in SPL"
- depends on SPL_MMC_SUPPORT
- default n
+ depends on SPL_MMC
help
Enable MMC framework tinification support. This option is useful if
if your SPL is extremely size constrained. Heed the warning, enable
@@ -675,13 +675,12 @@
config SPL_MMC_WRITE
bool "MMC/SD/SDIO card support for write operations in SPL"
- depends on SPL_MMC_SUPPORT
- default n
+ depends on SPL_MMC
help
Enable write access to MMC and SD Cards in SPL
-config SPL_MPC8XXX_INIT_DDR_SUPPORT
+config SPL_MPC8XXX_INIT_DDR
bool "Support MPC8XXX DDR init"
help
Enable support for DDR-SDRAM (double-data-rate synchronous dynamic
@@ -747,12 +746,6 @@
README.ubispl for more info.
if SPL_DM
-config SPL_CACHE
- depends on CACHE
- bool "Support cache drivers in SPL"
- help
- Enable support for cache drivers in SPL.
-
config SPL_DM_SPI
bool "Support SPI DM drivers in SPL"
help
@@ -849,14 +842,13 @@
config UBI_SPL_SILENCE_MSG
bool "silence UBI SPL messages"
- default n
help
Disable messages from UBI SPL. This leaves warnings
and errors enabled.
endif # if SPL_UBI
-config SPL_NET_SUPPORT
+config SPL_NET
bool "Support networking"
help
Enable support for network devices (such as Ethernet) in SPL.
@@ -865,7 +857,7 @@
the network stack uses a number of environment variables. See also
SPL_ETH.
-if SPL_NET_SUPPORT
+if SPL_NET
config SPL_NET_VCI_STRING
string "BOOTP Vendor Class Identifier string sent by SPL"
help
@@ -874,7 +866,7 @@
of a client. This is often used in practice to allow for the DHCP
server to specify different files to load depending on if the ROM,
SPL or U-Boot itself makes the request
-endif # if SPL_NET_SUPPORT
+endif # if SPL_NET
config SPL_NO_CPU_SUPPORT
bool "Drop CPU code in SPL"
@@ -912,7 +904,6 @@
config SPL_OS_BOOT
bool "Activate Falcon Mode"
depends on !TI_SECURE_DEVICE
- default n
help
Enable booting directly to an OS from SPL.
for more info read doc/README.falcon
@@ -945,7 +936,7 @@
necessary driver support. This enables the drivers in drivers/pci
as part of an SPL build.
-config SPL_PCH_SUPPORT
+config SPL_PCH
bool "Support PCH drivers"
help
Enable support for PCH (Platform Controller Hub) devices in SPL.
@@ -985,6 +976,7 @@
config SPL_POWER_DOMAIN
bool "Support power domain drivers"
+ select SPL_POWER
help
Enable support for power domain control in SPL. Many SoCs allow
power to be applied to or removed from portions of the SoC (power
@@ -1014,7 +1006,7 @@
Enable support for REMOTEPROCs in SPL. This permits to load
a remote processor firmware in SPL.
-config SPL_RTC_SUPPORT
+config SPL_RTC
bool "Support RTC drivers"
help
Enable RTC (Real-time Clock) support in SPL. This includes support
@@ -1023,7 +1015,7 @@
needed. This enables the drivers in drivers/rtc as part of an SPL
build.
-config SPL_SATA_SUPPORT
+config SPL_SATA
bool "Support loading from SATA"
help
Enable support for SATA (Serial AT attachment) in SPL. This allows
@@ -1035,7 +1027,7 @@
config SPL_SATA_RAW_U_BOOT_USE_SECTOR
bool "SATA raw mode: by sector"
- depends on SPL_SATA_SUPPORT
+ depends on SPL_SATA
default y if ARCH_MVEBU
help
Use sector number for specifying U-Boot location on SATA disk in
@@ -1049,7 +1041,7 @@
Sector on the SATA disk to load U-Boot from, when the SATA disk is being
used in raw mode. Units: SATA disk sectors (1 sector = 512 bytes).
-config SPL_SERIAL_SUPPORT
+config SPL_SERIAL
bool "Support serial"
select SPL_PRINTF
select SPL_STRTO
@@ -1060,7 +1052,7 @@
unless there are space reasons not to. Even then, consider
enabling SPL_USE_TINY_PRINTF which is a small printf() version.
-config SPL_SPI_SUPPORT
+config SPL_SPI
bool "Support SPI drivers"
help
Enable support for using SPI in SPL. This is used for connecting
@@ -1072,14 +1064,14 @@
config SPL_SPI_FLASH_SUPPORT
bool "Support SPI flash drivers"
- depends on SPL_SPI_SUPPORT
+ depends on SPL_SPI
help
Enable support for using SPI flash in SPL, and loading U-Boot from
SPI flash. SPI flash (Serial Peripheral Bus flash) is named after
the SPI bus that is used to connect it to a system. It is a simple
but fast bidirectional 4-wire bus (clock, chip select and two data
lines). This enables the drivers in drivers/mtd/spi as part of an
- SPL build. This normally requires SPL_SPI_SUPPORT.
+ SPL build. This normally requires SPL_SPI.
if SPL_SPI_FLASH_SUPPORT
@@ -1162,13 +1154,14 @@
config SPL_USB_ETHER
bool "Support USB Ethernet drivers"
+ depends on SPL_NET
help
Enable access to the USB network subsystem and associated
drivers in SPL. This permits SPL to load U-Boot over a
USB-connected Ethernet link (such as a USB Ethernet dongle) rather
than from an onboard peripheral. Environment support is required
since the network stack uses a number of environment variables.
- See also SPL_NET_SUPPORT and SPL_ETH.
+ See also SPL_NET and SPL_ETH.
config SPL_DFU
bool "Support DFU (Device Firmware Upgrade)"
@@ -1199,7 +1192,7 @@
config SPL_USB_SDP_SUPPORT
bool "Support SDP (Serial Download Protocol)"
- depends on SPL_SERIAL_SUPPORT
+ depends on SPL_SERIAL
help
Enable Serial Download Protocol (SDP) device support in SPL. This
allows to download images into memory and execute (jump to) them
@@ -1225,7 +1218,7 @@
config SPL_YMODEM_SUPPORT
bool "Support loading using Ymodem"
- depends on SPL_SERIAL_SUPPORT
+ depends on SPL_SERIAL
help
While loading from serial is slow it can be a useful backup when
there is no other option. The Ymodem protocol provides a reliable
@@ -1359,7 +1352,6 @@
config TPL_NEEDS_SEPARATE_TEXT_BASE
bool "TPL needs a separate text-base"
- default n
depends on TPL
help
Enable, if the TPL stage should not inherit its text-base
@@ -1368,12 +1360,23 @@
config TPL_NEEDS_SEPARATE_STACK
bool "TPL needs a separate initial stack-pointer"
- default n
depends on TPL
help
Enable, if the TPL stage should not inherit its initial
stack-pointer from the settings for the SPL stage.
+config TPL_POWER
+ bool "Support power drivers"
+ help
+ Enable support for power control in TPL. This includes support
+ for PMICs (Power-management Integrated Circuits) and some of the
+ features provided by PMICs. In particular, voltage regulators can
+ be used to enable/disable power and vary its voltage. That can be
+ useful in TPL to turn on boot peripherals and adjust CPU voltage
+ so that the clock speed can be increased. This enables the drivers
+ in drivers/power, drivers/power/pmic and drivers/power/regulator
+ as part of an TPL build.
+
config TPL_TEXT_BASE
hex "Base address for the .text section of the TPL stage"
depends on TPL_NEEDS_SEPARATE_TEXT_BASE
@@ -1458,17 +1461,17 @@
Enable support for generic U-Boot libraries within TPL. See
SPL_LIBGENERIC_SUPPORT for details.
-config TPL_MPC8XXX_INIT_DDR_SUPPORT
+config TPL_MPC8XXX_INIT_DDR
bool "Support MPC8XXX DDR init"
help
Enable support for DDR-SDRAM on the MPC8XXX family within TPL. See
- SPL_MPC8XXX_INIT_DDR_SUPPORT for details.
+ SPL_MPC8XXX_INIT_DDR for details.
-config TPL_MMC_SUPPORT
+config TPL_MMC
bool "Support MMC"
depends on MMC
help
- Enable support for MMC within TPL. See SPL_MMC_SUPPORT for details.
+ Enable support for MMC within TPL. See SPL_MMC for details.
config TPL_NAND_SUPPORT
bool "Support NAND flash"
@@ -1483,7 +1486,7 @@
necessary driver support. This enables the drivers in drivers/pci
as part of a TPL build.
-config TPL_PCH_SUPPORT
+config TPL_PCH
bool "Support PCH drivers"
help
Enable support for PCH (Platform Controller Hub) devices in TPL.
@@ -1505,7 +1508,7 @@
be already in memory when TPL takes over, e.g. loaded by the boot
ROM.
-config TPL_RTC_SUPPORT
+config TPL_RTC
bool "Support RTC drivers"
help
Enable RTC (Real-time Clock) support in TPL. This includes support
@@ -1514,12 +1517,12 @@
needed. This enables the drivers in drivers/rtc as part of an TPL
build.
-config TPL_SERIAL_SUPPORT
+config TPL_SERIAL
bool "Support serial"
select TPL_PRINTF
select TPL_STRTO
help
- Enable support for serial in TPL. See SPL_SERIAL_SUPPORT for
+ Enable support for serial in TPL. See SPL_SERIAL for
details.
config TPL_SPI_FLASH_SUPPORT
@@ -1545,10 +1548,10 @@
Enable support for loading next stage, U-Boot or otherwise, from
SPI NOR in U-Boot TPL.
-config TPL_SPI_SUPPORT
+config TPL_SPI
bool "Support SPI drivers"
help
- Enable support for using SPI in TPL. See SPL_SPI_SUPPORT for
+ Enable support for using SPI in TPL. See SPL_SPI for
details.
config TPL_DM_SPI
@@ -1563,7 +1566,7 @@
config TPL_YMODEM_SUPPORT
bool "Support loading using Ymodem"
- depends on TPL_SERIAL_SUPPORT
+ depends on TPL_SERIAL
help
While loading from serial is slow it can be a useful backup when
there is no other option. The Ymodem protocol provides a reliable
@@ -1575,7 +1578,6 @@
config SPL_AT91_MCK_BYPASS
bool "Use external clock signal as a source of main clock for AT91 platforms"
depends on ARCH_AT91
- default n
help
Use external 8 to 24 Mhz clock signal as source of main clock instead
of an external crystal oscillator.
diff --git a/common/spl/Makefile b/common/spl/Makefile
index c576a78..cb15c8e 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -19,15 +19,15 @@
obj-$(CONFIG_$(SPL_TPL_)ONENAND_SUPPORT) += spl_onenand.o
endif
obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
-obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
-obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
+obj-$(CONFIG_$(SPL_TPL_)NET) += spl_net.o
+obj-$(CONFIG_$(SPL_TPL_)MMC) += spl_mmc.o
obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
obj-$(CONFIG_$(SPL_TPL_)OPENSBI) += spl_opensbi.o
obj-$(CONFIG_$(SPL_TPL_)USB_STORAGE) += spl_usb.o
obj-$(CONFIG_$(SPL_TPL_)FS_FAT) += spl_fat.o
obj-$(CONFIG_$(SPL_TPL_)FS_EXT4) += spl_ext.o
-obj-$(CONFIG_$(SPL_TPL_)SATA_SUPPORT) += spl_sata.o
+obj-$(CONFIG_$(SPL_TPL_)SATA) += spl_sata.o
obj-$(CONFIG_$(SPL_TPL_)DFU) += spl_dfu.o
obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o
obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o
diff --git a/common/spl/spl.c b/common/spl/spl.c
index d55d3c2..ed94d51 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -24,6 +24,9 @@
#include <nand.h>
#include <fat.h>
#include <u-boot/crc.h>
+#if CONFIG_IS_ENABLED(BANNER_PRINT)
+#include <timestamp.h>
+#endif
#include <version.h>
#include <image.h>
#include <malloc.h>
@@ -486,7 +489,7 @@
return ret;
}
#endif
- if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
ret = fdtdec_setup();
if (ret) {
debug("fdtdec_setup() returned error %d\n", ret);
@@ -623,7 +626,7 @@
if (CONFIG_IS_ENABLED(SHOW_ERRORS))
ret = -ENXIO;
loader = spl_ll_find_loader(bootdev);
- if (CONFIG_IS_ENABLED(SERIAL_SUPPORT) &&
+ if (CONFIG_IS_ENABLED(SERIAL) &&
CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT) &&
!IS_ENABLED(CONFIG_SILENT_CONSOLE)) {
if (loader)
@@ -821,7 +824,7 @@
*/
void preloader_console_init(void)
{
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
+#ifdef CONFIG_SPL_SERIAL
gd->baudrate = CONFIG_BAUDRATE;
serial_init(); /* serial communications setup */
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 9884e7c..46ee405 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -16,8 +16,7 @@
#include <errno.h>
#include <spl.h>
#include <asm/global_data.h>
-
-DECLARE_GLOBAL_DATA_PTR;
+#include <dm/ofnode.h>
#ifdef CONFIG_SPL_OS_BOOT
/*
@@ -103,11 +102,10 @@
header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
- payload_offs = fdtdec_get_config_int(gd->fdt_blob,
- "u-boot,spl-payload-offset",
- payload_offs);
-#endif
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ payload_offs = ofnode_conf_read_int("u-boot,spl-payload-offset",
+ payload_offs);
+ }
#ifdef CONFIG_SPL_OS_BOOT
if (spl_start_uboot() || spi_load_image_os(spl_image, flash, header))
diff --git a/common/stdio.c b/common/stdio.c
index 4083e4e..0f2eb6f 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -336,7 +336,7 @@
dev->name);
}
}
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
i2c_init_all();
#endif
if (IS_ENABLED(CONFIG_DM_VIDEO)) {
diff --git a/common/xyzModem.c b/common/xyzModem.c
index fc3459e..ece25ac 100644
--- a/common/xyzModem.c
+++ b/common/xyzModem.c
@@ -32,6 +32,7 @@
/* Values magic to the protocol */
#define SOH 0x01
#define STX 0x02
+#define ETX 0x03 /* ^C for interrupt */
#define EOT 0x04
#define ACK 0x06
#define BSP 0x08
@@ -283,6 +284,7 @@
hdr_found = true;
break;
case CAN:
+ case ETX:
xyz.total_CAN++;
ZM_DEBUG (zm_dump (__LINE__));
if (++can_total == xyzModem_CAN_COUNT)
@@ -494,7 +496,7 @@
total = 0;
stat = xyzModem_cancel;
/* Try and get 'size' bytes into the buffer */
- while (!xyz.at_eof && (size > 0))
+ while (!xyz.at_eof && xyz.len >= 0 && (size > 0))
{
if (xyz.len == 0)
{
@@ -572,6 +574,8 @@
CYGACC_COMM_IF_PUTC (*xyz.__chan, ACK);
ZM_DEBUG (zm_dprintf ("FINAL ACK (%d)\n", __LINE__));
}
+ else
+ stat = 0;
xyz.at_eof = true;
break;
}
@@ -587,7 +591,7 @@
}
}
/* Don't "read" data from the EOF protocol package */
- if (!xyz.at_eof)
+ if (!xyz.at_eof && xyz.len > 0)
{
len = xyz.len;
if (size < len)
@@ -606,10 +610,10 @@
void
xyzModem_stream_close (int *err)
{
- diag_printf
+ ZM_DEBUG (zm_dprintf
("xyzModem - %s mode, %d(SOH)/%d(STX)/%d(CAN) packets, %d retries\n",
xyz.crc_mode ? "CRC" : "Cksum", xyz.total_SOH, xyz.total_STX,
- xyz.total_CAN, xyz.total_retries);
+ xyz.total_CAN, xyz.total_retries));
ZM_DEBUG (zm_flush ());
}
diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig
index 31630fe..1ebbcc5 100644
--- a/configs/10m50_defconfig
+++ b/configs/10m50_defconfig
@@ -3,8 +3,10 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="10m50_devboard"
+CONFIG_SYS_LOAD_ADDR=0xcc000000
CONFIG_FIT=y
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig
index 61a242e..edbc8ab 100644
--- a/configs/3c120_defconfig
+++ b/configs/3c120_defconfig
@@ -3,8 +3,10 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
+CONFIG_SYS_LOAD_ADDR=0xd4000000
CONFIG_FIT=y
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig
index caa0bbf..90f1230 100644
--- a/configs/A10-OLinuXino-Lime_defconfig
+++ b/configs/A10-OLinuXino-Lime_defconfig
@@ -13,6 +13,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig
index aea7e9b..99f5785 100644
--- a/configs/A10s-OLinuXino-M_defconfig
+++ b/configs/A10s-OLinuXino-M_defconfig
@@ -10,6 +10,9 @@
CONFIG_USB1_VBUS_PIN="PB10"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_AXP152_POWER=y
diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig
index 568f64e..f9d17b1 100644
--- a/configs/A13-OLinuXinoM_defconfig
+++ b/configs/A13-OLinuXinoM_defconfig
@@ -13,6 +13,9 @@
CONFIG_VIDEO_LCD_POWER="PB10"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_SUNXI_NO_PMIC=y
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index a26064c..8c90435 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -20,6 +20,9 @@
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_DFU_RAM=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_AXP_ALDO3_VOLT=3300
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
index 3936da1..918fc64 100644
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -19,6 +19,9 @@
CONFIG_SCSI_AHCI=y
CONFIG_DFU_RAM=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_PHY_REALTEK=y
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index a8200da..903e3fd 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -17,6 +17,9 @@
CONFIG_SCSI_AHCI=y
CONFIG_DFU_RAM=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index c949922..c060506 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -11,6 +11,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
index 9679f44..cf3fc68 100644
--- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig
+++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
@@ -13,6 +13,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index 9c8eae1..81c2743 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -14,6 +14,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index a3a701e..ececdac 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -15,6 +15,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
index 6f2ab1b..829e7bb 100644
--- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
+++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig
index e2388b7..5b96ddc 100644
--- a/configs/A20-Olimex-SOM204-EVB_defconfig
+++ b/configs/A20-Olimex-SOM204-EVB_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig
index 7952200..9a18af8 100644
--- a/configs/Ainol_AW1_defconfig
+++ b/configs/Ainol_AW1_defconfig
@@ -15,4 +15,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig
index 638411e..7bf3dfc 100644
--- a/configs/Ampe_A76_defconfig
+++ b/configs/Ampe_A76_defconfig
@@ -16,5 +16,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig
index 1ac80a1..7d81f12 100644
--- a/configs/Auxtek-T003_defconfig
+++ b/configs/Auxtek-T003_defconfig
@@ -9,6 +9,9 @@
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_AXP152_POWER=y
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig
index d1a1de7..4c7154b 100644
--- a/configs/Auxtek-T004_defconfig
+++ b/configs/Auxtek-T004_defconfig
@@ -7,6 +7,9 @@
CONFIG_USB1_VBUS_PIN="PG13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_AXP152_POWER=y
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
index 4073b4d..a24c600 100644
--- a/configs/Bananapi_M2_Ultra_defconfig
+++ b/configs/Bananapi_M2_Ultra_defconfig
@@ -13,6 +13,10 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_RGMII=y
CONFIG_SUN8I_EMAC=y
CONFIG_AXP_DLDO4_VOLT=2500
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index 41d356b..7f59fc9 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -12,6 +12,9 @@
CONFIG_SPL_I2C=y
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
index ad75ac4..e075635 100644
--- a/configs/Bananapro_defconfig
+++ b/configs/Bananapro_defconfig
@@ -14,6 +14,9 @@
CONFIG_SPL_I2C=y
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig
index 5347d32..cd9bdbf 100644
--- a/configs/CHIP_defconfig
+++ b/configs/CHIP_defconfig
@@ -10,6 +10,9 @@
CONFIG_SPL_I2C=y
CONFIG_CMD_DFU=y
CONFIG_DFU_RAM=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_MMC is not set
CONFIG_AXP_ALDO3_VOLT=3300
CONFIG_AXP_ALDO4_VOLT=3300
diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index d013081..34f609a 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -13,6 +13,9 @@
CONFIG_ENV_IS_IN_UBI=y
CONFIG_ENV_UBI_PART="UBI"
CONFIG_ENV_UBI_VOLUME="uboot-env"
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig
index 4ac95a6..02b3e69 100644
--- a/configs/Chuwi_V7_CW0825_defconfig
+++ b/configs/Chuwi_V7_CW0825_defconfig
@@ -15,6 +15,9 @@
CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
CONFIG_VIDEO_LCD_SPI_CS="PA0"
CONFIG_VIDEO_LCD_SPI_SCLK="PA1"
diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig
index a6b3bd4..31541f8 100644
--- a/configs/Colombus_defconfig
+++ b/configs/Colombus_defconfig
@@ -17,6 +17,14 @@
CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24"
CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SPEED=50000
+CONFIG_SYS_I2C_SOFT_SLAVE=0x00
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
index d4fc7a5..b06a3ae 100644
--- a/configs/Cubieboard2_defconfig
+++ b/configs/Cubieboard2_defconfig
@@ -10,6 +10,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
index 2a22bc0..93a7932 100644
--- a/configs/Cubieboard_defconfig
+++ b/configs/Cubieboard_defconfig
@@ -10,6 +10,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_SCSI=y
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index 8ec2449..a4f7b87 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -19,6 +19,9 @@
CONFIG_SCSI_AHCI=y
CONFIG_DFU_RAM=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig
index 48d7f34..a4f8869 100644
--- a/configs/Cubietruck_plus_defconfig
+++ b/configs/Cubietruck_plus_defconfig
@@ -16,6 +16,11 @@
CONFIG_AXP_GPIO=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_SUN8I_EMAC=y
CONFIG_AXP_DLDO3_VOLT=2500
diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig
index 3811808..a9bbe8b 100644
--- a/configs/Empire_electronix_d709_defconfig
+++ b/configs/Empire_electronix_d709_defconfig
@@ -17,5 +17,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig
index 8482d8f..fc1f26b 100644
--- a/configs/Empire_electronix_m712_defconfig
+++ b/configs/Empire_electronix_m712_defconfig
@@ -16,5 +16,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig
index 62c0eda..482e0fb 100644
--- a/configs/Hyundai_A7HD_defconfig
+++ b/configs/Hyundai_A7HD_defconfig
@@ -16,4 +16,7 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig
index 4609347..5818442 100644
--- a/configs/Itead_Ibox_A20_defconfig
+++ b/configs/Itead_Ibox_A20_defconfig
@@ -10,6 +10,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index d949f55..6dd7b7a 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -12,6 +12,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_B53_SWITCH=y
CONFIG_B53_PHY_PORTS=0x1f
CONFIG_PHY_REALTEK=y
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index f7151fc..25cea84 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -12,6 +12,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig
index 467e517..de88dd0 100644
--- a/configs/Linksprite_pcDuino3_defconfig
+++ b/configs/Linksprite_pcDuino3_defconfig
@@ -10,6 +10,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig
index dd81e2a..49dcfa0 100644
--- a/configs/Linksprite_pcDuino_defconfig
+++ b/configs/Linksprite_pcDuino_defconfig
@@ -7,6 +7,9 @@
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig
index 3fa0f07..4d2c300 100644
--- a/configs/M5208EVBE_defconfig
+++ b/configs/M5208EVBE_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x0
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE"
CONFIG_TARGET_M5208EVBE=y
+CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
@@ -17,6 +19,11 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0x2000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x58000
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig
index 393bb49..c6d4fb1 100644
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0xFFC00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32"
CONFIG_TARGET_M5235EVB=y
+CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -22,6 +24,11 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x300
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index 59a3449..d271144 100644
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0xFFE00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="M5235EVB"
CONFIG_TARGET_M5235EVB=y
+CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
@@ -22,6 +24,11 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x300
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig
index 1535aec..2b7588c 100644
--- a/configs/M5249EVB_defconfig
+++ b/configs/M5249EVB_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0xFFE00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="M5249EVB"
CONFIG_TARGET_M5249EVB=y
+CONFIG_SYS_LOAD_ADDR=0x200000
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SYS_DEVICE_NULLDEV=y
diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig
index 7b3bf78..ff4142b 100644
--- a/configs/M5253DEMO_defconfig
+++ b/configs/M5253DEMO_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0xFF800000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="M5253DEMO"
CONFIG_TARGET_M5253DEMO=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
@@ -18,4 +20,9 @@
CONFIG_MAC_PARTITION=y
CONFIG_ENV_ADDR=0xFF804000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x280
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig
index 0a6360d..37b357d 100644
--- a/configs/M5272C3_defconfig
+++ b/configs/M5272C3_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0xFFE00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="M5272C3"
CONFIG_TARGET_M5272C3=y
+CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig
index 5547ee3..51cbd72 100644
--- a/configs/M5275EVB_defconfig
+++ b/configs/M5275EVB_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0xFFE00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="M5275EVB"
CONFIG_TARGET_M5275EVB=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
@@ -20,6 +22,11 @@
CONFIG_CMD_CACHE=y
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x300
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig
index 90a4cf8..7493727 100644
--- a/configs/M5282EVB_defconfig
+++ b/configs/M5282EVB_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0xFFE00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="M5282EVB"
CONFIG_TARGET_M5282EVB=y
+CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index 950a0fb..b4eb968 100644
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x0
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x8000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="M53017EVB"
CONFIG_TARGET_M53017EVB=y
+CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2"
@@ -19,6 +21,11 @@
CONFIG_CMD_DATE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0x40000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x58000
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig
index 078abb2..2c0ef9d 100644
--- a/configs/M5329AFEE_defconfig
+++ b/configs/M5329AFEE_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x0
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE"
CONFIG_TARGET_M5329EVB=y
+CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -20,6 +22,11 @@
CONFIG_CMD_DATE=y
CONFIG_ENV_ADDR=0x4000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x58000
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig
index 8b1325e..1ff8c87 100644
--- a/configs/M5329BFEE_defconfig
+++ b/configs/M5329BFEE_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x0
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE"
CONFIG_TARGET_M5329EVB=y
+CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -20,6 +22,11 @@
CONFIG_CMD_DATE=y
CONFIG_ENV_ADDR=0x4000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x58000
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig
index 0795578..82264cd 100644
--- a/configs/M5373EVB_defconfig
+++ b/configs/M5373EVB_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x0
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="M5373EVB"
CONFIG_TARGET_M5373EVB=y
+CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -20,6 +22,11 @@
CONFIG_CMD_DATE=y
CONFIG_ENV_ADDR=0x4000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x58000
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index 924ab16..6254655 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -40,6 +40,7 @@
CONFIG_SYS_BR7_PRELIM_BOOL=y
CONFIG_SYS_BR7_PRELIM=0x1C000001
CONFIG_SYS_OR7_PRELIM=0xFFFF810A
+CONFIG_SYS_LOAD_ADDR=0x200000
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=5
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig
index 6f003f8..3ed962d 100644
--- a/configs/MK808C_defconfig
+++ b/configs/MK808C_defconfig
@@ -6,5 +6,8 @@
CONFIG_DRAM_CLK=384
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/MPC8349EMDS_PCI64_defconfig b/configs/MPC8349EMDS_PCI64_defconfig
index 8652ff2..457a1ee 100644
--- a/configs/MPC8349EMDS_PCI64_defconfig
+++ b/configs/MPC8349EMDS_PCI64_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
CONFIG_HIGH_BATS=y
@@ -99,6 +100,15 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_ADDR=0xFE080000
CONFIG_ENV_ADDR_REDUND=0xFE0A0000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8349EMDS_SDRAM_defconfig b/configs/MPC8349EMDS_SDRAM_defconfig
index a79fb0e..5f56897 100644
--- a/configs/MPC8349EMDS_SDRAM_defconfig
+++ b/configs/MPC8349EMDS_SDRAM_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
CONFIG_HIGH_BATS=y
@@ -108,6 +109,15 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_ADDR=0xFE080000
CONFIG_ENV_ADDR_REDUND=0xFE0A0000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8349EMDS_SLAVE_defconfig b/configs/MPC8349EMDS_SLAVE_defconfig
index 2b7d2fd..763d6fa 100644
--- a/configs/MPC8349EMDS_SLAVE_defconfig
+++ b/configs/MPC8349EMDS_SLAVE_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_CLK_FREQ=66666666
CONFIG_MPC83xx=y
CONFIG_HIGH_BATS=y
@@ -99,6 +100,15 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_ADDR=0xFE080000
CONFIG_ENV_ADDR_REDUND=0xFE0A0000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index d8c7951..df9c9d3 100644
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
CONFIG_HIGH_BATS=y
@@ -100,6 +101,15 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_ADDR=0xFE080000
CONFIG_ENV_ADDR_REDUND=0xFE0A0000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index 7106fd1..4945207 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFE000000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb"
CONFIG_SYS_CLK_FREQ=66666667
CONFIG_MPC83xx=y
@@ -168,6 +169,11 @@
CONFIG_ENV_ADDR=0xFE080000
CONFIG_DM=y
CONFIG_FSL_SATA=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 72ec1e0..a0e4092 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF80000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds_36b"
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -12,8 +13,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
# CONFIG_MISC_INIT_R is not set
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
@@ -24,7 +27,12 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_ADDR=0xFFF60000
CONFIG_DM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index 9db5476..e2b2131 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF80000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -11,8 +12,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
# CONFIG_MISC_INIT_R is not set
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
@@ -23,7 +26,12 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_ADDR=0xFFF60000
CONFIG_DM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 83f7382..2923ba3 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF80000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -12,8 +13,10 @@
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
CONFIG_BOOTDELAY=10
# CONFIG_MISC_INIT_R is not set
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
@@ -23,7 +26,12 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_ADDR=0xFFF60000
CONFIG_DM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig
index 901e500..071169f 100644
--- a/configs/MSI_Primo73_defconfig
+++ b/configs/MSI_Primo73_defconfig
@@ -11,3 +11,6 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig
index a0aee66..61d9783 100644
--- a/configs/Marsboard_A10_defconfig
+++ b/configs/Marsboard_A10_defconfig
@@ -6,6 +6,9 @@
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_SUNXI_NO_PMIC=y
diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
index 21165f0..d3a0127 100644
--- a/configs/Mele_A1000_defconfig
+++ b/configs/Mele_A1000_defconfig
@@ -10,6 +10,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_SCSI=y
diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig
index ebe2430..77cb464 100644
--- a/configs/Mele_M3_defconfig
+++ b/configs/Mele_M3_defconfig
@@ -10,6 +10,9 @@
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig
index a6a0e6e..f2ee3b1 100644
--- a/configs/Mele_M5_defconfig
+++ b/configs/Mele_M5_defconfig
@@ -11,6 +11,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig
index 89c633c..e8bc148 100644
--- a/configs/Mini-X_defconfig
+++ b/configs/Mini-X_defconfig
@@ -7,6 +7,9 @@
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
index 737978f..d69bc7a 100644
--- a/configs/Orangepi_defconfig
+++ b/configs/Orangepi_defconfig
@@ -14,6 +14,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index f0ea0fc..508cace 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -16,6 +16,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 9625719..9c09a9e 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -2,9 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x11001000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
CONFIG_SPL_TEXT_BASE=0xFF800000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
@@ -29,11 +30,13 @@
CONFIG_TPL_DRIVERS_MISC=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C=y
-CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -49,7 +52,15 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_TPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 34d2dbb..59c7569 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
@@ -17,6 +18,8 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -32,7 +35,14 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index efb696d..e8df2c3 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -4,10 +4,11 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
CONFIG_SPL_TEXT_BASE=0xD0001000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -26,9 +27,11 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -44,7 +47,14 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 75ab1f6..7d2ccc7 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -5,13 +5,14 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
CONFIG_SPL_TEXT_BASE=0xD0001000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
CONFIG_PHYS_64BIT=y
@@ -28,9 +29,11 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -46,7 +49,14 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 827ec0c..9bd62ce 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -2,9 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x11001000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
CONFIG_SPL_TEXT_BASE=0xFF800000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
@@ -28,11 +29,13 @@
CONFIG_TPL_DRIVERS_MISC=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C=y
-CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -48,7 +51,15 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_TPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index baa245a..abeb433 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
@@ -16,6 +17,8 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -31,7 +34,14 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 1c725b9..a29ff27 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -4,10 +4,11 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
CONFIG_SPL_TEXT_BASE=0xD0001000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -25,9 +26,11 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -43,7 +46,14 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 0798d3b..5192377 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -5,13 +5,14 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
CONFIG_SPL_TEXT_BASE=0xD0001000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
CONFIG_FIT=y
@@ -27,9 +28,11 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -45,7 +48,14 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index ce16c19..5ba090b 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -2,9 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x11001000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
CONFIG_SPL_TEXT_BASE=0xFF800000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
@@ -22,6 +23,7 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y
@@ -29,11 +31,13 @@
CONFIG_TPL_DRIVERS_MISC=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C=y
-CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -49,7 +53,16 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_TPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 8f14918..44ba09c 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
@@ -15,8 +16,11 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -32,7 +36,15 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 967d7af..a895c61 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -4,10 +4,11 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
CONFIG_SPL_TEXT_BASE=0xD0001000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -22,13 +23,16 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -44,7 +48,15 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 2d3154e..ce175e8 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -5,13 +5,14 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
CONFIG_SPL_TEXT_BASE=0xD0001000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
CONFIG_PHYS_64BIT=y
@@ -24,13 +25,16 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -46,7 +50,15 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 1d4d0fe..e47a277 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -2,9 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x11001000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
CONFIG_SPL_TEXT_BASE=0xFF800000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
@@ -21,6 +22,7 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y
@@ -28,11 +30,13 @@
CONFIG_TPL_DRIVERS_MISC=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C=y
-CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -48,7 +52,16 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_TPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index a1c6fbf..46fbed2 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
@@ -14,8 +15,11 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -31,7 +35,15 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index f1b19f0..db47f4f 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -4,10 +4,11 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
CONFIG_SPL_TEXT_BASE=0xD0001000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -21,13 +22,16 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -43,7 +47,15 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 261c120..5c549cc 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -5,13 +5,14 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
CONFIG_SPL_TEXT_BASE=0xD0001000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
CONFIG_FIT=y
@@ -23,13 +24,16 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -45,7 +49,15 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index 5a4cc22..0ff1f41 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -2,9 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x11001000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
CONFIG_SPL_TEXT_BASE=0xFF800000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL=y
@@ -28,12 +29,14 @@
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C=y
-CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -48,7 +51,16 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_TPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index c24a57f..9941c14 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -4,10 +4,11 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -26,10 +27,12 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -44,7 +47,15 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 6bf0dd6..6152ef9 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -5,12 +5,13 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
@@ -28,10 +29,12 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -46,7 +49,15 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 86b36bc..d7cc4db 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -19,6 +20,8 @@
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -33,7 +36,15 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 8ef9170..95d97ed 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -2,9 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x11001000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
CONFIG_SPL_TEXT_BASE=0xFF800000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL=y
@@ -27,12 +28,14 @@
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C=y
-CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -47,7 +50,16 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_TPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 708db07..5d668ca 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -4,10 +4,11 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -25,10 +26,12 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -43,7 +46,15 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 96bce81..bc5f577 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -5,12 +5,13 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
@@ -27,10 +28,12 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -45,7 +48,15 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index 1af1d2c..0778dc6 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -18,6 +19,8 @@
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -32,7 +35,15 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 27402f6..17a1ab9 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -2,9 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x11001000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
CONFIG_SPL_TEXT_BASE=0xFF800000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL=y
@@ -27,12 +28,14 @@
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C=y
-CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -50,7 +53,16 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_TPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 51ceb84..4f4e5f5 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -4,10 +4,11 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -25,10 +26,12 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -46,7 +49,15 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index f95daa1..205ca03 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -5,12 +5,13 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PD=y
@@ -27,10 +28,12 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -48,7 +51,15 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index bcc00dc..c7ba60c 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -18,6 +19,8 @@
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -35,7 +38,15 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 85fe2f3..d34a129 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -2,9 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x11001000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
CONFIG_SPL_TEXT_BASE=0xFF800000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL=y
@@ -28,12 +29,14 @@
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C=y
-CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
@@ -52,7 +55,16 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_TPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 61ac850..282ed31 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -4,10 +4,11 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -26,10 +27,12 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
@@ -48,7 +51,15 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index b011006..fe2bf1a 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -5,12 +5,13 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
@@ -28,10 +29,12 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
@@ -50,7 +53,15 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 3f9c9f3..9252151 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -19,6 +20,8 @@
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
@@ -37,7 +40,15 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 7d81ce6..3b57b0c 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -2,9 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x11001000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
CONFIG_SPL_TEXT_BASE=0xFF800000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL=y
@@ -27,12 +28,14 @@
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C=y
-CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
@@ -51,7 +54,16 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_TPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index fd98748..32e509d 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -4,10 +4,11 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -25,10 +26,12 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
@@ -47,7 +50,15 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 0bc6cb5..bfee816 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -5,12 +5,13 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
CONFIG_SPL_TEXT_BASE=0xf8f81000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
@@ -27,10 +28,12 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
@@ -49,7 +52,15 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index cd9d8da..dbd2d87 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -18,6 +19,8 @@
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
@@ -36,7 +39,15 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 40d4c78..d979b14 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
@@ -10,13 +11,17 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -34,6 +39,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index 55766d1..67c4f40 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xCF400
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
@@ -10,13 +11,18 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -34,6 +40,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 1e0711e..6e0b99a 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -3,6 +3,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
@@ -11,13 +12,18 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -35,6 +41,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 224ae42..49e485d 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
CONFIG_MPC85xx=y
CONFIG_TARGET_P2041RDB=y
@@ -13,9 +14,11 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -33,6 +36,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 20ab931..7d6164d 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
@@ -10,10 +11,13 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -32,7 +36,12 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 87ed18d..43d0d31 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xCF400
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
@@ -10,10 +11,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -32,7 +37,12 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 48ca8b7..f905a5a 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -3,6 +3,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
@@ -11,10 +12,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -33,7 +38,12 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 4369f40..7406b1e 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P3041DS=y
@@ -13,6 +14,7 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -31,7 +33,12 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index 97ef317..ed46a1b 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xCF400
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
@@ -10,10 +11,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -32,7 +37,12 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index 6447124..ae46fd4 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -3,6 +3,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
@@ -11,10 +12,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -33,7 +38,12 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index f6c43bc..d9094b9 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P4080DS=y
@@ -13,6 +14,7 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -31,7 +33,12 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index 1a55f49..9707f0c 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
@@ -10,10 +11,13 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -33,7 +37,12 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index 85c8da1..a1b4cf3 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xCF400
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
@@ -10,10 +11,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -32,7 +37,12 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 48020df..27b009c 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -3,6 +3,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
@@ -11,10 +12,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -33,7 +38,12 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 2be7c77..89924b4 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
CONFIG_MPC85xx=y
CONFIG_TARGET_P5040DS=y
@@ -13,6 +14,7 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -31,7 +33,12 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig
index 238a1c4..b0903d6 100644
--- a/configs/SBx81LIFKW_defconfig
+++ b/configs/SBx81LIFKW_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw"
CONFIG_IDENT_STRING="\nSBx81LIFKW"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SILENT_U_BOOT_ONLY=y
diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig
index 77a8fc6..c6629bc 100644
--- a/configs/SBx81LIFXCAT_defconfig
+++ b/configs/SBx81LIFXCAT_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifxcat"
CONFIG_IDENT_STRING="\nSBx81LIFXCAT"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SILENT_U_BOOT_ONLY=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 0a3cc7b..dd12941 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -6,9 +6,10 @@
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -19,22 +20,28 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_nand_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -55,7 +62,16 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 814cde6..82848a7 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -6,10 +6,11 @@
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -18,21 +19,28 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_sd_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -53,7 +61,16 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 825d910..a9424fa 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -7,34 +7,42 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_spi_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -55,7 +63,16 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 3533b78..8b07e21 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
@@ -17,9 +18,13 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -41,7 +46,16 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index c15c5a2..e92c98c 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -6,7 +6,7 @@
CONFIG_ENV_OFFSET=0x180000
CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -17,7 +17,9 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_nand_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -28,7 +30,7 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
@@ -50,7 +52,20 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 2bd3528..6d9f777 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -16,7 +16,10 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -27,7 +30,7 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -48,7 +51,20 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index d56e5a8..b818e63 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -7,18 +7,21 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1042D4RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_spi_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -29,7 +32,7 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -50,7 +53,20 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index cf6c264..2fdf470 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -36,7 +36,20 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 06d4f66..0e37eb7 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -7,7 +7,7 @@
CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -18,7 +18,9 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_nand_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -26,7 +28,7 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
@@ -48,7 +50,20 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 45a3bbb..0046c71 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -7,8 +7,8 @@
CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -17,7 +17,10 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_sd_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -25,7 +28,7 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -46,7 +49,20 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 739fbf8..dc3e985 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -33,7 +33,20 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 921760c..9c1912e 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -8,18 +8,21 @@
CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080QDS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_spi_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -27,7 +30,7 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -48,7 +51,20 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index c7bc3ec..344e2cb 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -31,7 +31,20 @@
CONFIG_ENV_ADDR=0xFFE20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index f92a457..1679ef1 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -34,7 +34,20 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 93d8d4b..4b0b78a 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -8,7 +8,7 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -19,7 +19,9 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_nand_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -27,10 +29,11 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -52,7 +55,21 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 1059880..68989d7 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -8,8 +8,8 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -18,7 +18,10 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_sd_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -26,9 +29,10 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -50,7 +54,21 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 59963fd..6a9752a 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -9,18 +9,21 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_spi_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -28,9 +31,10 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -52,7 +56,21 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 466e917..db0c09b 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -16,6 +16,7 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -38,7 +39,21 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index f6eeade..7255b52 100644
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -8,7 +8,7 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -20,7 +20,9 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_nand_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -28,10 +30,11 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -53,7 +56,21 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index 0286610..f7f37e8 100644
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -8,8 +8,8 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -19,7 +19,10 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_sd_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -27,9 +30,10 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -51,7 +55,21 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index eb073ce..f91e7a8 100644
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -9,11 +9,11 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
CONFIG_T2080RDB_REV_D=y
@@ -21,7 +21,10 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_spi_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -29,9 +32,10 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -53,7 +57,21 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
index ab7096e..d20b576 100644
--- a/configs/T2080RDB_revD_defconfig
+++ b/configs/T2080RDB_revD_defconfig
@@ -17,6 +17,7 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
@@ -39,7 +40,21 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
+CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
+CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
+CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
+CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index c1ca256..6d66736 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -6,8 +6,8 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
@@ -16,7 +16,10 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t4rdb/t4_sd_rcw.cfg"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -24,7 +27,7 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -43,7 +46,16 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 14594b0..a3ae720 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -31,7 +31,16 @@
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x118000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig
index 78c40c0..b572807 100644
--- a/configs/UTOO_P66_defconfig
+++ b/configs/UTOO_P66_defconfig
@@ -21,6 +21,12 @@
CONFIG_VIDEO_LCD_TL059WV5C0=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SPEED=50000
+CONFIG_SYS_I2C_SOFT_SLAVE=0x00
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig
index ee7d486..101ce57 100644
--- a/configs/Wexler_TAB7200_defconfig
+++ b/configs/Wexler_TAB7200_defconfig
@@ -14,6 +14,9 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig
index 4c4d3be..83b8213 100644
--- a/configs/Wits_Pro_A20_DKT_defconfig
+++ b/configs/Wits_Pro_A20_DKT_defconfig
@@ -14,6 +14,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig
index 6fdb152..e0687bf 100644
--- a/configs/Wobo_i5_defconfig
+++ b/configs/Wobo_i5_defconfig
@@ -8,6 +8,9 @@
CONFIG_USB1_VBUS_PIN="PG12"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_AXP_ALDO3_VOLT=3300
CONFIG_AXP_ALDO4_VOLT=3300
CONFIG_CONS_INDEX=2
diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig
index 4f89d71..1b88cfa 100644
--- a/configs/Yones_Toptech_BD1078_defconfig
+++ b/configs/Yones_Toptech_BD1078_defconfig
@@ -20,4 +20,7 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
index 83faf80..cf2535e 100644
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -1,11 +1,14 @@
CONFIG_NDS32=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x4A000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x140000
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ae3xx"
CONFIG_TARGET_ADP_AE3XX=y
+CONFIG_SYS_LOAD_ADDR=0x300000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig
index 3e898e5..c1cdb11 100644
--- a/configs/adp-ag101p_defconfig
+++ b/configs/adp-ag101p_defconfig
@@ -1,10 +1,13 @@
CONFIG_NDS32=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x11000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ag101p"
CONFIG_TARGET_ADP_AG101P=y
+CONFIG_SYS_LOAD_ADDR=0x300000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
index 4e7a168..dab35f9 100644
--- a/configs/ae350_rv32_defconfig
+++ b/configs/ae350_rv32_defconfig
@@ -2,9 +2,11 @@
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
CONFIG_TARGET_AX25_AE350=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig
index 34c6af6..11063e9 100644
--- a/configs/ae350_rv32_spl_defconfig
+++ b/configs/ae350_rv32_spl_defconfig
@@ -2,12 +2,14 @@
CONFIG_SYS_TEXT_BASE=0x01200000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
CONFIG_SPL=y
CONFIG_TARGET_AX25_AE350=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000
CONFIG_BOOTDELAY=3
diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig
index 4a8da32..2a6423f 100644
--- a/configs/ae350_rv32_spl_xip_defconfig
+++ b/configs/ae350_rv32_spl_xip_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0x01200000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
@@ -10,6 +11,7 @@
CONFIG_RISCV_SMODE=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
CONFIG_BOOTDELAY=3
diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig
index f66adc3..d1d544e 100644
--- a/configs/ae350_rv32_xip_defconfig
+++ b/configs/ae350_rv32_xip_defconfig
@@ -2,10 +2,12 @@
CONFIG_SYS_TEXT_BASE=0x80000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
CONFIG_TARGET_AX25_AE350=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
index 05eee37..d2d0e31 100644
--- a/configs/ae350_rv64_defconfig
+++ b/configs/ae350_rv64_defconfig
@@ -2,10 +2,12 @@
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_TARGET_AX25_AE350=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig
index 9cd7848..90511ae 100644
--- a/configs/ae350_rv64_spl_defconfig
+++ b/configs/ae350_rv64_spl_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0x01200000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
CONFIG_SPL=y
@@ -9,6 +10,7 @@
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000
CONFIG_BOOTDELAY=3
diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig
index 188fa08..55cfd11 100644
--- a/configs/ae350_rv64_spl_xip_defconfig
+++ b/configs/ae350_rv64_spl_xip_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0x01200000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
@@ -11,6 +12,7 @@
CONFIG_RISCV_SMODE=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
CONFIG_BOOTDELAY=3
diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig
index cb2b0f1..568ada1 100644
--- a/configs/ae350_rv64_xip_defconfig
+++ b/configs/ae350_rv64_xip_defconfig
@@ -2,11 +2,13 @@
CONFIG_SYS_TEXT_BASE=0x80000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_TARGET_AX25_AE350=y
CONFIG_ARCH_RV64I=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index bbc20ee..966e2a1 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -12,17 +12,19 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7794-alt-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RMOBILE_BOARD_STRING="Alt"
CONFIG_R8A7794=y
CONFIG_TARGET_ALT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 2155092..3b67e01 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -6,8 +6,8 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos"
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_BALTOS=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -28,6 +28,7 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -50,7 +51,10 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_SYS_OMAP24_I2C_SPEED=1000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SPEED=1000
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_OMAP_HS_ADMA=y
CONFIG_MTD=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index d7c1a76..f0b197a 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -21,12 +21,13 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_MUSB_NEW=y
# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET=y
CONFIG_SPL_NET_VCI_STRING="AM33xx U-Boot SPL"
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
CONFIG_CMD_SPL=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
@@ -47,6 +48,7 @@
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index ef8de59..7fd90ce 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -21,13 +21,14 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET=y
CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL"
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00080000
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
@@ -57,6 +58,7 @@
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index 4fea5ce..94ea4ec 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -6,10 +6,10 @@
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
CONFIG_AM33XX=y
-# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_MMC is not set
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
@@ -25,6 +25,7 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_CMD_SPL=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
@@ -55,6 +56,7 @@
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_SPL_DM_MMC is not set
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y
diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig
index fd495f2..fe8ddf6 100644
--- a/configs/am335x_guardian_defconfig
+++ b/configs/am335x_guardian_defconfig
@@ -10,7 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian"
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_GUARDIAN=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
@@ -35,7 +35,7 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET=y
CONFIG_SPL_NET_VCI_STRING="Guardian U-Boot SPL"
CONFIG_SPL_POWER=y
CONFIG_SPL_USB_GADGET=y
@@ -64,6 +64,7 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_SPL_ENV_IS_NOWHERE=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
@@ -78,6 +79,8 @@
CONFIG_CLK_TI_DIVIDER=y
CONFIG_CLK_TI_GATE=y
CONFIG_CLK_TI_MUX=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index bc19d07..9f96b78 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -26,6 +26,7 @@
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
# CONFIG_SPL_YMODEM_SUPPORT is not set
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
@@ -50,6 +51,7 @@
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig
index a1e19b6..a1ee141 100644
--- a/configs/am335x_hs_evm_uart_defconfig
+++ b/configs/am335x_hs_evm_uart_defconfig
@@ -6,7 +6,7 @@
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
CONFIG_AM33XX=y
-# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_MMC is not set
CONFIG_SPL=y
# CONFIG_SPL_FS_FAT is not set
# CONFIG_SPL_LIBDISK_SUPPORT is not set
@@ -28,6 +28,7 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
@@ -52,6 +53,7 @@
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig
index 0ec6851..af94cc0 100644
--- a/configs/am335x_igep003x_defconfig
+++ b/configs/am335x_igep003x_defconfig
@@ -9,14 +9,13 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-base0033"
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_IGEP003X=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033"
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_FS_EXT4=y
@@ -68,6 +67,8 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig
index 0033879..ffadc90 100644
--- a/configs/am335x_pdu001_defconfig
+++ b/configs/am335x_pdu001_defconfig
@@ -8,8 +8,8 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001"
CONFIG_AM33XX=y
CONFIG_TARGET_PDU001=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index 0c4186d..4169d13 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -9,8 +9,8 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-shc"
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x9000
CONFIG_SPL_FS_FAT=y
@@ -51,6 +51,10 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SLAVE=0x1
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_SMSC=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index 354586b..1d25adf 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -9,8 +9,8 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-shc"
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x9000
CONFIG_SPL_FS_FAT=y
@@ -52,6 +52,10 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SLAVE=0x1
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_SMSC=y
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 43fef20..0ab3acb 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -9,8 +9,8 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-shc"
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x9000
CONFIG_SPL_FS_FAT=y
@@ -52,6 +52,10 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SLAVE=0x1
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_SMSC=y
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index 4010d83..914f21c 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -9,8 +9,8 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-shc"
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SHC=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x9000
CONFIG_SPL_FS_FAT=y
@@ -51,6 +51,10 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SLAVE=0x1
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_SMSC=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 1f3b680..aa1e196 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -8,8 +8,8 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-sl50"
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_SL50=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x20000
CONFIG_SPL_FS_FAT=y
@@ -29,7 +29,7 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET=y
CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL"
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_POWER=y
@@ -38,6 +38,7 @@
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -57,6 +58,9 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_PHY_SMSC=y
CONFIG_MII=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index 1234aa2..864d16c 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -77,6 +77,8 @@
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
+CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
+CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=57
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_AM35X=y
CONFIG_BCH=y
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 5d35176..b60090d 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
@@ -20,7 +21,7 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET=y
CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_USB_HOST=y
@@ -29,6 +30,7 @@
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
CONFIG_CMD_SPL_WRITE_SIZE=0x40000
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
@@ -54,6 +56,7 @@
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -75,11 +78,11 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_DWC3_PHY_OMAP=y
-CONFIG_OMAP_USB_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
CONFIG_USB_GADGET_VENDOR_NUM=0x0403
diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig
index f42218b..31b564b 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -11,7 +11,7 @@
CONFIG_AM43XX=y
CONFIG_ENV_OFFSET_REDUND=0x120000
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI,QSPI_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="QSPI"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -43,21 +43,24 @@
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
+CONFIG_SPL_POWER_LEGACY=y
+CONFIG_SPL_POWER_I2C=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_PHY_OMAP=y
-CONFIG_OMAP_USB_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
CONFIG_USB_GADGET_VENDOR_NUM=0x0403
diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig
index 955ea08..a4450cc 100644
--- a/configs/am43xx_evm_rtconly_defconfig
+++ b/configs/am43xx_evm_rtconly_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
@@ -23,6 +24,7 @@
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
CONFIG_CMD_SPL_WRITE_SIZE=0x40000
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
@@ -41,6 +43,7 @@
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -57,10 +60,10 @@
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_PHY_OMAP=y
-CONFIG_OMAP_USB_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
CONFIG_USB_GADGET_VENDOR_NUM=0x0403
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index 98b07b9..9efeccc 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_ISW_ENTRY_ADDR=0x40300350
@@ -22,7 +23,6 @@
CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_STORAGE=y
CONFIG_SPL_USB_GADGET=y
-CONFIG_SPL_USB_ETHER=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
CONFIG_CMD_SPL_WRITE_SIZE=0x40000
@@ -79,11 +79,11 @@
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_DWC3_PHY_OMAP=y
-CONFIG_OMAP_USB_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
CONFIG_USB_GADGET_VENDOR_NUM=0x0403
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 43f4738..f340130 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_SECURE_DEVICE=y
@@ -29,11 +30,12 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET=y
CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
@@ -59,6 +61,7 @@
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -80,11 +83,11 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_DWC3_PHY_OMAP=y
-CONFIG_OMAP_USB_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
CONFIG_USB_GADGET_VENDOR_NUM=0x0403
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index cc11323..9a038a6 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -12,7 +12,7 @@
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -39,6 +39,7 @@
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ABOOTIMG=y
CONFIG_CMD_SPL=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_BCB=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
@@ -78,6 +79,7 @@
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
@@ -106,6 +108,7 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 5763264..0a99df4 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -15,7 +15,7 @@
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -41,6 +41,7 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ABOOTIMG=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_BCB=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
@@ -74,6 +75,7 @@
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
@@ -102,6 +104,7 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig
index f2ae045..dbbe18d 100644
--- a/configs/am57xx_hs_evm_usb_defconfig
+++ b/configs/am57xx_hs_evm_usb_defconfig
@@ -17,7 +17,7 @@
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -48,6 +48,7 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ABOOTIMG=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_BCB=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
@@ -81,6 +82,7 @@
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
@@ -110,6 +112,7 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig
index fa58a31..859306d 100644
--- a/configs/am64x_evm_a53_defconfig
+++ b/configs/am64x_evm_a53_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_K3=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -9,17 +10,18 @@
CONFIG_TARGET_AM642_A53_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm"
CONFIG_SPL_TEXT_BASE=0x80080000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig
index 5d8d4c5..1659760 100644
--- a/configs/am64x_evm_r5_defconfig
+++ b/configs/am64x_evm_r5_defconfig
@@ -8,12 +8,13 @@
CONFIG_TARGET_AM642_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm"
CONFIG_SPL_TEXT_BASE=0x70000000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SIZE_LIMIT=0x190000
@@ -21,7 +22,7 @@
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
# CONFIG_DISPLAY_CPUINFO is not set
@@ -40,7 +41,6 @@
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 5773d21..f13a1be 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_K3=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -8,19 +9,20 @@
CONFIG_TARGET_AM654_A53_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board"
CONFIG_SPL_TEXT_BASE=0x80080000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index e4f0d25..cccd710 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -9,12 +9,13 @@
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
CONFIG_SPL_TEXT_BASE=0x41c00000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SIZE_LIMIT=0x7ec00
@@ -22,7 +23,7 @@
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
@@ -41,7 +42,6 @@
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig
index be68a4f..c8ee3a5 100644
--- a/configs/am65x_evm_r5_usbdfu_defconfig
+++ b/configs/am65x_evm_r5_usbdfu_defconfig
@@ -9,10 +9,11 @@
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
CONFIG_SPL_TEXT_BASE=0x41c00000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
@@ -30,7 +31,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig
index b8bee2f..f5e1b08 100644
--- a/configs/am65x_evm_r5_usbmsc_defconfig
+++ b/configs/am65x_evm_r5_usbmsc_defconfig
@@ -9,10 +9,11 @@
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
CONFIG_SPL_TEXT_BASE=0x41c00000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
@@ -29,7 +30,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig
index 557517b..cef00dd 100644
--- a/configs/am65x_hs_evm_a53_defconfig
+++ b/configs/am65x_hs_evm_a53_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_K3=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -9,19 +10,20 @@
CONFIG_TARGET_AM654_A53_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board"
CONFIG_SPL_TEXT_BASE=0x80080000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig
index 9924a37..7df36fb 100644
--- a/configs/am65x_hs_evm_r5_defconfig
+++ b/configs/am65x_hs_evm_r5_defconfig
@@ -10,18 +10,19 @@
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
CONFIG_SPL_TEXT_BASE=0x41c00000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
@@ -38,7 +39,6 @@
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig
index a17cc21..4befa7a 100644
--- a/configs/amcore_defconfig
+++ b/configs/amcore_defconfig
@@ -3,8 +3,10 @@
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="amcore"
CONFIG_TARGET_AMCORE=y
+CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
index 6f0cf6f..9549bc3 100644
--- a/configs/ap121_defconfig
+++ b/configs/ap121_defconfig
@@ -6,12 +6,14 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x40000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="ap121"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xb8020000
CONFIG_DEBUG_UART_CLOCK=25000000
CONFIG_ARCH_ATH79=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig
index 1aae19c..7384b52 100644
--- a/configs/ap143_defconfig
+++ b/configs/ap143_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x40000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="ap143"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xb8020000
@@ -13,6 +14,7 @@
CONFIG_ARCH_ATH79=y
CONFIG_TARGET_AP143=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig
index 0f7a817..71809b2 100644
--- a/configs/ap152_defconfig
+++ b/configs/ap152_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x40000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="ap152"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xb8020000
@@ -13,6 +14,7 @@
CONFIG_ARCH_ATH79=y
CONFIG_TARGET_AP152=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig
index 59179e2..2c5d692 100644
--- a/configs/apalis-imx8_defconfig
+++ b/configs/apalis-imx8_defconfig
@@ -7,13 +7,14 @@
CONFIG_SYS_MEMTEST_END=0x89000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
+CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis"
CONFIG_TARGET_APALIS_IMX8=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis-imx8/apalis-imx8-imximage.cfg"
CONFIG_LOG=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -34,6 +35,7 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
diff --git a/configs/apalis-imx8x_defconfig b/configs/apalis-imx8x_defconfig
index ed9686e..4ad6f7f 100644
--- a/configs/apalis-imx8x_defconfig
+++ b/configs/apalis-imx8x_defconfig
@@ -7,13 +7,14 @@
CONFIG_SYS_MEMTEST_END=0x89000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
+CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-apalis"
CONFIG_TARGET_APALIS_IMX8X=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x89000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg"
CONFIG_BOOTDELAY=1
CONFIG_LOG=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -36,6 +37,7 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig
index 39e1c1d..659e58f 100644
--- a/configs/apalis-tk1_defconfig
+++ b/configs/apalis-tk1_defconfig
@@ -9,6 +9,7 @@
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA124=y
CONFIG_TARGET_APALIS_TK1=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTDELAY=1
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index a0e85ba..52f2539 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -11,17 +11,20 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_MX6Q=y
CONFIG_TARGET_APALIS_IMX6=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6-apalis"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_CMD_HDMIDETECT=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -70,6 +73,9 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_MXC_I2C3_SPEED=400000
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index 1420ca2..59e5113 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -9,6 +9,7 @@
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA30=y
CONFIG_TARGET_APALIS_T30=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig
index 67fc4e3..0a4c48f 100644
--- a/configs/aristainetos2c_defconfig
+++ b/configs/aristainetos2c_defconfig
@@ -13,7 +13,6 @@
# CONFIG_CMD_DEKBLOB is not set
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg"
CONFIG_BOOTDELAY=-2
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_ENCRYPTION=y
diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig
index c156a6a..342e4e9 100644
--- a/configs/aristainetos2ccslb_defconfig
+++ b/configs/aristainetos2ccslb_defconfig
@@ -13,7 +13,6 @@
# CONFIG_CMD_DEKBLOB is not set
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg"
CONFIG_BOOTDELAY=-2
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_ENCRYPTION=y
diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig
index e06ef7d..39e408e 100644
--- a/configs/armadillo-800eva_defconfig
+++ b/configs/armadillo-800eva_defconfig
@@ -7,9 +7,11 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_ARCH_RMOBILE_BOARD_STRING="Armadillo-800EVA Board"
CONFIG_R8A7740=y
CONFIG_TARGET_ARMADILLO_800EVA=y
+CONFIG_SYS_LOAD_ADDR=0x44000000
CONFIG_BOOTDELAY=3
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig
index 133c0eb..ab93240 100644
--- a/configs/arndale_defconfig
+++ b/configs/arndale_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43E00000
@@ -7,11 +9,13 @@
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x86200
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale"
CONFIG_SPL_TEXT_BASE=0x02023400
CONFIG_SPL=y
CONFIG_IDENT_STRING=" for ARNDALE"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_USE_PREBOOT=y
@@ -31,6 +35,7 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
diff --git a/configs/aspenite_defconfig b/configs/aspenite_defconfig
index 37e6871..b85f724 100644
--- a/configs/aspenite_defconfig
+++ b/configs/aspenite_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_ASPENITE=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_IDENT_STRING="\nMarvell-Aspenite DB"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig
index 9d20cb9..45796df 100644
--- a/configs/astro_mcf5373l_defconfig
+++ b/configs/astro_mcf5373l_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_SECT_SIZE=0x8000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="astro_mcf5373l"
CONFIG_TARGET_ASTRO_MCF5373L=y
+CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion"
@@ -25,6 +27,11 @@
CONFIG_FPGA_CYCLON2=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_SPARTAN3=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x58000
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index 76ad67b..d80ac2d 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
@@ -8,12 +9,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index 07d3911..f9ddc15 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
@@ -8,12 +9,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig
index 24a40f2..c44a425 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index 79e3e02e..14204c0 100644
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9261EK=y
@@ -7,12 +8,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index 29e08af..523f581 100644
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9261EK=y
@@ -7,12 +8,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig
index e5d54e4..7033fc4 100644
--- a/configs/at91sam9261ek_nandflash_defconfig
+++ b/configs/at91sam9261ek_nandflash_defconfig
@@ -1,9 +1,11 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -11,6 +13,7 @@
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index 64e2ea8..c051645 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
@@ -8,12 +9,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index 64e2ea8..c051645 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
@@ -8,12 +9,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig
index 73aef06..4cb1f62 100644
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index 8b5377d..887714e 100644
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -7,12 +7,14 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x50000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index ee4edec..d90e621 100644
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
@@ -7,12 +8,14 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x50000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH"
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index a9acd1d..7c26200 100644
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9261EK=y
@@ -7,12 +8,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index 4c92ee4..211927b 100644
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9261EK=y
@@ -7,12 +8,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig
index 414e41b..f62bdf8 100644
--- a/configs/at91sam9g10ek_nandflash_defconfig
+++ b/configs/at91sam9g10ek_nandflash_defconfig
@@ -1,9 +1,11 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9261EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -11,6 +13,7 @@
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig
index d3d95c7..59588bf 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
@@ -7,12 +8,14 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x2000
+CONFIG_SYS_MALLOC_LEN=0x23000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index 4e9f8e2..1f533f6 100644
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index e0478ef..5a717ef 100644
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
@@ -8,12 +9,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index 2bc57c8..665a294 100644
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
@@ -8,12 +9,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig
index 14b32a9..3c4e847 100644
--- a/configs/at91sam9g20ek_nandflash_defconfig
+++ b/configs/at91sam9g20ek_nandflash_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig
index 0768360..8ad87c8 100644
--- a/configs/at91sam9m10g45ek_mmc_defconfig
+++ b/configs/at91sam9m10g45ek_mmc_defconfig
@@ -1,16 +1,19 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x73f00000
CONFIG_TARGET_AT91SAM9M10G45EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x2c000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig
index 568743d..49da6f3 100644
--- a/configs/at91sam9m10g45ek_nandflash_defconfig
+++ b/configs/at91sam9m10g45ek_nandflash_defconfig
@@ -1,9 +1,11 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x73f00000
CONFIG_TARGET_AT91SAM9M10G45EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -11,6 +13,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index 2e0e596..28815b5 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9N12EK=y
@@ -11,6 +12,7 @@
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index 483e5e9..ab51b70 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9N12EK=y
@@ -11,6 +12,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index 0bed29b..0eb2403 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9N12EK=y
@@ -13,6 +14,7 @@
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig
index 47eee7d..444e43e 100644
--- a/configs/at91sam9rlek_dataflash_defconfig
+++ b/configs/at91sam9rlek_dataflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
@@ -8,12 +9,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig
index 781d91e..6f5c6f3 100644
--- a/configs/at91sam9rlek_mmc_defconfig
+++ b/configs/at91sam9rlek_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
@@ -6,12 +7,14 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x2c000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig
index 1fa557f..623e21b 100644
--- a/configs/at91sam9rlek_nandflash_defconfig
+++ b/configs/at91sam9rlek_nandflash_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index a8e1a36..dfbac62 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9X5EK=y
@@ -7,12 +8,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index 3bd0897..8064f36 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -1,16 +1,19 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index 90c8f79..4ff4f10 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -1,9 +1,11 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -11,6 +13,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index 71bbd74..2a60f74 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_AT91SAM9X5EK=y
@@ -7,12 +8,14 @@
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0x5000
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index 2573c3c..0ca1b6c 100644
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
@@ -8,12 +9,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index f2baad7..1b7b4a7 100644
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
@@ -8,12 +9,14 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig
index a1026a7..e7f13a0 100644
--- a/configs/at91sam9xeek_nandflash_defconfig
+++ b/configs/at91sam9xeek_nandflash_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
index dbbe2d5..6a49266 100644
--- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
+++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
@@ -4,17 +4,19 @@
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
+CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0"
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ZYNQ_MAC_IN_EEPROM=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xfa
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index aa9197f..a013338 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
@@ -14,6 +16,7 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x460000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
@@ -22,9 +25,10 @@
CONFIG_DEBUG_UART_CLOCK=18432000
CONFIG_ENV_OFFSET_REDUND=0x180000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
-CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068"
+CONFIG_SYS_LOAD_ADDR=0x22000000
+CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run flash_self"
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index 7af881e..5dd323d 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -1,12 +1,14 @@
CONFIG_ARC=y
CONFIG_TARGET_AXS101=y
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="axs101"
CONFIG_DEBUG_UART_BASE=0xe0022000
CONFIG_DEBUG_UART_CLOCK=33333333
CONFIG_SYS_CLK_FREQ=750000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS3,115200n8"
diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index 7394272..698dbda 100644
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -1,12 +1,14 @@
CONFIG_ARC=y
CONFIG_ISA_ARCV2=y
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="axs103"
CONFIG_DEBUG_UART_BASE=0xe0022000
CONFIG_DEBUG_UART_CLOCK=33333333
CONFIG_SYS_CLK_FREQ=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS3,115200n8"
diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig
index 8311556..b89dd8e 100644
--- a/configs/ba10_tv_box_defconfig
+++ b/configs/ba10_tv_box_defconfig
@@ -10,6 +10,9 @@
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig
index 4d95373..2f0c22f 100644
--- a/configs/bananapi_m1_plus_defconfig
+++ b/configs/bananapi_m1_plus_defconfig
@@ -12,6 +12,9 @@
CONFIG_SPL_I2C=y
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig
index 16dd7fd..8b7f376 100644
--- a/configs/bananapi_m2_berry_defconfig
+++ b/configs/bananapi_m2_berry_defconfig
@@ -10,6 +10,10 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_RGMII=y
CONFIG_SUN8I_EMAC=y
CONFIG_AXP_DLDO4_VOLT=2500
diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig
index a42a6ac..ec58dd2 100644
--- a/configs/bcm7260_defconfig
+++ b/configs/bcm7260_defconfig
@@ -1,11 +1,14 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_BCMSTB=y
CONFIG_SYS_TEXT_BASE=0x10100000
CONFIG_TARGET_BCM7260=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x814800
+CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_ENV_OFFSET_REDUND=0x824800
+CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTDELAY=1
diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig
index 96e8da0..d5dd4b7 100644
--- a/configs/bcm7445_defconfig
+++ b/configs/bcm7445_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_BCMSTB=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_BCM7445=y
@@ -6,7 +7,9 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x1E0000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_ENV_OFFSET_REDUND=0x1F0000
+CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTDELAY=1
diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig
index f7f1b35..5b6af9e 100644
--- a/configs/bcm963158_ram_defconfig
+++ b/configs/bcm963158_ram_defconfig
@@ -1,14 +1,17 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_BCM63158=y
CONFIG_SYS_TEXT_BASE=0x10000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="bcm963158"
CONFIG_TARGET_BCM963158=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_RSASSA_PSS=y
diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig
index 2d759fa..bdc2e1e 100644
--- a/configs/bcm968360bg_ram_defconfig
+++ b/configs/bcm968360bg_ram_defconfig
@@ -1,13 +1,16 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_BCM68360=y
CONFIG_SYS_TEXT_BASE=0x10000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="bcm968360bg"
CONFIG_TARGET_BCM968360BG=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig
index 4415faa..855f1c2 100644
--- a/configs/bcm968380gerg_ram_defconfig
+++ b/configs/bcm968380gerg_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -6,10 +7,13 @@
CONFIG_DEFAULT_DEVICE_TREE="brcm,bcm968380gerg"
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6838=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig
index 09d09ee..c5ab976 100644
--- a/configs/bcm968580xref_ram_defconfig
+++ b/configs/bcm968580xref_ram_defconfig
@@ -1,13 +1,16 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_BCM6858=y
CONFIG_SYS_TEXT_BASE=0x10000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="bcm968580xref"
CONFIG_TARGET_BCM968580XREF=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index f158b82..3fa2435 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -4,7 +4,9 @@
CONFIG_SYS_TEXT_BASE=0xFF000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x80000
+CONFIG_SYS_MALLOC_LEN=0xc00000
CONFIG_DEFAULT_DEVICE_TREE="ns3-board"
+CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_SIGNATURE_MAX_SIZE=0x20000000
diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index 76ad5ef..ec45269 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -4,10 +4,12 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver"
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA30=y
CONFIG_TARGET_BEAVER=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig
index ebd8879..7735c70 100644
--- a/configs/beelink-gtking_defconfig
+++ b/configs/beelink-gtking_defconfig
@@ -11,6 +11,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" beelink"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig
index df25802..93c5739 100644
--- a/configs/beelink-gtkingpro_defconfig
+++ b/configs/beelink-gtkingpro_defconfig
@@ -11,6 +11,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" beelink"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
index d5aeb97..a3282eb 100644
--- a/configs/bg0900_defconfig
+++ b/configs/bg0900_defconfig
@@ -6,10 +6,12 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
+CONFIG_IMX_CONFIG=""
CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_BG0900=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200"
diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig
index 299206e..79cff75 100644
--- a/configs/bitmain_antminer_s9_defconfig
+++ b/configs/bitmain_antminer_s9_defconfig
@@ -16,6 +16,7 @@
CONFIG_DEBUG_UART=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig
index 20262e8..7691eec 100644
--- a/configs/bk4r1_defconfig
+++ b/configs/bk4r1_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
CONFIG_SYS_TEXT_BASE=0x3f401000
@@ -8,6 +9,7 @@
CONFIG_SYS_MEMTEST_END=0x87c00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x200000
+CONFIG_SYS_MALLOC_LEN=0x402000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-bk4r1"
CONFIG_BOOTCOUNT_BOOTLIMIT=3
@@ -15,8 +17,8 @@
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0x220000
CONFIG_TARGET_BK4R1=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter passphrase to stop autoboot, booting in %d seconds\n"
@@ -58,10 +60,6 @@
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
-CONFIG_SYS_I2C_EEPROM_BUS=2
-CONFIG_SYS_EEPROM_SIZE=32768
-CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
-CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig
index eb1dd71..e3770cc 100644
--- a/configs/blanche_defconfig
+++ b/configs/blanche_defconfig
@@ -8,11 +8,13 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot"
CONFIG_ARCH_RMOBILE_BOARD_STRING="Blanche"
CONFIG_R8A7792=y
CONFIG_TARGET_BLANCHE=y
+CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index b118204..756bc0e 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -4,12 +4,14 @@
CONFIG_SYS_MEMTEST_END=0x90000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="img,boston"
CONFIG_TARGET_BOSTON=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x88000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index 4792821..94e7c9f 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0x90000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="img,boston"
CONFIG_TARGET_BOSTON=y
CONFIG_SYS_LITTLE_ENDIAN=y
@@ -11,6 +12,7 @@
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x88000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig
index 0e2c156..1c5a0a9 100644
--- a/configs/boston32r6_defconfig
+++ b/configs/boston32r6_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0x90000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="img,boston"
CONFIG_TARGET_BOSTON=y
CONFIG_CPU_MIPS32_R6=y
@@ -11,6 +12,7 @@
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x88000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig
index ba53f29..9bd00d5 100644
--- a/configs/boston32r6el_defconfig
+++ b/configs/boston32r6el_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0x90000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="img,boston"
CONFIG_TARGET_BOSTON=y
CONFIG_SYS_LITTLE_ENDIAN=y
@@ -12,6 +13,7 @@
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x88000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 47eead6..32632e1 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0x90000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="img,boston"
CONFIG_TARGET_BOSTON=y
CONFIG_CPU_MIPS64_R2=y
@@ -11,6 +12,7 @@
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index c8da92f..82eeba1 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0x90000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="img,boston"
CONFIG_TARGET_BOSTON=y
CONFIG_SYS_LITTLE_ENDIAN=y
@@ -12,6 +13,7 @@
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig
index 8c8d74a..72651cc 100644
--- a/configs/boston64r6_defconfig
+++ b/configs/boston64r6_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0x90000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="img,boston"
CONFIG_TARGET_BOSTON=y
CONFIG_CPU_MIPS64_R6=y
@@ -11,6 +12,7 @@
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig
index aca64ea..942ca97 100644
--- a/configs/boston64r6el_defconfig
+++ b/configs/boston64r6el_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0x90000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="img,boston"
CONFIG_TARGET_BOSTON=y
CONFIG_SYS_LITTLE_ENDIAN=y
@@ -12,6 +13,7 @@
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index 683d0e7..ba971a4 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -7,15 +7,17 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-mmc"
CONFIG_AM33XX=y
CONFIG_TARGET_BRPPT1=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x50000
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x80000000
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=0
diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig
index 5bd5845..88f281c 100644
--- a/configs/brppt1_nand_defconfig
+++ b/configs/brppt1_nand_defconfig
@@ -7,13 +7,15 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x60000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-nand"
CONFIG_AM33XX=y
CONFIG_TARGET_BRPPT1=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x80000000
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=0
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index 7fe7f56..ec31c8d 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -8,17 +8,19 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x20000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi"
CONFIG_AM33XX=y
CONFIG_TARGET_BRPPT1=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x30000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x80000000
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPI_BOOT=y
diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig
index 51c1372..517eb94 100644
--- a/configs/brppt2_defconfig
+++ b/configs/brppt2_defconfig
@@ -14,17 +14,18 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_MX6QDL=y
CONFIG_TARGET_BRPPT2=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-brppt2"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_CMD_BMODE is not set
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x10700000
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=0
CONFIG_USE_BOOTCOMMAND=y
diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig
index 7f5c782..f0037fc 100644
--- a/configs/brsmarc1_defconfig
+++ b/configs/brsmarc1_defconfig
@@ -7,19 +7,21 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x20000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-brsmarc1"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=600
CONFIG_TARGET_BRSMARC1=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x30000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x80000000
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=0
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index bc8c5db..346a10c 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -6,17 +6,19 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-brxre1"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=1000
CONFIG_TARGET_BRXRE1=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x50000
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x80000000
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=0
diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig
index 34ff946..141dec8 100644
--- a/configs/bubblegum_96_defconfig
+++ b/configs/bubblegum_96_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
CONFIG_ARCH_OWL=y
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96"
CONFIG_MACH_S900=y
CONFIG_IDENT_STRING="\nBubblegum-96"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x7ffc0
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyOWL5,115200n8"
diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig
index b4d38c5..6fb808d 100644
--- a/configs/cardhu_defconfig
+++ b/configs/cardhu_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA30=y
CONFIG_TARGET_CARDHU=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index 077324a..8923fd0 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -4,11 +4,13 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som"
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA124=y
CONFIG_TARGET_CEI_TK1_SOM=y
CONFIG_ARMV7_PSCI_0_1=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig
index 34aca6e..c7dac3b 100644
--- a/configs/cgtqmx8_defconfig
+++ b/configs/cgtqmx8_defconfig
@@ -9,23 +9,23 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_MALLOC_LEN=0x2400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8qm-cgtqmx8"
CONFIG_TARGET_CONGA_QMX8=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/congatec/cgtqmx8/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
@@ -46,6 +46,7 @@
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_SPL_DM=y
CONFIG_SPL_CLK=y
CONFIG_CLK_IMX8=y
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index 85302ad..f6ae494 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -9,8 +9,8 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-chiliboard"
CONFIG_AM33XX=y
CONFIG_TARGET_CHILIBOARD=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x22000
CONFIG_SPL_FS_FAT=y
@@ -47,6 +47,8 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MISC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index acc3286..80ed1f0 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
@@ -6,15 +7,16 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_ROCKCHIP_RK3288=y
-# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_MMC is not set
CONFIG_TARGET_CHROMEBIT_MICKEY=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index f3f367a..fe938c6 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
@@ -9,12 +10,13 @@
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
-# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_MMC is not set
CONFIG_DEBUG_UART_BASE=0xff1a0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig
index eb0884f..321ad7d 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -44,7 +44,9 @@
CONFIG_SPL_CPU=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_PCI=y
+CONFIG_SPL_POWER=y
# CONFIG_SPL_SPI_FLASH_TINY is not set
+CONFIG_TPL_POWER=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
CONFIG_CMD_PMC=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index a2901ac..85f6120 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
@@ -6,14 +7,15 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_ROCKCHIP_RK3288=y
-# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_MMC is not set
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb"
CONFIG_SILENT_CONSOLE=y
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index b48505a..c43d9dc 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -35,10 +35,10 @@
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET=y
CONFIG_SPL_PCI=y
-CONFIG_SPL_PCH_SUPPORT=y
-CONFIG_SPL_RTC_SUPPORT=y
+CONFIG_SPL_PCH=y
+CONFIG_SPL_RTC=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 30044a8..41a3fe1 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
@@ -6,15 +7,16 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_ROCKCHIP_RK3288=y
-# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_MMC is not set
CONFIG_TARGET_CHROMEBOOK_MINNIE=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb"
CONFIG_SILENT_CONSOLE=y
diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
index 6eef4ba..b231b3b 100644
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@ -34,11 +34,11 @@
CONFIG_HANDOFF=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET=y
CONFIG_SPL_PCI=y
-CONFIG_SPL_PCH_SUPPORT=y
+CONFIG_SPL_PCH=y
CONFIG_TPL_PCI=y
-CONFIG_TPL_PCH_SUPPORT=y
+CONFIG_TPL_PCH=y
CONFIG_TPL_DM_SPI=y
CONFIG_TPL_DM_SPI_FLASH=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
index fe6528f..b396d9f 100644
--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
@@ -6,15 +7,16 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_ROCKCHIP_RK3288=y
-# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_MMC is not set
CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
CONFIG_SILENT_CONSOLE=y
diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig
index c2efe39..363bdfd 100644
--- a/configs/ci20_mmc_defconfig
+++ b/configs/ci20_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -6,11 +7,13 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x83800
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DEFAULT_DEVICE_TREE="ci20"
CONFIG_SPL_TEXT_BASE=0xf4000a00
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
CONFIG_ARCH_JZ47XX=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_FIT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS4,115200 rw rootwait root=/dev/mmcblk0p1"
diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
index f5d1460..99c4685 100644
--- a/configs/cl-som-imx7_defconfig
+++ b/configs/cl-som-imx7_defconfig
@@ -7,18 +7,19 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb"
CONFIG_TARGET_CL_SOM_IMX7=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_LATE_INIT=y
@@ -37,6 +38,7 @@
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -60,6 +62,9 @@
CONFIG_SPL_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
@@ -77,7 +82,9 @@
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
+CONFIG_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index d8edc45..f613107 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
@@ -12,13 +13,14 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
CONFIG_SPL_TEXT_BASE=0x40000030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig
index c94d63e..89b978d 100644
--- a/configs/clearfog_gt_8k_defconfig
+++ b/configs/clearfog_gt_8k_defconfig
@@ -16,6 +16,7 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index de7870b..f6c0daa 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -10,18 +10,21 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_MX6QDL=y
CONFIG_TARGET_CM_FX6=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_CMD_BMODE is not set
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run legacy_bootcmd"
CONFIG_USE_PREBOOT=y
@@ -38,6 +41,9 @@
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
+CONFIG_SYS_I2C_EEPROM_BUS=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -63,6 +69,11 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
# CONFIG_DWC_AHSATA_AHCI is not set
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_MXC_I2C3_SPEED=400000
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig
index af8e786..fd4e363 100644
--- a/configs/cm_t335_defconfig
+++ b/configs/cm_t335_defconfig
@@ -8,8 +8,8 @@
CONFIG_ENV_OFFSET=0x300000
CONFIG_AM33XX=y
CONFIG_TARGET_CM_T335=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -30,6 +30,8 @@
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -47,12 +49,15 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS_GPIO=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=64
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index 289c3fc..45b41d3 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -12,13 +13,13 @@
CONFIG_SPL_TEXT_BASE=0x40300350
CONFIG_AM43XX=y
CONFIG_TARGET_CM_T43=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -42,6 +43,8 @@
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -61,6 +64,8 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_DM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -77,6 +82,8 @@
CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
@@ -84,4 +91,4 @@
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
-CONFIG_OMAP_USB_PHY=y
+CONFIG_USB_XHCI_OMAP=y
diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig
index 17739fb..bbcdf45 100644
--- a/configs/cobra5272_defconfig
+++ b/configs/cobra5272_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0xFFE00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="cobra5272"
CONFIG_TARGET_COBRA5272=y
+CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig
index 739eea7..f5fd481 100644
--- a/configs/colibri-imx6ull_defconfig
+++ b/configs/colibri-imx6ull_defconfig
@@ -8,11 +8,11 @@
CONFIG_ENV_OFFSET=0x380000
CONFIG_MX6ULL=y
CONFIG_TARGET_COLIBRI_IMX6ULL=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx6ull/imximage.cfg,IMX_NAND"
CONFIG_BOOTDELAY=1
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_USE_PREBOOT=y
diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig
index a0816ac..d9c1e4d 100644
--- a/configs/colibri-imx8x_defconfig
+++ b/configs/colibri-imx8x_defconfig
@@ -7,12 +7,13 @@
CONFIG_SYS_MEMTEST_END=0x89000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
+CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri"
CONFIG_TARGET_COLIBRI_IMX8X=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg"
CONFIG_LOG=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -32,6 +33,7 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 47b1cfb..62a207f 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -11,16 +11,19 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_MX6DL=y
CONFIG_TARGET_COLIBRI_IMX6=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_CMD_HDMIDETECT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -69,6 +72,9 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_MXC_I2C3_SPEED=400000
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index 3914916..c22332c 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MEMTEST_END=0x8c000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x380000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand"
CONFIG_TARGET_COLIBRI_IMX7=y
@@ -12,7 +13,6 @@
CONFIG_IMX_BOOTAUX=y
CONFIG_IMX_HAB=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D"
CONFIG_BOOTDELAY=1
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_USE_PREBOOT=y
@@ -59,9 +59,9 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
-CONFIG_FSL_CAAM=y
CONFIG_DFU_NAND=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig
index 8752767..b1adb8d 100644
--- a/configs/colibri_imx7_emmc_defconfig
+++ b/configs/colibri_imx7_emmc_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0x8c000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-emmc"
CONFIG_TARGET_COLIBRI_IMX7=y
@@ -14,7 +15,6 @@
CONFIG_IMX_HAB=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D"
CONFIG_BOOTDELAY=1
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_USE_PREBOOT=y
@@ -46,7 +46,6 @@
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
@@ -54,7 +53,6 @@
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
-CONFIG_FSL_CAAM=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x10000000
@@ -62,6 +60,7 @@
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig
index 814d87e..9234f57 100644
--- a/configs/colibri_pxa270_defconfig
+++ b/configs/colibri_pxa270_defconfig
@@ -7,7 +7,9 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0xa0000000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200"
CONFIG_SYS_DEVICE_NULLDEV=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index ac98e84..c9fb555 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -9,6 +9,7 @@
CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_TEGRA20=y
CONFIG_TARGET_COLIBRI_T20=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_STDIO_DEREGISTER=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig
index 618f7c1..3c373419 100644
--- a/configs/colibri_t30_defconfig
+++ b/configs/colibri_t30_defconfig
@@ -9,6 +9,7 @@
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA30=y
CONFIG_TARGET_COLIBRI_T30=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index abb8117..3fb13ea 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
CONFIG_SYS_TEXT_BASE=0x3f401000
@@ -8,11 +9,12 @@
CONFIG_SYS_MEMTEST_END=0x87c00000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x180000
+CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri"
CONFIG_TARGET_COLIBRI_VF=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND"
+CONFIG_SYS_LOAD_ADDR=0x80008000
CONFIG_BOOTDELAY=1
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-${fdt_board}.dtb"
diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig
index 0e7d9cd..2278763 100644
--- a/configs/comtrend_ar5315u_ram_defconfig
+++ b/configs/comtrend_ar5315u_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -6,10 +7,13 @@
CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u"
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6318=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig
index 655db1b..7497ac2 100644
--- a/configs/comtrend_ar5387un_ram_defconfig
+++ b/configs/comtrend_ar5387un_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -6,10 +7,13 @@
CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un"
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6328=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig
index d051f3d..6470310 100644
--- a/configs/comtrend_ct5361_ram_defconfig
+++ b/configs/comtrend_ct5361_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -6,10 +7,13 @@
CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361"
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6348=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig
index ac963ef..2cb0bac 100644
--- a/configs/comtrend_vr3032u_ram_defconfig
+++ b/configs/comtrend_vr3032u_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -6,10 +7,13 @@
CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u"
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM63268=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig
index af565c5..8864a13 100644
--- a/configs/comtrend_wap5813n_ram_defconfig
+++ b/configs/comtrend_wap5813n_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -6,10 +7,13 @@
CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n"
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6368=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig
index bb1e095..bf0581a 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
@@ -12,13 +14,14 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc"
CONFIG_SPL_TEXT_BASE=0x40000030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_OF_BOARD_FIXUP=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig
index d84db88..04a9934 100644
--- a/configs/cortina_presidio-asic-base_defconfig
+++ b/configs/cortina_presidio-asic-base_defconfig
@@ -4,9 +4,11 @@
CONFIG_SYS_TEXT_BASE=0x04000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x820000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
CONFIG_IDENT_STRING="Presidio-SoC"
+CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig
index e5163d1..b5b2fb7 100644
--- a/configs/cortina_presidio-asic-emmc_defconfig
+++ b/configs/cortina_presidio-asic-emmc_defconfig
@@ -4,9 +4,11 @@
CONFIG_SYS_TEXT_BASE=0x04000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x820000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
CONFIG_IDENT_STRING="Presidio-SoC"
+CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_R=y
diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig
index a865cbf..51451fb 100644
--- a/configs/cortina_presidio-asic-pnand_defconfig
+++ b/configs/cortina_presidio-asic-pnand_defconfig
@@ -4,9 +4,11 @@
CONFIG_SYS_TEXT_BASE=0x04000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x820000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
CONFIG_IDENT_STRING="Presidio-SoC"
+CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 42c0a48..72f4310 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_THUMB_BUILD=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
@@ -11,12 +13,14 @@
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x460000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus"
CONFIG_SPL_TEXT_BASE=0x300000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x180000
-CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
+CONFIG_SYS_LOAD_ADDR=0x70000000
+CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig
index f924efb..bf61860 100644
--- a/configs/crs305-1g-4s-bit_defconfig
+++ b/configs/crs305-1g-4s-bit_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s-bit"
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig
index 677e248..5fc8058 100644
--- a/configs/crs305-1g-4s_defconfig
+++ b/configs/crs305-1g-4s_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s"
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig
index 61bb79e..3de2949 100644
--- a/configs/crs326-24g-2s-bit_defconfig
+++ b/configs/crs326-24g-2s-bit_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s-bit"
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig
index 87e64e9..77296ab 100644
--- a/configs/crs326-24g-2s_defconfig
+++ b/configs/crs326-24g-2s_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s"
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig
index 19cdd5b..513cc52 100644
--- a/configs/crs328-4c-20s-4s-bit_defconfig
+++ b/configs/crs328-4c-20s-4s-bit_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s-bit"
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig
index 703fcac..dd0cd63 100644
--- a/configs/crs328-4c-20s-4s_defconfig
+++ b/configs/crs328-4c-20s-4s_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s"
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig
index 8efb94d..2937a54 100644
--- a/configs/cubieboard7_defconfig
+++ b/configs/cubieboard7_defconfig
@@ -1,9 +1,11 @@
CONFIG_ARM=y
CONFIG_ARCH_OWL=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7"
CONFIG_MACH_S700=y
CONFIG_IDENT_STRING="\ncubieboard7"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x7ffc0
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyOWL3,115200n8"
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index 017bb21..d32a9af 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net"
CONFIG_IDENT_STRING=" D2 v2"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -22,6 +24,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="d2v2> "
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
@@ -43,6 +46,10 @@
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_SATA_MV=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index af565f6..c1a857f 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_DAVINCI=y
CONFIG_SYS_TEXT_BASE=0xc1080000
@@ -11,14 +13,16 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x80000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="da850-evm"
CONFIG_SPL_TEXT_BASE=0x80000000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_LTO=y
+CONFIG_SYS_LOAD_ADDR=0xc0700000
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb"
diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index e69da40..15bdd7e 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_DAVINCI=y
CONFIG_SYS_TEXT_BASE=0x60000000
@@ -9,9 +10,11 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2800
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="da850-evm"
CONFIG_LTO=y
+CONFIG_SYS_LOAD_ADDR=0xc0700000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
index 7803bf5..6d59cc5 100644
--- a/configs/da850evm_nand_defconfig
+++ b/configs/da850evm_nand_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_DAVINCI=y
CONFIG_SYS_TEXT_BASE=0xc1080000
@@ -9,14 +11,16 @@
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="da850-evm"
CONFIG_SPL_TEXT_BASE=0x80000000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_LTO=y
+CONFIG_SYS_LOAD_ADDR=0xc0700000
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb"
diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig
index dabdb07..8c5ac9d 100644
--- a/configs/dalmore_defconfig
+++ b/configs/dalmore_defconfig
@@ -4,10 +4,12 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore"
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA114=y
CONFIG_TARGET_DALMORE=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index 7f9d65f..632a22f 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
@@ -12,12 +13,13 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
CONFIG_SPL_TEXT_BASE=0x40004030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -45,6 +47,10 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
CONFIG_MISC=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index 96841d7..af8c372 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
@@ -12,11 +13,12 @@
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc"
CONFIG_SPL_TEXT_BASE=0x40000030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=3
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 0ab8722..2e0f938 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
@@ -12,12 +13,13 @@
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
CONFIG_SPL_TEXT_BASE=0x40000030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -48,6 +50,10 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_AHCI_MVEBU=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_MV=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index a4345ba..26aa5d0 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -12,12 +12,13 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
CONFIG_SPL_TEXT_BASE=0x40004030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -49,6 +50,10 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_SATA_MV=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig
index 9a162df..c32a48a 100644
--- a/configs/db-xc3-24g4xg_defconfig
+++ b/configs/db-xc3-24g4xg_defconfig
@@ -11,6 +11,7 @@
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-db-xc3-24g4xg"
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig
index 4e2c6d6..4046fbe 100644
--- a/configs/deneb_defconfig
+++ b/configs/deneb_defconfig
@@ -8,20 +8,21 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8-deneb"
CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_TARGET_DENEB=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2000
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg"
+CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/siemens/capricorn/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -32,7 +33,6 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index b56408f..a1d2779 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
@@ -9,9 +10,11 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xA0000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_TEXT_BASE=0x00000000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x80008000
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
@@ -37,6 +40,9 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_DMA_LPC32XX=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_LPC32XX=y
# CONFIG_MMC is not set
CONFIG_MTD=y
diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig
index 2be548e..0ec943a 100644
--- a/configs/devkit8000_defconfig
+++ b/configs/devkit8000_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_NR_DRAM_BANKS=2
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SPL_TEXT_BASE=0x40200000
CONFIG_TARGET_DEVKIT8000=y
CONFIG_SPL=y
@@ -34,6 +35,8 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index ce96642..eb588b6 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -17,22 +17,21 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-dhcom-pdk2"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0x110000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig
index 24f4608..e1067b6 100644
--- a/configs/difrnce_dit4350_defconfig
+++ b/configs/difrnce_dit4350_defconfig
@@ -16,5 +16,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/display5_defconfig b/configs/display5_defconfig
index d654187..a49bf33 100644
--- a/configs/display5_defconfig
+++ b/configs/display5_defconfig
@@ -15,10 +15,11 @@
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
@@ -26,13 +27,12 @@
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0x130000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_MISC_INIT_R=y
CONFIG_SPL_BOOTCOUNT_LIMIT=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
@@ -52,6 +52,10 @@
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_BUS=2
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_SIZE=32768
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -82,16 +86,13 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2
CONFIG_SYS_I2C_MXC=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
-CONFIG_SYS_I2C_EEPROM_BUS=2
-CONFIG_SYS_EEPROM_SIZE=32768
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig
index 7dbed04..5a2e478 100644
--- a/configs/display5_factory_defconfig
+++ b/configs/display5_factory_defconfig
@@ -15,21 +15,21 @@
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x130000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="echo SDP Display5 recovery"
@@ -52,6 +52,10 @@
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_BUS=2
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_SIZE=32768
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -86,16 +90,13 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DFU_MMC=y
CONFIG_DFU_SF=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2
CONFIG_SYS_I2C_MXC=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
-CONFIG_SYS_I2C_EEPROM_BUS=2
-CONFIG_SYS_EEPROM_SIZE=32768
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index edcdb87..c6598f7 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325"
CONFIG_IDENT_STRING="\nD-Link DNS-325"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_CONSOLE_MUX=y
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index 8d43609..d82dfd0 100644
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dockstar"
CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 0c253da..11dc022 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -12,7 +12,7 @@
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -40,6 +40,7 @@
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_DFU=y
CONFIG_CMD_SPL=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
@@ -82,6 +83,7 @@
CONFIG_PCF8575_GPIO=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
@@ -122,6 +124,7 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_GENERIC=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 885b236..c231991 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -15,7 +15,7 @@
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -44,6 +44,7 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_DFU=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_BOOTP_DNS2=y
@@ -85,6 +86,7 @@
CONFIG_PCF8575_GPIO=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
@@ -125,6 +127,7 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_GENERIC=y
diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig
index efdd9f3..09aa073 100644
--- a/configs/dra7xx_hs_evm_usb_defconfig
+++ b/configs/dra7xx_hs_evm_usb_defconfig
@@ -17,7 +17,7 @@
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -44,6 +44,7 @@
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_DFU=y
CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
@@ -81,6 +82,7 @@
CONFIG_PCF8575_GPIO=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
@@ -119,6 +121,7 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_OMAP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index 629d20a..dfb98c6 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -7,21 +7,23 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
CONFIG_TARGET_DRACO=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2E0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -76,6 +78,8 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
index b8aae59..f3e3815 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -4,9 +4,11 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x802000
CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c"
CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80080000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig
index 3a9cf0a..9d8819f 100644
--- a/configs/dragonboard820c_defconfig
+++ b/configs/dragonboard820c_defconfig
@@ -3,10 +3,12 @@
CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x804000
CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c"
CONFIG_TARGET_DRAGONBOARD820C=y
CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyMSM0,115200n8"
# CONFIG_USE_BOOTCOMMAND is not set
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 6643913..c112389 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug"
CONFIG_IDENT_STRING="\nMarvell-DreamPlug"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig
index 9f146ec..d7e8651 100644
--- a/configs/ds109_defconfig
+++ b/configs/ds109_defconfig
@@ -1,7 +1,13 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
+CONFIG_SUPPORT_PASSING_ATAGS=y
+CONFIG_CMDLINE_TAG=y
+CONFIG_INITRD_TAG=y
+CONFIG_STATIC_MACH_TYPE=y
+CONFIG_MACH_TYPE=527
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_DS109=y
@@ -10,6 +16,7 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_USE_PREBOOT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index bfe2e5f..6402e25 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -1,22 +1,29 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
+CONFIG_SUPPORT_PASSING_ATAGS=y
+CONFIG_CMDLINE_TAG=y
+CONFIG_INITRD_TAG=y
+CONFIG_STATIC_MACH_TYPE=y
+CONFIG_MACH_TYPE=3036
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_DS414=y
+CONFIG_DDR_32BIT=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x7E0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
CONFIG_SPL_TEXT_BASE=0x40004030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x8000040,8M root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 flash_size=8 SataLedSpecial=1 HddHotplug=1"
@@ -46,6 +53,10 @@
CONFIG_ENV_SPI_MAX_HZ=50000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig
index 8c6df75..60910c3 100644
--- a/configs/dserve_dsrv9703c_defconfig
+++ b/configs/dserve_dsrv9703c_defconfig
@@ -15,4 +15,7 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/durian_defconfig b/configs/durian_defconfig
index 77b9795..bc418f6 100644
--- a/configs/durian_defconfig
+++ b/configs/durian_defconfig
@@ -4,10 +4,12 @@
CONFIG_SYS_TEXT_BASE=0x500000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x101000
CONFIG_DEFAULT_DEVICE_TREE="phytium-durian"
# CONFIG_PSCI_RESET is not set
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x90000000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/ea-lpc3250devkitv2_defconfig b/configs/ea-lpc3250devkitv2_defconfig
index e8d60b5..8d9a905 100644
--- a/configs/ea-lpc3250devkitv2_defconfig
+++ b/configs/ea-lpc3250devkitv2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
@@ -8,6 +9,7 @@
CONFIG_TARGET_EA_LPC3250DEVKITV2=y
CONFIG_DEFAULT_DEVICE_TREE="lpc3250-ea3250"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80100000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_USE_BOOTCOMMAND is not set
diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig
index 95f1df9..9bbfcf2 100644
--- a/configs/eb_cpu5282_defconfig
+++ b/configs/eb_cpu5282_defconfig
@@ -4,6 +4,7 @@
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282"
CONFIG_TARGET_EB_CPU5282=y
+CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xFF000400"
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -18,6 +19,10 @@
CONFIG_CMD_MII=y
CONFIG_CMD_DATE=y
CONFIG_ENV_ADDR=0xFF040000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x300
+CONFIG_SYS_I2C_SLAVE=0
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=8
diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig
index a2bffaf..abc87ec 100644
--- a/configs/eb_cpu5282_internal_defconfig
+++ b/configs/eb_cpu5282_internal_defconfig
@@ -4,6 +4,7 @@
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282_internal"
CONFIG_TARGET_EB_CPU5282=y
+CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xF0000418"
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -17,6 +18,10 @@
CONFIG_CMD_MII=y
CONFIG_CMD_DATE=y
CONFIG_ENV_ADDR=0xFF040000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x300
+CONFIG_SYS_I2C_SLAVE=0
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=8
diff --git a/configs/edison_defconfig b/configs/edison_defconfig
index a789630..53d5ce6 100644
--- a/configs/edison_defconfig
+++ b/configs/edison_defconfig
@@ -3,12 +3,14 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_MALLOC_LEN=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="edison"
CONFIG_ENV_OFFSET_REDUND=0x600000
CONFIG_VENDOR_INTEL=y
CONFIG_TARGET_EDISON=y
CONFIG_SMP=y
CONFIG_GENERATE_ACPI_TABLE=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig
index 3d1365d..e74f4db 100644
--- a/configs/edminiv2_defconfig
+++ b/configs/edminiv2_defconfig
@@ -8,11 +8,13 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_SPL_TEXT_BASE=0xffff0000
CONFIG_TARGET_EDMINIV2=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_IDENT_STRING=" EDMiniV2"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
@@ -31,6 +33,10 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xFFF84000
CONFIG_NETCONSOLE=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig
index af4f3f1..ee5bfdd 100644
--- a/configs/elgin-rv1108_defconfig
+++ b/configs/elgin-rv1108_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x60000000
CONFIG_NR_DRAM_BANKS=1
@@ -10,6 +11,7 @@
CONFIG_DEBUG_UART_BASE=0x10210000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x62000000
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig
index 1948c76..1ae7382 100644
--- a/configs/emsdp_defconfig
+++ b/configs/emsdp_defconfig
@@ -4,8 +4,10 @@
CONFIG_TARGET_EMSDP=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ENV_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x10000
CONFIG_DEFAULT_DEVICE_TREE="emsdp"
CONFIG_SYS_CLK_FREQ=40000000
+CONFIG_SYS_LOAD_ADDR=0x10000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig
index a079acc..fc96881 100644
--- a/configs/espresso7420_defconfig
+++ b/configs/espresso7420_defconfig
@@ -6,8 +6,10 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420"
CONFIG_IDENT_STRING=" for ESPRESSO7420"
+CONFIG_SYS_LOAD_ADDR=0x43e00000
# CONFIG_AUTOBOOT is not set
CONFIG_SILENT_CONSOLE=y
CONFIG_CONSOLE_MUX=y
diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
index 0991a51..f60ce5b 100644
--- a/configs/etamin_defconfig
+++ b/configs/etamin_defconfig
@@ -8,21 +8,23 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x980000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
CONFIG_TARGET_ETAMIN=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0xB80000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -77,6 +79,8 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 4da3c1d..91fa97d 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x27000000
@@ -8,8 +9,10 @@
CONFIG_ENV_SIZE=0x21000
CONFIG_ENV_OFFSET=0x3DE000
CONFIG_ENV_SECT_SIZE=0x21000
+CONFIG_SYS_MALLOC_LEN=0x121000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ethernut5"
+CONFIG_SYS_LOAD_ADDR=0x020000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -55,6 +58,9 @@
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_GPIO=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SLAVE=0
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ev-imx280-nano-x-mb_defconfig b/configs/ev-imx280-nano-x-mb_defconfig
index afb2a68..dd4586f 100644
--- a/configs/ev-imx280-nano-x-mb_defconfig
+++ b/configs/ev-imx280-nano-x-mb_defconfig
@@ -3,6 +3,7 @@
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_MX6ULL=y
CONFIG_TARGET_O4_IMX6ULL_NANO=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_EV_IMX280_NANO_X_MB=y
CONFIG_IMX_MODULE_FUSE=y
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 9133419..3dab945 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -6,8 +6,10 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb"
CONFIG_PRE_CON_BUF_ADDR=0x1e720000
+CONFIG_SYS_LOAD_ADDR=0x83000000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw"
CONFIG_USE_BOOTCOMMAND=y
diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index 19b9210..56ab885 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -9,12 +9,14 @@
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SIZE_LIMIT=0x10000
CONFIG_SPL=y
# CONFIG_ARMV7_NONSEC is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x83000000
CONFIG_FIT=y
# CONFIG_LEGACY_IMAGE_FORMAT is not set
CONFIG_USE_BOOTARGS=y
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index f4b30ed..7265ac4 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -16,6 +17,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index 50a4bc1..0cca416 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -15,8 +16,9 @@
CONFIG_DEBUG_UART_BASE=0xFF1c0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 324528e..ce44c36 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
@@ -13,6 +15,7 @@
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x60800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb"
diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 1062801..e446a22 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x60000000
CONFIG_NR_DRAM_BANKS=2
@@ -8,6 +9,7 @@
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x60800800
CONFIG_FIT=y
CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 02e19fa..0bf91d6 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -1,4 +1,7 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
+CONFIG_TPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x61000000
CONFIG_NR_DRAM_BANKS=2
@@ -13,6 +16,7 @@
CONFIG_DEBUG_UART_BASE=0x11030000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x61800800
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 658ddc9..efb2a3e 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=2
@@ -11,6 +13,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index bd4a03a..15a6e37 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00600000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -13,6 +14,7 @@
CONFIG_DEBUG_UART_BASE=0xFF0C0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 7cc828f..8b59b8c 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -15,6 +16,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index d5eba1d..4aa4910 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig
index a102a5a..7453ccf 100644
--- a/configs/evb-rk3568_defconfig
+++ b/configs/evb-rk3568_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00a00000
CONFIG_NR_DRAM_BANKS=2
@@ -8,6 +9,7 @@
CONFIG_DEBUG_UART_BASE=0xFE660000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index be7ebd4..916a6fb 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x60000000
CONFIG_NR_DRAM_BANKS=1
@@ -7,6 +8,7 @@
CONFIG_DEBUG_UART_BASE=0x10210000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x62000000
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig
index a2df9ea..61c5602 100644
--- a/configs/ficus-rk3399_defconfig
+++ b/configs/ficus-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000
@@ -10,6 +11,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig
index 64744d5..363fa63 100644
--- a/configs/firefly-px30_defconfig
+++ b/configs/firefly-px30_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -17,6 +18,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 91b7974..057e909 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_NR_DRAM_BANKS=1
@@ -11,6 +13,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb"
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 2ca2ac3..d576b5c 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig
index 07ae0f7..81e291a 100644
--- a/configs/flea3_defconfig
+++ b/configs/flea3_defconfig
@@ -5,6 +5,11 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x110000
+CONFIG_SYS_LOAD_ADDR=0x80800000
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
@@ -29,6 +34,9 @@
CONFIG_ENV_ADDR=0xA0080000
CONFIG_ENV_ADDR_REDUND=0xA0090000
CONFIG_MXC_GPIO=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_MXC_I2C3_SLAVE=0xfe
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig
index ae6dbfd..4e1b44e 100644
--- a/configs/gardena-smart-gateway-at91sam_defconfig
+++ b/configs/gardena-smart-gateway-at91sam_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x22900000
@@ -8,20 +10,25 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MEMTEST_START=0x0
CONFIG_ENV_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway"
CONFIG_SPL_TEXT_BASE=0x300000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=0
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_STOP_STR="x"
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -32,20 +39,26 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_BASE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_MTD=y
CONFIG_CMD_NAND=y
CONFIG_CMD_WDT=y
-# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+CONFIG_CMD_UUID=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
CONFIG_MTDIDS_DEFAULT="nand0=atmel_nand"
CONFIG_MTDPARTS_DEFAULT="atmel_nand:1536k(uboot),10752k(unused),-(ubi)"
CONFIG_CMD_UBI=y
@@ -58,6 +71,8 @@
CONFIG_ENV_UBI_VOLUME="uboot_env0"
CONFIG_ENV_UBI_VOLUME_REDUND="uboot_env1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SPL_DM=y
@@ -71,6 +86,7 @@
CONFIG_MTD=y
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_MTD_UBI_FASTMAP=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -84,3 +100,4 @@
CONFIG_WDT=y
CONFIG_WDT_AT91=y
# CONFIG_UBIFS_SILENCE_MSG is not set
+CONFIG_LZMA=y
diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig
index 46b9849..6b1f9ac 100644
--- a/configs/gardena-smart-gateway-mt7688_defconfig
+++ b/configs/gardena-smart-gateway-mt7688_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -6,8 +7,9 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xA0000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
CONFIG_SPL_SYS_MALLOC_F_LEN=0x80000
CONFIG_SPL=y
@@ -15,10 +17,13 @@
CONFIG_ENV_OFFSET_REDUND=0xB0000
CONFIG_ARCH_MTMIPS=y
CONFIG_SOC_MT7628=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig
index 23d10bf..91f9134 100644
--- a/configs/gazerbeam_defconfig
+++ b/configs/gazerbeam_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MEMTEST_END=0x07e00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="gazerbeam"
CONFIG_IDENT_STRING=" gazerbeam 0.01"
diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig
index cea6a73..ef32a4b 100644
--- a/configs/ge_b1x5v2_defconfig
+++ b/configs/ge_b1x5v2_defconfig
@@ -12,22 +12,22 @@
# CONFIG_GE_RTC is not set
CONFIG_MX6QDL=y
CONFIG_TARGET_GE_B1X5V2=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-b1x5v2"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=10
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x21ec000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=1
CONFIG_DEFAULT_FDT_FILE="imx6dl-b1x5v2.dtb"
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 76e478b..690fa11 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_MX6Q=y
CONFIG_TARGET_GE_BX50V3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3"
CONFIG_BOOTCOUNT_BOOTLIMIT=10
diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig
index 55892f0..719c6c7 100644
--- a/configs/geekbox_defconfig
+++ b/configs/geekbox_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x1000
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig
index 7596400..94fda05 100644
--- a/configs/giedi_defconfig
+++ b/configs/giedi_defconfig
@@ -8,20 +8,21 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8-giedi"
CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_TARGET_GIEDI=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2000
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg"
+CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/siemens/capricorn/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -32,7 +33,6 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index d0a9e21..e8a2f36 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet"
CONFIG_IDENT_STRING="\nSeagate GoFlex Home"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_CONSOLE_MUX=y
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index a5414f7..b51cb4a 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -12,17 +12,19 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7793-gose-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RMOBILE_BOARD_STRING="Gose"
CONFIG_R8A7793=y
CONFIG_TARGET_GOSE=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig
index e4a570d..4a3a3f1 100644
--- a/configs/grpeach_defconfig
+++ b/configs/grpeach_defconfig
@@ -6,9 +6,11 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x80000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot"
CONFIG_RZA1=y
+CONFIG_SYS_LOAD_ADDR=0x20400000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="ignore_loglevel"
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index 896a3b1..0305105 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -1,11 +1,14 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x73f00000
CONFIG_TARGET_GURNARD=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x80000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-gurnard"
+CONFIG_SYS_LOAD_ADDR=0x23000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45"
CONFIG_BOOTDELAY=3
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index 619254c..4a9cd23 100644
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus"
CONFIG_IDENT_STRING="\nMarvell-GuruPlug"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 9e764f4..000bdb5 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -9,12 +9,16 @@
CONFIG_ENV_OFFSET=0xB1400
CONFIG_MX6QDL=y
CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_CMD_EECONFIG=y
CONFIG_CMD_GSC=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0xD1400
@@ -26,7 +30,6 @@
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -76,10 +79,14 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_LED=y
CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
@@ -96,8 +103,10 @@
CONFIG_PCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_POWER_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index bab61e7..87851f3 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -9,12 +9,16 @@
CONFIG_ENV_OFFSET=0xB1400
CONFIG_MX6QDL=y
CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_CMD_EECONFIG=y
CONFIG_CMD_GSC=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0xD1400
@@ -26,7 +30,6 @@
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -76,10 +79,14 @@
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_LED=y
CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
@@ -100,8 +107,10 @@
CONFIG_PCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_POWER_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index e59efeb..ff5001e 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -9,12 +9,16 @@
CONFIG_ENV_OFFSET=0x1000000
CONFIG_MX6QDL=y
CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_CMD_EECONFIG=y
CONFIG_CMD_GSC=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x1080000
@@ -26,7 +30,6 @@
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -78,10 +81,14 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_LED=y
CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
@@ -102,8 +109,10 @@
CONFIG_PCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_POWER_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig
index 874311e..2372d17 100644
--- a/configs/harmony_defconfig
+++ b/configs/harmony_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_TEGRA20=y
CONFIG_TARGET_HARMONY=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra20 (Harmony) # "
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index 4e59360..c121a3c 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
@@ -12,13 +13,14 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4"
CONFIG_SPL_TEXT_BASE=0x40000030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig
index a6aed67..43a070e 100644
--- a/configs/highbank_defconfig
+++ b/configs/highbank_defconfig
@@ -1,13 +1,16 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_SYS_TEXT_BASE=0x00008000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_SYS_BOOTCOUNT_ADDR=0xfff3cf0c
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig
index d916040..f0d07fc 100644
--- a/configs/hihope_rzg2_defconfig
+++ b/configs/hihope_rzg2_defconfig
@@ -4,11 +4,13 @@
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-hihope-rzg2m-u-boot"
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_HIHOPE_RZG2=y
# CONFIG_SPL is not set
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/hikey960_defconfig b/configs/hikey960_defconfig
index 316a042..5c19350 100644
--- a/configs/hikey960_defconfig
+++ b/configs/hikey960_defconfig
@@ -4,9 +4,11 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x801000
CONFIG_DEFAULT_DEVICE_TREE="hi3660-hikey960"
CONFIG_IDENT_STRING="\nHikey960"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA6,115200n8 root=/dev/mmcblk0p2 rw"
diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig
index 0ec1ed7..5d3d28d 100644
--- a/configs/hikey_defconfig
+++ b/configs/hikey_defconfig
@@ -4,9 +4,11 @@
CONFIG_NR_DRAM_BANKS=6
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x801000
CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey"
CONFIG_IDENT_STRING="hikey"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw"
@@ -24,6 +26,7 @@
CONFIG_MMC_DW=y
CONFIG_MMC_DW_K3=y
CONFIG_DM_ETH=y
+CONFIG_POWER_LEGACY=y
CONFIG_CONS_INDEX=4
CONFIG_USB=y
CONFIG_USB_DWC2=y
diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig
index 03f1e8b..792cc1a 100644
--- a/configs/hsdk_4xd_defconfig
+++ b/configs/hsdk_4xd_defconfig
@@ -3,12 +3,14 @@
CONFIG_TARGET_HSDK=y
CONFIG_BOARD_HSDK_4XD=y
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="hsdk-4xd"
CONFIG_DEBUG_UART_BASE=0xf0005000
CONFIG_DEBUG_UART_CLOCK=33333333
CONFIG_SYS_CLK_FREQ=500000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig
index e424563..c72ad9f 100644
--- a/configs/hsdk_defconfig
+++ b/configs/hsdk_defconfig
@@ -2,12 +2,14 @@
CONFIG_ISA_ARCV2=y
CONFIG_TARGET_HSDK=y
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="hsdk"
CONFIG_DEBUG_UART_BASE=0xf0005000
CONFIG_DEBUG_UART_CLOCK=33333333
CONFIG_SYS_CLK_FREQ=500000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig
index 987ad31..81a412b 100644
--- a/configs/huawei_hg556a_ram_defconfig
+++ b/configs/huawei_hg556a_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -6,10 +7,13 @@
CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a"
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6358=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig
index 8f99db7..257dd89 100644
--- a/configs/i12-tvbox_defconfig
+++ b/configs/i12-tvbox_defconfig
@@ -8,6 +8,9 @@
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig
index 5efbf21..436e3a8 100644
--- a/configs/iNet_3F_defconfig
+++ b/configs/iNet_3F_defconfig
@@ -15,4 +15,7 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig
index 4aeb19b..6978f8b 100644
--- a/configs/iNet_3W_defconfig
+++ b/configs/iNet_3W_defconfig
@@ -15,4 +15,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig
index b85df7f..2c8ecb5 100644
--- a/configs/iNet_86VS_defconfig
+++ b/configs/iNet_86VS_defconfig
@@ -14,5 +14,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index 7f20304..eeab2e8 100644
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0"
CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig
index e69c79f..de766b2 100644
--- a/configs/icnova-a20-swac_defconfig
+++ b/configs/icnova-a20-swac_defconfig
@@ -1,5 +1,11 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
+CONFIG_SUPPORT_PASSING_ATAGS=y
+CONFIG_CMDLINE_TAG=y
+CONFIG_INITRD_TAG=y
+CONFIG_SERIAL_TAG=y
+CONFIG_STATIC_MACH_TYPE=y
+CONFIG_MACH_TYPE=4283
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac"
CONFIG_SPL=y
CONFIG_MACH_SUN7I=y
@@ -15,6 +21,9 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
CONFIG_CMD_UNZIP=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index 1e3f853..d8593bc 100644
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-iconnect"
CONFIG_IDENT_STRING=" Iomega iConnect"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 3f5824d..8435de1 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -2,6 +2,7 @@
CONFIG_SYS_TEXT_BASE=0xFFF00000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_SYS_BOOTCOUNT_ADDR=0x9
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
@@ -117,6 +118,7 @@
CONFIG_ACR_RPTCNT_4=y
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
@@ -154,6 +156,11 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_I2C=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig
index a3b97e5..da0d598 100644
--- a/configs/igep00x0_defconfig
+++ b/configs/igep00x0_defconfig
@@ -54,6 +54,8 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_SYS_MTDPARTS_RUNTIME=y
diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig
index c8e0982..79c5758 100644
--- a/configs/imgtec_xilfpga_defconfig
+++ b/configs/imgtec_xilfpga_defconfig
@@ -1,10 +1,15 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_MALLOC_F_LEN=0x600
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="nexys4ddr"
CONFIG_TARGET_XILFPGA=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
+CONFIG_SYS_LOAD_ADDR=0x80500000
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig
index cab908e..f4e65ff 100644
--- a/configs/imx28_xea_defconfig
+++ b/configs/imx28_xea_defconfig
@@ -7,19 +7,21 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_NR_DRAM_BANKS=1
+CONFIG_IMX_CONFIG=""
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="imx28-xea"
CONFIG_SPL_TEXT_BASE=0x1000
CONFIG_TARGET_XEA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x90000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig
index fed8793..70d5edf 100644
--- a/configs/imx6dl_icore_nand_defconfig
+++ b/configs/imx6dl_icore_nand_defconfig
@@ -11,16 +11,16 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6Q_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
# CONFIG_CMD_BMODE is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
CONFIG_SPL_WATCHDOG=y
diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig
index 48f0c03..70268d0 100644
--- a/configs/imx6dl_mamoj_defconfig
+++ b/configs/imx6dl_mamoj_defconfig
@@ -8,12 +8,12 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6DL_MAMOJ=y
+CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj"
CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_IMX_HAB=y
# CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_OS_BOOT=y
CONFIG_CMD_SPL=y
diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig
index 3064a13..3c2fee9 100644
--- a/configs/imx6q_icore_nand_defconfig
+++ b/configs/imx6q_icore_nand_defconfig
@@ -11,9 +11,10 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6Q_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
# CONFIG_CMD_BMODE is not set
CONFIG_FIT=y
@@ -21,7 +22,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
CONFIG_SPL_WATCHDOG=y
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index ed8db74..1200311 100644
--- a/configs/imx6q_logic_defconfig
+++ b/configs/imx6q_logic_defconfig
@@ -12,16 +12,16 @@
CONFIG_MX6Q=y
CONFIG_MX6_OCRAM_256KB=y
CONFIG_TARGET_MX6LOGICPD=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig
index d3191a2..8c98436 100644
--- a/configs/imx6qdl_icore_mipi_defconfig
+++ b/configs/imx6qdl_icore_mipi_defconfig
@@ -11,9 +11,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6Q_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x021f0000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -27,7 +28,6 @@
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_WATCHDOG=y
diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig
index 76375ae..b80f28a 100644
--- a/configs/imx6qdl_icore_mmc_defconfig
+++ b/configs/imx6qdl_icore_mmc_defconfig
@@ -11,9 +11,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6Q_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x020D8024
CONFIG_SPL=y
@@ -30,7 +31,6 @@
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_WATCHDOG=y
diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig
index 3064a13..3c2fee9 100644
--- a/configs/imx6qdl_icore_nand_defconfig
+++ b/configs/imx6qdl_icore_nand_defconfig
@@ -11,9 +11,10 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6Q_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
# CONFIG_CMD_BMODE is not set
CONFIG_FIT=y
@@ -21,7 +22,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
CONFIG_SPL_WATCHDOG=y
diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig
index 328e68d..4594df0 100644
--- a/configs/imx6qdl_icore_rqs_defconfig
+++ b/configs/imx6qdl_icore_rqs_defconfig
@@ -11,9 +11,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6Q_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_CMD_BMODE is not set
@@ -24,7 +25,6 @@
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_WATCHDOG=y
diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig
index ebcccdd..541ab31 100644
--- a/configs/imx6ul_geam_mmc_defconfig
+++ b/configs/imx6ul_geam_mmc_defconfig
@@ -11,9 +11,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6UL=y
CONFIG_TARGET_MX6UL_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_CMD_BMODE is not set
@@ -22,7 +23,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig
index 8f9583d..fcfdb21 100644
--- a/configs/imx6ul_geam_nand_defconfig
+++ b/configs/imx6ul_geam_nand_defconfig
@@ -11,9 +11,10 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_MX6UL=y
CONFIG_TARGET_MX6UL_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
# CONFIG_CMD_BMODE is not set
CONFIG_FIT=y
@@ -21,7 +22,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
CONFIG_SPL_WATCHDOG=y
diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig
index 18850f6..8b27b8d 100644
--- a/configs/imx6ul_isiot_emmc_defconfig
+++ b/configs/imx6ul_isiot_emmc_defconfig
@@ -11,9 +11,10 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6UL=y
CONFIG_TARGET_MX6UL_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_CMD_BMODE is not set
@@ -22,7 +23,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig
index a29dac0..d609057 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -11,9 +11,10 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_MX6UL=y
CONFIG_TARGET_MX6UL_ENGICAM=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
# CONFIG_CMD_BMODE is not set
CONFIG_FIT=y
@@ -21,7 +22,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
CONFIG_SPL_WATCHDOG=y
diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig
index 72a1dc2..8b9b1ad 100644
--- a/configs/imx7_cm_defconfig
+++ b/configs/imx7_cm_defconfig
@@ -10,17 +10,17 @@
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7-cm"
CONFIG_TARGET_IMX7_CM=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="ask"
# CONFIG_BOARD_EARLY_INIT_F is not set
@@ -62,6 +62,7 @@
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig
index 79e4bde..b19fd22 100644
--- a/configs/imx8mm-cl-iot-gate_defconfig
+++ b/configs/imx8mm-cl-iot-gate_defconfig
@@ -9,25 +9,23 @@
CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x4400
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-cl-iot-gate"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_CL_IOT_GATE=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
@@ -83,7 +81,6 @@
CONFIG_FASTBOOT_FLASH_MMC_DEV=2
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_DM_KEYBOARD=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
index abc4d65..3880022 100644
--- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
@@ -7,21 +7,22 @@
CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-ctouch2"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb"
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
@@ -56,7 +57,6 @@
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
index 5f45e33..8879c81 100644
--- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
@@ -7,21 +7,22 @@
CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-edimm2.2"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb"
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
@@ -56,7 +57,6 @@
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
index 78334c4..02cdeda 100644
--- a/configs/imx8mm_beacon_defconfig
+++ b/configs/imx8mm_beacon_defconfig
@@ -7,24 +7,22 @@
CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_BEACON=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_LTO=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb"
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
@@ -69,7 +67,6 @@
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_SPL_MMC_IO_VOLTAGE=y
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index f7f39b8..36230cf 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -7,24 +7,22 @@
CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_EVK=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8mm_evk/imximage-8mm-lpddr4.cfg"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
@@ -57,7 +55,6 @@
CONFIG_CLK_IMX8MM=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 44ff5f8..c622211 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -9,27 +9,25 @@
CONFIG_SYS_MEMTEST_END=0x80000000
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0xff0000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-venice"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_VENICE=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0xff8000
CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="gsc wd-disable"
@@ -72,7 +70,6 @@
CONFIG_CLK_IMX8MM=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_LED=y
CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig
index 8fec003..cb37442 100644
--- a/configs/imx8mn_beacon_2g_defconfig
+++ b/configs/imx8mn_beacon_2g_defconfig
@@ -10,26 +10,24 @@
CONFIG_SYS_MEMTEST_END=0x44000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_IMX8MN_BEACON_2GB_LPDDR=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_LTO=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb"
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -84,7 +82,6 @@
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index 5296204..59cae55 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -10,25 +10,23 @@
CONFIG_SYS_MEMTEST_END=0x44000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_LTO=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb"
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -84,7 +82,6 @@
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig
index 78943dd..c10846f 100644
--- a/configs/imx8mn_ddr4_evk_defconfig
+++ b/configs/imx8mn_ddr4_evk_defconfig
@@ -7,25 +7,23 @@
CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mn-ddr4-evk"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_DDR4_EVK=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8mn_evk/imximage-8mn-ddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="imx8mn-ddr4-evk.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -60,7 +58,6 @@
CONFIG_CLK_IMX8MN=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig
index 4b4a0d0..ae38f34 100644
--- a/configs/imx8mn_evk_defconfig
+++ b/configs/imx8mn_evk_defconfig
@@ -9,24 +9,22 @@
CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mn-evk"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_EVK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8mn_evk/imximage-8mn-ddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb"
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
@@ -62,7 +60,6 @@
CONFIG_CLK_IMX8MN=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index 2c6fc16..0abe137 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -10,22 +10,23 @@
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk"
CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_EVK=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
@@ -62,7 +63,7 @@
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
# CONFIG_SPL_DM_I2C is not set
-CONFIG_SYS_I2C_MXC=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_SUPPORT_EMMC_BOOT=y
@@ -80,9 +81,11 @@
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
+CONFIG_SPL_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPL_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig
index e0a038b..5b9dc52 100644
--- a/configs/imx8mq_cm_defconfig
+++ b/configs/imx8mq_cm_defconfig
@@ -9,20 +9,21 @@
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-cm"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MQ_CM=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_SPL_FIT_PRINT=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ronetix/imx8mq-cm/imximage-8mq-lpddr4.cfg"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
@@ -46,7 +47,7 @@
CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig
index 50132c8..62fe6f1 100644
--- a/configs/imx8mq_evk_defconfig
+++ b/configs/imx8mq_evk_defconfig
@@ -3,18 +3,22 @@
CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-evk"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MQ_EVK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -38,7 +42,7 @@
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
@@ -48,11 +52,13 @@
CONFIG_PHY_IMX8MQ_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
+CONFIG_SPL_POWER_LEGACY=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPL_POWER_I2C=y
CONFIG_DM_RESET=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig
index 3a1b60b..911c339 100644
--- a/configs/imx8mq_phanbell_defconfig
+++ b/configs/imx8mq_phanbell_defconfig
@@ -4,17 +4,21 @@
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MQ_PHANBELL=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y
@@ -44,17 +48,19 @@
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
+CONFIG_SPL_POWER_LEGACY=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPL_POWER_I2C=y
CONFIG_DM_RESET=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig
index a181d37..01ba6cf 100644
--- a/configs/imx8qm_mek_defconfig
+++ b/configs/imx8qm_mek_defconfig
@@ -8,25 +8,25 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_MALLOC_LEN=0x2400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-mek"
CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_TARGET_IMX8QM_MEK=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg"
+CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qm_mek/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
@@ -50,6 +50,7 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_SPL_DM=y
CONFIG_SPL_CLK=y
CONFIG_CLK_IMX8=y
diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig
index 3355635..bf7b1f1 100644
--- a/configs/imx8qm_rom7720_a1_4G_defconfig
+++ b/configs/imx8qm_rom7720_a1_4G_defconfig
@@ -7,23 +7,23 @@
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8qm-rom7720-a1"
CONFIG_TARGET_IMX8QM_ROM7720_A1=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/advantech/imx8qm_rom7720_a1/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
@@ -46,6 +46,7 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_CLK=y
diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig
index 19e7076..37b6a82 100644
--- a/configs/imx8qxp_mek_defconfig
+++ b/configs/imx8qxp_mek_defconfig
@@ -8,25 +8,25 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_MALLOC_LEN=0x2400000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-mek"
CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_TARGET_IMX8QXP_MEK=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg"
+CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_mek/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
@@ -50,6 +50,7 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_CLK=y
diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig
index 2a97c6d..f156100 100644
--- a/configs/imx8ulp_evk_defconfig
+++ b/configs/imx8ulp_evk_defconfig
@@ -7,16 +7,19 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_IMX_CONFIG=""
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8ulp-evk"
CONFIG_SPL_TEXT_BASE=0x22020000
CONFIG_TARGET_IMX8ULP_EVK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80480000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=0
@@ -37,6 +40,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_IMX_RGPIO2P=y
diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig
index e53c5ca..450f715 100644
--- a/configs/imxrt1020-evk_defconfig
+++ b/configs/imxrt1020-evk_defconfig
@@ -7,15 +7,17 @@
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x80000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imxrt1020-evk"
CONFIG_SPL_TEXT_BASE=0x20209000
CONFIG_TARGET_IMXRT1020_EVK=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SIZE_LIMIT=0x20000
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x20209000
CONFIG_SD_BOOT=y
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig
index 6b302a7..94363cf 100644
--- a/configs/imxrt1050-evk_defconfig
+++ b/configs/imxrt1050-evk_defconfig
@@ -9,15 +9,17 @@
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x80000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk"
CONFIG_SPL_TEXT_BASE=0x20209000
CONFIG_TARGET_IMXRT1050_EVK=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SIZE_LIMIT=0x20000
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x20209000
CONFIG_SD_BOOT=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig
index f9905d7..f81120b 100644
--- a/configs/inet1_defconfig
+++ b/configs/inet1_defconfig
@@ -15,6 +15,9 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig
index ebe5268..d5d2dc3 100644
--- a/configs/inet97fv2_defconfig
+++ b/configs/inet97fv2_defconfig
@@ -14,4 +14,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig
index ad6f944..bd6c45b 100644
--- a/configs/inet98v_rev2_defconfig
+++ b/configs/inet98v_rev2_defconfig
@@ -16,5 +16,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig
index b309d7f..4485f93 100644
--- a/configs/inet9f_rev03_defconfig
+++ b/configs/inet9f_rev03_defconfig
@@ -14,4 +14,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index 6141e15..cd62a9d 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2"
CONFIG_IDENT_STRING=" IS v2"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -22,6 +24,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
@@ -43,6 +46,10 @@
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_SATA_MV=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig
index 378bf93..e0ded88 100644
--- a/configs/integratorap_cm720t_defconfig
+++ b/configs/integratorap_cm720t_defconfig
@@ -5,6 +5,8 @@
CONFIG_CM720T=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
+CONFIG_SYS_MALLOC_LEN=0x28000
+CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig
index 4ec2961..2283bf6 100644
--- a/configs/integratorap_cm920t_defconfig
+++ b/configs/integratorap_cm920t_defconfig
@@ -5,6 +5,8 @@
CONFIG_CM920T=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
+CONFIG_SYS_MALLOC_LEN=0x28000
+CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig
index 012d346..63128d0 100644
--- a/configs/integratorap_cm926ejs_defconfig
+++ b/configs/integratorap_cm926ejs_defconfig
@@ -5,6 +5,8 @@
CONFIG_CM926EJ_S=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
+CONFIG_SYS_MALLOC_LEN=0x28000
+CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig
index 1868c70..043cc54 100644
--- a/configs/integratorap_cm946es_defconfig
+++ b/configs/integratorap_cm946es_defconfig
@@ -5,6 +5,8 @@
CONFIG_CM946ES=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
+CONFIG_SYS_MALLOC_LEN=0x28000
+CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig
index 824308c..d72e380 100644
--- a/configs/integratorcp_cm1136_defconfig
+++ b/configs/integratorcp_cm1136_defconfig
@@ -6,6 +6,8 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x22000
+CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig
index 93479e5..184fcc4 100644
--- a/configs/integratorcp_cm920t_defconfig
+++ b/configs/integratorcp_cm920t_defconfig
@@ -6,6 +6,8 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x22000
+CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig
index 5ee90cd..0bd4d63 100644
--- a/configs/integratorcp_cm926ejs_defconfig
+++ b/configs/integratorcp_cm926ejs_defconfig
@@ -6,6 +6,8 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x22000
+CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig
index 61c9020..d532eb6 100644
--- a/configs/integratorcp_cm946es_defconfig
+++ b/configs/integratorcp_cm946es_defconfig
@@ -6,6 +6,8 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x22000
+CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig
index e58b98d..e7d2cb3 100644
--- a/configs/iot_devkit_defconfig
+++ b/configs/iot_devkit_defconfig
@@ -6,9 +6,11 @@
CONFIG_TARGET_IOT_DEVKIT=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ENV_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x10000
CONFIG_DEFAULT_DEVICE_TREE="iot_devkit"
CONFIG_SYS_CLK_FREQ=16000000
CONFIG_LOCALVERSION="-iotdk-1.0"
+CONFIG_SYS_LOAD_ADDR=0x30000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_PROMPT="IoTDK# "
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index 81cc403..02e53d0 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -9,19 +9,20 @@
CONFIG_TARGET_J7200_A72_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board"
CONFIG_SPL_TEXT_BASE=0x80080000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
@@ -45,7 +46,6 @@
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig
index 5cbc043..f13ece9 100644
--- a/configs/j7200_evm_r5_defconfig
+++ b/configs/j7200_evm_r5_defconfig
@@ -8,18 +8,19 @@
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_J7200_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board"
CONFIG_SPL_TEXT_BASE=0x41c00000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
@@ -42,7 +43,6 @@
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index ea83fec..df1b850 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721e_evm_a72_defconfig
@@ -9,19 +9,20 @@
CONFIG_TARGET_J721E_A72_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
CONFIG_SPL_TEXT_BASE=0x80080000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
@@ -42,7 +43,6 @@
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index b5fd3bf..1a58135 100644
--- a/configs/j721e_evm_r5_defconfig
+++ b/configs/j721e_evm_r5_defconfig
@@ -8,18 +8,19 @@
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_J721E_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board"
CONFIG_SPL_TEXT_BASE=0x41c00000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
@@ -40,7 +41,6 @@
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig
index a424072..65b9908 100644
--- a/configs/j721e_hs_evm_a72_defconfig
+++ b/configs/j721e_hs_evm_a72_defconfig
@@ -9,18 +9,19 @@
CONFIG_TARGET_J721E_A72_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
CONFIG_SPL_TEXT_BASE=0x80080000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x700000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
@@ -40,7 +41,6 @@
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig
index 3a8e0b1..eb3a600 100644
--- a/configs/j721e_hs_evm_r5_defconfig
+++ b/configs/j721e_hs_evm_r5_defconfig
@@ -9,19 +9,20 @@
CONFIG_TARGET_J721E_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board"
CONFIG_SPL_TEXT_BASE=0x41c00000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x700000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
@@ -38,7 +39,6 @@
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig
index 1e252ea..0ff666b 100644
--- a/configs/jesurun_q5_defconfig
+++ b/configs/jesurun_q5_defconfig
@@ -9,6 +9,9 @@
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig
index 31acb27..50e85be 100644
--- a/configs/jetson-tk1_defconfig
+++ b/configs/jetson-tk1_defconfig
@@ -4,10 +4,12 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1"
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA124=y
CONFIG_TARGET_JETSON_TK1=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index 1bd02ce..6eccf6d 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
@@ -11,12 +13,13 @@
CONFIG_TARGET_K2E_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_USE_BOOTCOMMAND is not set
@@ -30,6 +33,9 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
@@ -50,9 +56,11 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SPL_DM=y
+CONFIG_TI_EDMA3=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index b59cf2b..0978b1b 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
@@ -10,6 +11,7 @@
CONFIG_TARGET_K2E_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
@@ -17,6 +19,9 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
@@ -35,9 +40,12 @@
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
+CONFIG_TI_EDMA3=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 000205e..aed3385 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
@@ -10,12 +12,13 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_K2G_EVM=y
CONFIG_ENV_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_USE_BOOTCOMMAND is not set
@@ -28,6 +31,9 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
@@ -51,8 +57,10 @@
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
+CONFIG_TI_EDMA3=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index 528b95f..ffa41de 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
@@ -9,6 +10,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_K2G_EVM=y
CONFIG_ENV_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
@@ -16,6 +18,9 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
@@ -37,8 +42,11 @@
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_DM=y
CONFIG_DFU_MMC=y
+CONFIG_TI_EDMA3=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 384063f..c7e6f7e 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
@@ -11,12 +13,13 @@
CONFIG_TARGET_K2HK_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_USE_BOOTCOMMAND is not set
@@ -30,6 +33,9 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
@@ -50,9 +56,11 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SPL_DM=y
+CONFIG_TI_EDMA3=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index 030dd47..1c0132e 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
@@ -10,6 +11,7 @@
CONFIG_TARGET_K2HK_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
@@ -17,6 +19,9 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
@@ -35,9 +40,12 @@
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
+CONFIG_TI_EDMA3=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index f0f2ff1..7324d7a 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
@@ -11,12 +13,13 @@
CONFIG_TARGET_K2L_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_USE_BOOTCOMMAND is not set
@@ -30,6 +33,9 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
@@ -50,9 +56,11 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SPL_DM=y
+CONFIG_TI_EDMA3=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig
index 096d65b..e46efc7 100644
--- a/configs/k2l_hs_evm_defconfig
+++ b/configs/k2l_hs_evm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
@@ -10,12 +11,16 @@
CONFIG_TARGET_K2L_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
@@ -36,9 +41,12 @@
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
+CONFIG_TI_EDMA3=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig
index c564086..6b9df2a 100644
--- a/configs/khadas-edge-captain-rk3399_defconfig
+++ b/configs/khadas-edge-captain-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig
index 4c63686..47b2b34 100644
--- a/configs/khadas-edge-rk3399_defconfig
+++ b/configs/khadas-edge-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig
index 1e44e2b..1caadb0 100644
--- a/configs/khadas-edge-v-rk3399_defconfig
+++ b/configs/khadas-edge-v-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig
index eb6202b..c852f7f 100644
--- a/configs/khadas-vim2_defconfig
+++ b/configs/khadas-vim2_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" khadas-vim2"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig
index e8809a8..a225a56 100644
--- a/configs/khadas-vim3_defconfig
+++ b/configs/khadas-vim3_defconfig
@@ -11,6 +11,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" khadas-vim3"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig
index 8eb52c0..9d94c31 100644
--- a/configs/khadas-vim3l_defconfig
+++ b/configs/khadas-vim3l_defconfig
@@ -11,6 +11,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" khadas-vim3l"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig
index 103ef54..5565635 100644
--- a/configs/khadas-vim_defconfig
+++ b/configs/khadas-vim_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" khadas-vim"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig
index e00d14c..d6624dd 100644
--- a/configs/km_kirkwood_128m16_defconfig
+++ b/configs/km_kirkwood_128m16_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_ENV_OFFSET_REDUND=0x2000
CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood 128M16"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
@@ -24,6 +26,9 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
@@ -43,6 +48,12 @@
CONFIG_NETCONSOLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_RAM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SLAVE=0x0
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig
index 490538d..bf696cd 100644
--- a/configs/km_kirkwood_defconfig
+++ b/configs/km_kirkwood_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_ENV_OFFSET_REDUND=0x2000
CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
@@ -24,6 +26,9 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
@@ -43,6 +48,12 @@
CONFIG_NETCONSOLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_RAM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SLAVE=0x0
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig
index 1f14a9b..0731bb5 100644
--- a/configs/km_kirkwood_pci_defconfig
+++ b/configs/km_kirkwood_pci_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_ENV_OFFSET_REDUND=0x2000
CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood PCI"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
@@ -25,6 +27,9 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
@@ -44,6 +49,12 @@
CONFIG_NETCONSOLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_RAM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SLAVE=0x0
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index 102af96..dafd5da 100644
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -44,6 +44,7 @@
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_SYS_FSL_DDR3=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig
index a54808d..9a56f44 100644
--- a/configs/kmcoge5ne_defconfig
+++ b/configs/kmcoge5ne_defconfig
@@ -156,6 +156,7 @@
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
CONFIG_LCRR_EADC_2=y
CONFIG_LCRR_CLKDIV_4=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -169,6 +170,9 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
# CONFIG_CMD_PINMUX is not set
@@ -189,6 +193,13 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=200000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig
index 51f0f87..12aa230 100644
--- a/configs/kmcoge5un_defconfig
+++ b/configs/kmcoge5un_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -14,6 +15,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_ENV_OFFSET_REDUND=0xD0000
CONFIG_IDENT_STRING="\nHitachi Power Grids COGE5UN"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
@@ -28,6 +30,9 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
@@ -47,6 +52,12 @@
CONFIG_NETCONSOLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_RAM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SLAVE=0x0
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig
index 5138a56..e1bce4a 100644
--- a/configs/kmeter1_defconfig
+++ b/configs/kmeter1_defconfig
@@ -127,6 +127,7 @@
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
CONFIG_LCRR_EADC_2=y
CONFIG_LCRR_CLKDIV_4=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -140,6 +141,9 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_I2C=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_DHCP=y
@@ -159,6 +163,13 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=200000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig
index 9b98034..06b2d1f 100644
--- a/configs/kmnusa_defconfig
+++ b/configs/kmnusa_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -14,6 +15,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_ENV_OFFSET_REDUND=0xD0000
CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
@@ -28,6 +30,9 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
@@ -47,6 +52,12 @@
CONFIG_NETCONSOLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_RAM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SLAVE=0x0
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig
index 80f74ea..75ab1ae 100644
--- a/configs/kmopti2_defconfig
+++ b/configs/kmopti2_defconfig
@@ -139,6 +139,7 @@
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -152,6 +153,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_I2C=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_DHCP=y
@@ -171,6 +174,13 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=200000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig
index 0482634..be5034f 100644
--- a/configs/kmsupx5_defconfig
+++ b/configs/kmsupx5_defconfig
@@ -119,6 +119,7 @@
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -132,6 +133,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -150,6 +153,13 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=200000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig
index e0b0ad6..a528bf5 100644
--- a/configs/kmsuse2_defconfig
+++ b/configs/kmsuse2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -15,6 +16,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_ENV_OFFSET_REDUND=0xD0000
CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="KM_SUSE2"
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
@@ -29,6 +31,9 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
@@ -48,6 +53,12 @@
CONFIG_NETCONSOLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_RAM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SLAVE=0x0
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig
index d98b2eb..315ba86 100644
--- a/configs/kmtegr1_defconfig
+++ b/configs/kmtegr1_defconfig
@@ -118,6 +118,7 @@
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1"
@@ -132,6 +133,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_DHCP=y
@@ -152,6 +155,13 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=200000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig
index 665adee..4c5509b 100644
--- a/configs/kmtepr2_defconfig
+++ b/configs/kmtepr2_defconfig
@@ -139,6 +139,7 @@
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -152,6 +153,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -170,6 +173,13 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=200000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index 228078a..b254879 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -12,17 +12,19 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7791-koelsch-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RMOBILE_BOARD_STRING="Koelsch"
CONFIG_R8A7791=y
CONFIG_TARGET_KOELSCH=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig
index a903878..4e25daf 100644
--- a/configs/kontron_sl28_defconfig
+++ b/configs/kontron_sl28_defconfig
@@ -7,19 +7,21 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x3e0000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28"
CONFIG_SPL_TEXT_BASE=0x18010000
CONFIG_SYS_FSL_SDHC_CLK_DIV=1
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SIZE_LIMIT=0x20000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3f0000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
@@ -31,7 +33,7 @@
CONFIG_PCI_INIT_R=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000
CONFIG_CMD_ASKENV=y
@@ -60,8 +62,9 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig
index 4a2d8af..b8f6d8a 100644
--- a/configs/kp_imx53_defconfig
+++ b/configs/kp_imx53_defconfig
@@ -5,12 +5,13 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_TARGET_KP_IMX53=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="imx53-kp"
CONFIG_ENV_OFFSET_REDUND=0x102000
# CONFIG_CMD_BMODE is not set
+CONFIG_SYS_LOAD_ADDR=0x72000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR="."
@@ -38,6 +39,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_PHYLIB=y
diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig
index 96c1061..85fdfad 100644
--- a/configs/kp_imx6q_tpc_defconfig
+++ b/configs/kp_imx6q_tpc_defconfig
@@ -11,18 +11,15 @@
CONFIG_MX6QDL=y
CONFIG_MX6_DDRCAL=y
CONFIG_TARGET_KP_IMX6Q_TPC=y
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-kp"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x102000
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index c051307..00c1564 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
@@ -15,6 +17,7 @@
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x60800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb"
diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig
index 8a51bf0..af611db 100644
--- a/configs/kzm9g_defconfig
+++ b/configs/kzm9g_defconfig
@@ -6,8 +6,10 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x60000
CONFIG_ARCH_RMOBILE_BOARD_STRING="KMC KZM-A9-GT"
CONFIG_TARGET_KZM9G=y
+CONFIG_SYS_LOAD_ADDR=0x43000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/null console=ttySC4,115200"
@@ -24,6 +26,8 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0x40000
CONFIG_VERSION_VARIABLE=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SH=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index ab6b208..2d323ed 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -12,17 +12,19 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7790-lager-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RMOBILE_BOARD_STRING="Lager"
CONFIG_R8A7790=y
CONFIG_TARGET_LAGER=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig
index a3afb1d..0f8a795 100644
--- a/configs/leez-rk3399_defconfig
+++ b/configs/leez-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_STACK_R=y
diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig
index 200d9ac..52bddd5 100644
--- a/configs/legoev3_defconfig
+++ b/configs/legoev3_defconfig
@@ -1,10 +1,13 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_DAVINCI=y
CONFIG_SYS_TEXT_BASE=0xc1080000
CONFIG_TARGET_LEGOEV3=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_DEFAULT_DEVICE_TREE="da850-lego-ev3"
+CONFIG_SYS_LOAD_ADDR=0xc0700000
CONFIG_BOOTDELAY=0
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n"
@@ -34,6 +37,7 @@
# CONFIG_NET is not set
CONFIG_DM=y
# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
index c494b58..fa4427a 100644
--- a/configs/libretech-ac_defconfig
+++ b/configs/libretech-ac_defconfig
@@ -13,6 +13,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" libretech-ac"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
index 8beb850..b729308 100644
--- a/configs/libretech-cc_defconfig
+++ b/configs/libretech-cc_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" libretech-cc"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig
index be95010..9f8a914 100644
--- a/configs/libretech-cc_v2_defconfig
+++ b/configs/libretech-cc_v2_defconfig
@@ -12,6 +12,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" libretech-cc-v2"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig
index 825add4..bde2bb8 100644
--- a/configs/libretech-s905d-pc_defconfig
+++ b/configs/libretech-s905d-pc_defconfig
@@ -13,6 +13,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" libretech-s905d-pc"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig
index 49e7d85..536f9e8 100644
--- a/configs/libretech-s912-pc_defconfig
+++ b/configs/libretech-s912-pc_defconfig
@@ -12,6 +12,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" libretech-s912-pc"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig
index cf2f204..b217f83 100644
--- a/configs/linkit-smart-7688_defconfig
+++ b/configs/linkit-smart-7688_defconfig
@@ -1,20 +1,25 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x80000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
CONFIG_SPL=y
CONFIG_ARCH_MTMIPS=y
CONFIG_SOC_MT7628=y
CONFIG_BOARD_LINKIT_SMART_7688=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 5f7d101..e214cf5 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -14,8 +15,9 @@
CONFIG_DEBUG_UART_BASE=0xFF180000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig
index a04cfdb..c8f3ee3 100644
--- a/configs/liteboard_defconfig
+++ b/configs/liteboard_defconfig
@@ -11,14 +11,14 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_MX6UL=y
CONFIG_TARGET_LITEBOARD=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-liteboard"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=1
CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig
index 79ac94a..fa01894 100644
--- a/configs/ls1012a2g5rdb_qspi_defconfig
+++ b/configs/ls1012a2g5rdb_qspi_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb"
CONFIG_FSL_LS_PPA=y
@@ -17,7 +18,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -41,6 +41,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig
index 7360a13..171a982 100644
--- a/configs/ls1012a2g5rdb_tfa_defconfig
+++ b/configs/ls1012a2g5rdb_tfa_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb"
CONFIG_QSPI_AHB_INIT=y
@@ -41,6 +42,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig
index 3844691..d21525d 100644
--- a/configs/ls1012afrdm_qspi_defconfig
+++ b/configs/ls1012afrdm_qspi_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm"
CONFIG_FSL_LS_PPA=y
@@ -16,7 +17,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -38,6 +38,7 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig
index 9046ec7..67c6f2a 100644
--- a/configs/ls1012afrdm_tfa_defconfig
+++ b/configs/ls1012afrdm_tfa_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm"
CONFIG_QSPI_AHB_INIT=y
@@ -38,6 +39,7 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
index 9d35727..53fb751 100644
--- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
@@ -6,6 +6,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy"
CONFIG_FSL_LS_PPA=y
@@ -15,7 +16,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -38,6 +38,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig
index 853014e..637fe86 100644
--- a/configs/ls1012afrwy_qspi_defconfig
+++ b/configs/ls1012afrwy_qspi_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1D0000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy"
CONFIG_FSL_LS_PPA=y
@@ -16,7 +17,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -43,6 +43,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
index ca05557..e11d6f8 100644
--- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy"
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -38,6 +39,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig
index 3282756..b751036 100644
--- a/configs/ls1012afrwy_tfa_defconfig
+++ b/configs/ls1012afrwy_tfa_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x1D0000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy"
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -42,6 +43,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig
index 2124716..0903650 100644
--- a/configs/ls1012aqds_qspi_defconfig
+++ b/configs/ls1012aqds_qspi_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
CONFIG_FSL_LS_PPA=y
@@ -17,7 +18,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -26,8 +26,11 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
@@ -54,6 +57,8 @@
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
index ec92358..02eecf0 100644
--- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
CONFIG_QSPI_AHB_INIT=y
@@ -24,8 +25,11 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
@@ -42,6 +46,8 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig
index 82a698f..fad0c1c 100644
--- a/configs/ls1012aqds_tfa_defconfig
+++ b/configs/ls1012aqds_tfa_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
CONFIG_QSPI_AHB_INIT=y
@@ -26,8 +27,11 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
@@ -54,6 +58,8 @@
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
index da45a3d..e190fbd 100644
--- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
@@ -6,6 +6,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
CONFIG_FSL_LS_PPA=y
@@ -16,7 +17,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -42,6 +42,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig
index 830e786..7f72a7b 100644
--- a/configs/ls1012ardb_qspi_defconfig
+++ b/configs/ls1012ardb_qspi_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
CONFIG_FSL_LS_PPA=y
@@ -17,7 +18,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -44,6 +44,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
index fd1f6fa..dcde6ca 100644
--- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
CONFIG_QSPI_AHB_INIT=y
@@ -41,6 +42,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig
index c83248c..390ccb5 100644
--- a/configs/ls1012ardb_tfa_defconfig
+++ b/configs/ls1012ardb_tfa_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
CONFIG_QSPI_AHB_INIT=y
@@ -43,6 +44,7 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig
index 131026c..10aeaf3 100644
--- a/configs/ls1021aiot_qspi_defconfig
+++ b/configs/ls1021aiot_qspi_defconfig
@@ -5,14 +5,21 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart"
CONFIG_AHCI=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
+CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_QSPI_BOOT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -31,6 +38,9 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x51
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 7c19898..742cfaa 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -4,20 +4,31 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_AHCI=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aiot/ls102xa_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -37,6 +48,9 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x51
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index cf64f0f..fea76a0 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -6,10 +7,15 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -18,10 +24,12 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -43,7 +51,13 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index cb63fb6..59790da 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -6,10 +7,15 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -19,10 +25,12 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -44,7 +52,13 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 072a1e6..6fff54b 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -8,36 +10,46 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x140000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -60,8 +72,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index e9d29f4..734e9cd 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -6,11 +7,16 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -19,10 +25,12 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -41,8 +49,14 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index 4c4050a..ae96127 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -6,10 +7,15 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -18,10 +24,12 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -43,8 +51,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 3378fc1..e3b506d 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -6,10 +7,15 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -19,10 +25,12 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -44,8 +52,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index 69a02a4..31fd786 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_NR_DRAM_BANKS=1
@@ -7,23 +8,29 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -45,7 +52,12 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 50ba009..c7dd54c 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -8,34 +10,44 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -58,8 +70,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 0c74e9b..a5e64fa 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -8,33 +10,43 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -57,7 +69,12 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig
index 6103ab3..9645ad0 100644
--- a/configs/ls1021atsn_qspi_defconfig
+++ b/configs/ls1021atsn_qspi_defconfig
@@ -5,19 +5,25 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn"
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
@@ -32,6 +38,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x51
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig
index 8cc0360..f76e567 100644
--- a/configs/ls1021atsn_sdcard_defconfig
+++ b/configs/ls1021atsn_sdcard_defconfig
@@ -6,29 +6,39 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn"
CONFIG_SPL_TEXT_BASE=0x10000000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atsn/ls102xa_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atsn/ls102xa_rcw_sd.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
@@ -43,6 +53,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x51
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index d2d2fcc..8abf5a6 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -6,11 +7,16 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -21,8 +27,10 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -36,6 +44,9 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index fa20ee8..b0883c5 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -6,10 +7,15 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -20,8 +26,10 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -38,6 +46,9 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index 11d2108..8a38382 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -6,10 +7,15 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart"
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -22,8 +28,10 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -40,6 +48,9 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index 50337a8..00d9871 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_NR_DRAM_BANKS=1
@@ -7,15 +8,19 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -24,7 +29,9 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -41,6 +48,9 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 106f8ec..561a390 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -8,34 +10,44 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg"
CONFIG_BOOTDELAY=0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -52,6 +64,9 @@
# CONFIG_SPL_BLK is not set
CONFIG_DM_I2C=y
# CONFIG_SPL_DM_I2C is not set
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
# CONFIG_SPL_DM_MMC is not set
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index 67b83b7..3bf93dd 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -8,19 +10,27 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -28,15 +38,17 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -53,6 +65,9 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index c82c297..624fba9 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -8,19 +10,27 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1020000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -28,14 +38,16 @@
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -52,6 +64,9 @@
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 5b60c4a..6dc1b7f 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1028AQDS=y
CONFIG_TFABOOT=y
@@ -8,6 +9,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart"
CONFIG_FSPI_AHB_EN_4BYTE=y
@@ -22,7 +24,9 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
@@ -40,11 +44,12 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 311cfe3..a0a277c 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1028AQDS=y
CONFIG_TFABOOT=y
@@ -9,6 +10,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart"
CONFIG_FSPI_AHB_EN_4BYTE=y
@@ -23,7 +25,9 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
@@ -46,11 +50,12 @@
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig
index 6805f5e..2ae1077 100644
--- a/configs/ls1028aqds_tfa_lpuart_defconfig
+++ b/configs/ls1028aqds_tfa_lpuart_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_LS1028AQDS=y
CONFIG_TFABOOT=y
CONFIG_SYS_MALLOC_F_LEN=0x6000
@@ -8,6 +9,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart"
CONFIG_FSPI_AHB_EN_4BYTE=y
@@ -23,7 +25,9 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
@@ -46,11 +50,12 @@
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index 7eecbae..995cfa6 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1028ARDB=y
CONFIG_TFABOOT=y
@@ -8,6 +9,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb"
CONFIG_FSPI_AHB_EN_4BYTE=y
@@ -21,7 +23,9 @@
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
@@ -39,11 +43,12 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 6934a59..9f10146 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1028ARDB=y
CONFIG_TFABOOT=y
@@ -9,6 +10,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb"
CONFIG_FSPI_AHB_EN_4BYTE=y
@@ -22,7 +24,9 @@
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
@@ -45,11 +49,12 @@
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index d89f657..4c79962 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -6,6 +6,11 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -22,6 +27,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -40,7 +46,13 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index 8e4eaf2..6df0983 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -6,6 +6,11 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -23,6 +28,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -41,7 +47,13 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index 0bc4327..57908b4 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -8,19 +8,27 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_nand.cfg"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -32,12 +40,13 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -57,7 +66,13 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 1fbb5ea..09edcd9 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -6,6 +6,11 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -22,6 +27,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -40,8 +46,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index 4f7e457..fbd845f 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -7,6 +7,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -15,7 +20,6 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -24,6 +28,7 @@
CONFIG_MISC_INIT_R=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -42,7 +47,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 8e780b3..ae89982 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -8,20 +8,28 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -33,11 +41,12 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -57,7 +66,13 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 2cb088c..f532411 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -8,20 +8,28 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -33,10 +41,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -55,7 +64,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
index 6b908ed..327dc8f 100644
--- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
@@ -7,6 +7,11 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -24,6 +29,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -39,7 +45,14 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig
index a229001..7855c7b 100644
--- a/configs/ls1043aqds_tfa_defconfig
+++ b/configs/ls1043aqds_tfa_defconfig
@@ -8,6 +8,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -25,6 +30,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -49,7 +55,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 8885896..394ae1e 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -4,6 +4,11 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FSL_LS_PPA=y
@@ -15,6 +20,7 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_MISC_INIT_R=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -28,7 +34,12 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
+# CONFIG_DDR_SPD is not set
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index 413e0c7..cc9bc5a 100644
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -4,6 +4,11 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FSL_LS_PPA=y
@@ -15,6 +20,7 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_MISC_INIT_R=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -31,7 +37,12 @@
CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 2d3fe4f..8e47f81 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -6,17 +6,21 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -27,10 +31,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -48,6 +53,8 @@
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index 7bc186a..5b839bc 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -6,17 +6,25 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -29,10 +37,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -51,6 +60,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index d586418..fef8121 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -6,18 +6,22 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -27,10 +31,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_SPL=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -49,6 +54,8 @@
CONFIG_SPL_DM=y
# CONFIG_SPL_BLK is not set
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
# CONFIG_SPL_DM_MMC is not set
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index c91f9df..a625ec7 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -6,18 +6,26 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -28,10 +36,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_SPL=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -50,6 +59,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
index a3c17f0..b48d5f4 100644
--- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -5,6 +5,11 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -17,6 +22,7 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_MISC_INIT_R=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -30,7 +36,12 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
+# CONFIG_DDR_SPD is not set
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index 58313e4a..f785d99 100644
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -6,6 +6,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -18,6 +23,7 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_MISC_INIT_R=y
CONFIG_CMD_IMLS=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -36,7 +42,12 @@
CONFIG_ENV_ADDR=0x60500000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
index b510028..ebca3c7 100644
--- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
@@ -5,6 +5,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -18,6 +19,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_MISC_INIT_R=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -32,7 +34,10 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig
index 96ab70b..6816fb3 100644
--- a/configs/ls1046afrwy_tfa_defconfig
+++ b/configs/ls1046afrwy_tfa_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -20,6 +21,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_MISC_INIT_R=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -38,7 +40,10 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x52
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
index 1e70e37..32ed2aa 100644
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -6,6 +6,11 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -22,6 +27,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -38,7 +44,12 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index 7351e49..240bd07 100644
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -6,6 +6,11 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -22,6 +27,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -41,7 +47,12 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index c6f8a36..27632812 100644
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -6,6 +6,11 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -23,6 +28,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -42,7 +48,12 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index c406d86..5979381 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -6,18 +6,25 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -28,9 +35,11 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -50,7 +59,12 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index a088c82..a3ac42f 100644
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -7,6 +7,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -23,6 +28,7 @@
CONFIG_MISC_INIT_R=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -42,7 +48,13 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index 15f8d45..7bf63bb 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -8,20 +8,27 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -34,11 +41,12 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -59,7 +67,12 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index 3278cd2..3761aaf 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -8,20 +8,28 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -34,10 +42,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -57,7 +66,13 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
index 42d67dc..8b75fe8 100644
--- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
@@ -7,6 +7,11 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -24,6 +29,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -40,7 +46,13 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig
index 8ae5159..ff0d8ff 100644
--- a/configs/ls1046aqds_tfa_defconfig
+++ b/configs/ls1046aqds_tfa_defconfig
@@ -8,6 +8,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -25,6 +30,7 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -49,7 +55,13 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index eeb6e93..e5402a2 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -6,19 +6,27 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,EMMC_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046ardb/ls1046ardb_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -31,8 +39,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -52,7 +61,11 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -70,6 +83,8 @@
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
index edb20e7..cd9e3a4 100644
--- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@@ -4,6 +4,11 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_FSL_LS_PPA=y
@@ -12,11 +17,15 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_MISC_INIT_R=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -33,7 +42,11 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -52,6 +65,8 @@
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig
index 087c17b..93f0e88 100644
--- a/configs/ls1046ardb_qspi_defconfig
+++ b/configs/ls1046ardb_qspi_defconfig
@@ -5,6 +5,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_FSL_LS_PPA=y
@@ -13,11 +18,15 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_MISC_INIT_R=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -37,7 +46,11 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -56,6 +69,8 @@
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig
index 45ee904..a88baaf 100644
--- a/configs/ls1046ardb_qspi_spl_defconfig
+++ b/configs/ls1046ardb_qspi_spl_defconfig
@@ -7,13 +7,18 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
@@ -22,6 +27,9 @@
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -30,12 +38,13 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_OS_BASE=0x40980000
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_SPL=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -56,7 +65,11 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -74,6 +87,8 @@
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index 9481e0a..c4a9315 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -6,18 +6,25 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046ardb/ls1046ardb_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -28,8 +35,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -48,8 +56,12 @@
CONFIG_DM=y
CONFIG_SPL_DM=y
# CONFIG_SPL_BLK is not set
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
# CONFIG_SPL_DM_I2C is not set
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
# CONFIG_SPL_DM_MMC is not set
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
@@ -67,6 +79,8 @@
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index cd53d48..9ed24bb 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -6,19 +6,26 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
+CONFIG_RAMBOOT_PBL=y
+CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046ardb/ls1046ardb_pbi.cfg"
+CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -30,8 +37,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -51,7 +59,11 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -69,6 +81,8 @@
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
index bc37699..a14df4d 100644
--- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
@@ -5,6 +5,11 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_QSPI_AHB_INIT=y
@@ -18,6 +23,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_MISC_INIT_R=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -33,7 +39,11 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -52,6 +62,8 @@
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig
index 997fa19..85491a3 100644
--- a/configs/ls1046ardb_tfa_defconfig
+++ b/configs/ls1046ardb_tfa_defconfig
@@ -6,6 +6,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
CONFIG_QSPI_AHB_INIT=y
@@ -19,6 +24,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_MISC_INIT_R=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -39,7 +45,11 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -58,6 +68,8 @@
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig
index ef35ae4..bb7321d 100644
--- a/configs/ls1088aqds_defconfig
+++ b/configs/ls1088aqds_defconfig
@@ -7,6 +7,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -16,13 +17,13 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -44,6 +45,12 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
index eddfd40..70b4a70 100644
--- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -18,13 +19,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT"
+CONFIG_QSPI_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -42,6 +44,10 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig
index 255b977..45e8d30 100644
--- a/configs/ls1088aqds_qspi_defconfig
+++ b/configs/ls1088aqds_qspi_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -19,13 +20,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT"
+CONFIG_QSPI_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -45,6 +47,10 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig
index 10e1fec..20efb75 100644
--- a/configs/ls1088aqds_sdcard_ifc_defconfig
+++ b/configs/ls1088aqds_sdcard_ifc_defconfig
@@ -9,19 +9,19 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_SD_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
@@ -31,9 +31,10 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -55,6 +56,12 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig
index a802311..e724e8b 100644
--- a/configs/ls1088aqds_sdcard_qspi_defconfig
+++ b/configs/ls1088aqds_sdcard_qspi_defconfig
@@ -9,13 +9,14 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
@@ -34,8 +35,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
@@ -55,6 +57,10 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index a2d0d6d..1b32f1f 100644
--- a/configs/ls1088aqds_tfa_defconfig
+++ b/configs/ls1088aqds_tfa_defconfig
@@ -10,6 +10,7 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -21,13 +22,13 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
@@ -54,11 +55,14 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
index dae51c4..5af7d53 100644
--- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -18,7 +19,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT"
+CONFIG_QSPI_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
@@ -26,6 +27,7 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
@@ -44,6 +46,12 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_MXC_I2C1_SPEED=40000000
+CONFIG_SYS_MXC_I2C2_SPEED=40000000
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig
index 6032f6c..1133dde 100644
--- a/configs/ls1088ardb_qspi_defconfig
+++ b/configs/ls1088ardb_qspi_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -19,7 +20,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT"
+CONFIG_QSPI_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
@@ -27,6 +28,7 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
@@ -47,6 +49,12 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_MXC_I2C1_SPEED=40000000
+CONFIG_SYS_MXC_I2C2_SPEED=40000000
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
index b7c72cb..7301a09 100644
--- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
@@ -9,13 +9,14 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
@@ -34,8 +35,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
@@ -56,6 +58,12 @@
CONFIG_SPL_DM=y
CONFIG_SCSI_AHCI=y
# CONFIG_SPL_BLK is not set
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_MXC_I2C1_SPEED=40000000
+CONFIG_SYS_MXC_I2C2_SPEED=40000000
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
# CONFIG_SPL_DM_MMC is not set
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig
index 28affca..17c4c6a 100644
--- a/configs/ls1088ardb_sdcard_qspi_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_defconfig
@@ -9,13 +9,14 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
@@ -35,8 +36,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
@@ -57,6 +59,12 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_MXC_I2C1_SPEED=40000000
+CONFIG_SYS_MXC_I2C2_SPEED=40000000
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
index 69a3cef..dca0cf6 100644
--- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
@@ -9,6 +9,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -20,7 +21,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
@@ -28,6 +28,7 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
@@ -45,11 +46,13 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig
index 7949089..eeb45ce 100644
--- a/configs/ls1088ardb_tfa_defconfig
+++ b/configs/ls1088ardb_tfa_defconfig
@@ -10,6 +10,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -21,7 +22,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
@@ -29,6 +29,7 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
@@ -51,11 +52,13 @@
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index fcbd732..67c8481 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -5,6 +5,7 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
@@ -20,6 +21,8 @@
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -36,6 +39,11 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index 3a457a7..61a073d 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -5,6 +5,7 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
@@ -20,6 +21,8 @@
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -39,6 +42,11 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index e4c7a30..3976284 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -7,10 +7,11 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xE0000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
@@ -25,10 +26,12 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -50,6 +53,12 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 0b0e673..51c1563 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_AHCI=y
@@ -13,7 +14,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -21,6 +21,8 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -41,6 +43,12 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index 29df680..ff953a7 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -7,19 +7,19 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
@@ -29,8 +29,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
@@ -48,6 +49,12 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 365ee87..6706aa8 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -5,6 +5,7 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
@@ -21,6 +22,8 @@
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -36,6 +39,11 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index cb46f4e..5d07947 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -5,6 +5,7 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
@@ -21,6 +22,8 @@
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -39,6 +42,11 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index d371fa5..cd2cab4 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -7,10 +7,11 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x200000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
@@ -26,11 +27,13 @@
CONFIG_MISC_INIT_R=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -49,6 +52,11 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index 26692b2..5f7b45d 100644
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
@@ -22,6 +23,7 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -39,6 +41,12 @@
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig
index 113f6a4..7211571 100644
--- a/configs/ls2088aqds_tfa_defconfig
+++ b/configs/ls2088aqds_tfa_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -24,6 +25,8 @@
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -49,11 +52,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
index bd16602..1a4f709 100644
--- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
@@ -5,6 +5,7 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -20,6 +21,7 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -35,6 +37,12 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 3a42603..ef27812 100644
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -23,6 +24,7 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -42,6 +44,12 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_EARLY_INIT=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
index 1799c09..daf459d 100644
--- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -25,6 +26,8 @@
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -40,11 +43,14 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index cfd3df4..16d373c 100644
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -26,6 +27,8 @@
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -47,11 +50,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 79f5960..471b17e 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2"
CONFIG_IDENT_STRING=" LS-CHLv2"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_API=y
CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2"
CONFIG_SHOW_BOOT_PROGRESS=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index 08405a1..4188c32 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl"
CONFIG_IDENT_STRING=" LS-XHL"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_API=y
CONFIG_SYS_EXTRA_OPTIONS="LSXHL"
CONFIG_SHOW_BOOT_PROGRESS=y
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 91fba19..ff2bce0 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160AQDS=y
CONFIG_TFABOOT=y
@@ -7,6 +8,7 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -25,6 +27,8 @@
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -41,11 +45,14 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index d52063c..06f0797 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160AQDS=y
CONFIG_TFABOOT=y
@@ -8,6 +9,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -27,6 +29,8 @@
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -48,11 +52,14 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 94e103c..d603c32 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160ARDB=y
CONFIG_TFABOOT=y
@@ -7,6 +8,7 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -25,6 +27,8 @@
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -39,9 +43,12 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index d09bcde..e763fa6 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160ARDB=y
CONFIG_TFABOOT=y
@@ -8,6 +9,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -27,6 +29,8 @@
CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -47,9 +51,12 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig
index 93b1e49..222a8c5 100644
--- a/configs/lx2160ardb_tfa_stmm_defconfig
+++ b/configs/lx2160ardb_tfa_stmm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2160ARDB=y
CONFIG_TFABOOT=y
@@ -8,6 +9,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -28,6 +30,8 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -47,9 +51,12 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
index 7ade202..f91067d 100644
--- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2162AQDS=y
CONFIG_TFABOOT=y
@@ -7,6 +8,7 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x2000
CONFIG_NXP_ESBC=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -23,8 +25,11 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -42,12 +47,15 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig
index 2724f04..10262aa 100644
--- a/configs/lx2162aqds_tfa_defconfig
+++ b/configs/lx2162aqds_tfa_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2162AQDS=y
CONFIG_TFABOOT=y
@@ -8,6 +9,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -25,8 +27,11 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -49,12 +54,15 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig
index fa2a027..9623238 100644
--- a/configs/lx2162aqds_tfa_verified_boot_defconfig
+++ b/configs/lx2162aqds_tfa_verified_boot_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LX2162AQDS=y
CONFIG_TFABOOT=y
@@ -8,6 +9,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds"
CONFIG_FSL_USE_PCA9547_MUX=y
@@ -26,8 +28,11 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -50,12 +55,15 @@
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig
index 505dd07..a0fceb3 100644
--- a/configs/m53menlo_defconfig
+++ b/configs/m53menlo_defconfig
@@ -9,19 +9,23 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_TARGET_M53MENLO=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx53-m53menlo"
CONFIG_SPL_TEXT_BASE=0x70008000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0x180000
# CONFIG_CMD_BMODE is not set
+CONFIG_SYS_LOAD_ADDR=0x70800000
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/menlo/m53menlo/imximage.cfg"
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttymxc0,115200"
@@ -66,6 +70,9 @@
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index d1c63c2..a6fe5c1 100644
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -2,9 +2,11 @@
CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBE000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="mti,malta"
CONFIG_TARGET_MALTA=y
CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_LOAD_ADDR=0xffffffff81000000
# CONFIG_AUTOBOOT is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index 5b51a37..909b364 100644
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -2,11 +2,13 @@
CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBE000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="mti,malta"
CONFIG_TARGET_MALTA=y
CONFIG_BUILD_TARGET="u-boot-swap.bin"
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_LOAD_ADDR=0xffffffff81000000
# CONFIG_AUTOBOOT is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index 756ed8a..0af4617 100644
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0xBE000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="mti,malta"
CONFIG_TARGET_MALTA=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
# CONFIG_AUTOBOOT is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index 384bb2f..1564e92 100644
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -2,10 +2,12 @@
CONFIG_SYS_TEXT_BASE=0xBE000000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="mti,malta"
CONFIG_TARGET_MALTA=y
CONFIG_BUILD_TARGET="u-boot-swap.bin"
CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
# CONFIG_AUTOBOOT is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig
index 62f0b2f..8e0aa04 100644
--- a/configs/marsboard_defconfig
+++ b/configs/marsboard_defconfig
@@ -5,12 +5,16 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6q.cfg"
CONFIG_MX6Q=y
CONFIG_TARGET_EMBESTMX6BOARDS=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-marsboard"
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,DDR_MB=1024"
CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -29,6 +33,9 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index f4e493c..bc36a83 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -12,11 +12,12 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
CONFIG_SPL_TEXT_BASE=0x40004030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -36,6 +37,10 @@
CONFIG_ENV_SPI_MAX_HZ=50000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
# CONFIG_MMC is not set
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig
index 2c82e3c..9fabc29 100644
--- a/configs/mccmon6_nor_defconfig
+++ b/configs/mccmon6_nor_defconfig
@@ -6,20 +6,19 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_IMX_CONFIG="board/liebherr/mccmon6/mon6_imximage_nor.cfg"
CONFIG_MX6QDL=y
CONFIG_TARGET_MCCMON6=y
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
# CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg"
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index 5c1aea8..f9d586a 100644
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -6,21 +6,20 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_IMX_CONFIG="board/liebherr/mccmon6/mon6_imximage_sd.cfg"
CONFIG_MX6QDL=y
CONFIG_TARGET_MCCMON6=y
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
# CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg"
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig
index 9237838..c50d077 100644
--- a/configs/medcom-wide_defconfig
+++ b/configs/medcom-wide_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_TEGRA20=y
CONFIG_TARGET_MEDCOM_WIDE=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig
index ee6b9e1..67934ae 100644
--- a/configs/meerkat96_defconfig
+++ b/configs/meerkat96_defconfig
@@ -6,6 +6,7 @@
CONFIG_SYS_MEMTEST_END=0xa0000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x80000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-meerkat96"
CONFIG_TARGET_MEERKAT96=y
@@ -13,7 +14,6 @@
# CONFIG_ARMV7_VIRT is not set
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/novtech/meerkat96/imximage.cfg"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index 9d4c9eb..b3b1f30 100644
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
@@ -8,8 +9,10 @@
CONFIG_ENV_SIZE=0x4200
CONFIG_ENV_OFFSET=0x4200
CONFIG_ENV_SECT_SIZE=0x210
+CONFIG_SYS_MALLOC_LEN=0x2d000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
+CONFIG_SYS_LOAD_ADDR=0x20100000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index 69d8935..38473af 100644
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
@@ -6,8 +7,10 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
+CONFIG_SYS_LOAD_ADDR=0x20100000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index bd6e10a..8db9bac 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -4,8 +4,9 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0xc0000
CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_TARGET_MICROBLAZE_GENERIC=y
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
@@ -13,6 +14,7 @@
CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=-1
diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
index 1cb2920..90ae76c 100644
--- a/configs/microchip_mpfs_icicle_defconfig
+++ b/configs/microchip_mpfs_icicle_defconfig
@@ -1,12 +1,14 @@
CONFIG_RISCV=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DEFAULT_DEVICE_TREE="microchip-mpfs-icicle-kit"
CONFIG_TARGET_MICROCHIP_ICICLE=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_SBI_V01=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index d815fda..ddffbc6 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
@@ -12,6 +13,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb"
diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig
index 082f461..21f7a6e 100644
--- a/configs/mk802_a10s_defconfig
+++ b/configs/mk802_a10s_defconfig
@@ -8,6 +8,9 @@
CONFIG_USB1_VBUS_PIN="PB10"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_AXP152_POWER=y
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig
index b5e9d23..416565e 100644
--- a/configs/mk802_defconfig
+++ b/configs/mk802_defconfig
@@ -5,6 +5,9 @@
CONFIG_MACH_SUN4I=y
CONFIG_USB2_VBUS_PIN="PH12"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_SUNXI_NO_PMIC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig
index 38b00b2..965a9cd 100644
--- a/configs/mk802ii_defconfig
+++ b/configs/mk802ii_defconfig
@@ -5,5 +5,8 @@
CONFIG_MACH_SUN4I=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig
index 8907dc2..03b378d 100644
--- a/configs/mscc_jr2_defconfig
+++ b/configs/mscc_jr2_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="jr2_pcb110"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -16,6 +17,7 @@
CONFIG_SOC_JR2=y
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig
index 498ddd5..8364e49 100644
--- a/configs/mscc_luton_defconfig
+++ b/configs/mscc_luton_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="luton_pcb091"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -18,6 +19,7 @@
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig
index 0d5c13a..cc1aa79 100644
--- a/configs/mscc_ocelot_defconfig
+++ b/configs/mscc_ocelot_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ocelot_pcb123"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -15,6 +16,7 @@
CONFIG_ARCH_MSCC=y
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig
index 6d9e827..8af95aa 100644
--- a/configs/mscc_serval_defconfig
+++ b/configs/mscc_serval_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="serval_pcb106"
CONFIG_ENV_OFFSET_REDUND=0x140000
@@ -13,6 +14,7 @@
CONFIG_SOC_SERVAL=y
CONFIG_DDRTYPE_H5TQ1G63BFA=y
CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig
index 0e98252..1530fef 100644
--- a/configs/mscc_servalt_defconfig
+++ b/configs/mscc_servalt_defconfig
@@ -6,12 +6,14 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x1f0000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="servalt_pcb116"
CONFIG_ENV_OFFSET_REDUND=0x140000
CONFIG_ARCH_MSCC=y
CONFIG_SOC_SERVALT=y
CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig
index 5e9d267..d6095fa 100644
--- a/configs/mt7620_mt7530_rfb_defconfig
+++ b/configs/mt7620_mt7530_rfb_defconfig
@@ -1,21 +1,26 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x30000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xb0000c00
CONFIG_DEBUG_UART_CLOCK=40000000
CONFIG_ARCH_MTMIPS=y
CONFIG_BOARD_MT7620_MT7530_RFB=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x80010000
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig
index cbdd9b6..7a6a3de 100644
--- a/configs/mt7620_rfb_defconfig
+++ b/configs/mt7620_rfb_defconfig
@@ -1,20 +1,25 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x30000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-rfb"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xb0000c00
CONFIG_DEBUG_UART_CLOCK=40000000
CONFIG_ARCH_MTMIPS=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x80010000
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig
index ebb4045..4615be1 100644
--- a/configs/mt7622_rfb_defconfig
+++ b/configs/mt7622_rfb_defconfig
@@ -8,6 +8,7 @@
CONFIG_DEBUG_UART_BASE=0x11002000
CONFIG_DEBUG_UART_CLOCK=25000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x4007ff28
CONFIG_FIT=y
CONFIG_DEFAULT_FDT_FILE="mt7622-rfb"
CONFIG_LOGLEVEL=7
diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig
index 7085f36..c846dce 100644
--- a/configs/mt7623a_unielec_u7623_02_defconfig
+++ b/configs/mt7623a_unielec_u7623_02_defconfig
@@ -9,6 +9,7 @@
CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc"
CONFIG_TARGET_MT7623=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x84000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=3
diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig
index bd35dba..d5c1082 100644
--- a/configs/mt7623n_bpir2_defconfig
+++ b/configs/mt7623n_bpir2_defconfig
@@ -9,6 +9,7 @@
CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2"
CONFIG_TARGET_MT7623=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x84000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=3
diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig
index 0396860..1e05131 100644
--- a/configs/mt7628_rfb_defconfig
+++ b/configs/mt7628_rfb_defconfig
@@ -1,19 +1,24 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x30000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
CONFIG_SPL=y
CONFIG_ARCH_MTMIPS=y
CONFIG_SOC_MT7628=y
CONFIG_BOARD_MT7628_RFB=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_MIPS_BOOT_FDT=y
+CONFIG_SYS_LOAD_ADDR=0x80010000
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig
index 43e7070..cd993bc 100644
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -9,12 +9,13 @@
CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb"
CONFIG_SPL_TEXT_BASE=0x201000
CONFIG_TARGET_MT7629=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x40800000
CONFIG_SPL_PAYLOAD="u-boot-lzma.img"
CONFIG_BUILD_TARGET="u-boot-mtk.bin"
CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin"
+CONFIG_SYS_LOAD_ADDR=0x42007f1c
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=3
diff --git a/configs/mt8183_pumpkin_defconfig b/configs/mt8183_pumpkin_defconfig
index a2f06a9..08fc603 100644
--- a/configs/mt8183_pumpkin_defconfig
+++ b/configs/mt8183_pumpkin_defconfig
@@ -13,6 +13,7 @@
CONFIG_DEBUG_UART_CLOCK=26000000
# CONFIG_PSCI_RESET is not set
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x4c000000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
@@ -60,6 +61,7 @@
CONFIG_DM_ETH=y
CONFIG_PHY=y
CONFIG_PHY_MTK_TPHY=y
+# CONFIG_POWER is not set
CONFIG_BAUDRATE=921600
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig
index 3e2d645..cdb7f45 100644
--- a/configs/mt8512_bm1_emmc_defconfig
+++ b/configs/mt8512_bm1_emmc_defconfig
@@ -5,9 +5,11 @@
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="mt8512-bm1-emmc"
CONFIG_TARGET_MT8512=y
+CONFIG_SYS_LOAD_ADDR=0x41000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_DEFAULT_FDT_FILE="mt8512-bm1-emmc.dtb"
diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig
index 63da1ea..c0786bd 100644
--- a/configs/mt8516_pumpkin_defconfig
+++ b/configs/mt8516_pumpkin_defconfig
@@ -12,6 +12,7 @@
CONFIG_DEBUG_UART_CLOCK=26000000
# CONFIG_PSCI_RESET is not set
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x4c000000
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_DEFAULT_FDT_FILE="mt8516-pumpkin"
diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig
index e6c2dd0..73418a0 100644
--- a/configs/mt8518_ap1_emmc_defconfig
+++ b/configs/mt8518_ap1_emmc_defconfig
@@ -5,8 +5,10 @@
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="mt8518-ap1-emmc"
CONFIG_TARGET_MT8518=y
+CONFIG_SYS_LOAD_ADDR=0x41000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_DEFAULT_FDT_FILE="mt8518-ap1-emmc.dtb"
diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig
index e1075d7..f0f50a9 100644
--- a/configs/mvebu_crb_cn9130_defconfig
+++ b/configs/mvebu_crb_cn9130_defconfig
@@ -14,6 +14,7 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig
index 4fadc23..d401f47 100644
--- a/configs/mvebu_db-88f3720_defconfig
+++ b/configs/mvebu_db-88f3720_defconfig
@@ -15,6 +15,7 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x6000000
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig
index adcc5d1..4ad6d4d 100644
--- a/configs/mvebu_db_armada8k_defconfig
+++ b/configs/mvebu_db_armada8k_defconfig
@@ -15,6 +15,7 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig
index 0ab1cc8..ec020ab 100644
--- a/configs/mvebu_db_cn9130_defconfig
+++ b/configs/mvebu_db_cn9130_defconfig
@@ -16,6 +16,7 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig
index 7611874..01cf24a 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -15,6 +15,7 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x6000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig
index 7fd9e25..44f16b6 100644
--- a/configs/mvebu_mcbin-88f8040_defconfig
+++ b/configs/mvebu_mcbin-88f8040_defconfig
@@ -16,6 +16,7 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig
index 5653f92..c521f2c 100644
--- a/configs/mvebu_puzzle-m801-88f8040_defconfig
+++ b/configs/mvebu_puzzle-m801-88f8040_defconfig
@@ -16,6 +16,7 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
CONFIG_AUTOBOOT_STOP_STR="s"
diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig
index 5805205..7fc7cc6 100644
--- a/configs/mx23_olinuxino_defconfig
+++ b/configs/mx23_olinuxino_defconfig
@@ -7,12 +7,14 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x40000
+CONFIG_IMX_CONFIG=""
CONFIG_DEFAULT_DEVICE_TREE="imx23-olinuxino"
CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_MX23_OLINUXINO=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig
index ab45a9c..8808f20 100644
--- a/configs/mx23evk_defconfig
+++ b/configs/mx23evk_defconfig
@@ -7,12 +7,14 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x40000
+CONFIG_IMX_CONFIG=""
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx23-evk"
CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_MX23EVK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index 1f61dda..9346efb 100644
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -7,10 +7,12 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x40000
+CONFIG_IMX_CONFIG=""
CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_MX28EVK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index 306a678..fa73fa2 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -7,12 +7,14 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x40000
+CONFIG_IMX_CONFIG=""
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx28-evk"
CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_MX28EVK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_FIT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index e40f83f..17f5ba4 100644
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -7,11 +7,13 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x300000
+CONFIG_IMX_CONFIG=""
CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_MX28EVK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x380000
+CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index 577515e..9ccc30d 100644
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -6,10 +6,12 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
+CONFIG_IMX_CONFIG=""
CONFIG_SPL_TEXT_BASE=0x00001000
CONFIG_TARGET_MX28EVK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x42000000
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
index 6c8b9b6..f9ca4ee 100644
--- a/configs/mx51evk_defconfig
+++ b/configs/mx51evk_defconfig
@@ -5,10 +5,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_TARGET_MX51EVK=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx51-babbage"
# CONFIG_CMD_BMODE is not set
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg"
+CONFIG_SYS_LOAD_ADDR=0x92000000
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -41,6 +42,7 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX5=y
+CONFIG_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig
index 8ee442f..8e3522d 100644
--- a/configs/mx53cx9020_defconfig
+++ b/configs/mx53cx9020_defconfig
@@ -5,11 +5,12 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x60000
CONFIG_TARGET_MX53CX9020=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx53-cx9020"
# CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/beckhoff/mx53cx9020/imximage.cfg"
+CONFIG_SYS_LOAD_ADDR=0x70010000
CONFIG_BOOTDELAY=1
CONFIG_USE_PREBOOT=y
CONFIG_CMD_MMC=y
diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig
index 296886d..04df33c 100644
--- a/configs/mx53loco_defconfig
+++ b/configs/mx53loco_defconfig
@@ -6,11 +6,15 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_TARGET_MX53LOCO=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx53-qsb"
# CONFIG_CMD_BMODE is not set
+CONFIG_SYS_LOAD_ADDR=0x72000000
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -32,6 +36,8 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_PHYLIB=y
@@ -42,9 +48,11 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX5=y
+CONFIG_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_EHCI_MX5=y
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 4a8fa34..081707f 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -5,13 +5,14 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2800
CONFIG_TARGET_MX53PPD=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx53-ppd"
CONFIG_BOOTCOUNT_BOOTLIMIT=10
+CONFIG_SYS_LOAD_ADDR=0x72000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ge/mx53ppd/imximage.cfg"
CONFIG_BOOTDELAY=1
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index dd2710f..7af56d4 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -9,11 +9,12 @@
CONFIG_ENV_OFFSET=0xFE000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6CUBOXI=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-hummingboard2-emmc-som-v15"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_CMD_BMODE is not set
@@ -21,7 +22,6 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;"
@@ -52,6 +52,7 @@
CONFIG_SPL_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig
index 6b9311d..2defa11 100644
--- a/configs/mx6memcal_defconfig
+++ b/configs/mx6memcal_defconfig
@@ -10,11 +10,11 @@
CONFIG_MX6QDL=y
CONFIG_MX6_DDRCAL=y
CONFIG_TARGET_MX6MEMCAL=y
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL"
CONFIG_SPL_USB_HOST=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index 7d0453a..419626a 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -7,14 +7,19 @@
CONFIG_SYS_MEMTEST_END=0x10010000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6q.cfg"
CONFIG_MX6Q=y
CONFIG_TARGET_NITROGEN6X=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
+CONFIG_DDR_MB=1024
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabrelite"
CONFIG_CMD_HDMIDETECT=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,DDR_MB=1024,SABRELITE"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_USE_PREBOOT=y
@@ -48,6 +53,8 @@
CONFIG_DWC_AHSATA=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index 1059c5a..4427079 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -10,11 +10,15 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6SABREAUTO=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabreauto"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_NXP_BOARD_REVISION=y
@@ -23,7 +27,6 @@
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -68,6 +71,9 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DFU_MMC=y
CONFIG_DFU_SF=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
@@ -84,7 +90,9 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index 61e9054..5216bca 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -10,11 +10,15 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6QDL=y
CONFIG_TARGET_MX6SABRESD=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_FIT=y
@@ -22,7 +26,6 @@
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -77,6 +80,9 @@
CONFIG_FASTBOOT_BUF_SIZE=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=2
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
@@ -93,8 +99,10 @@
CONFIG_PCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index 9e10329..c041cb7 100644
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
@@ -6,11 +6,11 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_MX6SL=y
CONFIG_TARGET_MX6SLEVK=y
+CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -38,6 +38,7 @@
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig
index 8df10ed..1e6aae6 100644
--- a/configs/mx6slevk_spinor_defconfig
+++ b/configs/mx6slevk_spinor_defconfig
@@ -7,11 +7,11 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_MX6SL=y
CONFIG_TARGET_MX6SLEVK=y
+CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg"
CONFIG_SPI_BOOT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
@@ -38,6 +38,7 @@
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
index 987573f..7c445e6 100644
--- a/configs/mx6slevk_spl_defconfig
+++ b/configs/mx6slevk_spl_defconfig
@@ -9,16 +9,19 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_MX6SL=y
CONFIG_TARGET_MX6SLEVK=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
@@ -47,6 +50,8 @@
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig
index 9f02ec8..43a349f 100644
--- a/configs/mx6sllevk_defconfig
+++ b/configs/mx6sllevk_defconfig
@@ -8,11 +8,11 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6SLL=y
CONFIG_TARGET_MX6SLLEVK=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk"
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -36,6 +36,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_PINCTRL=y
diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig
index 6fc4915..b61bab7 100644
--- a/configs/mx6sllevk_plugin_defconfig
+++ b/configs/mx6sllevk_plugin_defconfig
@@ -8,12 +8,12 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6SLL=y
CONFIG_TARGET_MX6SLLEVK=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk"
CONFIG_USE_IMXIMG_PLUGIN=y
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -37,6 +37,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_PINCTRL=y
diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index d888e72..c9691e1 100644
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -6,11 +6,11 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_MX6SX=y
CONFIG_TARGET_MX6SXSABREAUTO=y
+CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sabreauto"
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
@@ -37,6 +37,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index 67dfcda..b80dc94 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -6,12 +6,12 @@
CONFIG_ENV_OFFSET=0xE0000
CONFIG_MX6SX=y
CONFIG_TARGET_MX6SXSABRESD=y
+CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sdb"
# CONFIG_CMD_BMODE is not set
CONFIG_NXP_BOARD_REVISION=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -40,6 +40,7 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig
index d28b6f6..c9760df 100644
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -11,15 +11,17 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6UL=y
CONFIG_TARGET_MX6UL_14X14_EVK=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-14x14-evk"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -57,6 +59,8 @@
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index 1425724..a373e20 100644
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -11,15 +11,17 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_MX6UL=y
CONFIG_TARGET_MX6UL_9X9_EVK=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-9x9-evk"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -50,6 +52,8 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig
index 24e18c1..8ecb496 100644
--- a/configs/mx6ull_14x14_evk_defconfig
+++ b/configs/mx6ull_14x14_evk_defconfig
@@ -8,10 +8,10 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6ULL=y
CONFIG_TARGET_MX6ULL_14X14_EVK=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk"
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -36,6 +36,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig
index 2700f98..64719b1 100644
--- a/configs/mx6ull_14x14_evk_plugin_defconfig
+++ b/configs/mx6ull_14x14_evk_plugin_defconfig
@@ -8,11 +8,11 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6ULL=y
CONFIG_TARGET_MX6ULL_14X14_EVK=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk"
CONFIG_USE_IMXIMG_PLUGIN=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -37,6 +37,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig
index 23c8210..e233931 100644
--- a/configs/mx6ulz_14x14_evk_defconfig
+++ b/configs/mx6ulz_14x14_evk_defconfig
@@ -8,10 +8,10 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6ULL=y
CONFIG_TARGET_MX6ULL_14X14_EVK=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ulz-14x14-evk"
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -35,6 +35,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 39e7304..c10dafa 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MEMTEST_END=0xa0000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb"
CONFIG_TARGET_MX7DSABRESD=y
@@ -13,7 +14,6 @@
CONFIG_IMX_BOOTAUX=y
CONFIG_IMX_HAB=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_CMD_BOOTD is not set
@@ -45,6 +45,7 @@
CONFIG_DFU_RAM=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig
index f5d2f25..0da33c4 100644
--- a/configs/mx7dsabresd_qspi_defconfig
+++ b/configs/mx7dsabresd_qspi_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MEMTEST_END=0xa0000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-qspi"
CONFIG_TARGET_MX7DSABRESD=y
@@ -12,7 +13,6 @@
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_CMD_BOOTD is not set
@@ -44,6 +44,7 @@
CONFIG_DFU_RAM=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig
index 62992fe..6e6b821 100644
--- a/configs/mx7ulp_com_defconfig
+++ b/configs/mx7ulp_com_defconfig
@@ -4,11 +4,12 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-com"
CONFIG_LDO_ENABLED_MODE=y
CONFIG_TARGET_MX7ULP_COM=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ea/mx7ulp_com/imximage.cfg"
+CONFIG_SYS_LOAD_ADDR=0x60800000
CONFIG_DEFAULT_FDT_FILE="imx7ulp-com"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig
index c7738a6..04ace67 100644
--- a/configs/mx7ulp_evk_defconfig
+++ b/configs/mx7ulp_evk_defconfig
@@ -6,11 +6,12 @@
CONFIG_SYS_MEMTEST_END=0x9e000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk"
CONFIG_TARGET_MX7ULP_EVK=y
+CONFIG_SYS_LOAD_ADDR=0x60800000
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig
index 05e62fc..fff865f 100644
--- a/configs/mx7ulp_evk_plugin_defconfig
+++ b/configs/mx7ulp_evk_plugin_defconfig
@@ -6,10 +6,11 @@
CONFIG_SYS_MEMTEST_END=0x9e000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk"
CONFIG_TARGET_MX7ULP_EVK=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
+CONFIG_SYS_LOAD_ADDR=0x60800000
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig
index d7a68d6..022f9ff 100644
--- a/configs/myir_mys_6ulx_defconfig
+++ b/configs/myir_mys_6ulx_defconfig
@@ -9,14 +9,14 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_MX6ULL=y
CONFIG_TARGET_MYS_6ULX=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-myir-mys-6ulx-eval"
CONFIG_SPL_TEXT_BASE=0x908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig
index a94f428..d86faf1 100644
--- a/configs/nanopc-t4-rk3399_defconfig
+++ b/configs/nanopc-t4-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig
index 1c28c2c..7452caa 100644
--- a/configs/nanopi-k2_defconfig
+++ b/configs/nanopi-k2_defconfig
@@ -9,6 +9,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" nanopi-k2"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig
index c9833fd..100cd33 100644
--- a/configs/nanopi-m4-2gb-rk3399_defconfig
+++ b/configs/nanopi-m4-2gb-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig
index 2b2fcac..ba02b6e 100644
--- a/configs/nanopi-m4-rk3399_defconfig
+++ b/configs/nanopi-m4-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig
index 6d3afe1..7916307 100644
--- a/configs/nanopi-m4b-rk3399_defconfig
+++ b/configs/nanopi-m4b-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig
index 1bf5d1d..5aa226a 100644
--- a/configs/nanopi-neo4-rk3399_defconfig
+++ b/configs/nanopi-neo4-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig
index 0dfac0a..cafb38f 100644
--- a/configs/nanopi-r2s-rk3328_defconfig
+++ b/configs/nanopi-r2s-rk3328_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
@@ -15,6 +16,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -66,6 +68,7 @@
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig
index 351d2eb..7d176ce 100644
--- a/configs/nanopi-r4s-rk3399_defconfig
+++ b/configs/nanopi-r4s-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index 10fcf21..386ebca 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220"
CONFIG_IDENT_STRING="\nNAS 220"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index 841842c..5d84a5d 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big"
CONFIG_IDENT_STRING=" 2Big v2"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -22,6 +24,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="2big2> "
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
@@ -43,6 +46,10 @@
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_SATA_MV=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig
index 94eebdf..b961b58 100644
--- a/configs/netgear_cg3100d_ram_defconfig
+++ b/configs/netgear_cg3100d_ram_defconfig
@@ -1,14 +1,18 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d"
CONFIG_ARCH_BMIPS=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig
index 1f21f68..89638d3 100644
--- a/configs/netgear_dgnd3700v2_ram_defconfig
+++ b/configs/netgear_dgnd3700v2_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -6,10 +7,13 @@
CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2"
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6362=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index 1c577fa..15cc556 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite"
CONFIG_IDENT_STRING=" NS v2 Lite"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -22,6 +24,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
@@ -43,6 +46,10 @@
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_SATA_MV=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index d5af115..1946e44 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max"
CONFIG_IDENT_STRING=" NS Max v2"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -22,6 +24,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
@@ -43,6 +46,10 @@
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_SATA_MV=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index 5d9ea06..2bcb849 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini"
CONFIG_IDENT_STRING=" NS v2 Mini"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -22,6 +24,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
CONFIG_CMD_SATA=y
# CONFIG_CMD_SETEXPR is not set
@@ -42,6 +45,10 @@
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_BLK=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index c152a31..b281a40 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2"
CONFIG_IDENT_STRING=" NS v2"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
@@ -22,6 +24,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
@@ -43,6 +46,10 @@
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_SATA_MV=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 865f6fa..a56cb2c 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -8,14 +8,19 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6dl2g.cfg"
CONFIG_MX6DL=y
CONFIG_TARGET_NITROGEN6X=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
+CONFIG_DDR_MB=2048
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x"
CONFIG_CMD_HDMIDETECT=y
CONFIG_AHCI=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,DDR_MB=2048"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -51,6 +56,8 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index 7852eb8..68d286c 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -8,14 +8,19 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6dl.cfg"
CONFIG_MX6DL=y
CONFIG_TARGET_NITROGEN6X=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
+CONFIG_DDR_MB=1024
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x"
CONFIG_CMD_HDMIDETECT=y
CONFIG_AHCI=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,DDR_MB=1024"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -51,6 +56,8 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 2007126..cbe9ced 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -8,14 +8,19 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6q2g.cfg"
CONFIG_MX6Q=y
CONFIG_TARGET_NITROGEN6X=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
+CONFIG_DDR_MB=2048
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x"
CONFIG_CMD_HDMIDETECT=y
CONFIG_AHCI=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,DDR_MB=2048"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -53,6 +58,8 @@
CONFIG_DWC_AHSATA=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index af38dd7..95e60f9 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -8,14 +8,19 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6q.cfg"
CONFIG_MX6Q=y
CONFIG_TARGET_NITROGEN6X=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
+CONFIG_DDR_MB=1024
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x"
CONFIG_CMD_HDMIDETECT=y
CONFIG_AHCI=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,DDR_MB=1024"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -53,6 +58,8 @@
CONFIG_DWC_AHSATA=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index ae00482..43c0787 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -8,14 +8,19 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6s1g.cfg"
CONFIG_MX6S=y
CONFIG_TARGET_NITROGEN6X=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
+CONFIG_DDR_MB=1024
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x"
CONFIG_CMD_HDMIDETECT=y
CONFIG_AHCI=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,DDR_MB=1024"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -51,6 +56,8 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index 92ccaba..a8428dc 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -8,14 +8,19 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6s.cfg"
CONFIG_MX6S=y
CONFIG_TARGET_NITROGEN6X=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
+CONFIG_DDR_MB=512
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x"
CONFIG_CMD_HDMIDETECT=y
CONFIG_AHCI=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,DDR_MB=512"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -51,6 +56,8 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig
index 981e6f9..69784d9 100644
--- a/configs/nokia_rx51_defconfig
+++ b/configs/nokia_rx51_defconfig
@@ -1,12 +1,21 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SUPPORT_PASSING_ATAGS=y
+CONFIG_CMDLINE_TAG=y
+CONFIG_INITRD_TAG=y
+CONFIG_REVISION_TAG=y
+CONFIG_STATIC_MACH_TYPE=y
+CONFIG_MACH_TYPE=1955
CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_NR_DRAM_BANKS=2
+CONFIG_SYS_MALLOC_LEN=0xc0000
CONFIG_TARGET_NOKIA_RX51=y
CONFIG_OPTIMIZE_INLINING=y
CONFIG_LTO=y
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x80000000
# CONFIG_FIT is not set
CONFIG_BOOTDELAY=30
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 5418036..66aa342 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -10,10 +10,14 @@
CONFIG_MX6Q=y
CONFIG_MX6_DDRCAL=y
CONFIG_TARGET_KOSAGI_NOVENA=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-novena"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x84000
CONFIG_SPL_FS_FAT=y
@@ -22,7 +26,6 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttymxc1,115200 "
CONFIG_BOOTCOMMAND="run distro_bootcmd ; run net_nfs"
@@ -33,6 +36,8 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_BUS=2
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -52,6 +57,9 @@
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
@@ -61,6 +69,8 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_THERMAL=y
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index 8765dc3..c2c5994 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -9,6 +10,7 @@
CONFIG_ENV_OFFSET=0xE0000
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s"
CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server"
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig
index a67963a..3607583 100644
--- a/configs/nsim_700_defconfig
+++ b/configs/nsim_700_defconfig
@@ -2,11 +2,13 @@
CONFIG_TARGET_NSIM=y
CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape"
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_DEBUG_UART_BASE=0xf0000000
CONFIG_DEBUG_UART_CLOCK=70000000
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig
index 5852a0c..2d8a3e4 100644
--- a/configs/nsim_700be_defconfig
+++ b/configs/nsim_700be_defconfig
@@ -3,11 +3,13 @@
CONFIG_TARGET_NSIM=y
CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape"
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_DEBUG_UART_BASE=0xf0000000
CONFIG_DEBUG_UART_CLOCK=70000000
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig
index cdbcba1..51ce560 100644
--- a/configs/nsim_hs38_defconfig
+++ b/configs/nsim_hs38_defconfig
@@ -3,11 +3,13 @@
CONFIG_TARGET_NSIM=y
CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs"
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_DEBUG_UART_BASE=0xf0000000
CONFIG_DEBUG_UART_CLOCK=70000000
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig
index 41e3618..60e6094 100644
--- a/configs/nsim_hs38be_defconfig
+++ b/configs/nsim_hs38be_defconfig
@@ -4,11 +4,13 @@
CONFIG_TARGET_NSIM=y
CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs"
CONFIG_SYS_TEXT_BASE=0x81000000
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_DEBUG_UART_BASE=0xf0000000
CONFIG_DEBUG_UART_CLOCK=70000000
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index 3f6bb94..9d7d54e 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -4,6 +4,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big"
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000
@@ -12,6 +13,7 @@
CONFIG_TEGRA124=y
CONFIG_TARGET_NYAN_BIG=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x82408000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_OF_SYSTEM_SETUP=y
diff --git a/configs/o4-imx6ull-nano_defconfig b/configs/o4-imx6ull-nano_defconfig
index 45d4dca..d8a7161 100644
--- a/configs/o4-imx6ull-nano_defconfig
+++ b/configs/o4-imx6ull-nano_defconfig
@@ -3,6 +3,7 @@
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_MX6ULL=y
CONFIG_TARGET_O4_IMX6ULL_NANO=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_MT41K256M16HA_125E=y
CONFIG_IMX_MODULE_FUSE=y
diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig
index a2b8c3c..c30cced 100644
--- a/configs/octeon_ebb7304_defconfig
+++ b/configs/octeon_ebb7304_defconfig
@@ -4,6 +4,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEBUG_UART_BASE=0x8001180000000800
CONFIG_DEBUG_UART_CLOCK=1200000000
CONFIG_ARCH_OCTEON=y
@@ -12,6 +13,7 @@
CONFIG_MIPS_RELOCATION_TABLE_SIZE=0xc000
CONFIG_DEBUG_UART=y
CONFIG_OF_BOARD_FIXUP=y
+CONFIG_SYS_LOAD_ADDR=0xffffffff80100000
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig
index 3d60b36..0f19180 100644
--- a/configs/octeon_nic23_defconfig
+++ b/configs/octeon_nic23_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xe000
CONFIG_ENV_SECT_SIZE=0x100
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEBUG_UART_BASE=0x8001180000000800
CONFIG_DEBUG_UART_CLOCK=800000000
CONFIG_ARCH_OCTEON=y
@@ -14,6 +15,7 @@
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_OF_BOARD_FIXUP=y
+CONFIG_SYS_LOAD_ADDR=0xffffffff80100000
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
# CONFIG_SYS_DEVICE_NULLDEV is not set
CONFIG_ARCH_MISC_INIT=y
diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig
index 8a912d8..6d8457f 100644
--- a/configs/octeontx2_95xx_defconfig
+++ b/configs/octeontx2_95xx_defconfig
@@ -10,10 +10,12 @@
CONFIG_ENV_OFFSET=0xF00000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_TARGET_OCTEONTX2_95XX=y
+CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_DM_GPIO=y
CONFIG_DEBUG_UART_BASE=0x87e028000000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x4000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig
index 02bb0f6..b72caef 100644
--- a/configs/octeontx2_96xx_defconfig
+++ b/configs/octeontx2_96xx_defconfig
@@ -8,12 +8,14 @@
CONFIG_ENV_OFFSET=0xF00000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_TARGET_OCTEONTX2_96XX=y
+CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_DM_GPIO=y
CONFIG_DEBUG_UART_BASE=0x87e028000000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x4000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig
index e14957c..52678d5 100644
--- a/configs/octeontx_81xx_defconfig
+++ b/configs/octeontx_81xx_defconfig
@@ -10,11 +10,13 @@
CONFIG_ENV_OFFSET=0xF00000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_TARGET_OCTEONTX_81XX=y
+CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_DM_GPIO=y
CONFIG_DEBUG_UART_BASE=0x87e028000000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x2800000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig
index f9f285a..3890c1e 100644
--- a/configs/octeontx_83xx_defconfig
+++ b/configs/octeontx_83xx_defconfig
@@ -8,11 +8,13 @@
CONFIG_ENV_OFFSET=0xF00000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_TARGET_OCTEONTX_83XX=y
+CONFIG_SYS_MALLOC_LEN=0x4008000
CONFIG_DM_GPIO=y
CONFIG_DEBUG_UART_BASE=0x87e028000000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x2800000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 7c96831..6f93df2 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -9,6 +9,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" odroid-c2"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig
index 356a9c9..bc778a6 100644
--- a/configs/odroid-c4_defconfig
+++ b/configs/odroid-c4_defconfig
@@ -11,6 +11,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" odroid-c4/hc4"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig
index aafec84..c744c3a 100644
--- a/configs/odroid-go2_defconfig
+++ b/configs/odroid-go2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -19,6 +20,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -81,6 +83,7 @@
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig
index 1f718a3..8e9e8f8 100644
--- a/configs/odroid-n2_defconfig
+++ b/configs/odroid-n2_defconfig
@@ -11,6 +11,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" odroid-n2/n2-plus"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
index f56dfb7..b243173 100644
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43E00000
@@ -6,10 +7,12 @@
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x310000
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3"
CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2"
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
@@ -42,6 +45,7 @@
CONFIG_DFU_MMC=y
CONFIG_SET_DFU_ALT_INFO=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x2000000
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_DW=y
CONFIG_MTD=y
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
index b95cefd..fa2c5e0 100644
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43e00000
@@ -7,9 +8,11 @@
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x140000
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid"
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig
index 8b0c943..d699efb 100644
--- a/configs/omap35_logic_defconfig
+++ b/configs/omap35_logic_defconfig
@@ -53,6 +53,7 @@
CONFIG_SPL_DM=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig
index 2ab9255..9f3a88f 100644
--- a/configs/omap35_logic_somlv_defconfig
+++ b/configs/omap35_logic_somlv_defconfig
@@ -52,6 +52,7 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
@@ -81,6 +82,8 @@
CONFIG_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_EHCI_HCD=y
+CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
+CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=4
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_OMAP2PLUS=y
CONFIG_TWL4030_USB=y
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index 462f94e..578e682 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -56,6 +56,8 @@
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=1
@@ -82,6 +84,8 @@
CONFIG_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_EHCI_HCD=y
+CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
+CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=147
CONFIG_USB_OMAP3=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_MUSB_OMAP2PLUS=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index 9d4db33..9a86beb 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -57,6 +57,8 @@
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_GPIO_HOG=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index ec7a8a6..9424755 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -52,6 +52,7 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_OMAP36XX_PINS=y
CONFIG_MTD=y
diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig
index f2e9d20..7a78682 100644
--- a/configs/omap3_logic_somlv_defconfig
+++ b/configs/omap3_logic_somlv_defconfig
@@ -52,6 +52,7 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_DM=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_OMAP36XX_PINS=y
CONFIG_MTD=y
@@ -82,6 +83,8 @@
CONFIG_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_EHCI_HCD=y
+CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
+CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=4
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_OMAP2PLUS=y
CONFIG_TWL4030_USB=y
diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index 3585566..8c6baaf 100644
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -32,12 +32,18 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_DM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_DM_ETH=y
CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
+CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
+CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=1
+CONFIG_HAS_OMAP_EHCI_PHY2_RESET_GPIO=y
+CONFIG_OMAP_EHCI_PHY2_RESET_GPIO=62
CONFIG_USB_OMAP3=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig
index 1710277..9dae340 100644
--- a/configs/omap4_sdp4430_defconfig
+++ b/configs/omap4_sdp4430_defconfig
@@ -33,6 +33,8 @@
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_VERSION_VARIABLE=y
CONFIG_DM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_DM_ETH=y
CONFIG_CONS_INDEX=3
diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig
index 16264ae..0280b4a 100644
--- a/configs/omap5_uevm_defconfig
+++ b/configs/omap5_uevm_defconfig
@@ -39,6 +39,8 @@
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_CMD_TCA642X=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_DM_ETH=y
@@ -47,6 +49,10 @@
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
+CONFIG_HAS_OMAP_EHCI_PHY2_RESET_GPIO=y
+CONFIG_OMAP_EHCI_PHY2_RESET_GPIO=80
+CONFIG_HAS_OMAP_EHCI_PHY3_RESET_GPIO=y
+CONFIG_OMAP_EHCI_PHY3_RESET_GPIO=79
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_PHY_OMAP=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 0cde86a..80e9023 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_DAVINCI=y
CONFIG_SYS_TEXT_BASE=0xc1080000
@@ -12,12 +14,14 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x110000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk"
CONFIG_SPL_TEXT_BASE=0x80000000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0xc0700000
CONFIG_BOOTDELAY=3
CONFIG_LOGLEVEL=3
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig
index cd66db2..04cc058 100644
--- a/configs/openpiton_riscv64_defconfig
+++ b/configs/openpiton_riscv64_defconfig
@@ -1,6 +1,7 @@
CONFIG_RISCV=y
CONFIG_SYS_TEXT_BASE=0x80200000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x10000000
CONFIG_DEFAULT_DEVICE_TREE="openpiton-riscv64"
CONFIG_TARGET_OPENPITON_RISCV64=y
CONFIG_ARCH_RV64I=y
@@ -10,6 +11,7 @@
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_ENV_VARS_UBOOT_CONFIG=y
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x87000000
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_PROMPT="openpiton$ "
diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig
index 180652b..ae178f7 100644
--- a/configs/openpiton_riscv64_spl_defconfig
+++ b/configs/openpiton_riscv64_spl_defconfig
@@ -1,8 +1,8 @@
CONFIG_RISCV=y
CONFIG_SYS_TEXT_BASE=0x80000000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x10000000
CONFIG_DEFAULT_DEVICE_TREE="openpiton-riscv64"
-CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -15,6 +15,7 @@
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_ENV_VARS_UBOOT_CONFIG=y
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x87000000
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
@@ -23,7 +24,7 @@
# CONFIG_SPL_BANNER_PRINT is not set
CONFIG_SPL_CPU=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_RTC_SUPPORT=y
+CONFIG_SPL_RTC=y
CONFIG_SYS_PROMPT="openpiton$ "
# CONFIG_CMD_CPU is not set
CONFIG_CMD_BOOTZ=y
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index 72d6358..0e22f69 100644
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base"
CONFIG_IDENT_STRING="\nOpenRD-Base"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index 1b49abb..069f96c 100644
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client"
CONFIG_IDENT_STRING="\nOpenRD-Client"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index fafe53e..7483c45 100644
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate"
CONFIG_IDENT_STRING="\nOpenRD-Ultimate"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index 1e8d56e..32adb5d 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -9,10 +9,11 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6UL=y
CONFIG_TARGET_OPOS6ULDEV=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x180000
diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig
index 9f00539..9857fb1 100644
--- a/configs/orangepi-rk3399_defconfig
+++ b/configs/orangepi-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig
index efb7e8c..7aaa519 100644
--- a/configs/orangepi_2_defconfig
+++ b/configs/orangepi_2_defconfig
@@ -8,6 +8,8 @@
CONFIG_USB1_VBUS_PIN="PG13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
index f17241f..2eaddcf 100644
--- a/configs/orangepi_pc2_defconfig
+++ b/configs/orangepi_pc2_defconfig
@@ -9,6 +9,8 @@
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_SY8106A_VOUT1_VOLT=1100
diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig
index 622cac0..905ff7b 100644
--- a/configs/orangepi_pc_defconfig
+++ b/configs/orangepi_pc_defconfig
@@ -6,6 +6,8 @@
CONFIG_DRAM_CLK=624
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig
index 3aeb2de..f845138 100644
--- a/configs/orangepi_pc_plus_defconfig
+++ b/configs/orangepi_pc_plus_defconfig
@@ -7,6 +7,8 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig
index bce2f5f..138a6a7 100644
--- a/configs/orangepi_plus2e_defconfig
+++ b/configs/orangepi_plus2e_defconfig
@@ -8,6 +8,8 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
index 7f778c7..76de72a 100644
--- a/configs/orangepi_plus_defconfig
+++ b/configs/orangepi_plus_defconfig
@@ -10,6 +10,8 @@
CONFIG_SATAPWR="PG11"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig
index 5334ff7..edb765f 100644
--- a/configs/orangepi_zero2_defconfig
+++ b/configs/orangepi_zero2_defconfig
@@ -11,5 +11,10 @@
CONFIG_R_I2C_ENABLE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_PHY_REALTEK=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index 932c107..d6b8906 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
@@ -7,11 +9,13 @@
CONFIG_TARGET_ORIGEN=y
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x4200
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen"
CONFIG_SPL_TEXT_BASE=0x02021410
CONFIG_SPL=y
CONFIG_IDENT_STRING=" for ORIGEN"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x43e00000
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/p200_defconfig b/configs/p200_defconfig
index 10b240b..9f75552 100644
--- a/configs/p200_defconfig
+++ b/configs/p200_defconfig
@@ -9,6 +9,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" p200"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/p201_defconfig b/configs/p201_defconfig
index 612f32f..1e07794 100644
--- a/configs/p201_defconfig
+++ b/configs/p201_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" p201"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/p212_defconfig b/configs/p212_defconfig
index 493b333..b1d2ca8 100644
--- a/configs/p212_defconfig
+++ b/configs/p212_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" p212"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig
index 039293f..43d9095 100644
--- a/configs/p2371-0000_defconfig
+++ b/configs/p2371-0000_defconfig
@@ -4,8 +4,10 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000"
CONFIG_TEGRA210=y
+CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index a4dfed7..c9498b3 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -4,9 +4,11 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-2180"
CONFIG_TEGRA210=y
CONFIG_TARGET_P2371_2180=y
+CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig
index 8c3a184..27cc68e 100644
--- a/configs/p2571_defconfig
+++ b/configs/p2571_defconfig
@@ -4,9 +4,11 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571"
CONFIG_TEGRA210=y
CONFIG_TARGET_P2571=y
+CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig
index 18ec21a..90e9396 100644
--- a/configs/p2771-0000-000_defconfig
+++ b/configs/p2771-0000-000_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-000"
CONFIG_TEGRA186=y
+CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig
index c0a9a45..6bdc113 100644
--- a/configs/p2771-0000-500_defconfig
+++ b/configs/p2771-0000-500_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-500"
CONFIG_TEGRA186=y
+CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig
index 9f9a5ed..0587ca9 100644
--- a/configs/p3450-0000_defconfig
+++ b/configs/p3450-0000_defconfig
@@ -5,9 +5,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000"
CONFIG_TEGRA210=y
CONFIG_TARGET_P3450_0000=y
+CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig
index 4ce3647..a209e41 100644
--- a/configs/paz00_defconfig
+++ b/configs/paz00_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_TEGRA20=y
CONFIG_TARGET_PAZ00=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # "
diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig
index 260d3d4..59cebf8 100644
--- a/configs/pcm052_defconfig
+++ b/configs/pcm052_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
CONFIG_SYS_TEXT_BASE=0x3f401000
@@ -7,11 +8,12 @@
CONFIG_SYS_MEMTEST_END=0x87c00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xA0000
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-pcm052"
CONFIG_ENV_OFFSET_REDUND=0xC0000
CONFIG_TARGET_PCM052=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg"
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
@@ -42,10 +44,6 @@
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
-CONFIG_SYS_I2C_EEPROM_BUS=2
-CONFIG_SYS_EEPROM_SIZE=32768
-CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
-CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig
index f9babdb..0adfb98 100644
--- a/configs/pcm058_defconfig
+++ b/configs/pcm058_defconfig
@@ -11,21 +11,21 @@
CONFIG_MX6Q=y
CONFIG_MX6_OCRAM_256KB=y
CONFIG_TARGET_PCM058=y
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-phytec-mira-rdk-nand"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x110000
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_CMD_HDMIDETECT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig
index 92d6be4..173ed4e 100644
--- a/configs/peach-pi_defconfig
+++ b/configs/peach-pi_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x23E00000
@@ -8,11 +10,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x3FC000
CONFIG_ENV_SECT_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi"
CONFIG_SPL_TEXT_BASE=0x02024410
CONFIG_SPL=y
CONFIG_IDENT_STRING=" for Peach-Pi"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x23e00000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
@@ -38,6 +42,7 @@
CONFIG_ENV_SPI_BUS=1
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
CONFIG_CROS_EC_KEYB=y
diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig
index 824a664..af4865f 100644
--- a/configs/peach-pit_defconfig
+++ b/configs/peach-pit_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x23E00000
@@ -7,11 +9,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x3FC000
CONFIG_ENV_SECT_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit"
CONFIG_SPL_TEXT_BASE=0x02024410
CONFIG_SPL=y
CONFIG_IDENT_STRING=" for Peach-Pit"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x23e00000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
@@ -37,6 +41,7 @@
CONFIG_ENV_SPI_BUS=1
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
CONFIG_CROS_EC_KEYB=y
diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig
index 27e8192..6426a33 100644
--- a/configs/pg_wcom_expu1_defconfig
+++ b/configs/pg_wcom_expu1_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_PG_WCOM_EXPU1=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -12,11 +13,13 @@
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1004000
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1"
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -48,8 +51,9 @@
CONFIG_ENV_ADDR_REDUND=0x60040000
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
-CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_I2C_LEGACY=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig
index 99389d6..05ba20d 100644
--- a/configs/pg_wcom_seli8_defconfig
+++ b/configs/pg_wcom_seli8_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_TARGET_PG_WCOM_SELI8=y
CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_NR_DRAM_BANKS=1
@@ -12,11 +13,13 @@
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x1004000
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8"
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -48,8 +51,9 @@
CONFIG_ENV_ADDR_REDUND=0x60040000
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
-CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_I2C_LEGACY=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig
index 966fc1f..3de815c 100644
--- a/configs/phycore-am335x-r2-regor_defconfig
+++ b/configs/phycore-am335x-r2-regor_defconfig
@@ -9,8 +9,8 @@
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=1000
CONFIG_TARGET_PHYCORE_AM335X_R2=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig
index 4718359..5137bec 100644
--- a/configs/phycore-am335x-r2-wega_defconfig
+++ b/configs/phycore-am335x-r2-wega_defconfig
@@ -9,8 +9,8 @@
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=1000
CONFIG_TARGET_PHYCORE_AM335X_R2=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig
index 7892cd4..91360b7 100644
--- a/configs/phycore-imx8mm_defconfig
+++ b/configs/phycore-imx8mm_defconfig
@@ -7,24 +7,22 @@
CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3C0000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="phycore-imx8mm"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_PHYCORE_IMX8MM=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3E0000
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="oftree"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -38,6 +36,10 @@
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_SIZE=4096
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -66,14 +68,9 @@
CONFIG_CLK_IMX8MM=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x51
-CONFIG_SYS_EEPROM_SIZE=4096
-CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 84a0a5c..f22798e 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -8,21 +8,22 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk"
CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_PHYCORE_IMX8MP=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg"
CONFIG_DEFAULT_FDT_FILE="oftree"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -38,6 +39,10 @@
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_SIZE=4096
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_CLK=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
@@ -66,14 +71,10 @@
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
# CONFIG_SPL_DM_I2C is not set
-CONFIG_SYS_I2C_MXC=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x51
-CONFIG_SYS_EEPROM_SIZE=4096
-CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
@@ -91,9 +92,11 @@
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
+CONFIG_SPL_POWER_LEGACY=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPL_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 8ee99e5..a202747 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
@@ -12,6 +13,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb"
diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig
index a74a7a3..03d3e6f 100644
--- a/configs/phycore_pcl063_defconfig
+++ b/configs/phycore_pcl063_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_MX6UL=y
CONFIG_TARGET_PCL063=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phytec-segin-ff-rdk-nand"
CONFIG_SPL_TEXT_BASE=0x00909000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig
index c2a83d4..6524349 100644
--- a/configs/phycore_pcl063_ull_defconfig
+++ b/configs/phycore_pcl063_ull_defconfig
@@ -7,14 +7,14 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_MX6ULL=y
CONFIG_TARGET_PCL063_ULL=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-phytec-segin-ff-rdk-emmc"
CONFIG_SPL_TEXT_BASE=0x908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index f8c46fa..093fa2a 100644
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -4,12 +4,14 @@
CONFIG_SYS_MEMTEST_START=0x88000000
CONFIG_SYS_MEMTEST_END=0x88080000
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk"
CONFIG_MACH_PIC32=y
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x88500000
CONFIG_BOOTDELAY=5
CONFIG_SYS_PROMPT="dask # "
# CONFIG_CMD_SAVEENV is not set
diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig
index 673911c..cf49e7c 100644
--- a/configs/pico-dwarf-imx6ul_defconfig
+++ b/configs/pico-dwarf-imx6ul_defconfig
@@ -11,14 +11,14 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6UL=y
CONFIG_TARGET_PICO_IMX6UL=y
+CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi"
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-dwarf.dtb"
@@ -50,6 +50,7 @@
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig
index 1ef415f..1be6605 100644
--- a/configs/pico-dwarf-imx7d_defconfig
+++ b/configs/pico-dwarf-imx7d_defconfig
@@ -6,17 +6,21 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
CONFIG_TARGET_PICO_IMX7D=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb"
CONFIG_SPL_I2C=y
@@ -53,6 +57,9 @@
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
@@ -65,6 +72,8 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig
index 0c11d0c..0894111 100644
--- a/configs/pico-hobbit-imx6ul_defconfig
+++ b/configs/pico-hobbit-imx6ul_defconfig
@@ -11,15 +11,15 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6UL=y
CONFIG_TARGET_PICO_IMX6UL=y
+CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb"
@@ -51,6 +51,7 @@
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig
index 64a76a9..a0c034c 100644
--- a/configs/pico-hobbit-imx7d_defconfig
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -6,17 +6,21 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
CONFIG_TARGET_PICO_IMX7D=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb"
CONFIG_SPL_I2C=y
@@ -53,6 +57,9 @@
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
@@ -65,6 +72,8 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig
index c3cd660..fd10261 100644
--- a/configs/pico-imx6_defconfig
+++ b/configs/pico-imx6_defconfig
@@ -9,11 +9,12 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6QDL=y
CONFIG_TARGET_PICO_IMX6=y
+CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-pico"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
@@ -21,7 +22,6 @@
CONFIG_SPL_FIT_PRINT=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run default_boot"
CONFIG_DEFAULT_FDT_FILE="ask"
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index f027c86..d7c3821 100644
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -11,15 +11,15 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6UL=y
CONFIG_TARGET_PICO_IMX6UL=y
+CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="ask"
@@ -54,6 +54,7 @@
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig
index 4657d51..df81717 100644
--- a/configs/pico-imx7d_bl33_defconfig
+++ b/configs/pico-imx7d_bl33_defconfig
@@ -7,17 +7,21 @@
CONFIG_SYS_MEMTEST_END=0xa0000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
CONFIG_TARGET_PICO_IMX7D=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_SPL_I2C=y
CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
@@ -48,6 +52,9 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DFU_MMC=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_PHYLIB=y
@@ -59,6 +66,8 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_CONS_INDEX=4
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index c682948..7d53562 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -6,17 +6,21 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
CONFIG_TARGET_PICO_IMX7D=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="ask"
CONFIG_SPL_I2C=y
@@ -53,6 +57,9 @@
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
@@ -65,6 +72,8 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig
index 9d664c0..b90a492 100644
--- a/configs/pico-imx8mq_defconfig
+++ b/configs/pico-imx8mq_defconfig
@@ -3,17 +3,21 @@
CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_PICO_IMX8MQ=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -42,17 +46,19 @@
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
+CONFIG_SPL_POWER_LEGACY=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPL_POWER_I2C=y
CONFIG_DM_RESET=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig
index 1ef415f..1be6605 100644
--- a/configs/pico-nymph-imx7d_defconfig
+++ b/configs/pico-nymph-imx7d_defconfig
@@ -6,17 +6,21 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
CONFIG_TARGET_PICO_IMX7D=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb"
CONFIG_SPL_I2C=y
@@ -53,6 +57,9 @@
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
@@ -65,6 +72,8 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig
index 93606bf..c3999ec 100644
--- a/configs/pico-pi-imx6ul_defconfig
+++ b/configs/pico-pi-imx6ul_defconfig
@@ -11,15 +11,15 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6UL=y
CONFIG_TARGET_PICO_IMX6UL=y
+CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-pi.dtb"
@@ -51,6 +51,7 @@
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig
index 8d66893..e0be1b0 100644
--- a/configs/pico-pi-imx7d_defconfig
+++ b/configs/pico-pi-imx7d_defconfig
@@ -6,17 +6,21 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_I2C_MXC_I2C4=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
CONFIG_TARGET_PICO_IMX7D=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb"
CONFIG_SPL_I2C=y
@@ -53,6 +57,9 @@
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
@@ -65,6 +72,8 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
index f97d5e8..81aedb2 100644
--- a/configs/pinebook-pro-rk3399_defconfig
+++ b/configs/pinebook-pro-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,8 +10,9 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb"
diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig
index 533a736..f63e3e4 100644
--- a/configs/pinebook_defconfig
+++ b/configs/pinebook_defconfig
@@ -8,6 +8,8 @@
CONFIG_DRAM_ZQ=3881949
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_R_I2C_ENABLE=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_PWM=y
diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig
index abe2997..742da36 100644
--- a/configs/pinecube_defconfig
+++ b/configs/pinecube_defconfig
@@ -8,6 +8,11 @@
CONFIG_DRAM_ODT_EN=y
CONFIG_I2C0_ENABLE=y
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_NETDEVICES is not set
CONFIG_AXP209_POWER=y
CONFIG_AXP_DCDC2_VOLT=1250
diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig
index f47a8f5..4000de1 100644
--- a/configs/plutux_defconfig
+++ b/configs/plutux_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_TEGRA20=y
CONFIG_TARGET_PLUTUX=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig
index f253dea..9aaf775 100644
--- a/configs/pm9261_defconfig
+++ b/configs/pm9261_defconfig
@@ -7,8 +7,10 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x50000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index 193622e..f0ad4b3 100644
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -7,8 +7,10 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x50000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig
index 7941ee2..bcac445 100644
--- a/configs/pm9g45_defconfig
+++ b/configs/pm9g45_defconfig
@@ -1,9 +1,11 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x73f00000
CONFIG_TARGET_PM9G45=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -11,6 +13,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index e3d2238..056c190 100644
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
@@ -10,6 +11,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02"
CONFIG_IDENT_STRING="\nPogo E02"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig
index 82833ff..007d116 100644
--- a/configs/poplar_defconfig
+++ b/configs/poplar_defconfig
@@ -5,9 +5,11 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x1F0000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="hi3798cv200-poplar"
CONFIG_IDENT_STRING="poplar"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="poplar# "
CONFIG_CMD_MMC=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 5b6d8ca..98fb823 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
@@ -12,6 +13,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-popmetal.dtb"
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index 135feca..4708c74 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -12,17 +12,19 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RMOBILE_BOARD_STRING="Porter"
CONFIG_R8A7791=y
CONFIG_TARGET_PORTER=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig
index 1f9b3e0..a62c9f8 100644
--- a/configs/pov_protab2_ips9_defconfig
+++ b/configs/pov_protab2_ips9_defconfig
@@ -15,4 +15,7 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index eaa3cdd..afc54fe 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
@@ -12,8 +13,9 @@
CONFIG_DEBUG_UART_BASE=0xFF180000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
@@ -44,6 +46,7 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
@@ -67,6 +70,7 @@
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_DM_PMIC_FAN53555=y
CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_REGULATOR_PWM=y
CONFIG_SPL_DM_REGULATOR_FIXED=y
diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig
index aed790b..9146191 100644
--- a/configs/px30-core-ctouch2-px30_defconfig
+++ b/configs/px30-core-ctouch2-px30_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -17,6 +18,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig
index 0340039..46077fa 100644
--- a/configs/px30-core-edimm2.2-px30_defconfig
+++ b/configs/px30-core-edimm2.2-px30_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -17,6 +18,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 70c4a18..624e98c 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -7,20 +7,22 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=720
CONFIG_TARGET_PXM2=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -75,6 +77,9 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SPEED=400000
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig
index 3319f38..f269b8a 100644
--- a/configs/q8_a13_tablet_defconfig
+++ b/configs/q8_a13_tablet_defconfig
@@ -16,5 +16,8 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig
index 8ac16cf..f49d49e 100644
--- a/configs/qemu-riscv32_defconfig
+++ b/configs/qemu-riscv32_defconfig
@@ -1,8 +1,10 @@
CONFIG_RISCV=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig
index 05eda43..f13661e 100644
--- a/configs/qemu-riscv32_smode_defconfig
+++ b/configs/qemu-riscv32_smode_defconfig
@@ -1,9 +1,11 @@
CONFIG_RISCV=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig
index ee81e55..da7a4d2 100644
--- a/configs/qemu-riscv32_spl_defconfig
+++ b/configs/qemu-riscv32_spl_defconfig
@@ -1,11 +1,13 @@
CONFIG_RISCV=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DEFAULT_DEVICE_TREE="qemu-virt"
CONFIG_SPL=y
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
CONFIG_DISPLAY_CPUINFO=y
diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
index daf5d65..506ac43 100644
--- a/configs/qemu-riscv64_defconfig
+++ b/configs/qemu-riscv64_defconfig
@@ -1,9 +1,11 @@
CONFIG_RISCV=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
index 4a6416e2..63b205d 100644
--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
@@ -1,10 +1,12 @@
CONFIG_RISCV=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};"
diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig
index 429d4d8..96f2e3a 100644
--- a/configs/qemu-riscv64_spl_defconfig
+++ b/configs/qemu-riscv64_spl_defconfig
@@ -1,12 +1,14 @@
CONFIG_RISCV=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DEFAULT_DEVICE_TREE="qemu-virt"
CONFIG_SPL=y
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
CONFIG_DISPLAY_CPUINFO=y
diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig
index 3a3b81c..2dfb48b 100644
--- a/configs/qemu-x86_64_defconfig
+++ b/configs/qemu-x86_64_defconfig
@@ -34,10 +34,10 @@
CONFIG_SPL_CPU=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET=y
CONFIG_SPL_PCI=y
-CONFIG_SPL_PCH_SUPPORT=y
-CONFIG_SPL_RTC_SUPPORT=y
+CONFIG_SPL_PCH=y
+CONFIG_SPL_RTC=y
CONFIG_CMD_CPU=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
index 2969e90c..cf5a03e 100644
--- a/configs/qemu_arm64_defconfig
+++ b/configs/qemu_arm64_defconfig
@@ -4,8 +4,10 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40200000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
index 000cb35..ded58d3 100644
--- a/configs/qemu_arm_defconfig
+++ b/configs/qemu_arm_defconfig
@@ -4,10 +4,12 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_TARGET_QEMU_ARM_32BIT=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40200000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig
index 73b2c99..16a24c3 100644
--- a/configs/r2dplus_defconfig
+++ b/configs/r2dplus_defconfig
@@ -2,8 +2,10 @@
CONFIG_SYS_TEXT_BASE=0x8FE00000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="sh7751-r2dplus"
CONFIG_TARGET_R2DPLUS=y
+CONFIG_SYS_LOAD_ADDR=0x8e000000
CONFIG_BOOTDELAY=-1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200"
diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig
index cad22615..8875a09 100644
--- a/configs/r7-tv-dongle_defconfig
+++ b/configs/r7-tv-dongle_defconfig
@@ -7,6 +7,9 @@
CONFIG_USB1_VBUS_PIN="PG13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_AXP152_POWER=y
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/r8a774a1_beacon_defconfig b/configs/r8a774a1_beacon_defconfig
index 7ba4ac0..4e52dd0 100644
--- a/configs/r8a774a1_beacon_defconfig
+++ b/configs/r8a774a1_beacon_defconfig
@@ -3,12 +3,14 @@
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit"
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_BEACON_RZG2M=y
# CONFIG_SPL is not set
CONFIG_LTO=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
diff --git a/configs/r8a774b1_beacon_defconfig b/configs/r8a774b1_beacon_defconfig
index 6f1a608..deb0d0e 100644
--- a/configs/r8a774b1_beacon_defconfig
+++ b/configs/r8a774b1_beacon_defconfig
@@ -3,12 +3,14 @@
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a774b1-beacon-rzg2n-kit"
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_BEACON_RZG2N=y
# CONFIG_SPL is not set
CONFIG_LTO=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
diff --git a/configs/r8a774e1_beacon_defconfig b/configs/r8a774e1_beacon_defconfig
index 9cde39f..92d0899 100644
--- a/configs/r8a774e1_beacon_defconfig
+++ b/configs/r8a774e1_beacon_defconfig
@@ -3,12 +3,14 @@
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a774e1-beacon-rzg2h-kit"
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_BEACON_RZG2H=y
# CONFIG_SPL is not set
CONFIG_LTO=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig
index eaa67e2..bf6cdd5 100644
--- a/configs/r8a77970_eagle_defconfig
+++ b/configs/r8a77970_eagle_defconfig
@@ -6,11 +6,13 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_EAGLE=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig
index 355008c..1c9abad 100644
--- a/configs/r8a77980_condor_defconfig
+++ b/configs/r8a77980_condor_defconfig
@@ -6,11 +6,13 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_CONDOR=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig
index 5ed4b95..6ba8b3a 100644
--- a/configs/r8a77990_ebisu_defconfig
+++ b/configs/r8a77990_ebisu_defconfig
@@ -5,11 +5,13 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_EBISU=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
@@ -18,6 +20,7 @@
CONFIG_UPDATE_TFTP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -54,10 +57,6 @@
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x70
-CONFIG_SYS_I2C_EEPROM_BUS=7
-CONFIG_SYS_EEPROM_SIZE=128
-CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=7
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
index 41bf992..23a4c87 100644
--- a/configs/r8a77995_draak_defconfig
+++ b/configs/r8a77995_draak_defconfig
@@ -5,11 +5,13 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_DRAAK=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig
index 4b80c8f..0151ca5 100644
--- a/configs/r8a779a0_falcon_defconfig
+++ b/configs/r8a779a0_falcon_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC00000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a779a0-falcon-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6338000
@@ -12,6 +13,7 @@
CONFIG_TARGET_FALCON=y
# CONFIG_PSCI_RESET is not set
CONFIG_ARMV8_PSCI=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index 82dd4e4..1e9def2 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -7,21 +7,23 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
CONFIG_TARGET_RASTABAN=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2E0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -76,6 +78,8 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig
index f48adf9..3b48ab2 100644
--- a/configs/rcar3_salvator-x_defconfig
+++ b/configs/rcar3_salvator-x_defconfig
@@ -3,11 +3,13 @@
CONFIG_ARCH_RMOBILE=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_SALVATOR_X=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
@@ -15,6 +17,7 @@
CONFIG_UPDATE_TFTP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -55,10 +58,6 @@
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x70
-CONFIG_SYS_I2C_EEPROM_BUS=7
-CONFIG_SYS_EEPROM_SIZE=128
-CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=7
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig
index 6e9382b..1213baa 100644
--- a/configs/rcar3_ulcb_defconfig
+++ b/configs/rcar3_ulcb_defconfig
@@ -5,11 +5,13 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_ULCB=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
@@ -17,6 +19,7 @@
CONFIG_UPDATE_TFTP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -56,10 +59,6 @@
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x70
-CONFIG_SYS_I2C_EEPROM_BUS=7
-CONFIG_SYS_EEPROM_SIZE=128
-CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=7
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig
index 2f45536..1fb7084 100644
--- a/configs/riotboard_defconfig
+++ b/configs/riotboard_defconfig
@@ -7,17 +7,21 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x60000
+CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6s1g.cfg"
CONFIG_MX6S=y
CONFIG_TARGET_EMBESTMX6BOARDS=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-riotboard"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,SPL,DDR_MB=1024"
CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -40,6 +44,9 @@
CONFIG_SYS_MMC_ENV_DEV=2
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig
index 257893e..59c101e 100644
--- a/configs/roc-cc-rk3308_defconfig
+++ b/configs/roc-cc-rk3308_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00600000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -13,6 +14,7 @@
CONFIG_DEBUG_UART_BASE=0xFF0C0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 4351a5f..cf04bbc 100644
--- a/configs/roc-cc-rk3328_defconfig
+++ b/configs/roc-cc-rk3328_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
@@ -15,6 +16,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -69,6 +71,7 @@
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig
index 8d0f570..199624f 100644
--- a/configs/roc-pc-mezzanine-rk3399_defconfig
+++ b/configs/roc-pc-mezzanine-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
@@ -12,8 +13,9 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index 4e5c904..bc124c8 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
@@ -12,8 +13,9 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig
index f01b6a3..9366eba 100644
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig
index ae35633..ac045d1 100644
--- a/configs/rock-pi-4c-rk3399_defconfig
+++ b/configs/rock-pi-4c-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -9,6 +10,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
index 4816b1e..520ad8a 100644
--- a/configs/rock-pi-e-rk3328_defconfig
+++ b/configs/rock-pi-e-rk3328_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
@@ -16,6 +17,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -70,6 +72,7 @@
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig
index e5df677..0b89ae9 100644
--- a/configs/rock-pi-n10-rk3399pro_defconfig
+++ b/configs/rock-pi-n10-rk3399pro_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
@@ -10,6 +11,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb"
# CONFIG_CONSOLE_MUX is not set
diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig
index 935f569..c060941 100644
--- a/configs/rock-pi-n8-rk3288_defconfig
+++ b/configs/rock-pi-n8-rk3288_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_SILENT_CONSOLE=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index 2f1743a..c9a5ba2 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_NR_DRAM_BANKS=1
@@ -12,6 +13,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-rock2-square.dtb"
diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index f0ef1e5..38b9156 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
@@ -15,6 +16,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -68,6 +70,7 @@
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 0233e0e..e46f07e 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000
@@ -8,6 +9,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index 9122173..bc97636 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
@@ -14,6 +16,7 @@
CONFIG_DEBUG_UART_BASE=0x20064000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x60800800
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
index ae11a8f..637c5c2 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -10,8 +11,9 @@
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
index d17e102..6d76d12 100644
--- a/configs/rpi_0_w_defconfig
+++ b/configs/rpi_0_w_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index 8b8affb..1931607 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00008000
@@ -7,6 +8,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index b867b7f..827fc42 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00008000
@@ -8,6 +9,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig
index 043665c..e99a7df 100644
--- a/configs/rpi_3_b_plus_defconfig
+++ b/configs/rpi_3_b_plus_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index 3cebd65..5df3884 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
index b813d04..d592df5 100644
--- a/configs/rpi_4_32b_defconfig
+++ b/configs/rpi_4_32b_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x4000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum; usb start;"
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
index de2658a..ab5cc90 100644
--- a/configs/rpi_4_defconfig
+++ b/configs/rpi_4_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x4000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum; usb start;"
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
index f90107e..382d99d 100644
--- a/configs/rpi_arm64_defconfig
+++ b/configs/rpi_arm64_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x4000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum; usb start;"
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index af2189b..8acf04d 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 01b9930..39f9a0c 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -7,20 +7,22 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-rut"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=600
CONFIG_TARGET_RUT=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -42,6 +44,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_CMD_ASKENV=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -75,6 +78,8 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/s400_defconfig b/configs/s400_defconfig
index 313c657..4467e66 100644
--- a/configs/s400_defconfig
+++ b/configs/s400_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" s400"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig
index d99c30b..eb60989 100644
--- a/configs/s5p4418_nanopi2_defconfig
+++ b/configs/s5p4418_nanopi2_defconfig
@@ -7,6 +7,7 @@
CONFIG_SYS_MEMTEST_END=0xb0000000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x2E0200
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="s5p4418-nanopi2"
CONFIG_TARGET_NANOPI2=y
@@ -14,6 +15,7 @@
CONFIG_ROOT_DEV=1
CONFIG_BOOT_PART=1
CONFIG_ROOT_PART=2
+CONFIG_SYS_LOAD_ADDR=0x71080000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SUPPORT_RAW_INITRD=y
diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig
index 59aec97..1783bec 100644
--- a/configs/s5p_goni_defconfig
+++ b/configs/s5p_goni_defconfig
@@ -5,9 +5,11 @@
CONFIG_NR_DRAM_BANKS=3
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x7000
+CONFIG_SYS_MALLOC_LEN=0x5001000
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni"
CONFIG_TARGET_S5P_GONI=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x34000000
# CONFIG_AUTOBOOT is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock8 rootfstype=ext4 ${console} ${meminfo} ${mtdparts}"
diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig
index f6bb60e..231eeb2 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x44800000
@@ -7,8 +8,10 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x7000
+CONFIG_SYS_MALLOC_LEN=0x5001000
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x44800000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
# CONFIG_USE_BOOTCOMMAND is not set
diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig
index d29a19e..35ce6ae 100644
--- a/configs/sagem_f@st1704_ram_defconfig
+++ b/configs/sagem_f@st1704_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -6,10 +7,13 @@
CONFIG_DEFAULT_DEVICE_TREE="sagem,f@st1704"
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6338=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig
index e1fceec..178f113 100644
--- a/configs/sam9x60ek_mmc_defconfig
+++ b/configs/sam9x60ek_mmc_defconfig
@@ -1,16 +1,19 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAM9X60EK=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
@@ -44,6 +47,7 @@
CONFIG_CLK_AT91=y
CONFIG_AT91_GENERIC_CLK=y
CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_CPU=y
CONFIG_AT91_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_AT91=y
diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig
index 35368f3..67924fc 100644
--- a/configs/sam9x60ek_nandflash_defconfig
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -1,9 +1,11 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAM9X60EK=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=8
+CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -11,6 +13,7 @@
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
@@ -46,6 +49,7 @@
CONFIG_CLK_AT91=y
CONFIG_AT91_GENERIC_CLK=y
CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_CPU=y
CONFIG_AT91_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_AT91=y
diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig
index 1c6abdc..07bc753 100644
--- a/configs/sam9x60ek_qspiflash_defconfig
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -1,10 +1,12 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAM9X60EK=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_NR_DRAM_BANKS=8
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x81000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
@@ -54,6 +57,7 @@
CONFIG_CLK_AT91=y
CONFIG_AT91_GENERIC_CLK=y
CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_CPU=y
CONFIG_AT91_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_AT91=y
diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig
index 2d13dc2..169b693 100644
--- a/configs/sama5d27_giantboard_defconfig
+++ b/configs/sama5d27_giantboard_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
@@ -12,8 +13,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_giantboard"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -23,6 +24,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_SD_BOOT=y
diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig
index 0326cd3..e67e37b 100644
--- a/configs/sama5d27_som1_ek_mmc1_defconfig
+++ b/configs/sama5d27_som1_ek_mmc1_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
@@ -11,8 +12,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -22,6 +23,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_SD_BOOT=y
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig
index c606c8a..0fe64ee 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
@@ -12,8 +13,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -23,6 +24,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_SD_BOOT=y
diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig
index 33a0cad..be214d9 100644
--- a/configs/sama5d27_som1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_som1_ek_qspiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
@@ -12,8 +13,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -23,6 +24,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_QSPI_BOOT=y
diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig
index e88b079..041a760 100644
--- a/configs/sama5d27_wlsom1_ek_mmc_defconfig
+++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y
@@ -10,8 +11,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -21,6 +22,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_SD_BOOT=y
diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
index 5902a93..1b16bc0 100644
--- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y
@@ -11,16 +12,17 @@
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf801c000
CONFIG_DEBUG_UART_CLOCK=82000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_QSPI_BOOT=y
diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig
index 54f5a31..df3b430 100644
--- a/configs/sama5d2_icp_mmc_defconfig
+++ b/configs/sama5d2_icp_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -10,8 +11,8 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp"
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -21,6 +22,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_SD_BOOT=y
diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig
new file mode 100644
index 0000000..bf442bf
--- /dev/null
+++ b/configs/sama5d2_icp_qspiflash_defconfig
@@ -0,0 +1,104 @@
+CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TARGET_SAMA5D2_ICP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MEMTEST_START=0x20000000
+CONFIG_SYS_MEMTEST_END=0x40000000
+CONFIG_ENV_SIZE=0x4000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp"
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0xf801c000
+CONFIG_DEBUG_UART_CLOCK=83000000
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
+CONFIG_SYS_BOOT_GET_CMDLINE=y
+CONFIG_SYS_BOOT_GET_KBD=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
+CONFIG_QSPI_BOOT=y
+CONFIG_SD_BOOT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlycon earlyprintk=serial,ttyS0, ignore_loglevel root=/dev/mmcblk0p2 memtest=0 rootfstype=ext4 rw rootwait"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CONFIG=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_GETTIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=2
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=0
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=66000000
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0x0
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_ATMEL_PIO4=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_EEPROM=y
+CONFIG_MICROCHIP_FLEXCOM=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_SPEED=66000000
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_QSPI=y
+CONFIG_TIMER=y
+CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_OF_LIBFDT=y
+# CONFIG_EFI_LOADER_HII is not set
diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig
index 8e8d41b..5f7dbc6 100644
--- a/configs/sama5d2_ptc_ek_mmc_defconfig
+++ b/configs/sama5d2_ptc_ek_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -13,6 +14,7 @@
CONFIG_DEBUG_UART_CLOCK=82000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_SD_BOOT=y
diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig
index cd73859..e7b48d6 100644
--- a/configs/sama5d2_ptc_ek_nandflash_defconfig
+++ b/configs/sama5d2_ptc_ek_nandflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -13,6 +14,7 @@
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
CONFIG_NAND_BOOT=y
diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig
index 9bf34b8..2bf4613 100644
--- a/configs/sama5d2_xplained_emmc_defconfig
+++ b/configs/sama5d2_xplained_emmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -11,8 +12,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -22,6 +23,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
CONFIG_SD_BOOT=y
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index 5871e7b..d7d577e 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -12,8 +13,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -23,6 +24,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
CONFIG_SD_BOOT=y
diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig
index 16534fb..03e832b 100644
--- a/configs/sama5d2_xplained_qspiflash_defconfig
+++ b/configs/sama5d2_xplained_qspiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -12,8 +13,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -23,6 +24,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
CONFIG_QSPI_BOOT=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index 7a8df06..1d43c77 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -15,16 +16,17 @@
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=83000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig
index 0077217..828a79e 100644
--- a/configs/sama5d36ek_cmp_mmc_defconfig
+++ b/configs/sama5d36ek_cmp_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -13,6 +14,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig
index ca072f4..e641813 100644
--- a/configs/sama5d36ek_cmp_nandflash_defconfig
+++ b/configs/sama5d36ek_cmp_nandflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -13,6 +14,7 @@
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig
index f4d13a5..35241fd 100644
--- a/configs/sama5d36ek_cmp_spiflash_defconfig
+++ b/configs/sama5d36ek_cmp_spiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -15,6 +16,7 @@
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index 1045758..2833717 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -12,8 +13,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
CONFIG_SPL_TEXT_BASE=0x300000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -23,6 +24,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 594424d..0fd2c42 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -11,7 +12,7 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
CONFIG_SPL_TEXT_BASE=0x300000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -20,6 +21,7 @@
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 106e91d..e1a8ab7 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -12,8 +13,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_SPL_TEXT_BASE=0x300000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -23,6 +24,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 2d7d349..2e1fdf7 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -11,7 +12,7 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_SPL_TEXT_BASE=0x300000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -20,6 +21,7 @@
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 307f1fc..2d22e2d 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -15,16 +16,17 @@
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_SPL_TEXT_BASE=0x300000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 68747d8..4e5c513 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -12,8 +13,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -23,6 +24,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index c6ff96b..e642409 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -11,7 +12,7 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -20,6 +21,7 @@
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index 4282905..ba529db 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -15,16 +16,17 @@
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index 098e6ba..bfd4d89 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -12,8 +13,8 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -23,6 +24,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index fd285a7..a3cd8c5 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -11,7 +12,7 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -20,6 +21,7 @@
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 662568a..9896076 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
@@ -15,16 +16,17 @@
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_SPL_TEXT_BASE=0x200000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
CONFIG_DEBUG_UART_CLOCK=88000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig
index e076e07..bb03db4 100644
--- a/configs/sama7g5ek_mmc1_defconfig
+++ b/configs/sama7g5ek_mmc1_defconfig
@@ -14,10 +14,13 @@
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x62000000
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk1p2 rw rootwait"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 1:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000"
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig
index 96549c2..b5dd64c 100644
--- a/configs/sama7g5ek_mmc_defconfig
+++ b/configs/sama7g5ek_mmc_defconfig
@@ -14,10 +14,13 @@
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x62000000
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 0:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000"
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index f7098b4..df9633d 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -3,12 +3,14 @@
CONFIG_SYS_MEMTEST_START=0x00100000
CONFIG_SYS_MEMTEST_END=0x00101000
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
CONFIG_PRE_CON_BUF_ADDR=0x100000
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
CONFIG_SANDBOX64=y
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
@@ -223,7 +225,9 @@
CONFIG_SANDBOX_OSD=y
CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_VIDEO_BMP_RLE8=y
+# CONFIG_WATCHDOG_AUTOSTART is not set
CONFIG_WDT=y
+CONFIG_WDT_GPIO=y
CONFIG_WDT_SANDBOX=y
CONFIG_FS_CBFS=y
CONFIG_FS_CRAMFS=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index ea08a9e..f1067b9 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -3,11 +3,13 @@
CONFIG_SYS_MEMTEST_START=0x00100000
CONFIG_SYS_MEMTEST_END=0x00101000
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_PRE_CON_BUF_ADDR=0xf0000
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_RSASSA_PSS=y
@@ -281,7 +283,9 @@
CONFIG_W1_GPIO=y
CONFIG_W1_EEPROM=y
CONFIG_W1_EEPROM_SANDBOX=y
+# CONFIG_WATCHDOG_AUTOSTART is not set
CONFIG_WDT=y
+CONFIG_WDT_GPIO=y
CONFIG_WDT_SANDBOX=y
CONFIG_FS_CBFS=y
CONFIG_FS_CRAMFS=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index a6e2544..1101574 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -3,10 +3,12 @@
CONFIG_SYS_MEMTEST_START=0x00100000
CONFIG_SYS_MEMTEST_END=0x00101000
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index 88443f5..b358456 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -1,12 +1,14 @@
CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SYS_MEMTEST_START=0x00100000
CONFIG_SYS_MEMTEST_END=0x00101000
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
@@ -14,6 +16,7 @@
CONFIG_SANDBOX_SPL=y
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
@@ -31,7 +34,7 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_RTC_SUPPORT=y
+CONFIG_SPL_RTC=y
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
@@ -120,6 +123,7 @@
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y
+# CONFIG_SPL_DM_I2C_GPIO is not set
CONFIG_SYS_I2C_SANDBOX=y
CONFIG_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 77dd83c..73cf5dd 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -1,12 +1,14 @@
CONFIG_SYS_TEXT_BASE=0x200000
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SYS_MEMTEST_START=0x00100000
CONFIG_SYS_MEMTEST_END=0x00101000
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
@@ -14,6 +16,7 @@
CONFIG_SANDBOX_SPL=y
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
@@ -32,7 +35,7 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_RTC_SUPPORT=y
+CONFIG_SPL_RTC=y
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
@@ -122,6 +125,7 @@
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
CONFIG_DM_I2C_GPIO=y
+# CONFIG_SPL_DM_I2C_GPIO is not set
CONFIG_SYS_I2C_SANDBOX=y
CONFIG_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index aef9a1c..7a32f36 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_TEGRA20=y
CONFIG_TARGET_SEABOARD=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # "
diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig
index dbe0171..caff2a6 100644
--- a/configs/seeed_npi_imx6ull_defconfig
+++ b/configs/seeed_npi_imx6ull_defconfig
@@ -10,14 +10,14 @@
CONFIG_ENV_OFFSET=0x3c00000
CONFIG_MX6ULL=y
CONFIG_TARGET_NPI_IMX6ULL=y
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-seeed-npi-imx6ull-dev-board"
CONFIG_SPL_TEXT_BASE=0x908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig
index 8099b40..7e60922 100644
--- a/configs/sei510_defconfig
+++ b/configs/sei510_defconfig
@@ -6,6 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
+CONFIG_SYS_MALLOC_LEN=0x8000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-sei510"
CONFIG_MESON_G12A=y
@@ -14,6 +15,7 @@
CONFIG_IDENT_STRING=" sei510"
# CONFIG_PSCI_RESET is not set
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run load_logo"
diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig
index e11f36a..6a45c5e 100644
--- a/configs/sei610_defconfig
+++ b/configs/sei610_defconfig
@@ -6,6 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
+CONFIG_SYS_MALLOC_LEN=0x8000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-sei610"
CONFIG_MESON_G12A=y
@@ -14,6 +15,7 @@
CONFIG_IDENT_STRING=" sei610"
# CONFIG_PSCI_RESET is not set
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run load_logo"
diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig
index 097d583..bbcb944 100644
--- a/configs/sfr_nb4-ser_ram_defconfig
+++ b/configs/sfr_nb4-ser_ram_defconfig
@@ -1,4 +1,5 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_TEXT_BASE=0x80010000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
@@ -7,10 +8,13 @@
CONFIG_ARCH_BMIPS=y
CONFIG_SOC_BMIPS_BCM6358=y
CONFIG_BOARD_SFR_NB4_SER=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
index 60256d1..61a2d5a 100644
--- a/configs/sheep-rk3368_defconfig
+++ b/configs/sheep-rk3368_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1
@@ -8,6 +9,7 @@
CONFIG_DEBUG_UART_BASE=0xFF1b0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-sheep.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index d09789a..24d416e 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
@@ -11,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug"
CONFIG_IDENT_STRING="\nMarvell-Sheevaplug"
# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig
index fd686df..b9e4d8d 100644
--- a/configs/sifive_unleashed_defconfig
+++ b/configs/sifive_unleashed_defconfig
@@ -2,16 +2,18 @@
CONFIG_SPL_GPIO=y
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_TARGET_SIFIVE_UNLEASHED=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000
CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unleashed-a00.dtb"
@@ -22,7 +24,6 @@
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_CLK=y
diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig
index 1dde98e..5564655 100644
--- a/configs/sifive_unmatched_defconfig
+++ b/configs/sifive_unmatched_defconfig
@@ -2,26 +2,28 @@
CONFIG_SPL_GPIO=y
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00"
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_AHCI=y
CONFIG_TARGET_SIFIVE_UNMATCHED=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
# CONFIG_SPL_USE_ARCH_MEMMOVE is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000
CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unmatched-a00.dtb"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_PWM=y
@@ -32,6 +34,7 @@
CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y
CONFIG_SPL_CLK=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x54
CONFIG_E1000=y
CONFIG_NVME=y
CONFIG_PCI=y
diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig
index 0377c9e..1c340ea 100644
--- a/configs/silinux_ek874_defconfig
+++ b/configs/silinux_ek874_defconfig
@@ -6,11 +6,13 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3F0000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_SILINUX_EK874=y
+CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index 020e6b0..4a3b15e 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -12,17 +12,19 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RMOBILE_BOARD_STRING="Silk"
CONFIG_R8A7794=y
CONFIG_TARGET_SILK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig
index 33c67c0..4bfb6ee 100644
--- a/configs/sipeed_maix_bitm_defconfig
+++ b/configs/sipeed_maix_bitm_defconfig
@@ -2,8 +2,10 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0xfff000
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_TARGET_SIPEED_MAIX=y
CONFIG_ARCH_RV64I=y
+CONFIG_SYS_LOAD_ADDR=0x80000000
CONFIG_STACK_SIZE=0x100000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run k210_bootcmd"
diff --git a/configs/sipeed_maix_smode_defconfig b/configs/sipeed_maix_smode_defconfig
index c20c389..2ab0672 100644
--- a/configs/sipeed_maix_smode_defconfig
+++ b/configs/sipeed_maix_smode_defconfig
@@ -3,9 +3,11 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0xfff000
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_TARGET_SIPEED_MAIX=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
+CONFIG_SYS_LOAD_ADDR=0x80000000
CONFIG_STACK_SIZE=0x100000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run k210_bootcmd"
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index c171cca..3869635 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SPL_SYS_ICACHE_OFF=y
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_SPL_SYS_THUMB_BUILD=y
@@ -13,10 +15,12 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x460000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x180000
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
CONFIG_BOOTDELAY=3
diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig
index 3ed1947..f1d38ee 100644
--- a/configs/smdk5250_defconfig
+++ b/configs/smdk5250_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
@@ -10,11 +12,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x3FC000
CONFIG_ENV_SECT_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250"
CONFIG_SPL_TEXT_BASE=0x02023400
CONFIG_SPL=y
CONFIG_IDENT_STRING=" for SMDK5250"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
@@ -38,6 +42,7 @@
CONFIG_USE_ENV_SPI_BUS=y
CONFIG_ENV_SPI_BUS=1
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig
index 7b73940..fa0c2ea 100644
--- a/configs/smdk5420_defconfig
+++ b/configs/smdk5420_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x23E00000
@@ -8,11 +10,13 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x3FC000
CONFIG_ENV_SECT_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420"
CONFIG_SPL_TEXT_BASE=0x02024410
CONFIG_SPL=y
CONFIG_IDENT_STRING=" for SMDK5420"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x23e00000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
@@ -33,6 +37,7 @@
CONFIG_USE_ENV_SPI_BUS=y
CONFIG_ENV_SPI_BUS=1
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig
index f9df128..5bbe199 100644
--- a/configs/smdkc100_defconfig
+++ b/configs/smdkc100_defconfig
@@ -4,9 +4,11 @@
CONFIG_SYS_TEXT_BASE=0x34800000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100"
CONFIG_TARGET_SMDKC100=y
CONFIG_IDENT_STRING=" for SMDKC100"
+CONFIG_SYS_LOAD_ADDR=0x30000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)"
diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig
index ac84fde..ba773dc 100644
--- a/configs/smdkv310_defconfig
+++ b/configs/smdkv310_defconfig
@@ -1,15 +1,19 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43E00000
CONFIG_ARCH_EXYNOS4=y
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x4200
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310"
CONFIG_SPL_TEXT_BASE=0x02021410
CONFIG_SPL=y
CONFIG_IDENT_STRING=" for SMDKC210/V310"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x43e00000
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SYS_PROMPT="SMDKV310 # "
diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig
index 75fd5bc..7a779f3 100644
--- a/configs/smegw01_defconfig
+++ b/configs/smegw01_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MEMTEST_END=0xa0000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-smegw01"
CONFIG_TARGET_SMEGW01=y
@@ -14,7 +15,6 @@
CONFIG_IMX_BOOTAUX=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/storopack/smegw01/imximage.cfg"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig
index f9cc1a6..87bb607 100644
--- a/configs/snapper9260_defconfig
+++ b/configs/snapper9260_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
@@ -6,6 +7,8 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x80000
+CONFIG_SYS_MALLOC_LEN=0x100000
+CONFIG_SYS_LOAD_ADDR=0x23000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
CONFIG_BOOTDELAY=3
@@ -33,6 +36,9 @@
CONFIG_TFTP_TSIZE=y
CONFIG_AT91_GPIO=y
CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SLAVE=0x7F
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig
index e3a325a..6fd58ad 100644
--- a/configs/snapper9g20_defconfig
+++ b/configs/snapper9g20_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
@@ -6,6 +7,8 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x80000
+CONFIG_SYS_MALLOC_LEN=0x100000
+CONFIG_SYS_LOAD_ADDR=0x23000000
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
CONFIG_BOOTDELAY=3
@@ -32,6 +35,9 @@
CONFIG_TFTP_TSIZE=y
CONFIG_AT91_GPIO=y
CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SOFT=y
+CONFIG_SYS_I2C_SOFT_SLAVE=0x7F
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig
index 20a8211..76e77e8 100644
--- a/configs/sniper_defconfig
+++ b/configs/sniper_defconfig
@@ -3,6 +3,7 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_NR_DRAM_BANKS=2
+CONFIG_SYS_MALLOC_LEN=0x120000
CONFIG_SPL_TEXT_BASE=0x40200000
CONFIG_TARGET_SNIPER=y
CONFIG_SPL=y
@@ -22,7 +23,9 @@
# CONFIG_CMD_NFS is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SYS_OMAP24_I2C_SPEED=400000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_TWL4030_INPUT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_CONS_INDEX=3
diff --git a/configs/snow_defconfig b/configs/snow_defconfig
index a5fbd1d..407777c0 100644
--- a/configs/snow_defconfig
+++ b/configs/snow_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
@@ -10,6 +12,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x3FC000
CONFIG_ENV_SECT_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow"
CONFIG_SPL_TEXT_BASE=0x02023400
CONFIG_SPL=y
@@ -18,6 +21,7 @@
CONFIG_IDENT_STRING=" for snow"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
@@ -43,6 +47,7 @@
CONFIG_ENV_SPI_BUS=1
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_I2C_CROS_EC_LDO=y
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
CONFIG_CROS_EC_KEYB=y
diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig
index 414f49b..a44f6e4 100644
--- a/configs/socfpga_agilex_atf_defconfig
+++ b/configs/socfpga_agilex_atf_defconfig
@@ -6,12 +6,14 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
+CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_FIT=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index 87fa61d..1ad4103 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -7,6 +7,7 @@
CONFIG_SYS_MEMTEST_END=0x3fe00000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
CONFIG_SPL_TEXT_BASE=0xFFE00000
@@ -14,6 +15,7 @@
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
# CONFIG_PSCI_RESET is not set
+CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"
diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig
index c802827..9d3ec53 100644
--- a/configs/socfpga_agilex_vab_defconfig
+++ b/configs/socfpga_agilex_vab_defconfig
@@ -6,6 +6,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
CONFIG_SPL_TEXT_BASE=0xFFE00000
@@ -13,6 +14,7 @@
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
+CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_FIT=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index ef9bbb9..bf793d9 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
CONFIG_SPL_TEXT_BASE=0xFFE00000
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index a295aae..fa729cd 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index ad6a417..456b0d5 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig
index c2b2cf4..20d7f5b 100644
--- a/configs/socfpga_dbm_soc1_defconfig
+++ b/configs/socfpga_dbm_soc1_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 4539d08..17c160d 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 3b31fdb..0a35628 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index 945ff08..7108486 100644
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 723f824..1913b6f 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -3,6 +3,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index da25479..9d03917 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig
index 3b5246e..7961fb2 100644
--- a/configs/socfpga_n5x_atf_defconfig
+++ b/configs/socfpga_n5x_atf_defconfig
@@ -6,6 +6,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk"
CONFIG_SPL_TEXT_BASE=0xFFE00000
diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig
index a5649ae..02175b0 100644
--- a/configs/socfpga_n5x_defconfig
+++ b/configs/socfpga_n5x_defconfig
@@ -5,6 +5,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk"
CONFIG_SPL_TEXT_BASE=0xFFE00000
diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig
index cb3f3a9..8847d91 100644
--- a/configs/socfpga_n5x_vab_defconfig
+++ b/configs/socfpga_n5x_vab_defconfig
@@ -6,6 +6,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk"
CONFIG_SPL_TEXT_BASE=0xFFE00000
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index 854efe3..963215d 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -3,17 +3,19 @@
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
-# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_MMC is not set
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y
CONFIG_ENV_OFFSET_REDUND=0x120000
# CONFIG_SPL_LIBDISK_SUPPORT is not set
-# CONFIG_SPL_SPI_SUPPORT is not set
+# CONFIG_SPL_SPI is not set
CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_FIT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 ubi.fm_autoconvert=1 uio_pdrv_genirq.of_id=\"idq,regbank\""
@@ -31,6 +33,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_SIZE=1024
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -61,8 +65,6 @@
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
-CONFIG_SYS_EEPROM_SIZE=1024
-CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_MMC_DW=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 301df41..ebb9fbe 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 64e7d4f..b5fd445 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -2,6 +2,7 @@
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index ff1df8f..23261ae 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0xE0000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig
index 43c583b..ff0373e 100644
--- a/configs/socfpga_stratix10_atf_defconfig
+++ b/configs/socfpga_stratix10_atf_defconfig
@@ -6,12 +6,14 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk"
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
CONFIG_IDENT_STRING="socfpga_stratix10"
CONFIG_SPL_FS_FAT=y
+CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_FIT=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
index c352c45..a7f3991 100644
--- a/configs/socfpga_stratix10_defconfig
+++ b/configs/socfpga_stratix10_defconfig
@@ -7,6 +7,7 @@
CONFIG_SYS_MEMTEST_END=0x3fe00000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_MALLOC_LEN=0x500000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk"
CONFIG_SPL_TEXT_BASE=0xFFE00000
@@ -16,6 +17,7 @@
# CONFIG_PSCI_RESET is not set
CONFIG_OPTIMIZE_INLINING=y
CONFIG_SPL_OPTIMIZE_INLINING=y
+CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index cbdb897..5e7fda3 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -3,6 +3,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
@@ -27,6 +28,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=70
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -71,8 +74,6 @@
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
-CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=70
CONFIG_MMC_DW=y
CONFIG_MTD=y
CONFIG_SF_DEFAULT_MODE=0x0
diff --git a/configs/somlabs_visionsom_6ull_defconfig b/configs/somlabs_visionsom_6ull_defconfig
index 0c407b3..6523d2a 100644
--- a/configs/somlabs_visionsom_6ull_defconfig
+++ b/configs/somlabs_visionsom_6ull_defconfig
@@ -8,10 +8,10 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_MX6ULL=y
CONFIG_TARGET_SOMLABS_VISIONSOM_6ULL=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-somlabs-visionsom"
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/somlabs/visionsom-6ull/imximage.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/spring_defconfig b/configs/spring_defconfig
index 53c375e..a9062b2 100644
--- a/configs/spring_defconfig
+++ b/configs/spring_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
@@ -10,6 +12,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x3FC000
CONFIG_ENV_SECT_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x5004000
CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring"
CONFIG_SPL_TEXT_BASE=0x02023400
CONFIG_SPL=y
@@ -18,6 +21,7 @@
CONFIG_IDENT_STRING=" for spring"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
@@ -43,6 +47,7 @@
CONFIG_ENV_SPI_BUS=1
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_I2C_CROS_EC_LDO=y
+CONFIG_SYS_I2C_S3C24X0=y
CONFIG_I2C_MUX=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
CONFIG_CROS_EC_KEYB=y
diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig
index f31960b..cf86146 100644
--- a/configs/stemmy_defconfig
+++ b/configs/stemmy_defconfig
@@ -1,8 +1,16 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_U8500=y
+CONFIG_SUPPORT_PASSING_ATAGS=y
+# CONFIG_SETUP_MEMORY_TAGS is not set
+CONFIG_INITRD_TAG=y
CONFIG_SYS_TEXT_BASE=0x100000
CONFIG_NR_DRAM_BANKS=2
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DEFAULT_DEVICE_TREE="ste-ux500-samsung-stemmy"
+CONFIG_SYS_LOAD_ADDR=0x100000
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run fastbootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CONFIG=y
@@ -14,5 +22,17 @@
CONFIG_CMD_GETTIME=y
CONFIG_EFI_PARTITION=y
# CONFIG_NET is not set
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x18100000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
# CONFIG_MMC_HW_PARTITIONING is not set
+CONFIG_USB=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
+CONFIG_USB_GADGET_PRODUCT_NUM=0x685d
+CONFIG_DM_VIDEO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MCDE_SIMPLE=y
# CONFIG_EFI_LOADER is not set
diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index 071dac9..d5ec00e 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -1,11 +1,14 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_STI=y
CONFIG_SYS_TEXT_BASE=0x7D600000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_MALLOC_LEN=0x1800000
CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig
index b0dcb38..b6388cf 100644
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -5,10 +5,12 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DEFAULT_DEVICE_TREE="stm32f429-disco"
CONFIG_STM32F4=y
CONFIG_TARGET_STM32F429_DISCOVERY=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x90400000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig
index b614182..a75c269 100644
--- a/configs/stm32f429-evaluation_defconfig
+++ b/configs/stm32f429-evaluation_defconfig
@@ -4,10 +4,12 @@
CONFIG_SYS_MALLOC_F_LEN=0xF00
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval"
CONFIG_STM32F4=y
CONFIG_TARGET_STM32F429_EVALUATION=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig
index 7960618..ecca110 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -4,10 +4,12 @@
CONFIG_SYS_MALLOC_F_LEN=0xF00
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco"
CONFIG_STM32F4=y
CONFIG_TARGET_STM32F469_DISCOVERY=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index 05d7ec2..2694a32 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -4,11 +4,13 @@
CONFIG_SYS_MALLOC_F_LEN=0xE00
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco"
CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_STM32F7=y
CONFIG_TARGET_STM32F746_DISCO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x8008000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig
index 40f94ac..10af638 100644
--- a/configs/stm32f769-disco_defconfig
+++ b/configs/stm32f769-disco_defconfig
@@ -4,11 +4,13 @@
CONFIG_SYS_MALLOC_F_LEN=0xE00
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco"
CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_STM32F7=y
CONFIG_TARGET_STM32F746_DISCO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x8008000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig
index 03c1786..d62913a 100644
--- a/configs/stm32h743-disco_defconfig
+++ b/configs/stm32h743-disco_defconfig
@@ -4,10 +4,12 @@
CONFIG_SYS_MALLOC_F_LEN=0xF00
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco"
CONFIG_STM32H7=y
CONFIG_TARGET_STM32H743_DISCO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xd0400000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig
index 9d78fb7..042d042 100644
--- a/configs/stm32h743-eval_defconfig
+++ b/configs/stm32h743-eval_defconfig
@@ -4,10 +4,12 @@
CONFIG_SYS_MALLOC_F_LEN=0xF00
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval"
CONFIG_STM32H7=y
CONFIG_TARGET_STM32H743_EVAL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xd0400000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
diff --git a/configs/stm32h750-art-pi_defconfig b/configs/stm32h750-art-pi_defconfig
index 1af66c5..66a5a4f 100644
--- a/configs/stm32h750-art-pi_defconfig
+++ b/configs/stm32h750-art-pi_defconfig
@@ -4,10 +4,12 @@
CONFIG_SYS_MALLOC_F_LEN=0xF00
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DEFAULT_DEVICE_TREE="stm32h750i-art-pi"
CONFIG_STM32H7=y
CONFIG_TARGET_STM32H750_ART_PI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc1800000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
index a7e5f566..14bf6d1 100644
--- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
@@ -6,12 +6,13 @@
CONFIG_ENV_OFFSET=0x280000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2"
CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
CONFIG_TARGET_ICORE_STM32MP1=y
CONFIG_ENV_OFFSET_REDUND=0x2C0000
# CONFIG_ARMV7_VIRT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
index 4860ae4..648ecbf 100644
--- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
@@ -6,12 +6,13 @@
CONFIG_ENV_OFFSET=0x280000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-edimm2.2"
CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
CONFIG_TARGET_ICORE_STM32MP1=y
CONFIG_ENV_OFFSET_REDUND=0x2C0000
# CONFIG_ARMV7_VIRT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
index b075365..f422ffb 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
@@ -6,12 +6,13 @@
CONFIG_ENV_OFFSET=0x280000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0-of7"
CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
CONFIG_TARGET_MICROGEA_STM32MP1=y
CONFIG_ENV_OFFSET_REDUND=0x2C0000
# CONFIG_ARMV7_VIRT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
index be68c8a..244d9cc 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
@@ -6,12 +6,13 @@
CONFIG_ENV_OFFSET=0x280000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0"
CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
CONFIG_TARGET_MICROGEA_STM32MP1=y
CONFIG_ENV_OFFSET_REDUND=0x2C0000
# CONFIG_ARMV7_VIRT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index 9cf6ab1..b9a9cdc 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
CONFIG_TARGET_ST_STM32MP15x=y
CONFIG_CMD_STM32KEY=y
@@ -16,9 +16,10 @@
CONFIG_ENV_OFFSET_REDUND=0x2C0000
CONFIG_TYPEC_STUSB160X=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
index e725b91..74a7c12 100644
--- a/configs/stm32mp15_defconfig
+++ b/configs/stm32mp15_defconfig
@@ -13,6 +13,7 @@
CONFIG_ENV_OFFSET_REDUND=0x4C0000
CONFIG_TYPEC_STUSB160X=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index c2227c0..5b85f6a 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -8,13 +8,14 @@
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcom-pdk2"
CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
CONFIG_TARGET_DH_STM32MP1_PDK2=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its"
@@ -35,6 +36,7 @@
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_BUS=3
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
@@ -93,7 +95,6 @@
CONFIG_STM32_IPCC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
-CONFIG_SYS_I2C_EEPROM_BUS=3
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 11750cb..37dd275 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -6,13 +6,14 @@
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcor-avenger96"
CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_MMC=y
CONFIG_SPL=y
CONFIG_TARGET_DH_STM32MP1_PDK2=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
# CONFIG_ARMV7_VIRT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its"
@@ -33,6 +34,7 @@
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_BUS=2
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
@@ -89,7 +91,6 @@
CONFIG_STM32_IPCC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x53
-CONFIG_SYS_I2C_EEPROM_BUS=2
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
index 2e2f0c7..04564e2 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -14,6 +14,7 @@
CONFIG_ENV_OFFSET_REDUND=0x2C0000
CONFIG_TYPEC_STUSB160X=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig
index 408d104..bca22c5 100644
--- a/configs/stmark2_defconfig
+++ b/configs/stmark2_defconfig
@@ -3,8 +3,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x40000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="stmark2"
CONFIG_TARGET_STMARK2=y
+CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000"
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 rw rootfstype=ramfs rdinit=/bin/init devtmpfs.mount=1"
diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index 0fb8aff..b4a5290 100644
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -12,17 +12,19 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RMOBILE_BOARD_STRING="Stout"
CONFIG_R8A7790=y
CONFIG_TARGET_STOUT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index 7fe5f99..b6ec831e 100644
--- a/configs/stv0991_defconfig
+++ b/configs/stv0991_defconfig
@@ -9,7 +9,9 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x30000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x14000
CONFIG_DEFAULT_DEVICE_TREE="stv0991"
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_SYS_EXTRA_OPTIONS="STV0991"
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig
index 4dcc119..3fee7c2 100644
--- a/configs/sunxi_Gemei_G9_defconfig
+++ b/configs/sunxi_Gemei_G9_defconfig
@@ -12,5 +12,8 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig
index 13736a4..a88856b 100644
--- a/configs/synquacer_developerbox_defconfig
+++ b/configs/synquacer_developerbox_defconfig
@@ -1,14 +1,15 @@
CONFIG_ARM=y
-CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_SYNQUACER=y
-CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_SYS_TEXT_BASE=0x08200000
CONFIG_ENV_SIZE=0x30000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="synquacer-sc2a11-developerbox"
CONFIG_TARGET_DEVELOPERBOX=y
CONFIG_AHCI=y
+CONFIG_SYS_LOAD_ADDR=0x80000000
CONFIG_FIT=y
CONFIG_BOOTSTAGE_STASH_SIZE=4096
CONFIG_HUSH_PARSER=y
diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index b5ec025..6e4e101 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -16,6 +16,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 80f75ce..0bb28d4 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SPL_SYS_ICACHE_OFF=y
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
@@ -16,6 +18,7 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x460000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
@@ -24,9 +27,10 @@
CONFIG_DEBUG_UART_CLOCK=18432000
CONFIG_ENV_OFFSET_REDUND=0x180000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
-CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067"
+CONFIG_SYS_LOAD_ADDR=0x22000000
+CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig
index 99ef8a1..96dc479 100644
--- a/configs/tb100_defconfig
+++ b/configs/tb100_defconfig
@@ -2,8 +2,10 @@
CONFIG_TARGET_TB100=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_ENV_SIZE=0x800
+CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100"
CONFIG_SYS_CLK_FREQ=500000000
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index a14f9d4..d393975 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -8,6 +8,7 @@
CONFIG_ENV_OFFSET=0x60000
CONFIG_MX6Q=y
CONFIG_TARGET_TBS2910=y
+CONFIG_SYS_MALLOC_LEN=0x8000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910"
CONFIG_PRE_CON_BUF_ADDR=0x7c000000
diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig
index 9d0b1f0..760e516 100644
--- a/configs/tec-ng_defconfig
+++ b/configs/tec-ng_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA30=y
CONFIG_TARGET_TEC_NG=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
diff --git a/configs/tec_defconfig b/configs/tec_defconfig
index 5290168..b235784 100644
--- a/configs/tec_defconfig
+++ b/configs/tec_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_TEGRA20=y
CONFIG_TARGET_TEC=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig
index 41d3474..115ce78 100644
--- a/configs/teres_i_defconfig
+++ b/configs/teres_i_defconfig
@@ -9,6 +9,8 @@
CONFIG_USB1_VBUS_PIN="PL7"
CONFIG_I2C0_ENABLE=y
CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start"
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_PWM=y
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index 93b0c6b..98e4c1a 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -13,12 +13,13 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
CONFIG_SPL_TEXT_BASE=0x40004030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
@@ -57,6 +58,10 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_RAM=y
CONFIG_FPGA_ALTERA=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x0
# CONFIG_MMC is not set
CONFIG_SF_DEFAULT_SPEED=27777777
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index ffd5c28..5daa63a 100644
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -7,21 +7,23 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
CONFIG_TARGET_THUBAN=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2E0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -76,6 +78,8 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig
index 97a41d8..0462804 100644
--- a/configs/thunderx_88xx_defconfig
+++ b/configs/thunderx_88xx_defconfig
@@ -3,11 +3,13 @@
CONFIG_SYS_TEXT_BASE=0x00500000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x101000
CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx"
CONFIG_DEBUG_UART_BASE=0x87e024000000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x500000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e024000000 debug maxcpus=48 rootwait rw root=/dev/sda2 coherent_pool=16M"
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index 7a93ebb..dc24bb8 100644
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -10,8 +11,8 @@
CONFIG_SPL_TEXT_BASE=0x40400000
CONFIG_TI816X=y
CONFIG_TARGET_TI816X_EVM=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x1E0000
CONFIG_SPL_FS_FAT=y
@@ -53,6 +54,7 @@
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_DM=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 3ac314a..a9c9a12 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_SPL_GPIO=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb"
@@ -64,6 +67,7 @@
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_SPL_DM_REGULATOR_FIXED=y
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
index 35e84b7..5145cbc 100644
--- a/configs/tinker-s-rk3288_defconfig
+++ b/configs/tinker-s-rk3288_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_SPL_GPIO=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-tinker-s.dtb"
@@ -64,6 +67,7 @@
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_SPL_DM_REGULATOR_FIXED=y
diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig
index f54bc18..64a015b 100644
--- a/configs/tools-only_defconfig
+++ b/configs/tools-only_defconfig
@@ -1,6 +1,8 @@
CONFIG_SYS_TEXT_BASE=0
CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index e9e03a2..b43e546 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -18,6 +18,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_BOOTDELAY=0
CONFIG_USE_PREBOOT=y
CONFIG_SPL_STACK_R=y
diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index 8aec2af..a8a0ff2 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -18,6 +18,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_BOOTDELAY=0
CONFIG_USE_PREBOOT=y
CONFIG_SPL_STACK_R=y
diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index 6c27541..7f8cb4b 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -18,6 +18,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_BOOTDELAY=0
CONFIG_USE_PREBOOT=y
CONFIG_SPL_STACK_R=y
diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig
index d95918e..313507a 100644
--- a/configs/total_compute_defconfig
+++ b/configs/total_compute_defconfig
@@ -6,8 +6,10 @@
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0xff000000
CONFIG_ENV_SIZE=0x2a00000
+CONFIG_SYS_MALLOC_LEN=0x3200000
CONFIG_DEFAULT_DEVICE_TREE="total_compute"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x90000000
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig
index 849d332..500e777 100644
--- a/configs/tplink_wdr4300_defconfig
+++ b/configs/tplink_wdr4300_defconfig
@@ -4,9 +4,11 @@
CONFIG_SYS_MEMTEST_START=0x80100000
CONFIG_SYS_MEMTEST_END=0x83f00000
CONFIG_ENV_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300"
CONFIG_ARCH_ATH79=y
CONFIG_BOARD_TPLINK_WDR4300=y
+CONFIG_SYS_LOAD_ADDR=0xa1000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig
index a6705bd..8ca32b1 100644
--- a/configs/tqma6dl_mba6_mmc_defconfig
+++ b/configs/tqma6dl_mba6_mmc_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6DL=y
CONFIG_TARGET_TQMA6=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mba6b"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -15,6 +16,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -35,6 +37,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_USDHC=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=50000000
diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig
index 82d9b95..75b034a 100644
--- a/configs/tqma6dl_mba6_spi_defconfig
+++ b/configs/tqma6dl_mba6_spi_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_MX6DL=y
CONFIG_TARGET_TQMA6=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_TQMA6X_SPI_BOOT=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mba6b"
CONFIG_ENV_OFFSET_REDUND=0x90000
@@ -18,6 +19,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -39,6 +41,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_USDHC=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=50000000
diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig
index bbda379..f2ba649 100644
--- a/configs/tqma6q_mba6_mmc_defconfig
+++ b/configs/tqma6q_mba6_mmc_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6Q=y
CONFIG_TARGET_TQMA6=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="imx6q-mba6b"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -15,6 +16,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -35,6 +37,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_USDHC=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=50000000
diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig
index c4f5b1c..65c52aa 100644
--- a/configs/tqma6q_mba6_spi_defconfig
+++ b/configs/tqma6q_mba6_spi_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_MX6Q=y
CONFIG_TARGET_TQMA6=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_TQMA6X_SPI_BOOT=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-mba6b"
CONFIG_ENV_OFFSET_REDUND=0x90000
@@ -18,6 +19,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -39,6 +41,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_USDHC=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=50000000
diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig
index 04fa169..fce236e 100644
--- a/configs/tqma6s_mba6_mmc_defconfig
+++ b/configs/tqma6s_mba6_mmc_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_OFFSET=0x100000
CONFIG_MX6S=y
CONFIG_TARGET_TQMA6=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mba6b"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -15,6 +16,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -35,6 +37,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_USDHC=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=50000000
diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig
index ab1f55b..23aa030 100644
--- a/configs/tqma6s_mba6_spi_defconfig
+++ b/configs/tqma6s_mba6_spi_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_MX6S=y
CONFIG_TARGET_TQMA6=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_TQMA6X_SPI_BOOT=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mba6b"
CONFIG_ENV_OFFSET_REDUND=0x90000
@@ -18,6 +19,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -39,6 +41,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_MXC=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_FSL_USDHC=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=50000000
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index 17c8c75..f630962 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43e00000
@@ -6,9 +7,11 @@
CONFIG_TARGET_TRATS2=y
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x7000
+CONFIG_SYS_MALLOC_LEN=0x5001000
CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2"
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index 5709c4f..1200249 100644
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x63300000
@@ -6,8 +7,10 @@
CONFIG_TARGET_TRATS=y
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x7000
+CONFIG_SYS_MALLOC_LEN=0x5001000
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x44800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y
diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig
index 0b418e7..8881645 100644
--- a/configs/trimslice_defconfig
+++ b/configs/trimslice_defconfig
@@ -9,6 +9,7 @@
CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_TEGRA20=y
CONFIG_TARGET_TRIMSLICE=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig
index 0dbf850..a8fa07c 100644
--- a/configs/tuge1_defconfig
+++ b/configs/tuge1_defconfig
@@ -119,6 +119,7 @@
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -132,6 +133,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -150,6 +153,13 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=200000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index 9a91024..82ad68b 100644
--- a/configs/turris_mox_defconfig
+++ b/configs/turris_mox_defconfig
@@ -16,6 +16,7 @@
CONFIG_OF_BOARD_FIXUP=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index a724a1b..4d080ba 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
@@ -17,13 +18,14 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia"
CONFIG_SPL_TEXT_BASE=0x40000030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig
index 58a374c..fd94323 100644
--- a/configs/tuxx1_defconfig
+++ b/configs/tuxx1_defconfig
@@ -141,6 +141,7 @@
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
+CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -154,6 +155,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -172,6 +175,13 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_FSL=y
+CONFIG_SYS_FSL_I2C_OFFSET=0x3000
+CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
+CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
+CONFIG_SYS_I2C_SLAVE=0x7F
+CONFIG_SYS_I2C_SPEED=200000
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/u200_defconfig b/configs/u200_defconfig
index 909afc5..144c394 100644
--- a/configs/u200_defconfig
+++ b/configs/u200_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" u200"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig
index 1ea3aad..a06a253 100644
--- a/configs/uDPU_defconfig
+++ b/configs/uDPU_defconfig
@@ -14,6 +14,7 @@
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x6000000
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_USE_PREBOOT=y
diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig
index eecca2e..601ac02 100644
--- a/configs/udoo_defconfig
+++ b/configs/udoo_defconfig
@@ -9,16 +9,16 @@
CONFIG_ENV_OFFSET=0x60000
CONFIG_MX6QDL=y
CONFIG_TARGET_UDOO=y
+CONFIG_SYS_MALLOC_LEN=0x0200000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-udoo"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
CONFIG_BOARD_EARLY_INIT_F=y
@@ -39,6 +39,7 @@
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
index 63960d0..2f549b35 100644
--- a/configs/udoo_neo_defconfig
+++ b/configs/udoo_neo_defconfig
@@ -9,16 +9,17 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_MX6SX=y
CONFIG_TARGET_UDOO_NEO=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_ENV_SUPPORT=y
@@ -36,6 +37,9 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_BOUNCE_BUFFER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
@@ -46,5 +50,7 @@
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index 117b760..1c2533c 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -6,10 +6,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref"
CONFIG_SPL_TEXT_BASE=0x00040000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_MICRO_SUPPORT_CARD=y
+CONFIG_SYS_LOAD_ADDR=0x85000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"
CONFIG_USE_PREBOOT=y
@@ -19,6 +20,7 @@
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_CMD_CONFIG=y
# CONFIG_CMD_XIMG is not set
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -39,7 +41,6 @@
CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_UNIPHIER=y
CONFIG_MTD=y
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index d92f5f4..19701c2 100644
--- a/configs/uniphier_v7_defconfig
+++ b/configs/uniphier_v7_defconfig
@@ -6,10 +6,11 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka"
CONFIG_SPL_TEXT_BASE=0x00100000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_MICRO_SUPPORT_CARD=y
+CONFIG_SYS_LOAD_ADDR=0x85000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"
CONFIG_USE_PREBOOT=y
@@ -19,6 +20,7 @@
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_CMD_CONFIG=y
# CONFIG_CMD_XIMG is not set
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -40,7 +42,6 @@
CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_UNIPHIER=y
CONFIG_MTD=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index 8eeb455..946665b 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -9,6 +9,7 @@
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref"
CONFIG_ARCH_UNIPHIER_V8_MULTI=y
CONFIG_MICRO_SUPPORT_CARD=y
+CONFIG_SYS_LOAD_ADDR=0x85000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"
CONFIG_USE_PREBOOT=y
@@ -16,6 +17,7 @@
CONFIG_LOGLEVEL=6
CONFIG_CMD_CONFIG=y
# CONFIG_CMD_XIMG is not set
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -35,7 +37,6 @@
CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_HS400_SUPPORT=y
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index 983072d..cfd9ef8 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
@@ -8,8 +9,10 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_SYS_MALLOC_LEN=0x26000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="usb_a9263"
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig
index b52cfc6..f259554 100644
--- a/configs/usbarmory_defconfig
+++ b/configs/usbarmory_defconfig
@@ -7,10 +7,14 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x60000
CONFIG_TARGET_USBARMORY=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx53-usbarmory"
# CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x72000000
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
@@ -23,6 +27,8 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_PINCTRL=y
diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig
index 930a178..e93ce8e 100644
--- a/configs/variscite_dart6ul_defconfig
+++ b/configs/variscite_dart6ul_defconfig
@@ -8,14 +8,14 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_MX6ULL=y
CONFIG_TARGET_DART_6UL=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-dart-6ul"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL_USB_HOST=y
diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig
index cdc7606..dba47c9 100644
--- a/configs/venice2_defconfig
+++ b/configs/venice2_defconfig
@@ -4,10 +4,12 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_SYS_MALLOC_LEN=0x2500000
CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2"
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_TEGRA124=y
CONFIG_TARGET_VENICE2=y
+CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig
index d628840..4472f96 100644
--- a/configs/ventana_defconfig
+++ b/configs/ventana_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_TEGRA20=y
CONFIG_TARGET_VENTANA=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_SYS_PROMPT="Tegra20 (Ventana) # "
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index 624f1b9..9879999 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -9,24 +9,22 @@
CONFIG_SYS_MEMTEST_END=0x80000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-verdin"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_VERDIN_IMX8MM=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/verdin-imx8mm/imximage.cfg"
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-verdin-dev.dtb"
CONFIG_LOG=y
@@ -73,7 +71,6 @@
CONFIG_CLK_IMX8MM=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SUPPORT_EMMC_BOOT=y
diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index 118b917..3125ada 100644
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -7,8 +7,10 @@
CONFIG_SYS_MEMTEST_END=0xff000000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x810000
CONFIG_IDENT_STRING=" vexpress_aemv8a"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x90000000
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlycon=pl011,0x7ff80000 debug user_debug=31 androidboot.hardware=juno loglevel=9"
diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index 2ecb776..8dcd459 100644
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -7,8 +7,10 @@
CONFIG_SYS_MEMTEST_END=0xff000000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_MALLOC_LEN=0x840000
CONFIG_IDENT_STRING=" vexpress_aemv8a"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x90000000
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig
new file mode 100644
index 0000000..1e59d27
--- /dev/null
+++ b/configs/vexpress_ca9x4_defconfig
@@ -0,0 +1,46 @@
+CONFIG_ARM=y
+CONFIG_TARGET_VEXPRESS_CA9X4=y
+CONFIG_SYS_TEXT_BASE=0x60800000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_ENV_SIZE=0x40000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="vexpress-v2p-ca9"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x90000000
+CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash"
+CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_SLEEP is not set
+CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_ENV_ADDR=0x47F80000
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_ARM_PL180_MMCI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_PROTECTION=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_SMC911X=y
+CONFIG_SMC911X_32_BIT=y
+CONFIG_BAUDRATE=38400
+CONFIG_CONS_INDEX=0
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index 24a7bde..add1a07 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
CONFIG_SYS_TEXT_BASE=0x3f401000
@@ -7,9 +8,12 @@
CONFIG_SYS_MEMTEST_END=0x87c00000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg"
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_LOGLEVEL=3
CONFIG_BOARD_EARLY_INIT_F=y
@@ -37,6 +41,8 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_VYBRID_GPIO=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_NAND_VF610_NFC=y
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index 7cf8ae6..3544833 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_VF610=y
CONFIG_SYS_TEXT_BASE=0x3f401000
@@ -7,9 +8,12 @@
CONFIG_SYS_MEMTEST_END=0x87c00000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x180000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_MALLOC_LEN=0x0220000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg"
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_BOOTDELAY=3
CONFIG_LOGLEVEL=3
CONFIG_BOARD_EARLY_INIT_F=y
@@ -37,6 +41,8 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_VYBRID_GPIO=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_NAND_VF610_NFC=y
diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig
index 07fb27f..5297c54 100644
--- a/configs/vinco_defconfig
+++ b/configs/vinco_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x20f00000
@@ -9,6 +10,7 @@
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="at91-vinco"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index f1ac8e8..24989ff 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -11,11 +11,14 @@
CONFIG_MX6SX=y
CONFIG_MX6_DDRCAL=y
CONFIG_TARGET_SOFTING_VINING_2000=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0x300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6sx-softing-vining-2000"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x90000
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -23,7 +26,6 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/softing/vining_2000/imximage.cfg"
CONFIG_BOOTDELAY=0
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -61,6 +63,9 @@
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_BOUNCE_BUFFER=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
@@ -73,6 +78,8 @@
CONFIG_PCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_PWM_IMX=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
index 9ca2852..165fef4 100644
--- a/configs/vocore2_defconfig
+++ b/configs/vocore2_defconfig
@@ -1,10 +1,12 @@
CONFIG_MIPS=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x04e000
CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_MALLOC_LEN=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
@@ -13,11 +15,14 @@
CONFIG_ARCH_MTMIPS=y
CONFIG_SOC_MT7628=y
CONFIG_BOARD_VOCORE2=y
+CONFIG_MIPS_CACHE_SETUP=y
+CONFIG_MIPS_CACHE_DISABLE=y
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_MIPS_BOOT_FDT=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_BOOT_GET_CMDLINE=y
CONFIG_SYS_BOOT_GET_KBD=y
+CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
index 2faaa80..752987f 100644
--- a/configs/vyasa-rk3288_defconfig
+++ b/configs/vyasa-rk3288_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
@@ -12,6 +14,7 @@
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb"
CONFIG_SILENT_CONSOLE=y
diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig
index d3f0e0e..08f8677 100644
--- a/configs/wandboard_defconfig
+++ b/configs/wandboard_defconfig
@@ -12,11 +12,12 @@
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revd1"
CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_CMD_HDMIDETECT=y
@@ -26,7 +27,6 @@
CONFIG_SPL_FIT_PRINT=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -57,6 +57,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
CONFIG_DM_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig
index ec07817..d127a4f 100644
--- a/configs/warp7_bl33_defconfig
+++ b/configs/warp7_bl33_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_MEMTEST_END=0xa0000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x80000
+CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp"
CONFIG_TARGET_WARP7=y
@@ -12,7 +13,6 @@
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
@@ -32,11 +32,13 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index 19c0c18..4b339b4 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MEMTEST_END=0xa0000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
+CONFIG_SYS_MALLOC_LEN=0x2300000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp"
CONFIG_TARGET_WARP7=y
@@ -15,7 +16,6 @@
CONFIG_IMX_HAB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
@@ -38,11 +38,13 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
diff --git a/configs/warp_defconfig b/configs/warp_defconfig
index dce2170..3d6c672 100644
--- a/configs/warp_defconfig
+++ b/configs/warp_defconfig
@@ -6,9 +6,11 @@
CONFIG_ENV_OFFSET=0x60000
CONFIG_MX6SL=y
CONFIG_TARGET_WARP=y
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_MALLOC_LEN=0x2300000
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
@@ -32,8 +34,12 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
+CONFIG_POWER_LEGACY=y
+CONFIG_POWER_I2C=y
CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_WATCHDOG_TIMEOUT_MSECS=30000
diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig
index 4072673..ce947b5 100644
--- a/configs/wetek-core2_defconfig
+++ b/configs/wetek-core2_defconfig
@@ -10,6 +10,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" wetek-core2"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 507f24f..b09c855 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
@@ -12,10 +13,12 @@
CONFIG_CMD_MAX6957=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_TEXT_BASE=0x00000000
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x120000
+CONFIG_SYS_LOAD_ADDR=0x80008000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS2,115200n8"
@@ -29,6 +32,7 @@
CONFIG_SPL_NAND_BASE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -42,7 +46,11 @@
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_VERSION_VARIABLE=y
+CONFIG_SYS_I2C_LEGACY=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_LPC32XX=y
+CONFIG_SYS_I2C_SPEED=350000
+CONFIG_SYS_I2C_EEPROM_ADDR=0x56
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/x530_defconfig b/configs/x530_defconfig
index 6df383b..fcc384d 100644
--- a/configs/x530_defconfig
+++ b/configs/x530_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
@@ -13,11 +14,12 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530"
CONFIG_SPL_TEXT_BASE=0x40000030
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SILENT_CONSOLE=y
diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig
index e170761..b72e40a 100644
--- a/configs/xenguest_arm64_defconfig
+++ b/configs/xenguest_arm64_defconfig
@@ -3,7 +3,9 @@
CONFIG_TARGET_XENGUEST_ARM64=y
CONFIG_SYS_TEXT_BASE=0x40080000
CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_IDENT_STRING=" xenguest"
+CONFIG_SYS_LOAD_ADDR=0x40000000
CONFIG_BOOTDELAY=10
CONFIG_SYS_PROMPT="xenguest# "
# CONFIG_CMD_BDI is not set
diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig
index 5731a1f2..ffa17e4 100644
--- a/configs/xilinx_versal_mini_defconfig
+++ b/configs/xilinx_versal_mini_defconfig
@@ -13,6 +13,7 @@
CONFIG_COUNTER_FREQUENCY=100000000
# CONFIG_PSCI_RESET is not set
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig
index 7547b26..ef5433c 100644
--- a/configs/xilinx_versal_mini_emmc0_defconfig
+++ b/configs/xilinx_versal_mini_emmc0_defconfig
@@ -10,6 +10,7 @@
CONFIG_COUNTER_FREQUENCY=100000000
# CONFIG_PSCI_RESET is not set
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig
index 0854d50..f642977 100644
--- a/configs/xilinx_versal_mini_emmc1_defconfig
+++ b/configs/xilinx_versal_mini_emmc1_defconfig
@@ -10,6 +10,7 @@
CONFIG_COUNTER_FREQUENCY=100000000
# CONFIG_PSCI_RESET is not set
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index 590a217..1159862 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -11,6 +11,7 @@
CONFIG_DEFINE_TCM_OCM_MMAP=y
CONFIG_COUNTER_FREQUENCY=100000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
@@ -61,7 +62,6 @@
CONFIG_SYS_I2C_CADENCE=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
index 66af37a..3730fcc 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -14,6 +14,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
@@ -80,7 +81,6 @@
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig
index 427d019..a831bac 100644
--- a/configs/xilinx_zynqmp_mini_defconfig
+++ b/configs/xilinx_zynqmp_mini_defconfig
@@ -6,10 +6,12 @@
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
CONFIG_ENV_SIZE=0x80
+CONFIG_SYS_MALLOC_LEN=0x1a00
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini"
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_ZYNQMP_PSU_INIT_ENABLED=y
# CONFIG_CMD_ZYNQMP is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig
index f9b2c0a..4143597 100644
--- a/configs/xilinx_zynqmp_mini_emmc0_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig
@@ -6,10 +6,12 @@
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL=y
# CONFIG_CMD_ZYNQMP is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_AUTOBOOT is not set
diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig
index 996e65d..3317eb5 100644
--- a/configs/xilinx_zynqmp_mini_emmc1_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig
@@ -6,10 +6,12 @@
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL=y
# CONFIG_CMD_ZYNQMP is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_AUTOBOOT is not set
diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig
index 1213d9c..8cc90c6 100644
--- a/configs/xilinx_zynqmp_mini_nand_defconfig
+++ b/configs/xilinx_zynqmp_mini_nand_defconfig
@@ -5,8 +5,10 @@
CONFIG_SYS_TEXT_BASE=0x10000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand"
# CONFIG_CMD_ZYNQMP is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_AUTOBOOT is not set
diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig
index b3ff78b..fe467f3 100644
--- a/configs/xilinx_zynqmp_mini_nand_single_defconfig
+++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig
@@ -5,8 +5,10 @@
CONFIG_SYS_TEXT_BASE=0x10000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80
+CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand"
# CONFIG_CMD_ZYNQMP is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_AUTOBOOT is not set
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig
index 664a333..8958e3f 100644
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_TEXT_BASE=0xFFFC0000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x80
+CONFIG_SYS_MALLOC_LEN=0x1a00
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi"
CONFIG_SPL=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
@@ -12,6 +13,7 @@
# CONFIG_CMD_ZYNQMP is not set
# CONFIG_PSCI_RESET is not set
# CONFIG_EXPERT is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig
index 143c253..8f3585d 100644
--- a/configs/xilinx_zynqmp_r5_defconfig
+++ b/configs/xilinx_zynqmp_r5_defconfig
@@ -1,13 +1,16 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ZYNQMP_R5=y
CONFIG_SYS_TEXT_BASE=0x10000000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x1400000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5"
CONFIG_DEBUG_UART_BASE=0xff010000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_BOOTSTAGE=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="ZynqMP r5> "
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index 2c8dc34..278eaae 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -5,6 +5,7 @@
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
+CONFIG_SYS_MALLOC_LEN=0x4040000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC"
CONFIG_SPL_STACK_R_ADDR=0x18000000
@@ -12,13 +13,14 @@
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_ZYNQ_MAC_IN_EEPROM=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_CMD_FRU=y
CONFIG_ZYNQMP_USB=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
@@ -122,7 +124,6 @@
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig
index 78f8d63..cd5425a 100644
--- a/configs/xtfpga_defconfig
+++ b/configs/xtfpga_defconfig
@@ -2,7 +2,9 @@
CONFIG_SYS_CPU="dc233c"
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_SYS_MALLOC_LEN=0x40000
CONFIG_XTFPGA_KC705=y
+CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=10
CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig
index 2afe429..df6d934 100644
--- a/configs/zmx25_defconfig
+++ b/configs/zmx25_defconfig
@@ -5,6 +5,9 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_TARGET_ZMX25=y
+CONFIG_IMX_CONFIG=""
+CONFIG_SYS_MALLOC_LEN=0x3f8000
+CONFIG_SYS_LOAD_ADDR=0x80000000
CONFIG_BOOTDELAY=5
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="boot in %d s\n"
diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
index 990eaf8..7774b27 100644
--- a/configs/zynq_cse_nand_defconfig
+++ b/configs/zynq_cse_nand_defconfig
@@ -1,5 +1,7 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
@@ -11,6 +13,7 @@
CONFIG_SPL=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_LOAD_ADDR=0x0
# CONFIG_AUTOBOOT is not set
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
index cb372fc..a74dcc0 100644
--- a/configs/zynq_cse_nor_defconfig
+++ b/configs/zynq_cse_nor_defconfig
@@ -1,5 +1,7 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
@@ -11,6 +13,7 @@
CONFIG_SPL=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_LOAD_ADDR=0x0
# CONFIG_AUTOBOOT is not set
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index 7fa776b..99aaa1a 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -1,5 +1,7 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_ZYNQ=y
@@ -16,6 +18,7 @@
CONFIG_DEBUG_UART=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_LOAD_ADDR=0x0
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
# CONFIG_AUTOBOOT is not set
CONFIG_USE_PREBOOT=y
diff --git a/disk/part_efi.c b/disk/part_efi.c
index fdca91a..0ca7eff 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -23,12 +23,11 @@
#include <malloc.h>
#include <memalign.h>
#include <part_efi.h>
+#include <dm/ofnode.h>
#include <linux/compiler.h>
#include <linux/ctype.h>
#include <u-boot/crc.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#ifdef CONFIG_HAVE_BLOCK_DEVICE
/* GUID for basic data partitons */
@@ -563,9 +562,8 @@
* from the start of the device) to be specified as a property
* of the device tree '/config' node.
*/
- config_offset = fdtdec_get_config_int(gd->fdt_blob,
- "u-boot,efi-partition-entries-offset",
- -EINVAL);
+ config_offset = ofnode_conf_read_int(
+ "u-boot,efi-partition-entries-offset", -EINVAL);
if (config_offset != -EINVAL) {
offset_bytes = PAD_TO_BLOCKSIZE(config_offset, dev_desc);
offset_blks = offset_bytes / dev_desc->blksz;
diff --git a/disk/part_iso.c b/disk/part_iso.c
index 822f2c4..1061f34 100644
--- a/disk/part_iso.c
+++ b/disk/part_iso.c
@@ -220,7 +220,7 @@
printf("Part Start Sect x Size Type\n");
i=1;
do {
- printf(" %2d " LBAFU " " LBAFU " %6ld %.32s\n",
+ printf(" %2d %8" LBAFlength "u %8" LBAFlength "u %6ld %.32s\n",
i, info.start, info.size, info.blksz, info.type);
i++;
} while (part_get_info_iso_verb(dev_desc, i, &info, 0) != -1);
diff --git a/doc/README.SPL b/doc/README.SPL
index 0448835..011fd42 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -49,10 +49,10 @@
CONFIG_SPL_LIBDISK_SUPPORT (disk/libdisk.o)
CONFIG_SPL_I2C (drivers/i2c/libi2c.o)
CONFIG_SPL_GPIO (drivers/gpio/libgpio.o)
-CONFIG_SPL_MMC_SUPPORT (drivers/mmc/libmmc.o)
-CONFIG_SPL_SERIAL_SUPPORT (drivers/serial/libserial.o)
+CONFIG_SPL_MMC (drivers/mmc/libmmc.o)
+CONFIG_SPL_SERIAL (drivers/serial/libserial.o)
CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
-CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
+CONFIG_SPL_SPI (drivers/spi/libspi.o)
CONFIG_SPL_FS_FAT (fs/fat/libfat.o)
CONFIG_SPL_FS_EXT4
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
diff --git a/doc/SPL/README.am335x-network b/doc/SPL/README.am335x-network
index e052706..9599729 100644
--- a/doc/SPL/README.am335x-network
+++ b/doc/SPL/README.am335x-network
@@ -7,7 +7,7 @@
I. Building the required images
1. You have to enable generic SPL configuration options (see
-doc/README.SPL) as well as CONFIG_SPL_NET_SUPPORT,
+doc/README.SPL) as well as CONFIG_SPL_NET,
CONFIG_SPL_ETH, CONFIG_SPL_LIBGENERIC_SUPPORT and
CONFIG_SPL_LIBCOMMON_SUPPORT in your board configuration file to build
SPL with support for booting over the network. Also you have to enable
diff --git a/doc/board/AndesTech/adp-ag101p.rst b/doc/board/AndesTech/adp-ag101p.rst
index 879eba0..f867eea 100644
--- a/doc/board/AndesTech/adp-ag101p.rst
+++ b/doc/board/AndesTech/adp-ag101p.rst
@@ -23,8 +23,8 @@
CONFIG_SKIP_LOWLEVEL_INIT:
If you want to boot this system from SPI ROM and bypass e-bios (the
- other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT
- in "include/configs/adp-ag101p.h".
+ other boot loader on ROM). You should enable CONFIG_SKIP_LOWLEVEL_INIT
+ when running menuconfig or similar.
Build and boot steps
--------------------
diff --git a/doc/board/index.rst b/doc/board/index.rst
index 3308707..8588e45 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -26,6 +26,7 @@
sipeed/index
socionext/index
st/index
+ ste/index
tbs/index
ti/index
toradex/index
diff --git a/doc/board/ste/index.rst b/doc/board/ste/index.rst
new file mode 100644
index 0000000..bef520c
--- /dev/null
+++ b/doc/board/ste/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+ST-Ericsson
+===========
+
+.. toctree::
+ :maxdepth: 2
+
+ stemmy
diff --git a/doc/board/ste/stemmy.rst b/doc/board/ste/stemmy.rst
new file mode 100644
index 0000000..6d77fe9
--- /dev/null
+++ b/doc/board/ste/stemmy.rst
@@ -0,0 +1,81 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Stephan Gerhold <stephan@gerhold.net>
+
+ST-Ericsson U8500 Samsung "stemmy" board
+========================================
+
+The "stemmy" board supports Samsung smartphones released with
+the ST-Ericsson NovaThor U8500 SoC, e.g.
+
+ +---------------------------+----------+--------------+----------------+
+ | Device | Model | Codename | U-Boot |
+ +===========================+==========+==============+================+
+ | Samsung Galaxy Ace 2 | GT-I8160 | codina | ``u-boot.bin`` |
+ +---------------------------+----------+--------------+----------------+
+ | Samsung Galaxy Amp | SGH-I407 | kyle | ``u-boot.img`` |
+ +---------------------------+----------+--------------+----------------+
+ | Samsung Galaxy Beam | GT-I8530 | gavini | ``u-boot.bin`` |
+ +---------------------------+----------+--------------+----------------+
+ | Samsung Galaxy Exhibit | SGH-T599 | codina (TMO) | ``u-boot.bin`` |
+ +---------------------------+----------+--------------+----------------+
+ | Samsung Galaxy S Advance | GT-I9070 | janice | ``u-boot.bin`` |
+ +---------------------------+----------+--------------+----------------+
+ | Samsung Galaxy S III mini | GT-I8190 | golden | ``u-boot.img`` |
+ +---------------------------+----------+--------------+----------------+
+ | Samsung Galaxy Xcover 2 | GT-S7710 | skomer | ``u-boot.img`` |
+ +---------------------------+----------+--------------+----------------+
+
+At the moment, U-Boot is intended to be chain-loaded from
+the original Samsung bootloader, not replacing it entirely.
+
+Installation
+------------
+First, setup ``CROSS_COMPILE`` for ARMv7. Then, build U-Boot for ``stemmy``::
+
+ $ export CROSS_COMPILE=arm-none-eabi-
+ $ make stemmy_defconfig
+ $ make
+
+This will build ``u-boot.bin`` in the configured output directory.
+
+For newer devices (check ``u-boot.img`` in the table above), the U-Boot binary
+has to be packed into an Android boot image. Devices with ``u-boot.bin`` boot
+the raw U-Boot binary from the boot partition. You can build the Android boot
+image with ``mkbootimg``, e.g. from from android-7.1.2_r37_::
+
+ $ mkbootimg \
+ --kernel=u-boot.bin \
+ --base=0x00000000 \
+ --kernel_offset=0x00100000 \
+ --ramdisk_offset=0x02000000 \
+ --tags_offset=0x00000100 \
+ --output=u-boot.img
+
+.. _android-7.1.2_r37: https://android.googlesource.com/platform/system/core/+/refs/tags/android-7.1.2_r37/mkbootimg/mkbootimg
+
+To flash the U-Boot binary, enter the Samsung download mode
+(press Power + Home + Volume Down). Use Heimdall_ to flash the U-Boot image to
+the Android boot partition::
+
+ $ heimdall flash --Kernel u-boot.(bin|img)
+
+If this is not working but there are messages like ``Android recovery image`` in
+the UART console, you can try flashing to the recovery partition instead::
+
+ $ heimdall flash --Kernel2 u-boot.(bin|img)
+
+.. _Heimdall: https://gitlab.com/BenjaminDobell/Heimdall
+
+After a reboot the U-Boot prompt should appear via UART. Unless interrupted it
+automatically boots to USB Fastboot mode where Android boot images can be booted
+via ``fastboot boot boot.img``. It is mainly intended to boot mainline Linux,
+but booting original Samsung Android boot images is also supported (e.g. for
+charging).
+
+UART
+----
+UART is available through the micro USB port, similar to the Carkit standard.
+With a ~619kOhm resistor between ID and GND, 1.8V RX/TX is available at D+/D-.
+
+.. note::
+ Make sure to connect the UART cable **before** turning on the phone.
diff --git a/doc/board/ti/am335x_evm.rst b/doc/board/ti/am335x_evm.rst
new file mode 100644
index 0000000..a90f32d
--- /dev/null
+++ b/doc/board/ti/am335x_evm.rst
@@ -0,0 +1,200 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Tom Rini <trini@konsulko.com>
+
+Summary
+=======
+
+This document covers various features of the `am335x_evm` default
+configuration, some of the related defconfigs, and how to enable hardware
+features not present by default in the defconfigs.
+
+Hardware
+--------
+
+The binary produced by this board supports, based on parsing of the EEPROM
+documented in TI's reference designs:
+* AM335x GP EVM
+* AM335x EVM SK
+* The Beaglebone family of designs
+
+Customization
+-------------
+
+Given that all of the above boards are reference platforms (and the
+Beaglebone platforms are OSHA), it is likely that this platform code and
+configuration will be used as the basis of a custom platform. It is
+worth noting that aside from things such as NAND or MMC only being
+required if a custom platform makes use of these blocks, the following
+are required, depending on design:
+
+* GPIO is only required if DDR3 power is controlled in a way similar to EVM SK
+* SPI is only required for SPI flash, or exposing the SPI bus.
+
+The following blocks are required:
+
+* I2C, to talk with the PMIC and ensure that we do not run afoul of
+ errata 1.0.24.
+
+When removing options as part of customization, note that you will likely need
+to look at both `include/configs/am335x_evm.h`,
+`include/configs/ti_am335x_common.h` and `include/configs/am335x_evm.h` as the
+migration to Kconfig is not yet complete.
+
+NAND
+----
+
+The AM335x GP EVM ships with a 256MiB NAND available in most profiles. In
+this example to program the NAND we assume that an SD card has been
+inserted with the files to write in the first SD slot and that mtdparts
+have been configured correctly for the board. All images are first loaded
+into memory, then written to NAND.
+
+Step-1: Building u-boot for NAND boot
+ Set following CONFIGxx options for NAND device.
+ CONFIG_SYS_NAND_PAGE_SIZE number of main bytes in NAND page
+ CONFIG_SYS_NAND_OOBSIZE number of OOB bytes in NAND page
+ CONFIG_SYS_NAND_BLOCK_SIZE number of bytes in NAND erase-block
+ CONFIG_SYS_NAND_ECCPOS ECC map for NAND page
+ CONFIG_NAND_OMAP_ECCSCHEME (refer doc/README.nand)
+
+Step-2: Flashing NAND via MMC/SD
+
+.. code-block:: text
+
+ # select BOOTSEL to MMC/SD boot and boot from MMC/SD card
+ U-Boot # mmc rescan
+ # erase flash
+ U-Boot # nand erase.chip
+ U-Boot # env default -f -a
+ U-Boot # saveenv
+ # flash MLO. Redundant copies of MLO are kept for failsafe
+ U-Boot # load mmc 0 0x82000000 MLO
+ U-Boot # nand write 0x82000000 0x00000 0x20000
+ U-Boot # nand write 0x82000000 0x20000 0x20000
+ U-Boot # nand write 0x82000000 0x40000 0x20000
+ U-Boot # nand write 0x82000000 0x60000 0x20000
+ # flash u-boot.img
+ U-Boot # load mmc 0 0x82000000 u-boot.img
+ U-Boot # nand write 0x82000000 0x80000 0x60000
+ # flash kernel image
+ U-Boot # load mmc 0 0x82000000 uImage
+ U-Boot # nand write 0x82000000 ${nandsrcaddr} ${nandimgsize}
+ # flash filesystem image
+ U-Boot # load mmc 0 0x82000000 filesystem.img
+ U-Boot # nand write 0x82000000 ${loadaddress} 0x300000
+
+Step-3: Set BOOTSEL pin to select NAND boot, and POR the device.
+ The device should boot from images flashed on NAND device.
+
+
+Falcon Mode
+-----------
+
+The default build includes "Falcon Mode" (see doc/README.falcon) via NAND,
+eMMC (or raw SD cards) and FAT SD cards. Our default behavior currently is
+to read a 'c' on the console while in SPL at any point prior to loading the
+OS payload (so as soon as possible) to opt to booting full U-Boot. Also
+note that while one can program Falcon Mode "in place" great care needs to
+be taken by the user to not 'brick' their setup. As these are all eval
+boards with multiple boot methods, recovery should not be an issue in this
+worst-case however.
+
+Falcon Mode: eMMC
+-----------------
+
+The recommended layout in this case is:
+
+.. code-block:: text
+
+ MMC BLOCKS |--------------------------------| LOCATION IN BYTES
+ 0x0000 - 0x007F : MBR or GPT table : 0x000000 - 0x020000
+ 0x0080 - 0x00FF : ARGS or FDT file : 0x010000 - 0x020000
+ 0x0100 - 0x01FF : SPL.backup1 (first copy used) : 0x020000 - 0x040000
+ 0x0200 - 0x02FF : SPL.backup2 (second copy used) : 0x040000 - 0x060000
+ 0x0300 - 0x06FF : U-Boot : 0x060000 - 0x0e0000
+ 0x0700 - 0x08FF : U-Boot Env + Redundant : 0x0e0000 - 0x120000
+ 0x0900 - 0x28FF : Kernel : 0x120000 - 0x520000
+
+Note that when we run 'spl export' it will prepare to boot the kernel.
+This includes relocation of the uImage from where we loaded it to the entry
+point defined in the header. As these locations overlap by default, it
+would leave us with an image that if written to MMC will not boot, so
+instead of using the loadaddr variable we use 0x81000000 in the following
+example. In this example we are loading from the network, for simplicity,
+and assume a valid partition table already exists and 'mmc dev' has already
+been run to select the correct device. Also note that if you previously
+had a FAT partition (such as on a Beaglebone Black) it is not enough to
+write garbage into the area, you must delete it from the partition table
+first.
+
+.. code-block:: text
+
+ # Ensure we are able to talk with this mmc device
+ U-Boot # mmc rescan
+ U-Boot # tftp 81000000 am335x/MLO
+ # Write to two of the backup locations ROM uses
+ U-Boot # mmc write 81000000 100 100
+ U-Boot # mmc write 81000000 200 100
+ # Write U-Boot to the location set in the config
+ U-Boot # tftp 81000000 am335x/u-boot.img
+ U-Boot # mmc write 81000000 300 400
+ # Load kernel and device tree into memory, perform export
+ U-Boot # tftp 81000000 am335x/uImage
+ U-Boot # run findfdt
+ U-Boot # tftp ${fdtaddr} am335x/${fdtfile}
+ U-Boot # run mmcargs
+ U-Boot # spl export fdt 81000000 - ${fdtaddr}
+ # Write the updated device tree to MMC
+ U-Boot # mmc write ${fdtaddr} 80 80
+ # Write the uImage to MMC
+ U-Boot # mmc write 81000000 900 2000
+
+Falcon Mode: FAT SD cards
+-------------------------
+
+In this case the additional file is written to the filesystem. In this
+example we assume that the uImage and device tree to be used are already on
+the FAT filesystem (only the uImage MUST be for this to function
+afterwards) along with a Falcon Mode aware MLO and the FAT partition has
+already been created and marked bootable:
+
+.. code-block:: text
+
+ U-Boot # mmc rescan
+ # Load kernel and device tree into memory, perform export
+ U-Boot # load mmc 0:1 ${loadaddr} uImage
+ U-Boot # run findfdt
+ U-Boot # load mmc 0:1 ${fdtaddr} ${fdtfile}
+ U-Boot # run mmcargs
+ U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
+
+This will print a number of lines and then end with something like:
+
+.. code-block:: text
+
+ Using Device Tree in place at 80f80000, end 80f85928
+ Using Device Tree in place at 80f80000, end 80f88928
+
+So then you:
+
+.. code-block:: text
+
+ U-Boot # fatwrite mmc 0:1 0x80f80000 args 8928
+
+Falcon Mode: NAND
+-----------------
+
+In this case the additional data is written to another partition of the
+NAND. In this example we assume that the uImage and device tree to be are
+already located on the NAND somewhere (such as filesystem or mtd partition)
+along with a Falcon Mode aware MLO written to the correct locations for
+booting and mtdparts have been configured correctly for the board:
+
+.. code-block:: text
+
+ U-Boot # nand read ${loadaddr} kernel
+ U-Boot # load nand rootfs ${fdtaddr} /boot/am335x-evm.dtb
+ U-Boot # run nandargs
+ U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
+ U-Boot # nand erase.part u-boot-spl-os
+ U-Boot # nand write ${fdtaddr} u-boot-spl-os
diff --git a/doc/board/ti/index.rst b/doc/board/ti/index.rst
index c0da04b..014a097 100644
--- a/doc/board/ti/index.rst
+++ b/doc/board/ti/index.rst
@@ -6,4 +6,5 @@
.. toctree::
:maxdepth: 2
+ am335x_evm
j721e_evm
diff --git a/doc/develop/checkpatch.rst b/doc/develop/checkpatch.rst
new file mode 100644
index 0000000..51fed1b
--- /dev/null
+++ b/doc/develop/checkpatch.rst
@@ -0,0 +1,755 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+==========
+Checkpatch
+==========
+
+Checkpatch (scripts/checkpatch.pl) is a perl script which checks for trivial
+style violations in patches and optionally corrects them. Checkpatch can
+also be run on file contexts and without the kernel tree.
+
+Checkpatch is not always right. Your judgement takes precedence over checkpatch
+messages. If your code looks better with the violations, then its probably
+best left alone.
+
+
+Options
+=======
+
+This section will describe the options checkpatch can be run with.
+
+Usage::
+
+ ./scripts/checkpatch.pl [OPTION]... [FILE]...
+
+Available options:
+
+ - -q, --quiet
+
+ Enable quiet mode.
+
+ - -v, --verbose
+ Enable verbose mode. Additional verbose test descriptions are output
+ so as to provide information on why that particular message is shown.
+
+ - --no-tree
+
+ Run checkpatch without the kernel tree.
+
+ - --no-signoff
+
+ Disable the 'Signed-off-by' line check. The sign-off is a simple line at
+ the end of the explanation for the patch, which certifies that you wrote it
+ or otherwise have the right to pass it on as an open-source patch.
+
+ Example::
+
+ Signed-off-by: Random J Developer <random@developer.example.org>
+
+ Setting this flag effectively stops a message for a missing signed-off-by
+ line in a patch context.
+
+ - --patch
+
+ Treat FILE as a patch. This is the default option and need not be
+ explicitly specified.
+
+ - --emacs
+
+ Set output to emacs compile window format. This allows emacs users to jump
+ from the error in the compile window directly to the offending line in the
+ patch.
+
+ - --terse
+
+ Output only one line per report.
+
+ - --showfile
+
+ Show the diffed file position instead of the input file position.
+
+ - -g, --git
+
+ Treat FILE as a single commit or a git revision range.
+
+ Single commit with:
+
+ - <rev>
+ - <rev>^
+ - <rev>~n
+
+ Multiple commits with:
+
+ - <rev1>..<rev2>
+ - <rev1>...<rev2>
+ - <rev>-<count>
+
+ - -f, --file
+
+ Treat FILE as a regular source file. This option must be used when running
+ checkpatch on source files in the kernel.
+
+ - --subjective, --strict
+
+ Enable stricter tests in checkpatch. By default the tests emitted as CHECK
+ do not activate by default. Use this flag to activate the CHECK tests.
+
+ - --list-types
+
+ Every message emitted by checkpatch has an associated TYPE. Add this flag
+ to display all the types in checkpatch.
+
+ Note that when this flag is active, checkpatch does not read the input FILE,
+ and no message is emitted. Only a list of types in checkpatch is output.
+
+ - --types TYPE(,TYPE2...)
+
+ Only display messages with the given types.
+
+ Example::
+
+ ./scripts/checkpatch.pl mypatch.patch --types EMAIL_SUBJECT,BRACES
+
+ - --ignore TYPE(,TYPE2...)
+
+ Checkpatch will not emit messages for the specified types.
+
+ Example::
+
+ ./scripts/checkpatch.pl mypatch.patch --ignore EMAIL_SUBJECT,BRACES
+
+ - --show-types
+
+ By default checkpatch doesn't display the type associated with the messages.
+ Set this flag to show the message type in the output.
+
+ - --max-line-length=n
+
+ Set the max line length (default 100). If a line exceeds the specified
+ length, a LONG_LINE message is emitted.
+
+
+ The message level is different for patch and file contexts. For patches,
+ a WARNING is emitted. While a milder CHECK is emitted for files. So for
+ file contexts, the --strict flag must also be enabled.
+
+ - --min-conf-desc-length=n
+
+ Set the Kconfig entry minimum description length, if shorter, warn.
+
+ - --tab-size=n
+
+ Set the number of spaces for tab (default 8).
+
+ - --root=PATH
+
+ PATH to the kernel tree root.
+
+ This option must be specified when invoking checkpatch from outside
+ the kernel root.
+
+ - --no-summary
+
+ Suppress the per file summary.
+
+ - --mailback
+
+ Only produce a report in case of Warnings or Errors. Milder Checks are
+ excluded from this.
+
+ - --summary-file
+
+ Include the filename in summary.
+
+ - --debug KEY=[0|1]
+
+ Turn on/off debugging of KEY, where KEY is one of 'values', 'possible',
+ 'type', and 'attr' (default is all off).
+
+ - --fix
+
+ This is an EXPERIMENTAL feature. If correctable errors exists, a file
+ <inputfile>.EXPERIMENTAL-checkpatch-fixes is created which has the
+ automatically fixable errors corrected.
+
+ - --fix-inplace
+
+ EXPERIMENTAL - Similar to --fix but input file is overwritten with fixes.
+
+ DO NOT USE this flag unless you are absolutely sure and you have a backup
+ in place.
+
+ - --ignore-perl-version
+
+ Override checking of perl version. Runtime errors maybe encountered after
+ enabling this flag if the perl version does not meet the minimum specified.
+
+ - --codespell
+
+ Use the codespell dictionary for checking spelling errors.
+
+ - --codespellfile
+
+ Use the specified codespell file.
+ Default is '/usr/share/codespell/dictionary.txt'.
+
+ - --typedefsfile
+
+ Read additional types from this file.
+
+ - --color[=WHEN]
+
+ Use colors 'always', 'never', or only when output is a terminal ('auto').
+ Default is 'auto'.
+
+ - --kconfig-prefix=WORD
+
+ Use WORD as a prefix for Kconfig symbols (default is `CONFIG_`).
+
+ - -h, --help, --version
+
+ Display the help text.
+
+Message Levels
+==============
+
+Messages in checkpatch are divided into three levels. The levels of messages
+in checkpatch denote the severity of the error. They are:
+
+ - ERROR
+
+ This is the most strict level. Messages of type ERROR must be taken
+ seriously as they denote things that are very likely to be wrong.
+
+ - WARNING
+
+ This is the next stricter level. Messages of type WARNING requires a
+ more careful review. But it is milder than an ERROR.
+
+ - CHECK
+
+ This is the mildest level. These are things which may require some thought.
+
+Type Descriptions
+=================
+
+This section contains a description of all the message types in checkpatch.
+
+.. Types in this section are also parsed by checkpatch.
+.. The types are grouped into subsections based on use.
+
+
+Allocation style
+----------------
+
+ **ALLOC_ARRAY_ARGS**
+ The first argument for kcalloc or kmalloc_array should be the
+ number of elements. sizeof() as the first argument is generally
+ wrong.
+ See: https://www.kernel.org/doc/html/latest/core-api/memory-allocation.html
+
+ **ALLOC_SIZEOF_STRUCT**
+ The allocation style is bad. In general for family of
+ allocation functions using sizeof() to get memory size,
+ constructs like::
+
+ p = alloc(sizeof(struct foo), ...)
+
+ should be::
+
+ p = alloc(sizeof(*p), ...)
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#allocating-memory
+
+ **ALLOC_WITH_MULTIPLY**
+ Prefer kmalloc_array/kcalloc over kmalloc/kzalloc with a
+ sizeof multiply.
+ See: https://www.kernel.org/doc/html/latest/core-api/memory-allocation.html
+
+
+API usage
+---------
+
+ **ARCH_DEFINES**
+ Architecture specific defines should be avoided wherever
+ possible.
+
+ **ARCH_INCLUDE_LINUX**
+ Whenever asm/file.h is included and linux/file.h exists, a
+ conversion can be made when linux/file.h includes asm/file.h.
+ However this is not always the case (See signal.h).
+ This message type is emitted only for includes from arch/.
+
+ **AVOID_BUG**
+ BUG() or BUG_ON() should be avoided totally.
+ Use WARN() and WARN_ON() instead, and handle the "impossible"
+ error condition as gracefully as possible.
+ See: https://www.kernel.org/doc/html/latest/process/deprecated.html#bug-and-bug-on
+
+ **CONSIDER_KSTRTO**
+ The simple_strtol(), simple_strtoll(), simple_strtoul(), and
+ simple_strtoull() functions explicitly ignore overflows, which
+ may lead to unexpected results in callers. The respective kstrtol(),
+ kstrtoll(), kstrtoul(), and kstrtoull() functions tend to be the
+ correct replacements.
+ See: https://www.kernel.org/doc/html/latest/process/deprecated.html#simple-strtol-simple-strtoll-simple-strtoul-simple-strtoull
+
+ **LOCKDEP**
+ The lockdep_no_validate class was added as a temporary measure to
+ prevent warnings on conversion of device->sem to device->mutex.
+ It should not be used for any other purpose.
+ See: https://lore.kernel.org/lkml/1268959062.9440.467.camel@laptop/
+
+ **MALFORMED_INCLUDE**
+ The #include statement has a malformed path. This has happened
+ because the author has included a double slash "//" in the pathname
+ accidentally.
+
+ **USE_LOCKDEP**
+ lockdep_assert_held() annotations should be preferred over
+ assertions based on spin_is_locked()
+ See: https://www.kernel.org/doc/html/latest/locking/lockdep-design.html#annotations
+
+ **UAPI_INCLUDE**
+ No #include statements in include/uapi should use a uapi/ path.
+
+
+Comment style
+-------------
+
+ **BLOCK_COMMENT_STYLE**
+ The comment style is incorrect. The preferred style for multi-
+ line comments is::
+
+ /*
+ * This is the preferred style
+ * for multi line comments.
+ */
+
+ The networking comment style is a bit different, with the first line
+ not empty like the former::
+
+ /* This is the preferred comment style
+ * for files in net/ and drivers/net/
+ */
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting
+
+ **C99_COMMENTS**
+ C99 style single line comments (//) should not be used.
+ Prefer the block comment style instead.
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting
+
+
+Commit message
+--------------
+
+ **BAD_SIGN_OFF**
+ The signed-off-by line does not fall in line with the standards
+ specified by the community.
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#developer-s-certificate-of-origin-1-1
+
+ **BAD_STABLE_ADDRESS_STYLE**
+ The email format for stable is incorrect.
+ Some valid options for stable address are::
+
+ 1. stable@vger.kernel.org
+ 2. stable@kernel.org
+
+ For adding version info, the following comment style should be used::
+
+ stable@vger.kernel.org # version info
+
+ **COMMIT_COMMENT_SYMBOL**
+ Commit log lines starting with a '#' are ignored by git as
+ comments. To solve this problem addition of a single space
+ infront of the log line is enough.
+
+ **COMMIT_MESSAGE**
+ The patch is missing a commit description. A brief
+ description of the changes made by the patch should be added.
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
+
+ **MISSING_SIGN_OFF**
+ The patch is missing a Signed-off-by line. A signed-off-by
+ line should be added according to Developer's certificate of
+ Origin.
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin
+
+ **NO_AUTHOR_SIGN_OFF**
+ The author of the patch has not signed off the patch. It is
+ required that a simple sign off line should be present at the
+ end of explanation of the patch to denote that the author has
+ written it or otherwise has the rights to pass it on as an open
+ source patch.
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin
+
+ **DIFF_IN_COMMIT_MSG**
+ Avoid having diff content in commit message.
+ This causes problems when one tries to apply a file containing both
+ the changelog and the diff because patch(1) tries to apply the diff
+ which it found in the changelog.
+ See: https://lore.kernel.org/lkml/20150611134006.9df79a893e3636019ad2759e@linux-foundation.org/
+
+ **GERRIT_CHANGE_ID**
+ To be picked up by gerrit, the footer of the commit message might
+ have a Change-Id like::
+
+ Change-Id: Ic8aaa0728a43936cd4c6e1ed590e01ba8f0fbf5b
+ Signed-off-by: A. U. Thor <author@example.com>
+
+ The Change-Id line must be removed before submitting.
+
+ **GIT_COMMIT_ID**
+ The proper way to reference a commit id is:
+ commit <12+ chars of sha1> ("<title line>")
+
+ An example may be::
+
+ Commit e21d2170f36602ae2708 ("video: remove unnecessary
+ platform_set_drvdata()") removed the unnecessary
+ platform_set_drvdata(), but left the variable "dev" unused,
+ delete it.
+
+ See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
+
+
+Comparison style
+----------------
+
+ **ASSIGN_IN_IF**
+ Do not use assignments in if condition.
+ Example::
+
+ if ((foo = bar(...)) < BAZ) {
+
+ should be written as::
+
+ foo = bar(...);
+ if (foo < BAZ) {
+
+ **BOOL_COMPARISON**
+ Comparisons of A to true and false are better written
+ as A and !A.
+ See: https://lore.kernel.org/lkml/1365563834.27174.12.camel@joe-AO722/
+
+ **COMPARISON_TO_NULL**
+ Comparisons to NULL in the form (foo == NULL) or (foo != NULL)
+ are better written as (!foo) and (foo).
+
+ **CONSTANT_COMPARISON**
+ Comparisons with a constant or upper case identifier on the left
+ side of the test should be avoided.
+
+
+Macros, Attributes and Symbols
+------------------------------
+
+ **ARRAY_SIZE**
+ The ARRAY_SIZE(foo) macro should be preferred over
+ sizeof(foo)/sizeof(foo[0]) for finding number of elements in an
+ array.
+
+ The macro is defined in include/linux/kernel.h::
+
+ #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+ **AVOID_EXTERNS**
+ Function prototypes don't need to be declared extern in .h
+ files. It's assumed by the compiler and is unnecessary.
+
+ **AVOID_L_PREFIX**
+ Local symbol names that are prefixed with `.L` should be avoided,
+ as this has special meaning for the assembler; a symbol entry will
+ not be emitted into the symbol table. This can prevent `objtool`
+ from generating correct unwind info.
+
+ Symbols with STB_LOCAL binding may still be used, and `.L` prefixed
+ local symbol names are still generally usable within a function,
+ but `.L` prefixed local symbol names should not be used to denote
+ the beginning or end of code regions via
+ `SYM_CODE_START_LOCAL`/`SYM_CODE_END`
+
+ **BIT_MACRO**
+ Defines like: 1 << <digit> could be BIT(digit).
+ The BIT() macro is defined in include/linux/bitops.h::
+
+ #define BIT(nr) (1UL << (nr))
+
+ **CONST_READ_MOSTLY**
+ When a variable is tagged with the __read_mostly annotation, it is a
+ signal to the compiler that accesses to the variable will be mostly
+ reads and rarely(but NOT never) a write.
+
+ const __read_mostly does not make any sense as const data is already
+ read-only. The __read_mostly annotation thus should be removed.
+
+ **DATE_TIME**
+ It is generally desirable that building the same source code with
+ the same set of tools is reproducible, i.e. the output is always
+ exactly the same.
+
+ The kernel does *not* use the ``__DATE__`` and ``__TIME__`` macros,
+ and enables warnings if they are used as they can lead to
+ non-deterministic builds.
+ See: https://www.kernel.org/doc/html/latest/kbuild/reproducible-builds.html#timestamps
+
+ **DEFINE_ARCH_HAS**
+ The ARCH_HAS_xyz and ARCH_HAVE_xyz patterns are wrong.
+
+ For big conceptual features use Kconfig symbols instead. And for
+ smaller things where we have compatibility fallback functions but
+ want architectures able to override them with optimized ones, we
+ should either use weak functions (appropriate for some cases), or
+ the symbol that protects them should be the same symbol we use.
+ See: https://lore.kernel.org/lkml/CA+55aFycQ9XJvEOsiM3txHL5bjUc8CeKWJNR_H+MiicaddB42Q@mail.gmail.com/
+
+ **INIT_ATTRIBUTE**
+ Const init definitions should use __initconst instead of
+ __initdata.
+
+ Similarly init definitions without const require a separate
+ use of const.
+
+ **INLINE_LOCATION**
+ The inline keyword should sit between storage class and type.
+
+ For example, the following segment::
+
+ inline static int example_function(void)
+ {
+ ...
+ }
+
+ should be::
+
+ static inline int example_function(void)
+ {
+ ...
+ }
+
+ **MULTISTATEMENT_MACRO_USE_DO_WHILE**
+ Macros with multiple statements should be enclosed in a
+ do - while block. Same should also be the case for macros
+ starting with `if` to avoid logic defects::
+
+ #define macrofun(a, b, c) \
+ do { \
+ if (a == 5) \
+ do_this(b, c); \
+ } while (0)
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#macros-enums-and-rtl
+
+ **WEAK_DECLARATION**
+ Using weak declarations like __attribute__((weak)) or __weak
+ can have unintended link defects. Avoid using them.
+
+
+Functions and Variables
+-----------------------
+
+ **CAMELCASE**
+ Avoid CamelCase Identifiers.
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#naming
+
+ **FUNCTION_WITHOUT_ARGS**
+ Function declarations without arguments like::
+
+ int foo()
+
+ should be::
+
+ int foo(void)
+
+ **GLOBAL_INITIALISERS**
+ Global variables should not be initialized explicitly to
+ 0 (or NULL, false, etc.). Your compiler (or rather your
+ loader, which is responsible for zeroing out the relevant
+ sections) automatically does it for you.
+
+ **INITIALISED_STATIC**
+ Static variables should not be initialized explicitly to zero.
+ Your compiler (or rather your loader) automatically does
+ it for you.
+
+ **RETURN_PARENTHESES**
+ return is not a function and as such doesn't need parentheses::
+
+ return (bar);
+
+ can simply be::
+
+ return bar;
+
+
+Spacing and Brackets
+--------------------
+
+ **ASSIGNMENT_CONTINUATIONS**
+ Assignment operators should not be written at the start of a
+ line but should follow the operand at the previous line.
+
+ **BRACES**
+ The placement of braces is stylistically incorrect.
+ The preferred way is to put the opening brace last on the line,
+ and put the closing brace first::
+
+ if (x is true) {
+ we do y
+ }
+
+ This applies for all non-functional blocks.
+ However, there is one special case, namely functions: they have the
+ opening brace at the beginning of the next line, thus::
+
+ int function(int x)
+ {
+ body of function
+ }
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+ **BRACKET_SPACE**
+ Whitespace before opening bracket '[' is prohibited.
+ There are some exceptions:
+
+ 1. With a type on the left::
+
+ ;int [] a;
+
+ 2. At the beginning of a line for slice initialisers::
+
+ [0...10] = 5,
+
+ 3. Inside a curly brace::
+
+ = { [0...10] = 5 }
+
+ **CODE_INDENT**
+ Code indent should use tabs instead of spaces.
+ Outside of comments, documentation and Kconfig,
+ spaces are never used for indentation.
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#indentation
+
+ **CONCATENATED_STRING**
+ Concatenated elements should have a space in between.
+ Example::
+
+ printk(KERN_INFO"bar");
+
+ should be::
+
+ printk(KERN_INFO "bar");
+
+ **ELSE_AFTER_BRACE**
+ `else {` should follow the closing block `}` on the same line.
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+ **LINE_SPACING**
+ Vertical space is wasted given the limited number of lines an
+ editor window can display when multiple blank lines are used.
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+ **OPEN_BRACE**
+ The opening brace should be following the function definitions on the
+ next line. For any non-functional block it should be on the same line
+ as the last construct.
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+ **POINTER_LOCATION**
+ When using pointer data or a function that returns a pointer type,
+ the preferred use of * is adjacent to the data name or function name
+ and not adjacent to the type name.
+ Examples::
+
+ char *linux_banner;
+ unsigned long long memparse(char *ptr, char **retptr);
+ char *match_strdup(substring_t *s);
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+ **SPACING**
+ Whitespace style used in the kernel sources is described in kernel docs.
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+ **SWITCH_CASE_INDENT_LEVEL**
+ switch should be at the same indent as case.
+ Example::
+
+ switch (suffix) {
+ case 'G':
+ case 'g':
+ mem <<= 30;
+ break;
+ case 'M':
+ case 'm':
+ mem <<= 20;
+ break;
+ case 'K':
+ case 'k':
+ mem <<= 10;
+ /* fall through */
+ default:
+ break;
+ }
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#indentation
+
+ **TRAILING_WHITESPACE**
+ Trailing whitespace should always be removed.
+ Some editors highlight the trailing whitespace and cause visual
+ distractions when editing files.
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+ **WHILE_AFTER_BRACE**
+ while should follow the closing bracket on the same line::
+
+ do {
+ ...
+ } while(something);
+
+ See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+
+Others
+------
+
+ **CONFIG_DESCRIPTION**
+ Kconfig symbols should have a help text which fully describes
+ it.
+
+ **CORRUPTED_PATCH**
+ The patch seems to be corrupted or lines are wrapped.
+ Please regenerate the patch file before sending it to the maintainer.
+
+ **DOS_LINE_ENDINGS**
+ For DOS-formatted patches, there are extra ^M symbols at the end of
+ the line. These should be removed.
+
+ **EXECUTE_PERMISSIONS**
+ There is no reason for source files to be executable. The executable
+ bit can be removed safely.
+
+ **NON_OCTAL_PERMISSIONS**
+ Permission bits should use 4 digit octal permissions (like 0700 or 0444).
+ Avoid using any other base like decimal.
+
+ **NOT_UNIFIED_DIFF**
+ The patch file does not appear to be in unified-diff format. Please
+ regenerate the patch file before sending it to the maintainer.
+
+ **PRINTF_0XDECIMAL**
+ Prefixing 0x with decimal output is defective and should be corrected.
+
+ **TRAILING_STATEMENTS**
+ Trailing statements (for example after any conditional) should be
+ on the next line.
+ Like::
+
+ if (x == y) break;
+
+ should be::
+
+ if (x == y)
+ break;
diff --git a/doc/develop/driver-model/of-plat.rst b/doc/develop/driver-model/of-plat.rst
index 8a8eaed..237af38 100644
--- a/doc/develop/driver-model/of-plat.rst
+++ b/doc/develop/driver-model/of-plat.rst
@@ -215,16 +215,16 @@
static int mmc_of_to_plat(struct udevice *dev)
{
- #if !CONFIG_IS_ENABLED(OF_PLATDATA)
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
/* Decode the devicetree data */
struct mmc_plat *plat = dev_get_plat(dev);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(dev);
plat->fifo_depth = fdtdec_get_int(blob, node, "fifo-depth", 0);
- #endif
+ }
- return 0;
+ return 0;
}
static int mmc_probe(struct udevice *dev)
@@ -600,6 +600,11 @@
Problems
--------
+This section shows some common problems and how to fix them.
+
+Driver not found
+~~~~~~~~~~~~~~~~
+
In some cases you will you see something like this::
WARNING: the driver rockchip_rk3188_grf was not found in the driver list
@@ -633,8 +638,11 @@
then dtoc looks at the first compatible string ("rockchip,rk3188-grf"),
converts that to a C identifier (rockchip_rk3188_grf) and then looks for that.
+Missing .compatible or Missing .id
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
Various things can cause dtoc to fail to find the driver and it tries to
-warn about these. For example:
+warn about these. For example::
rockchip_rk3188_uart: Missing .compatible in drivers/serial/serial_rockchip.c
: WARNING: the driver rockchip_rk3188_uart was not found in the driver list
@@ -649,6 +657,130 @@
member and a .id member. The first provides the array of compatible strings and
the second provides the uclass ID.
+Missing parent
+~~~~~~~~~~~~~~
+
+When a device is used, its parent must be present as well. If you see an error
+like::
+
+ Node '/i2c@0/emul/emul0' requires parent node '/i2c@0/emul' but it is not in
+ the valid list
+
+it indicates that you are using a node whose parent is not present in the
+devicetree. In this example, if you look at the device tree output
+(e.g. fdtdump tpl/u-boot-tpl.dtb in your build directory), you may see something
+like this::
+
+ emul {
+ emul0 {
+ compatible = "sandbox,i2c-rtc-emul";
+ #emul-cells = <0x00000000>;
+ phandle = <0x00000003>;
+ };
+ };
+
+In this example, 'emul0' exists but its parent 'emul' has no properties. These
+have been dropped by fdtgrep in an effort to reduce the devicetree size. This
+indicates that the two nodes have different phase settings. Looking at the
+source .dts::
+
+ i2c_emul: emul {
+ u-boot,dm-spl;
+ reg = <0xff>;
+ compatible = "sandbox,i2c-emul-parent";
+ emul0: emul0 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,i2c-rtc-emul";
+ #emul-cells = <0>;
+ };
+ };
+
+you can see that the child node 'emul0' usees 'u-boot,dm-pre-reloc', indicating
+that the node is present in all SPL builds, but its parent uses 'u-boot,dm-spl'
+indicating it is only present in SPL, not TPL. For a TPL build, this will fail
+with the above message. The fix is to change 'emul0' to use the same
+'u-boot,dm-spl' condition, so that it is not present in TPL, like its parent.
+
+Link errors / undefined reference
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Sometimes dtoc does not find the problem for you, but something is wrong and
+you get a link error, e.g.::
+
+ :(.u_boot_list_2_udevice_2_spl_test5+0x0): undefined reference to
+ `_u_boot_list_2_driver_2_sandbox_spl_test'
+ /usr/bin/ld: dts/dt-uclass.o:(.u_boot_list_2_uclass_2_misc+0x8):
+ undefined reference to `_u_boot_list_2_uclass_driver_2_misc'
+
+The first one indicates that the device cannot find its driver. This means that
+there is a driver 'sandbox_spl_test' but it is not compiled into the build.
+Check your Kconfig settings to make sure it is. If you don't want that in the
+build, adjust your phase settings, e.g. by using 'u-boot,dm-spl' in the node
+to exclude it from the TPL build::
+
+ spl-test5 {
+ u-boot,dm-tpl;
+ compatible = "sandbox,spl-test";
+ stringarray = "tpl";
+ };
+
+We can drop the 'u-boot,dm-tpl' line so this node won't appear in the TPL
+devicetree and thus the driver won't be needed.
+
+The second error above indicates that the MISC uclass is needed by the driver
+(since it is in the MISC uclass) but that uclass is not compiled in the build.
+The fix above would fix this error too. But if you do want this uclass in the
+build, check your Kconfig settings to make sure the uclass is being built
+(CONFIG_MISC in this case).
+
+Another error that can crop up is something like::
+
+ spl/dts/dt-device.c:257:38: error: invalid application of ‘sizeof’ to
+ incomplete type ‘struct sandbox_irq_priv’
+ 257 | u8 _sandbox_irq_priv_irq_sbox[sizeof(struct sandbox_irq_priv)]
+ | ^~~~~~
+
+This indicates that `struct sandbox_irq_priv` is not defined anywhere. The
+solution is to add a DM_HEADER() line, as below, so this is included in the
+dt-device.c file::
+
+ U_BOOT_DRIVER(sandbox_irq) = {
+ .name = "sandbox_irq",
+ .id = UCLASS_IRQ,
+ .of_match = sandbox_irq_ids,
+ .ops = &sandbox_irq_ops,
+ .priv_auto = sizeof(struct sandbox_irq_priv),
+ DM_HEADER(<asm/irq.h>)
+ };
+
+Note that there is no dependency checking on the above, so U-Boot will not
+regenerate the dt-device.c file when you update the source file (here,
+`irq_sandbox.c`). You need to run `make mrproper` first to get a fresh build.
+
+Another error that can crop up is something like::
+
+ spl/dts/dt-device.c:257:38: error: invalid application of ‘sizeof’ to
+ incomplete type ‘struct sandbox_irq_priv’
+ 257 | u8 _sandbox_irq_priv_irq_sbox[sizeof(struct sandbox_irq_priv)]
+ | ^~~~~~
+
+This indicates that `struct sandbox_irq_priv` is not defined anywhere. The
+solution is to add a DM_HEADER() line, as below, so this is included in the
+dt-device.c file::
+
+ U_BOOT_DRIVER(sandbox_irq) = {
+ .name = "sandbox_irq",
+ .id = UCLASS_IRQ,
+ .of_match = sandbox_irq_ids,
+ .ops = &sandbox_irq_ops,
+ .priv_auto = sizeof(struct sandbox_irq_priv),
+ DM_HEADER(<asm/irq.h>)
+ };
+
+Note that there is no dependency checking on the above, so U-Boot will not
+regenerate the dt-device.c file when you update the source file (here,
+`irq_sandbox.c`). You need to run `make mrproper` first to get a fresh build.
+
Caveats
-------
@@ -697,7 +829,7 @@
---------
Generated files
-```````````````
+~~~~~~~~~~~~~~~
When enabled, dtoc generates the following five files:
@@ -738,7 +870,7 @@
CONFIG options
-``````````````
+~~~~~~~~~~~~~~
Several CONFIG options are used to control the behaviour of of-platdata, all
available for both SPL and TPL:
@@ -793,7 +925,7 @@
the nodes cannot be updated, OF_PLATDATA_NO_BIND is enabled.
Data structures
-```````````````
+~~~~~~~~~~~~~~~
A few extra data structures are used with of-platdata:
@@ -821,7 +953,7 @@
`device_get_by_ofplat_idx()`.
Other changes
-`````````````
+~~~~~~~~~~~~~
Some other changes are made with of-platdata:
diff --git a/doc/develop/index.rst b/doc/develop/index.rst
index 24056b1..5e064a4 100644
--- a/doc/develop/index.rst
+++ b/doc/develop/index.rst
@@ -56,5 +56,6 @@
.. toctree::
:maxdepth: 1
+ checkpatch
coccinelle
moveconfig
diff --git a/doc/develop/version.rst b/doc/develop/version.rst
index 066901b..8f3231b 100644
--- a/doc/develop/version.rst
+++ b/doc/develop/version.rst
@@ -60,15 +60,6 @@
This is used as part of the banner string when U-Boot starts.
- U_BOOT_VERSION_STRING (string #define)
- U_BOOT_VERSION followed by build-time information
- and CONFIG_IDENT_STRING.
-
- Examples::
-
- U-Boot 2020.10 (Jan 06 2021 - 08:50:36 -0700)
- U-Boot 2021.01-rc5-00248-g60dd854f3ba-dirty (Jan 06 2021 - 08:50:36 -0700) for spring
-
U_BOOT_VERSION_NUM (integer #define)
Release year, e.g. 2021 for release 2021.01. Note
this is an integer, not a string.
@@ -77,6 +68,18 @@
Patch number, e.g. 1 for release 2020.01. Note
this is an integer, not a string.
+Human readable U-Boot version string is available in header file
+include/version_string.h in following variable:
+
+ version_string (const char[])
+ U_BOOT_VERSION followed by build-time information
+ and CONFIG_IDENT_STRING.
+
+ Examples::
+
+ U-Boot 2020.10 (Jan 06 2021 - 08:50:36 -0700)
+ U-Boot 2021.01-rc5-00248-g60dd854f3ba-dirty (Jan 06 2021 - 08:50:36 -0700) for spring
+
Build date/time is also included. See the generated file
include/generated/timestamp_autogenerated.h for the available
fields. For example::
diff --git a/doc/device-tree-bindings/config.txt b/doc/device-tree-bindings/config.txt
index 85379fb..3151778 100644
--- a/doc/device-tree-bindings/config.txt
+++ b/doc/device-tree-bindings/config.txt
@@ -2,8 +2,8 @@
----------------------------------------
A number of run-time configuration options are provided in the /config node
-of the control device tree. You can access these using fdtdec_get_config_int(),
-fdtdec_get_config_bool() and fdtdec_get_config_string().
+of the control device tree. You can access these using ofnode_conf_read_int(),
+ofnode_conf_read_bool() and ofnode_conf_read_str().
These options are designed to affect the operation of U-Boot at runtime.
Runtime-configuration items can help avoid proliferation of different builds
diff --git a/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt b/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt
index 3a2ee4b..16f8702 100644
--- a/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt
+++ b/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt
@@ -6,7 +6,8 @@
- reg : SPI Chip select
Optional properties:
-- gpio-reset : Reset GPIO (if not connected to the SoC reset line)
+- reset-gpios : Reset GPIO (if not connected to the SoC reset line)
+- gpio-reset : Reset GPIO (deprecated, use reset-gpios instead)
- spi-max-frequency : See spi-bus.txt
Example:
diff --git a/doc/device-tree-bindings/watchdog/gpio-wdt.txt b/doc/device-tree-bindings/watchdog/gpio-wdt.txt
new file mode 100644
index 0000000..c9a8559
--- /dev/null
+++ b/doc/device-tree-bindings/watchdog/gpio-wdt.txt
@@ -0,0 +1,19 @@
+GPIO watchdog timer
+
+Describes a simple watchdog timer which is reset by toggling a gpio.
+
+Required properties:
+
+- compatible: Must be "linux,wdt-gpio".
+- gpios: gpio to toggle when wdt driver reset method is called.
+- always-running: Boolean property indicating that the watchdog cannot
+ be disabled. At present, U-Boot only supports this kind of GPIO
+ watchdog.
+
+Example:
+
+ gpio-wdt {
+ gpios = <&gpio0 1 0>;
+ compatible = "linux,wdt-gpio";
+ always-running;
+ };
diff --git a/doc/usage/qfw.rst b/doc/usage/qfw.rst
index 87463e1..b3704b9 100644
--- a/doc/usage/qfw.rst
+++ b/doc/usage/qfw.rst
@@ -26,7 +26,7 @@
kernel_addr
address to which the file specified by the -kernel parameter of QEMU shall
be loaded. Defaults to environment variable *loadaddr* and further to
- the value of *CONFIG_LOADADDR*.
+ the value of *CONFIG_SYS_LOAD_ADDR*.
initrd_addr
address to which the file specified by the -initrd parameter of QEMU shall
diff --git a/drivers/Makefile b/drivers/Makefile
index fd218c9..4cbc407 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -1,9 +1,12 @@
# SPDX-License-Identifier: GPL-2.0+
+obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/
obj-$(CONFIG_$(SPL_TPL_)BUTTON) += button/
obj-$(CONFIG_$(SPL_TPL_)CACHE) += cache/
obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/
obj-$(CONFIG_$(SPL_TPL_)DM) += core/
+obj-$(CONFIG_$(SPL_TPL_)DMA) += dma/
+obj-$(CONFIG_$(SPL_TPL_)DMA_LEGACY) += dma/
obj-$(CONFIG_$(SPL_TPL_)DFU) += dfu/
obj-$(CONFIG_$(SPL_TPL_)GPIO) += gpio/
obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC) += misc/
@@ -12,48 +15,40 @@
obj-$(CONFIG_$(SPL_TPL_)I2C) += i2c/
obj-$(CONFIG_$(SPL_TPL_)INPUT) += input/
obj-$(CONFIG_$(SPL_TPL_)LED) += led/
-obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/
+obj-$(CONFIG_$(SPL_TPL_)MMC) += mmc/
obj-y += mtd/
obj-$(CONFIG_$(SPL_)MULTIPLEXER) += mux/
-obj-$(CONFIG_$(SPL_TPL_)PCH_SUPPORT) += pch/
+obj-$(CONFIG_$(SPL_TPL_)ETH) += net/
+obj-$(CONFIG_$(SPL_TPL_)PCH) += pch/
obj-$(CONFIG_$(SPL_TPL_)PCI) += pci/
obj-$(CONFIG_$(SPL_TPL_)PHY) += phy/
obj-$(CONFIG_$(SPL_TPL_)PINCTRL) += pinctrl/
+obj-$(CONFIG_$(SPL_TPL_)POWER) += power/
obj-$(CONFIG_$(SPL_TPL_)RAM) += ram/
-obj-$(CONFIG_$(SPL_TPL_)RTC_SUPPORT) += rtc/
-obj-$(CONFIG_$(SPL_TPL_)SERIAL_SUPPORT) += serial/
-obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/
+obj-$(CONFIG_$(SPL_TPL_)RTC) += rtc/
+obj-$(CONFIG_$(SPL_TPL_)SERIAL) += serial/
+obj-$(CONFIG_$(SPL_TPL_)SPI) += spi/
obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
obj-$(CONFIG_$(SPL_TPL_)VIRTIO) += virtio/
obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox/
obj-$(CONFIG_$(SPL_)REMOTEPROC) += remoteproc/
obj-$(CONFIG_$(SPL_)SYSINFO) += sysinfo/
obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm/
-obj-$(CONFIG_$(SPL_TPL_)ACPI_PMC) += power/acpi_pmc/
obj-$(CONFIG_XEN) += xen/
obj-$(CONFIG_$(SPL_)FPGA) += fpga/
ifndef CONFIG_TPL_BUILD
ifdef CONFIG_SPL_BUILD
-obj-$(CONFIG_SPL_BOOTCOUNT_LIMIT) += bootcount/
-obj-$(CONFIG_SPL_CACHE_SUPPORT) += cache/
obj-$(CONFIG_SPL_CPU) += cpu/
obj-$(CONFIG_SPL_CRYPTO) += crypto/
-obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
+obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR) += ddr/fsl/
obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
obj-$(CONFIG_$(SPL_)ALTERA_SDRAM) += ddr/altera/
obj-$(CONFIG_ARCH_IMX8M) += ddr/imx/imx8m/
obj-$(CONFIG_IMX8ULP_DRAM) += ddr/imx/imx8ulp/
-obj-$(CONFIG_SPL_POWER) += power/ power/pmic/
-obj-$(CONFIG_SPL_POWER) += power/regulator/
-obj-$(CONFIG_SPL_POWER_DOMAIN) += power/domain/
obj-$(CONFIG_SPL_DM_RESET) += reset/
-obj-$(CONFIG_SPL_DMA) += dma/
-obj-$(CONFIG_SPL_ETH) += net/
-obj-$(CONFIG_SPL_ETH) += net/phy/
-obj-$(CONFIG_SPL_USB_ETHER) += net/phy/
obj-$(CONFIG_SPL_MUSB_NEW) += usb/musb-new/
obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
@@ -61,7 +56,7 @@
obj-$(CONFIG_SPL_WATCHDOG) += watchdog/
obj-$(CONFIG_SPL_USB_HOST) += usb/host/
obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
-obj-$(CONFIG_SPL_SATA_SUPPORT) += ata/ scsi/
+obj-$(CONFIG_SPL_SATA) += ata/ scsi/
obj-$(CONFIG_HAVE_BLOCK_DEVICE) += block/
obj-$(CONFIG_SPL_THERMAL) += thermal/
@@ -70,8 +65,7 @@
ifdef CONFIG_TPL_BUILD
-obj-$(CONFIG_TPL_BOOTCOUNT_LIMIT) += bootcount/
-obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
+obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR) += ddr/fsl/
endif
@@ -83,7 +77,6 @@
obj-$(CONFIG_DM_DEMO) += demo/
obj-$(CONFIG_BIOSEMU) += bios_emulator/
obj-y += block/
-obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/
obj-y += cache/
obj-$(CONFIG_CPU) += cpu/
obj-y += crypto/
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 6f0b772..5639536 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -36,10 +36,17 @@
config AHCI_PCI
bool "Support for PCI-based AHCI controller"
+ depends on PCI
depends on DM_SCSI
help
Enables support for the PCI-based AHCI controller.
+config SPL_AHCI_PCI
+ bool "Support for PCI-based AHCI controller for SPL"
+ depends on SPL
+ depends on SPL_PCI
+ depends on SPL_SATA_SUPPORT && DM_SCSI
+
config SATA_CEVA
bool "Ceva Sata controller"
depends on AHCI
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 4811b2f..cd88131 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -5,7 +5,7 @@
obj-$(CONFIG_DWC_AHCI) += dwc_ahci.o
obj-$(CONFIG_AHCI) += ahci-uclass.o
-obj-$(CONFIG_AHCI_PCI) += ahci-pci.o
+obj-$(CONFIG_$(SPL_)AHCI_PCI) += ahci-pci.o
obj-$(CONFIG_SCSI_AHCI) += ahci.o
obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
obj-$(CONFIG_FSL_SATA) += fsl_sata.o
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 4023332..56a4eec 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -52,14 +52,12 @@
config SPL_BLOCK_CACHE
bool "Use block device cache in SPL"
depends on SPL_BLK
- default n
help
This option enables the disk-block cache in SPL
config TPL_BLOCK_CACHE
bool "Use block device cache in TPL"
depends on TPL_BLK
- default n
help
This option enables the disk-block cache in TPL
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index 5d93e6a..aec0bca 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -12,13 +12,15 @@
#include <asm/processor.h>
#include <clk-uclass.h>
#include <common.h>
+#include <div64.h>
#include <dm.h>
#include <linux/clk-provider.h>
#include <linux/clk/at91_pmc.h>
#include "pmc.h"
-#define UBOOT_DM_CLK_AT91_MASTER "at91-master-clk"
+#define UBOOT_DM_CLK_AT91_MASTER_PRES "at91-master-clk-pres"
+#define UBOOT_DM_CLK_AT91_MASTER_DIV "at91-master-clk-div"
#define UBOOT_DM_CLK_AT91_SAMA7G5_MASTER "at91-sama7g5-master-clk"
#define MASTER_PRES_MASK 0x7
@@ -73,7 +75,7 @@
return 0;
}
-static ulong clk_master_get_rate(struct clk *clk)
+static ulong clk_master_pres_get_rate(struct clk *clk)
{
struct clk_master *master = to_clk_master(clk);
const struct clk_master_layout *layout = master->layout;
@@ -81,7 +83,7 @@
master->characteristics;
ulong rate = clk_get_parent_rate(clk);
unsigned int mckr;
- u8 pres, div;
+ u8 pres;
if (!rate)
return 0;
@@ -90,29 +92,21 @@
mckr &= layout->mask;
pres = (mckr >> layout->pres_shift) & MASTER_PRES_MASK;
- div = (mckr >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK;
if (characteristics->have_div3_pres && pres == MASTER_PRES_MAX)
- rate /= 3;
+ pres = 3;
else
- rate >>= pres;
-
- rate /= characteristics->divisors[div];
-
- if (rate < characteristics->output.min)
- pr_warn("master clk is underclocked");
- else if (rate > characteristics->output.max)
- pr_warn("master clk is overclocked");
+ pres = (1 << pres);
- return rate;
+ return DIV_ROUND_CLOSEST_ULL(rate, pres);
}
-static const struct clk_ops master_ops = {
+static const struct clk_ops master_pres_ops = {
.enable = clk_master_enable,
- .get_rate = clk_master_get_rate,
+ .get_rate = clk_master_pres_get_rate,
};
-struct clk *at91_clk_register_master(void __iomem *base,
+struct clk *at91_clk_register_master_pres(void __iomem *base,
const char *name, const char * const *parent_names,
int num_parents, const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
@@ -140,7 +134,7 @@
pmc_read(master->base, master->layout->offset, &val);
clk = &master->clk;
clk->flags = CLK_GET_RATE_NOCACHE | CLK_IS_CRITICAL;
- ret = clk_register(clk, UBOOT_DM_CLK_AT91_MASTER, name,
+ ret = clk_register(clk, UBOOT_DM_CLK_AT91_MASTER_PRES, name,
parent_names[val & AT91_PMC_CSS]);
if (ret) {
kfree(master);
@@ -150,10 +144,81 @@
return clk;
}
+U_BOOT_DRIVER(at91_master_pres_clk) = {
+ .name = UBOOT_DM_CLK_AT91_MASTER_PRES,
+ .id = UCLASS_CLK,
+ .ops = &master_pres_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+static ulong clk_master_div_get_rate(struct clk *clk)
+{
+ struct clk_master *master = to_clk_master(clk);
+ const struct clk_master_layout *layout = master->layout;
+ const struct clk_master_characteristics *characteristics =
+ master->characteristics;
+ ulong rate = clk_get_parent_rate(clk);
+ unsigned int mckr;
+ u8 div;
+
+ if (!rate)
+ return 0;
+
+ pmc_read(master->base, master->layout->offset, &mckr);
+ mckr &= layout->mask;
+ div = (mckr >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK;
+
+ rate = DIV_ROUND_CLOSEST_ULL(rate, characteristics->divisors[div]);
+ if (rate < characteristics->output.min)
+ pr_warn("master clk is underclocked");
+ else if (rate > characteristics->output.max)
+ pr_warn("master clk is overclocked");
+
+ return rate;
+}
+
+static const struct clk_ops master_div_ops = {
+ .enable = clk_master_enable,
+ .get_rate = clk_master_div_get_rate,
+};
+
+struct clk *at91_clk_register_master_div(void __iomem *base,
+ const char *name, const char *parent_name,
+ const struct clk_master_layout *layout,
+ const struct clk_master_characteristics *characteristics)
+{
+ struct clk_master *master;
+ struct clk *clk;
+ int ret;
+
+ if (!base || !name || !parent_name || !layout || !characteristics)
+ return ERR_PTR(-EINVAL);
+
+ master = kzalloc(sizeof(*master), GFP_KERNEL);
+ if (!master)
+ return ERR_PTR(-ENOMEM);
+
+ master->layout = layout;
+ master->characteristics = characteristics;
+ master->base = base;
+ master->num_parents = 1;
+
+ clk = &master->clk;
+ clk->flags = CLK_GET_RATE_NOCACHE | CLK_IS_CRITICAL;
+ ret = clk_register(clk, UBOOT_DM_CLK_AT91_MASTER_DIV, name,
+ parent_name);
+ if (ret) {
+ kfree(master);
+ clk = ERR_PTR(ret);
+ }
+
+ return clk;
+}
+
-U_BOOT_DRIVER(at91_master_clk) = {
- .name = UBOOT_DM_CLK_AT91_MASTER,
+U_BOOT_DRIVER(at91_master_div_clk) = {
+ .name = UBOOT_DM_CLK_AT91_MASTER_DIV,
.id = UCLASS_CLK,
- .ops = &master_ops,
+ .ops = &master_div_ops,
.flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index f07f535..2b4dd9a 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -97,12 +97,17 @@
const struct clk_pll_characteristics *characteristics,
const struct clk_pll_layout *layout, bool critical);
struct clk *
-at91_clk_register_master(void __iomem *base, const char *name,
+at91_clk_register_master_pres(void __iomem *base, const char *name,
const char * const *parent_names, int num_parents,
const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
const u32 *mux_table);
struct clk *
+at91_clk_register_master_div(void __iomem *base,
+ const char *name, const char *parent_name,
+ const struct clk_master_layout *layout,
+ const struct clk_master_characteristics *characteristics);
+struct clk *
at91_clk_sama7g5_register_master(void __iomem *base, const char *name,
const char * const *parent_names, int num_parents,
const u32 *mux_table, const u32 *clk_mux_table,
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 9e9a643..4d00ee2 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -31,7 +31,7 @@
* @ID_PLL_A_FRAC: APLL fractional clock identifier
* @ID_PLL_A_DIV: APLL divider clock identifier
- * @ID_MCK: MCK clock identifier
+ * @ID_MCK_DIV: MCK DIV clock identifier
* @ID_UTMI: UTMI clock identifier
@@ -43,6 +43,8 @@
* @ID_DDR: DDR system clock identifier
* @ID_QSPI: QSPI system clock identifier
*
+ * @ID_MCK_PRES: MCK PRES clock identifier
+ *
* Note: if changing the values of this enums please sync them with
* device tree
*/
@@ -60,7 +62,7 @@
ID_PLL_A_FRAC = 9,
ID_PLL_A_DIV = 10,
- ID_MCK = 11,
+ ID_MCK_DIV = 11,
ID_UTMI = 12,
@@ -73,6 +75,8 @@
ID_DDR = 17,
ID_QSPI = 18,
+ ID_MCK_PRES = 19,
+
ID_MAX,
};
@@ -93,7 +97,8 @@
[ID_MAINCK] = "mainck",
[ID_PLL_U_DIV] = "upll_divpmcck",
[ID_PLL_A_DIV] = "plla_divpmcck",
- [ID_MCK] = "mck",
+ [ID_MCK_PRES] = "mck_pres",
+ [ID_MCK_DIV] = "mck_div",
};
/* Fractional PLL output range. */
@@ -260,10 +265,10 @@
u8 id;
u8 cid;
} sam9x60_systemck[] = {
- { .n = "ddrck", .p = "mck", .id = 2, .cid = ID_DDR, },
+ { .n = "ddrck", .p = "mck_pres", .id = 2, .cid = ID_DDR, },
{ .n = "pck0", .p = "prog0", .id = 8, .cid = ID_PCK0, },
{ .n = "pck1", .p = "prog1", .id = 9, .cid = ID_PCK1, },
- { .n = "qspick", .p = "mck", .id = 19, .cid = ID_QSPI, },
+ { .n = "qspick", .p = "mck_pres", .id = 19, .cid = ID_QSPI, },
};
/**
@@ -508,7 +513,7 @@
clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, sam9x60_plls[i].cid), c);
}
- /* Register MCK clock. */
+ /* Register MCK pres clock. */
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_MAINCK];
p[2] = clk_names[ID_PLL_A_DIV];
@@ -519,25 +524,36 @@
cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV);
prepare_mux_table(clkmuxallocs, clkmuxallocindex, tmpclkmux, cm, 4,
fail);
- c = at91_clk_register_master(base, clk_names[ID_MCK], p, 4, &mck_layout,
- &mck_characteristics, tmpclkmux);
+ c = at91_clk_register_master_pres(base, clk_names[ID_MCK_PRES], p, 4,
+ &mck_layout, &mck_characteristics,
+ tmpclkmux);
+ if (IS_ERR(c)) {
+ ret = PTR_ERR(c);
+ goto fail;
+ }
+ clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_PRES), c);
+
+ /* Register MCK div clock. */
+ c = at91_clk_register_master_div(base, clk_names[ID_MCK_DIV],
+ clk_names[ID_MCK_PRES],
+ &mck_layout, &mck_characteristics);
if (IS_ERR(c)) {
ret = PTR_ERR(c);
goto fail;
}
- clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK), c);
+ clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV), c);
/* Register programmable clocks. */
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_TD_SLCK];
p[2] = clk_names[ID_MAINCK];
- p[3] = clk_names[ID_MCK];
+ p[3] = clk_names[ID_MCK_DIV];
p[4] = clk_names[ID_PLL_A_DIV];
p[5] = clk_names[ID_PLL_U_DIV];
cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
- cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK);
+ cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV);
cm[4] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_A_DIV);
cm[5] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV);
for (i = 0; i < ARRAY_SIZE(sam9x60_prog); i++) {
@@ -572,7 +588,7 @@
for (i = 0; i < ARRAY_SIZE(sam9x60_periphck); i++) {
c = at91_clk_register_sam9x5_peripheral(base, &pcr_layout,
sam9x60_periphck[i].n,
- clk_names[ID_MCK],
+ clk_names[ID_MCK_DIV],
sam9x60_periphck[i].id,
&r);
if (IS_ERR(c)) {
@@ -587,7 +603,7 @@
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_TD_SLCK];
p[2] = clk_names[ID_MAINCK];
- p[3] = clk_names[ID_MCK];
+ p[3] = clk_names[ID_MCK_DIV];
p[4] = clk_names[ID_PLL_A_DIV];
p[5] = clk_names[ID_PLL_U_DIV];
m[0] = 0;
@@ -599,7 +615,7 @@
cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
- cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK);
+ cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV);
cm[4] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_A_DIV);
cm[5] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV);
for (i = 0; i < ARRAY_SIZE(sam9x60_gck); i++) {
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index c0d9271..d1ec3c8 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -44,7 +44,8 @@
* @ID_PLL_ETH_FRAC: Ethernet PLL fractional clock identifier
* @ID_PLL_ETH_DIV: Ethernet PLL divider clock identifier
- * @ID_MCK0: MCK0 clock identifier
+ * @ID_MCK0_PRES: MCK0 PRES clock identifier
+ * @ID_MCK0_DIV: MCK0 DIV clock identifier
* @ID_MCK1: MCK1 clock identifier
* @ID_MCK2: MCK2 clock identifier
* @ID_MCK3: MCK3 clock identifier
@@ -95,7 +96,7 @@
ID_PLL_ETH_FRAC = 20,
ID_PLL_ETH_DIV = 21,
- ID_MCK0 = 22,
+ ID_MCK0_DIV = 22,
ID_MCK1 = 23,
ID_MCK2 = 24,
ID_MCK3 = 25,
@@ -121,6 +122,8 @@
ID_PCK6 = 42,
ID_PCK7 = 43,
+ ID_MCK0_PRES = 44,
+
ID_MAX,
};
@@ -147,7 +150,8 @@
[ID_PLL_AUDIO_DIVPMC] = "audiopll_divpmcck",
[ID_PLL_AUDIO_DIVIO] = "audiopll_diviock",
[ID_PLL_ETH_DIV] = "ethpll_divpmcck",
- [ID_MCK0] = "mck0",
+ [ID_MCK0_DIV] = "mck0_div",
+ [ID_MCK0_PRES] = "mck0_pres",
};
/* Fractional PLL output range. */
@@ -504,7 +508,7 @@
struct clk_range r;
u8 id;
} sama7g5_periphck[] = {
- { .n = "pioA_clk", .p = "mck0", .id = 11, },
+ { .n = "pioA_clk", .p = "mck0_div", .id = 11, },
{ .n = "sfr_clk", .p = "mck1", .id = 19, },
{ .n = "hsmc_clk", .p = "mck1", .id = 21, },
{ .n = "xdmac0_clk", .p = "mck1", .id = 22, },
@@ -514,7 +518,7 @@
{ .n = "aes_clk", .p = "mck1", .id = 27, },
{ .n = "tzaesbasc_clk", .p = "mck1", .id = 28, },
{ .n = "asrc_clk", .p = "mck1", .id = 30, .r = { .max = 200000000, }, },
- { .n = "cpkcc_clk", .p = "mck0", .id = 32, },
+ { .n = "cpkcc_clk", .p = "mck0_div", .id = 32, },
{ .n = "csi_clk", .p = "mck3", .id = 33, .r = { .max = 266000000, }, },
{ .n = "csi2dc_clk", .p = "mck3", .id = 34, .r = { .max = 266000000, }, },
{ .n = "eic_clk", .p = "mck1", .id = 37, },
@@ -1210,7 +1214,7 @@
sama7g5_plls[i].c));
}
- /* Register MCK0 clock. */
+ /* Register MCK0_PRES clock. */
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_MAINCK];
p[2] = clk_names[ID_PLL_CPU_DIV];
@@ -1221,15 +1225,19 @@
cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_SYS_DIV);
prepare_mux_table(clkmuxallocs, clkmuxallocindex, tmpclkmux, cm, 2,
fail);
- clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0),
- at91_clk_register_master(base, clk_names[ID_MCK0], p,
+ clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_PRES),
+ at91_clk_register_master_pres(base, clk_names[ID_MCK0_PRES], p,
4, &mck0_layout, &mck0_characteristics, tmpclkmux));
+ clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_DIV),
+ at91_clk_register_master_div(base, clk_names[ID_MCK0_DIV],
+ clk_names[ID_MCK0_PRES], &mck0_layout, &mck0_characteristics));
+
/* Register MCK1-4 clocks. */
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_TD_SLCK];
p[2] = clk_names[ID_MAINCK];
- p[3] = clk_names[ID_MCK0];
+ p[3] = clk_names[ID_MCK0_DIV];
m[0] = 0;
m[1] = 1;
m[2] = 2;
@@ -1237,7 +1245,7 @@
cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
- cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0);
+ cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_DIV);
for (i = 0; i < ARRAY_SIZE(sama7g5_mckx); i++) {
for (j = 0; j < sama7g5_mckx[i].ep_count; j++) {
p[4 + j] = sama7g5_mckx[i].ep[j];
@@ -1267,7 +1275,7 @@
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_TD_SLCK];
p[2] = clk_names[ID_MAINCK];
- p[3] = clk_names[ID_MCK0];
+ p[3] = clk_names[ID_MCK0_DIV];
p[4] = clk_names[ID_PLL_SYS_DIV];
p[5] = clk_names[ID_PLL_DDR_DIV];
p[6] = clk_names[ID_PLL_IMG_DIV];
@@ -1277,7 +1285,7 @@
cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
- cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0);
+ cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_DIV);
cm[4] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_SYS_DIV);
cm[5] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_DDR_DIV);
cm[6] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_IMG_DIV);
@@ -1315,7 +1323,7 @@
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_TD_SLCK];
p[2] = clk_names[ID_MAINCK];
- p[3] = clk_names[ID_MCK0];
+ p[3] = clk_names[ID_MCK0_DIV];
m[0] = 0;
m[1] = 1;
m[2] = 2;
@@ -1323,7 +1331,7 @@
cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MD_SLCK);
cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_TD_SLCK);
cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAINCK);
- cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0);
+ cm[3] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK0_DIV);
for (i = 0; i < ARRAY_SIZE(sama7g5_gck); i++) {
for (j = 0; j < sama7g5_gck[i].ep_count; j++) {
p[4 + j] = sama7g5_gck[i].ep[j];
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index cea38a4..493018b 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -35,10 +35,9 @@
return (struct clk *)dev_get_uclass_priv(dev);
}
-#if CONFIG_IS_ENABLED(OF_CONTROL)
-# if CONFIG_IS_ENABLED(OF_PLATDATA)
-int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
- struct clk *clk)
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+int clk_get_by_phandle(struct udevice *dev, const struct phandle_1_arg *cells,
+ struct clk *clk)
{
int ret;
@@ -49,7 +48,9 @@
return 0;
}
-# else
+#endif
+
+#if CONFIG_IS_ENABLED(OF_REAL)
static int clk_of_xlate_default(struct clk *clk,
struct ofnode_phandle_args *args)
{
@@ -412,7 +413,7 @@
return clk_get_by_index(dev, index, clk);
}
-# endif /* OF_PLATDATA */
+#endif /* OF_REAL */
int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
{
@@ -465,8 +466,6 @@
return 0;
}
-#endif /* OF_CONTROL */
-
int clk_request(struct udevice *dev, struct clk *clk)
{
const struct clk_ops *ops;
diff --git a/drivers/clk/clk_fixed_factor.c b/drivers/clk/clk_fixed_factor.c
index e51f94a..41b0d9c 100644
--- a/drivers/clk/clk_fixed_factor.c
+++ b/drivers/clk/clk_fixed_factor.c
@@ -40,17 +40,17 @@
static int clk_fixed_factor_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- int err;
- struct clk_fixed_factor *ff = to_clk_fixed_factor(dev);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ int err;
+ struct clk_fixed_factor *ff = to_clk_fixed_factor(dev);
- err = clk_get_by_index(dev, 0, &ff->parent);
- if (err)
- return err;
+ err = clk_get_by_index(dev, 0, &ff->parent);
+ if (err)
+ return err;
- ff->div = dev_read_u32_default(dev, "clock-div", 1);
- ff->mult = dev_read_u32_default(dev, "clock-mult", 1);
-#endif
+ ff->div = dev_read_u32_default(dev, "clock-div", 1);
+ ff->mult = dev_read_u32_default(dev, "clock-mult", 1);
+ }
return 0;
}
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index 325a9b2..e0dc4ab 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -32,9 +32,10 @@
struct clk_fixed_rate *plat)
{
struct clk *clk = &plat->clk;
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- plat->fixed_rate = dev_read_u32_default(dev, "clock-frequency", 0);
-#endif
+ if (CONFIG_IS_ENABLED(OF_REAL))
+ plat->fixed_rate = dev_read_u32_default(dev, "clock-frequency",
+ 0);
+
/* Make fixed rate clock accessible from higher level struct clk */
/* FIXME: This is not allowed */
dev_set_uclass_priv(dev, clk);
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index a49b6f1..617ce0d 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1367,7 +1367,7 @@
return ret;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int px30_gmac_set_parent(struct clk *clk, struct clk *parent)
{
struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -1418,7 +1418,7 @@
static struct clk_ops px30_clk_ops = {
.get_rate = px30_clk_get_rate,
.set_rate = px30_clk_set_rate,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.set_parent = px30_clk_set_parent,
#endif
.enable = px30_clk_enable,
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 1b62d8d..038cb55 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -540,11 +540,11 @@
static int rk3188_clk_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3188_clk_priv *priv = dev_get_priv(dev);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct rk3188_clk_priv *priv = dev_get_priv(dev);
- priv->cru = dev_read_addr_ptr(dev);
-#endif
+ priv->cru = dev_read_addr_ptr(dev);
+ }
return 0;
}
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 221a5bd..3b29992 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -950,18 +950,18 @@
static struct clk_ops rk3288_clk_ops = {
.get_rate = rk3288_clk_get_rate,
.set_rate = rk3288_clk_set_rate,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.set_parent = rk3288_clk_set_parent,
#endif
};
static int rk3288_clk_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3288_clk_priv *priv = dev_get_priv(dev);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct rk3288_clk_priv *priv = dev_get_priv(dev);
- priv->cru = dev_read_addr_ptr(dev);
-#endif
+ priv->cru = dev_read_addr_ptr(dev);
+ }
return 0;
}
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 5248e59..2876643 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -939,7 +939,7 @@
return ret;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int __maybe_unused rk3308_mac_set_parent(struct clk *clk, struct clk *parent)
{
struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -976,7 +976,7 @@
static struct clk_ops rk3308_clk_ops = {
.get_rate = rk3308_clk_get_rate,
.set_rate = rk3308_clk_set_rate,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.set_parent = rk3308_clk_set_parent,
#endif
};
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 780b49c..39caf23 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -158,7 +158,7 @@
}
#endif
-#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
+#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC)
static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id)
{
u32 div, con, con_id, rate;
@@ -470,7 +470,7 @@
case SCLK_SPI0 ... SCLK_SPI2:
rate = rk3368_spi_get_clk(priv->cru, clk->id);
break;
-#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
+#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC)
case HCLK_SDMMC:
case HCLK_EMMC:
rate = rk3368_mmc_get_clk(priv->cru, clk->id);
@@ -501,7 +501,7 @@
ret = rk3368_ddr_set_clk(priv->cru, rate);
break;
#endif
-#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
+#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC)
case HCLK_SDMMC:
case HCLK_EMMC:
ret = rk3368_mmc_set_clk(clk, rate);
@@ -574,7 +574,7 @@
static struct clk_ops rk3368_clk_ops = {
.get_rate = rk3368_clk_get_rate,
.set_rate = rk3368_clk_set_rate,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.set_parent = rk3368_clk_set_parent,
#endif
};
@@ -596,11 +596,11 @@
static int rk3368_clk_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3368_clk_priv *priv = dev_get_priv(dev);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct rk3368_clk_priv *priv = dev_get_priv(dev);
- priv->cru = dev_read_addr_ptr(dev);
-#endif
+ priv->cru = dev_read_addr_ptr(dev);
+ }
return 0;
}
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index f8cbda4..7d31a9f 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1289,7 +1289,7 @@
static struct clk_ops rk3399_clk_ops = {
.get_rate = rk3399_clk_get_rate,
.set_rate = rk3399_clk_set_rate,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.set_parent = rk3399_clk_set_parent,
#endif
.enable = rk3399_clk_enable,
@@ -1402,11 +1402,12 @@
static int rk3399_clk_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3399_clk_priv *priv = dev_get_priv(dev);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct rk3399_clk_priv *priv = dev_get_priv(dev);
- priv->cru = dev_read_addr_ptr(dev);
-#endif
+ priv->cru = dev_read_addr_ptr(dev);
+ }
+
return 0;
}
@@ -1614,11 +1615,12 @@
static int rk3399_pmuclk_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3399_pmuclk_priv *priv = dev_get_priv(dev);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct rk3399_pmuclk_priv *priv = dev_get_priv(dev);
- priv->pmucru = dev_read_addr_ptr(dev);
-#endif
+ priv->pmucru = dev_read_addr_ptr(dev);
+ }
+
return 0;
}
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 9ae188c..8f7703c 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -80,7 +80,6 @@
config SPL_DM_DEVICE_REMOVE
bool "Support device removal in SPL"
depends on SPL_DM
- default n
help
We can save some code space by dropping support for removing a
device. This is not normally required in SPL, so by default this
@@ -107,7 +106,6 @@
config SPL_DM_SEQ_ALIAS
bool "Support numbered aliases in device tree in SPL"
depends on SPL_DM
- default n
help
Most boards will have a '/aliases' node containing the path to
numbered devices (e.g. serial0 = &serial0). This feature can be
@@ -132,7 +130,6 @@
config DM_DMA
bool "Support per-device DMA constraints"
depends on DM
- default n
help
Enable this to extract per-device DMA constraints, only supported on
device-tree systems for now. This is needed in order translate
@@ -274,7 +271,6 @@
config SPL_OF_TRANSLATE
bool "Translate addresses using fdt_translate_address in SPL"
depends on SPL_DM && SPL_OF_CONTROL
- default n
help
If this option is enabled, the reg property will be translated
using the fdt_translate_address() function. This is necessary
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 29668f6..42ba2dc 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -670,7 +670,7 @@
return 0;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
/**
* device_find_by_ofnode() - Return device associated with given ofnode
*
@@ -1074,7 +1074,7 @@
dev->uclass_plat_ = uclass_plat;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
bool device_is_compatible(const struct udevice *dev, const char *compat)
{
return ofnode_device_is_compatible(dev_ofnode(dev), compat);
diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index 4ffbd6b..6dfda20 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -20,7 +20,7 @@
fdt_addr_t devfdt_get_addr_index(const struct udevice *dev, int index)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
fdt_addr_t addr;
if (CONFIG_IS_ENABLED(OF_TRANSLATE)) {
diff --git a/drivers/core/lists.c b/drivers/core/lists.c
index e214306..350b9d3 100644
--- a/drivers/core/lists.c
+++ b/drivers/core/lists.c
@@ -154,7 +154,7 @@
return ret;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
/**
* driver_check_compatible() - Check if a driver matches a compatible string
*
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 701b23e..08705ef 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1103,3 +1103,36 @@
else
return ofnode_write_string(node, "status", "disabled");
}
+
+bool ofnode_conf_read_bool(const char *prop_name)
+{
+ ofnode node;
+
+ node = ofnode_path("/config");
+ if (!ofnode_valid(node))
+ return false;
+
+ return ofnode_read_bool(node, prop_name);
+}
+
+int ofnode_conf_read_int(const char *prop_name, int default_val)
+{
+ ofnode node;
+
+ node = ofnode_path("/config");
+ if (!ofnode_valid(node))
+ return default_val;
+
+ return ofnode_read_u32_default(node, prop_name, default_val);
+}
+
+const char *ofnode_conf_read_str(const char *prop_name)
+{
+ ofnode node;
+
+ node = ofnode_path("/config");
+ if (!ofnode_valid(node))
+ return NULL;
+
+ return ofnode_read_string(node, prop_name);
+}
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 78eee08..fecdcb5 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -245,7 +245,7 @@
return ret;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
/**
* dm_scan_fdt_node() - Scan the device tree and bind drivers for a node
*
@@ -372,7 +372,7 @@
return ret;
}
- if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
ret = dm_extended_scan(pre_reloc_only);
if (ret) {
debug("dm_extended_scan() failed: %d\n", ret);
diff --git a/drivers/core/simple-bus.c b/drivers/core/simple-bus.c
index abc55c2..6022e75 100644
--- a/drivers/core/simple-bus.c
+++ b/drivers/core/simple-bus.c
@@ -65,7 +65,7 @@
.per_device_plat_auto = sizeof(struct simple_bus_plat),
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id generic_simple_bus_ids[] = {
{ .compatible = "simple-bus" },
{ .compatible = "simple-mfd" },
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index cb33fac..25fdb66 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -186,7 +186,7 @@
U_BOOT_DRIVER(generic_syscon) = {
.name = "syscon",
.id = UCLASS_SYSCON,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.of_match = generic_syscon_ids,
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 3146dfd..c5a5095 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -397,7 +397,7 @@
return ret;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
int uclass_find_device_by_phandle(enum uclass_id id, struct udevice *parent,
const char *name, struct udevice **devp)
{
diff --git a/drivers/core/util.c b/drivers/core/util.c
index 5be4ee7..aa60fdd 100644
--- a/drivers/core/util.c
+++ b/drivers/core/util.c
@@ -22,7 +22,7 @@
return count;
}
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
int pci_get_devfn(struct udevice *dev)
{
struct fdt_pci_addr addr;
diff --git a/drivers/cpu/at91_cpu.c b/drivers/cpu/at91_cpu.c
index 9ef1b31..34a3f61 100644
--- a/drivers/cpu/at91_cpu.c
+++ b/drivers/cpu/at91_cpu.c
@@ -70,6 +70,7 @@
static const struct udevice_id at91_cpu_ids[] = {
{ .compatible = "arm,cortex-a7" },
+ { .compatible = "arm,arm926ej-s" },
{ /* Sentinel. */ }
};
diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c
index fe6772b..2e871fe3 100644
--- a/drivers/cpu/cpu_sandbox.c
+++ b/drivers/cpu/cpu_sandbox.c
@@ -38,7 +38,7 @@
return 0;
}
-static const char *cpu_current = "cpu-test1";
+static const char *cpu_current = "cpu@1";
void cpu_sandbox_set_current(const char *name)
{
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 1ea116b..0082177 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -1,5 +1,7 @@
menu "Hardware crypto devices"
+source drivers/crypto/hash/Kconfig
+
source drivers/crypto/fsl/Kconfig
endmenu
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index efbd1d3..4a12b56 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -6,3 +6,4 @@
obj-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.o
obj-y += rsa_mod_exp/
obj-y += fsl/
+obj-y += hash/
diff --git a/drivers/crypto/hash/Kconfig b/drivers/crypto/hash/Kconfig
new file mode 100644
index 0000000..cd29a5c
--- /dev/null
+++ b/drivers/crypto/hash/Kconfig
@@ -0,0 +1,16 @@
+config DM_HASH
+ bool "Enable Driver Model for Hash"
+ depends on DM
+ help
+ If you want to use driver model for Hash, say Y.
+
+config HASH_SOFTWARE
+ bool "Enable driver for Hash in software"
+ depends on DM_HASH
+ depends on MD5
+ depends on SHA1
+ depends on SHA256
+ depends on SHA512_ALGO
+ help
+ Enable driver for hashing operations in software. Currently
+ it support multiple hash algorithm including CRC/MD5/SHA.
diff --git a/drivers/crypto/hash/Makefile b/drivers/crypto/hash/Makefile
new file mode 100644
index 0000000..33d8816
--- /dev/null
+++ b/drivers/crypto/hash/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2021 ASPEED Technology Inc.
+
+obj-$(CONFIG_DM_HASH) += hash-uclass.o
+obj-$(CONFIG_HASH_SOFTWARE) += hash_sw.o
diff --git a/drivers/crypto/hash/hash-uclass.c b/drivers/crypto/hash/hash-uclass.c
new file mode 100644
index 0000000..446eb9e
--- /dev/null
+++ b/drivers/crypto/hash/hash-uclass.c
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 ASPEED Technology Inc.
+ * Author: ChiaWei Wang <chiawei_wang@aspeedtech.com>
+ */
+
+#define LOG_CATEGORY UCLASS_HASH
+
+#include <common.h>
+#include <dm.h>
+#include <asm/global_data.h>
+#include <u-boot/hash.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <linux/list.h>
+
+struct hash_info {
+ char *name;
+ uint32_t digest_size;
+};
+
+static const struct hash_info hash_info[HASH_ALGO_NUM] = {
+ [HASH_ALGO_CRC16_CCITT] = { "crc16-ccitt", 2 },
+ [HASH_ALGO_CRC32] = { "crc32", 4 },
+ [HASH_ALGO_MD5] = { "md5", 16 },
+ [HASH_ALGO_SHA1] = { "sha1", 20 },
+ [HASH_ALGO_SHA256] = { "sha256", 32 },
+ [HASH_ALGO_SHA384] = { "sha384", 48 },
+ [HASH_ALGO_SHA512] = { "sha512", 64},
+};
+
+enum HASH_ALGO hash_algo_lookup_by_name(const char *name)
+{
+ int i;
+
+ if (!name)
+ return HASH_ALGO_INVALID;
+
+ for (i = 0; i < HASH_ALGO_NUM; ++i)
+ if (!strcmp(name, hash_info[i].name))
+ return i;
+
+ return HASH_ALGO_INVALID;
+}
+
+ssize_t hash_algo_digest_size(enum HASH_ALGO algo)
+{
+ if (algo >= HASH_ALGO_NUM)
+ return -EINVAL;
+
+ return hash_info[algo].digest_size;
+}
+
+const char *hash_algo_name(enum HASH_ALGO algo)
+{
+ if (algo >= HASH_ALGO_NUM)
+ return NULL;
+
+ return hash_info[algo].name;
+}
+
+int hash_digest(struct udevice *dev, enum HASH_ALGO algo,
+ const void *ibuf, const uint32_t ilen,
+ void *obuf)
+{
+ struct hash_ops *ops = (struct hash_ops *)device_get_ops(dev);
+
+ if (!ops->hash_digest)
+ return -ENOSYS;
+
+ return ops->hash_digest(dev, algo, ibuf, ilen, obuf);
+}
+
+int hash_digest_wd(struct udevice *dev, enum HASH_ALGO algo,
+ const void *ibuf, const uint32_t ilen,
+ void *obuf, uint32_t chunk_sz)
+{
+ struct hash_ops *ops = (struct hash_ops *)device_get_ops(dev);
+
+ if (!ops->hash_digest_wd)
+ return -ENOSYS;
+
+ return ops->hash_digest_wd(dev, algo, ibuf, ilen, obuf, chunk_sz);
+}
+
+int hash_init(struct udevice *dev, enum HASH_ALGO algo, void **ctxp)
+{
+ struct hash_ops *ops = (struct hash_ops *)device_get_ops(dev);
+
+ if (!ops->hash_init)
+ return -ENOSYS;
+
+ return ops->hash_init(dev, algo, ctxp);
+}
+
+int hash_update(struct udevice *dev, void *ctx, const void *ibuf, const uint32_t ilen)
+{
+ struct hash_ops *ops = (struct hash_ops *)device_get_ops(dev);
+
+ if (!ops->hash_update)
+ return -ENOSYS;
+
+ return ops->hash_update(dev, ctx, ibuf, ilen);
+}
+
+int hash_finish(struct udevice *dev, void *ctx, void *obuf)
+{
+ struct hash_ops *ops = (struct hash_ops *)device_get_ops(dev);
+
+ if (!ops->hash_finish)
+ return -ENOSYS;
+
+ return ops->hash_finish(dev, ctx, obuf);
+}
+
+UCLASS_DRIVER(hash) = {
+ .id = UCLASS_HASH,
+ .name = "hash",
+};
diff --git a/drivers/crypto/hash/hash_sw.c b/drivers/crypto/hash/hash_sw.c
new file mode 100644
index 0000000..fea9d12
--- /dev/null
+++ b/drivers/crypto/hash/hash_sw.c
@@ -0,0 +1,301 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 ASPEED Technology Inc.
+ * Author: ChiaWei Wang <chiawei_wang@aspeedtech.com>
+ */
+#include <config.h>
+#include <common.h>
+#include <dm.h>
+#include <log.h>
+#include <malloc.h>
+#include <watchdog.h>
+#include <u-boot/hash.h>
+#include <u-boot/crc.h>
+#include <u-boot/md5.h>
+#include <u-boot/sha1.h>
+#include <u-boot/sha256.h>
+#include <u-boot/sha512.h>
+
+/* CRC16-CCITT */
+static void hash_init_crc16_ccitt(void *ctx)
+{
+ *((uint16_t *)ctx) = 0;
+}
+
+static void hash_update_crc16_ccitt(void *ctx, const void *ibuf, uint32_t ilen)
+{
+ *((uint16_t *)ctx) = crc16_ccitt(*((uint16_t *)ctx), ibuf, ilen);
+}
+
+static void hash_finish_crc16_ccitt(void *ctx, void *obuf)
+{
+ *((uint16_t *)obuf) = *((uint16_t *)ctx);
+}
+
+/* CRC32 */
+static void hash_init_crc32(void *ctx)
+{
+ *((uint32_t *)ctx) = 0;
+}
+
+static void hash_update_crc32(void *ctx, const void *ibuf, uint32_t ilen)
+{
+ *((uint32_t *)ctx) = crc32(*((uint32_t *)ctx), ibuf, ilen);
+}
+
+static void hash_finish_crc32(void *ctx, void *obuf)
+{
+ *((uint32_t *)obuf) = *((uint32_t *)ctx);
+}
+
+/* MD5 */
+static void hash_init_md5(void *ctx)
+{
+ MD5Init((struct MD5Context *)ctx);
+}
+
+static void hash_update_md5(void *ctx, const void *ibuf, uint32_t ilen)
+{
+ MD5Update((struct MD5Context *)ctx, ibuf, ilen);
+}
+
+static void hash_finish_md5(void *ctx, void *obuf)
+{
+ MD5Final(obuf, (struct MD5Context *)ctx);
+}
+
+/* SHA1 */
+static void hash_init_sha1(void *ctx)
+{
+ sha1_starts((sha1_context *)ctx);
+}
+
+static void hash_update_sha1(void *ctx, const void *ibuf, uint32_t ilen)
+{
+ sha1_update((sha1_context *)ctx, ibuf, ilen);
+}
+
+static void hash_finish_sha1(void *ctx, void *obuf)
+{
+ sha1_finish((sha1_context *)ctx, obuf);
+}
+
+/* SHA256 */
+static void hash_init_sha256(void *ctx)
+{
+ sha256_starts((sha256_context *)ctx);
+}
+
+static void hash_update_sha256(void *ctx, const void *ibuf, uint32_t ilen)
+{
+ sha256_update((sha256_context *)ctx, ibuf, ilen);
+}
+
+static void hash_finish_sha256(void *ctx, void *obuf)
+{
+ sha256_finish((sha256_context *)ctx, obuf);
+}
+
+/* SHA384 */
+static void hash_init_sha384(void *ctx)
+{
+ sha384_starts((sha512_context *)ctx);
+}
+
+static void hash_update_sha384(void *ctx, const void *ibuf, uint32_t ilen)
+{
+ sha384_update((sha512_context *)ctx, ibuf, ilen);
+}
+
+static void hash_finish_sha384(void *ctx, void *obuf)
+{
+ sha384_finish((sha512_context *)ctx, obuf);
+}
+
+/* SHA512 */
+static void hash_init_sha512(void *ctx)
+{
+ sha512_starts((sha512_context *)ctx);
+}
+
+static void hash_update_sha512(void *ctx, const void *ibuf, uint32_t ilen)
+{
+ sha512_update((sha512_context *)ctx, ibuf, ilen);
+}
+
+static void hash_finish_sha512(void *ctx, void *obuf)
+{
+ sha512_finish((sha512_context *)ctx, obuf);
+}
+
+struct sw_hash_ctx {
+ enum HASH_ALGO algo;
+ uint8_t algo_ctx[];
+};
+
+struct sw_hash_impl {
+ void (*init)(void *ctx);
+ void (*update)(void *ctx, const void *ibuf, uint32_t ilen);
+ void (*finish)(void *ctx, void *obuf);
+ uint32_t ctx_alloc_sz;
+};
+
+static struct sw_hash_impl sw_hash_impl[HASH_ALGO_NUM] = {
+ [HASH_ALGO_CRC16_CCITT] = {
+ .init = hash_init_crc16_ccitt,
+ .update = hash_update_crc16_ccitt,
+ .finish = hash_finish_crc16_ccitt,
+ .ctx_alloc_sz = sizeof(uint16_t),
+ },
+
+ [HASH_ALGO_CRC32] = {
+ .init = hash_init_crc32,
+ .update = hash_update_crc32,
+ .finish = hash_finish_crc32,
+ .ctx_alloc_sz = sizeof(uint32_t),
+ },
+
+ [HASH_ALGO_MD5] = {
+ .init = hash_init_md5,
+ .update = hash_update_md5,
+ .finish = hash_finish_md5,
+ .ctx_alloc_sz = sizeof(struct MD5Context),
+ },
+
+ [HASH_ALGO_SHA1] = {
+ .init = hash_init_sha1,
+ .update = hash_update_sha1,
+ .finish = hash_finish_sha1,
+ .ctx_alloc_sz = sizeof(sha1_context),
+ },
+
+ [HASH_ALGO_SHA256] = {
+ .init = hash_init_sha256,
+ .update = hash_update_sha256,
+ .finish = hash_finish_sha256,
+ .ctx_alloc_sz = sizeof(sha256_context),
+ },
+
+ [HASH_ALGO_SHA384] = {
+ .init = hash_init_sha384,
+ .update = hash_update_sha384,
+ .finish = hash_finish_sha384,
+ .ctx_alloc_sz = sizeof(sha512_context),
+ },
+
+ [HASH_ALGO_SHA512] = {
+ .init = hash_init_sha512,
+ .update = hash_update_sha512,
+ .finish = hash_finish_sha512,
+ .ctx_alloc_sz = sizeof(sha512_context),
+ },
+};
+
+static int sw_hash_init(struct udevice *dev, enum HASH_ALGO algo, void **ctxp)
+{
+ struct sw_hash_ctx *hash_ctx;
+ struct sw_hash_impl *hash_impl = &sw_hash_impl[algo];
+
+ hash_ctx = malloc(sizeof(hash_ctx->algo) + hash_impl->ctx_alloc_sz);
+ if (!hash_ctx)
+ return -ENOMEM;
+
+ hash_ctx->algo = algo;
+
+ hash_impl->init(hash_ctx->algo_ctx);
+
+ *ctxp = hash_ctx;
+
+ return 0;
+}
+
+static int sw_hash_update(struct udevice *dev, void *ctx, const void *ibuf, uint32_t ilen)
+{
+ struct sw_hash_ctx *hash_ctx = ctx;
+ struct sw_hash_impl *hash_impl = &sw_hash_impl[hash_ctx->algo];
+
+ hash_impl->update(hash_ctx->algo_ctx, ibuf, ilen);
+
+ return 0;
+}
+
+static int sw_hash_finish(struct udevice *dev, void *ctx, void *obuf)
+{
+ struct sw_hash_ctx *hash_ctx = ctx;
+ struct sw_hash_impl *hash_impl = &sw_hash_impl[hash_ctx->algo];
+
+ hash_impl->finish(hash_ctx->algo_ctx, obuf);
+
+ free(ctx);
+
+ return 0;
+}
+
+static int sw_hash_digest_wd(struct udevice *dev, enum HASH_ALGO algo,
+ const void *ibuf, const uint32_t ilen,
+ void *obuf, uint32_t chunk_sz)
+{
+ int rc;
+ void *ctx;
+ const void *cur, *end;
+ uint32_t chunk;
+
+ rc = sw_hash_init(dev, algo, &ctx);
+ if (rc)
+ return rc;
+
+ if (CONFIG_IS_ENABLED(HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) {
+ cur = ibuf;
+ end = ibuf + ilen;
+
+ while (cur < end) {
+ chunk = end - cur;
+ if (chunk > chunk_sz)
+ chunk = chunk_sz;
+
+ rc = sw_hash_update(dev, ctx, cur, chunk);
+ if (rc)
+ return rc;
+
+ cur += chunk;
+ WATCHDOG_RESET();
+ }
+ } else {
+ rc = sw_hash_update(dev, ctx, ibuf, ilen);
+ if (rc)
+ return rc;
+ }
+
+ rc = sw_hash_finish(dev, ctx, obuf);
+ if (rc)
+ return rc;
+
+ return 0;
+}
+
+static int sw_hash_digest(struct udevice *dev, enum HASH_ALGO algo,
+ const void *ibuf, const uint32_t ilen,
+ void *obuf)
+{
+ /* re-use the watchdog version with input length as the chunk_sz */
+ return sw_hash_digest_wd(dev, algo, ibuf, ilen, obuf, ilen);
+}
+
+static const struct hash_ops hash_ops_sw = {
+ .hash_init = sw_hash_init,
+ .hash_update = sw_hash_update,
+ .hash_finish = sw_hash_finish,
+ .hash_digest_wd = sw_hash_digest_wd,
+ .hash_digest = sw_hash_digest,
+};
+
+U_BOOT_DRIVER(hash_sw) = {
+ .name = "hash_sw",
+ .id = UCLASS_HASH,
+ .ops = &hash_ops_sw,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+U_BOOT_DRVINFO(hash_sw) = {
+ .name = "hash_sw",
+};
diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig
index d4b393d..eec9d48 100644
--- a/drivers/ddr/Kconfig
+++ b/drivers/ddr/Kconfig
@@ -1,2 +1,34 @@
+choice
+ prompt "Method to determine DDR clock frequency"
+ default STATIC_DDR_CLK_FREQ
+ depends on ARCH_P1010 || ARCH_P1020 || ARCH_P2020 || ARCH_T1024 \
+ || ARCH_T1042 || ARCH_T2080 || ARCH_T4240 || ARCH_LS1021A \
+ || FSL_LSCH2 || FSL_LSCH3 || TARGET_KMCENT2
+ help
+ The DDR clock frequency can either be defined statically now at
+ build time, or can be determined at run-time via the
+ get_board_ddr_clk function.
+
+config DYNAMIC_DDR_CLK_FREQ
+ bool "Run-time DDR clock frequency"
+
+config STATIC_DDR_CLK_FREQ
+ bool "Build-time static DDR clock frequency"
+
+endchoice
+
+config DDR_CLK_FREQ
+ int "DDR clock frequency in Hz"
+ depends on STATIC_DDR_CLK_FREQ
+ default 100000000
+ help
+ The DDR clock frequency, specified in Hz.
+
+config DDR_SPD
+ bool "JEDEC Serial Presence Detect (SPD) support"
+ help
+ For memory controllers that can utilize it, add enable support for
+ using the JEDEC SDP standard.
+
source "drivers/ddr/altera/Kconfig"
source "drivers/ddr/imx/Kconfig"
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index 8246f62..fe3d6fc 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -10,6 +10,8 @@
help
Select Freescale Multi Mode DDR controller (MMDC).
+if SYS_FSL_DDR || SYS_FSL_MMDC
+
config SYS_FSL_DDR_BE
bool
help
@@ -116,28 +118,51 @@
config SYS_FSL_DDR4
bool "Freescale DDR4 controller"
depends on SYS_FSL_HAS_DDR4
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN4
config SYS_FSL_DDR3
bool "Freescale DDR3 controller"
depends on SYS_FSL_HAS_DDR3
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN3 if PPC
select SYS_FSL_DDRC_ARM_GEN3 if ARM
config SYS_FSL_DDR2
bool "Freescale DDR2 controller"
depends on SYS_FSL_HAS_DDR2
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3)
config SYS_FSL_DDR1
bool "Freescale DDR1 controller"
depends on SYS_FSL_HAS_DDR1
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN1
endchoice
endmenu
+config FSL_DMA
+ def_bool y if DDR_ECC && MPC85xx && !ECC_INIT_VIA_DDRCONTROLLER
+
+config DDR_ECC
+ bool "ECC DDR memory support"
+
+config DDR_ECC_CMD
+ bool "Access the ECC features of the memory controller"
+ depends on DDR_ECC && MPC83xx
+ default y
+
+config ECC_INIT_VIA_DDRCONTROLLER
+ bool "DDR Memory controller initializes memory."
+ help
+ Use the DDR controller to auto initialize memory. If not enabled,
+ the DMA controller is responsible for doing this.
+
+endif
+
config SYS_FSL_ERRATUM_A008378
bool
diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
index 270691e..970651f 100644
--- a/drivers/ddr/marvell/axp/ddr3_axp.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp.h
@@ -19,10 +19,10 @@
#define FAR_END_DIMM_ADDR 0x50
#define MAX_DIMM_ADDR 0x60
-#ifndef CONFIG_DDR_FIXED_SIZE
+#ifndef CONFIG_SYS_SDRAM_SIZE
#define SDRAM_CS_SIZE 0xFFFFFFF
#else
-#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
+#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
#endif
#define SDRAM_CS_BASE 0x0
#define SDRAM_DIMM_SIZE 0x80000000
diff --git a/drivers/ddr/marvell/axp/ddr3_axp_config.h b/drivers/ddr/marvell/axp/ddr3_axp_config.h
index 10d064d..437a02e 100644
--- a/drivers/ddr/marvell/axp/ddr3_axp_config.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp_config.h
@@ -16,11 +16,7 @@
* Level 3: Provides the windows margin of each DQ as a results of DQS
* centeralization
*/
-#ifdef CONFIG_DDR_LOG_LEVEL
#define DDR3_LOG_LEVEL CONFIG_DDR_LOG_LEVEL
-#else
-#define DDR3_LOG_LEVEL 0
-#endif
#define DDR3_PBS 1
diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig
index b505474..48e41bc 100644
--- a/drivers/dfu/Kconfig
+++ b/drivers/dfu/Kconfig
@@ -16,7 +16,6 @@
if DFU
config DFU_WRITE_ALT
bool
- default n
config DFU_TFTP
bool "DFU via TFTP"
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 1993c1d..9cacea8 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -35,19 +35,40 @@
This driver support data transfer from devices to
memory and from memory to devices.
+config DMA_LPC32XX
+ bool "LPC32XX DMA driver"
+ select DMA_LEGACY
+ help
+ Enable some legacy DMA code for lpc32xx. It provides some direct
+ functions likes lpc32xx_dma_wait_status() which can be called from
+ other code.
+
+ This should be converted to use driver model and UCLASS_DMA.
+
config TI_EDMA3
bool "TI EDMA3 driver"
+ select DMA_LEGACY
help
Enable the TI EDMA3 driver for DRA7xx and AM43xx evms.
This driver support data transfer between memory
regions.
+config TI_KSNAV
+ bool "TI Keystone Navigator DMA driver"
+ depends on ARCH_KEYSTONE
+ default y
+ select DMA_LEGACY
+ help
+ Enable the Keystone Navigator driver for Keystone 2 platforms.
+
config APBH_DMA
bool "Support APBH DMA"
depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M
+ select DMA_LEGACY
help
Enable APBH DMA driver.
+
if APBH_DMA
config APBH_DMA_BURST
bool "Enable DMA BURST"
@@ -57,6 +78,15 @@
endif
+config DMA_LEGACY
+ bool "Legacy DMA support"
+ default y if FSLDMAFEC
+ help
+ Enable legacy DMA support. This does not use driver model and should
+ be migrated to the new API.
+
+ It is required for some PowerPC boards.
+
source "drivers/dma/ti/Kconfig"
endmenu # menu "DMA Support"
diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c
index b7eddf0..1864b5d 100644
--- a/drivers/dma/fsl_dma.c
+++ b/drivers/dma/fsl_dma.c
@@ -130,11 +130,9 @@
/*
* 85xx/86xx use dma to initialize SDRAM when !CONFIG_ECC_INIT_VIA_DDRCONTROLLER
- * while 83xx uses dma to initialize SDRAM when CONFIG_DDR_ECC_INIT_VIA_DMA
*/
#if ((!defined CONFIG_MPC83xx && defined(CONFIG_DDR_ECC) && \
- !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)) || \
- (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)))
+ !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)))
void dma_meminit(uint val, uint size)
{
uint *p = 0;
diff --git a/drivers/dma/keystone_nav.c b/drivers/dma/keystone_nav.c
index 443e4b2..9a5ba79 100644
--- a/drivers/dma/keystone_nav.c
+++ b/drivers/dma/keystone_nav.c
@@ -11,20 +11,20 @@
#include <linux/delay.h>
struct qm_config qm_memmap = {
- .stat_cfg = CONFIG_KSNAV_QM_QUEUE_STATUS_BASE,
- .queue = (void *)CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE,
- .mngr_vbusm = CONFIG_KSNAV_QM_BASE_ADDRESS,
- .i_lram = CONFIG_KSNAV_QM_LINK_RAM_BASE,
- .proxy = (void *)CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE,
- .status_ram = CONFIG_KSNAV_QM_STATUS_RAM_BASE,
- .mngr_cfg = (void *)CONFIG_KSNAV_QM_CONF_BASE,
- .intd_cfg = CONFIG_KSNAV_QM_INTD_CONF_BASE,
- .desc_mem = (void *)CONFIG_KSNAV_QM_DESC_SETUP_BASE,
- .region_num = CONFIG_KSNAV_QM_REGION_NUM,
- .pdsp_cmd = CONFIG_KSNAV_QM_PDSP1_CMD_BASE,
- .pdsp_ctl = CONFIG_KSNAV_QM_PDSP1_CTRL_BASE,
- .pdsp_iram = CONFIG_KSNAV_QM_PDSP1_IRAM_BASE,
- .qpool_num = CONFIG_KSNAV_QM_QPOOL_NUM,
+ .stat_cfg = KS2_QM_QUEUE_STATUS_BASE,
+ .queue = (void *)KS2_QM_MANAGER_QUEUES_BASE,
+ .mngr_vbusm = KS2_QM_BASE_ADDRESS,
+ .i_lram = KS2_QM_LINK_RAM_BASE,
+ .proxy = (void *)KS2_QM_MANAGER_Q_PROXY_BASE,
+ .status_ram = KS2_QM_STATUS_RAM_BASE,
+ .mngr_cfg = (void *)KS2_QM_CONF_BASE,
+ .intd_cfg = KS2_QM_INTD_CONF_BASE,
+ .desc_mem = (void *)KS2_QM_DESC_SETUP_BASE,
+ .region_num = KS2_QM_REGION_NUM,
+ .pdsp_cmd = KS2_QM_PDSP1_CMD_BASE,
+ .pdsp_ctl = KS2_QM_PDSP1_CTRL_BASE,
+ .pdsp_iram = KS2_QM_PDSP1_IRAM_BASE,
+ .qpool_num = KS2_QM_QPOOL_NUM,
};
/*
@@ -252,7 +252,7 @@
writel(0, &pktdma->global->emulation_control);
/* Set QM base address, only for K2x devices */
- writel(CONFIG_KSNAV_QM_BASE_ADDRESS, &pktdma->global->qm_base_addr[0]);
+ writel(KS2_QM_BASE_ADDRESS, &pktdma->global->qm_base_addr[0]);
/* Enable all channels. The current state isn't important */
for (j = 0; j < pktdma->tx_ch_num; j++) {
diff --git a/drivers/dma/keystone_nav_cfg.c b/drivers/dma/keystone_nav_cfg.c
index 9a64801..301419b 100644
--- a/drivers/dma/keystone_nav_cfg.c
+++ b/drivers/dma/keystone_nav_cfg.c
@@ -8,19 +8,17 @@
#include <asm/ti-common/keystone_nav.h>
-#ifdef CONFIG_KSNAV_PKTDMA_NETCP
/* NETCP Pktdma */
struct pktdma_cfg netcp_pktdma = {
- .global = (void *)CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE,
- .tx_ch = (void *)CONFIG_KSNAV_NETCP_PDMA_TX_BASE,
- .tx_ch_num = CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM,
- .rx_ch = (void *)CONFIG_KSNAV_NETCP_PDMA_RX_BASE,
- .rx_ch_num = CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM,
- .tx_sched = (u32 *)CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE,
- .rx_flows = (void *)CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE,
- .rx_flow_num = CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM,
- .rx_free_q = CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE,
- .rx_rcv_q = CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE,
- .tx_snd_q = CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE,
+ .global = (void *)KS2_NETCP_PDMA_CTRL_BASE,
+ .tx_ch = (void *)KS2_NETCP_PDMA_TX_BASE,
+ .tx_ch_num = KS2_NETCP_PDMA_TX_CH_NUM,
+ .rx_ch = (void *)KS2_NETCP_PDMA_RX_BASE,
+ .rx_ch_num = KS2_NETCP_PDMA_RX_CH_NUM,
+ .tx_sched = (u32 *)KS2_NETCP_PDMA_SCHED_BASE,
+ .rx_flows = (void *)KS2_NETCP_PDMA_RX_FLOW_BASE,
+ .rx_flow_num = KS2_NETCP_PDMA_RX_FLOW_NUM,
+ .rx_free_q = KS2_NETCP_PDMA_RX_FREE_QUEUE,
+ .rx_rcv_q = KS2_NETCP_PDMA_RX_RCV_QUEUE,
+ .tx_snd_q = KS2_NETCP_PDMA_TX_SND_QUEUE,
};
-#endif
diff --git a/drivers/dma/ti/Kconfig b/drivers/dma/ti/Kconfig
index 9cbd5f3..87c026e 100644
--- a/drivers/dma/ti/Kconfig
+++ b/drivers/dma/ti/Kconfig
@@ -9,7 +9,6 @@
select TI_K3_NAVSS_RINGACC
select TI_K3_NAVSS_PSILCFG
select TI_K3_PSIL
- default n
help
Support for UDMA used in K3 devices.
endif
diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
index 2d1836a..d5e4a02 100644
--- a/drivers/fastboot/Kconfig
+++ b/drivers/fastboot/Kconfig
@@ -74,7 +74,6 @@
config FASTBOOT_UUU_SUPPORT
bool "Enable FASTBOOT i.MX UUU special command"
- default n
help
The fastboot protocol includes "UCmd" and "ACmd" command.
Be aware that you provide full access to any U-Boot command,
diff --git a/drivers/firmware/firmware-uclass.c b/drivers/firmware/firmware-uclass.c
index bfaf283..e83a147 100644
--- a/drivers/firmware/firmware-uclass.c
+++ b/drivers/firmware/firmware-uclass.c
@@ -9,7 +9,7 @@
UCLASS_DRIVER(firmware) = {
.id = UCLASS_FIRMWARE,
.name = "firmware",
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index e37ac9f..f0439e2 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -2,7 +2,19 @@
# GPIO infrastructure and drivers
#
-menu "GPIO Support"
+menuconfig GPIO
+ bool "GPIO support"
+ default y
+ help
+ Enable support for GPIOs (General-purpose Input/Output) in U-Boot.
+ GPIOs allow U-Boot to read the state of an input line (high or
+ low) and set the state of an output line. This can be used to
+ drive LEDs, control power to various system parts and read user
+ input. GPIOs can be useful to enable a 'sign-of-life' LED,
+ for example. Enable this option to build the drivers in
+ drivers/gpio as part of an U-Boot build.
+
+if GPIO
config DM_GPIO
bool "Enable Driver Model for GPIO drivers"
@@ -39,7 +51,6 @@
config GPIO_HOG
bool "Enable GPIO hog support"
depends on DM_GPIO
- default n
help
Enable gpio hog support
The GPIO chip may contain GPIO hog definitions. GPIO hogging
@@ -91,13 +102,11 @@
config DWAPB_GPIO
bool "DWAPB GPIO driver"
depends on DM && DM_GPIO
- default n
help
Support for the Designware APB GPIO driver.
config AT91_GPIO
bool "AT91 PIO GPIO driver"
- default n
help
Say yes here to select AT91 PIO GPIO driver. AT91 PIO
controller manages up to 32 fully programmable input/output
@@ -110,7 +119,6 @@
config ATMEL_PIO4
bool "ATMEL PIO4 driver"
depends on DM_GPIO
- default n
help
Say yes here to support the Atmel PIO4 driver.
The PIO4 is new version of Atmel PIO controller, which manages
@@ -150,13 +158,11 @@
config IMX_RGPIO2P
bool "i.MX7ULP RGPIO2P driver"
depends on DM
- default n
help
This driver supports i.MX7ULP Rapid GPIO2P controller.
config IPROC_GPIO
bool "Broadcom iProc GPIO driver(without pinconf)"
- default n
help
The Broadcom iProc based SoCs- Cygnus, NS2, NS3, NSP and Stingray,
use the same GPIO Controller IP hence this driver could be used
@@ -168,14 +174,12 @@
config HSDK_CREG_GPIO
bool "HSDK CREG GPIO griver"
depends on DM_GPIO
- default n
help
This driver supports CREG GPIOs on Synopsys HSDK SOC.
config LPC32XX_GPIO
bool "LPC32XX GPIO driver"
depends on DM
- default n
help
Support for the LPC32XX GPIO driver.
@@ -203,7 +207,6 @@
config MSM_GPIO
bool "Qualcomm GPIO driver"
depends on DM_GPIO
- default n
help
Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
This controller have single bank (default name "soc"), every
@@ -345,7 +348,6 @@
config VYBRID_GPIO
bool "Vybrid GPIO driver"
depends on DM
- default n
help
Say yes here to support Vybrid vf610 GPIOs.
@@ -513,4 +515,4 @@
into a number of banks each with 32 GPIOs. The GPIOs for a device are
defined in the device tree with one node for each bank.
-endmenu
+endif
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 58f4704..1891748 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -33,7 +33,7 @@
obj-$(CONFIG_RCAR_GPIO) += gpio-rcar.o
obj-$(CONFIG_RZA1_GPIO) += gpio-rza1.o
obj-$(CONFIG_S5P) += s5p_gpio.o
-obj-$(CONFIG_SANDBOX_GPIO) += sandbox.o
+obj-$(CONFIG_SANDBOX_GPIO) += sandbox.o sandbox_test.o
obj-$(CONFIG_TEGRA_GPIO) += tegra_gpio.o
obj-$(CONFIG_TEGRA186_GPIO) += tegra186_gpio.o
obj-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
@@ -62,7 +62,7 @@
obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o
obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o
-obj-$(CONFIG_PM8916_GPIO) += pm8916_gpio.o
+obj-$(CONFIG_$(SPL_TPL_)PM8916_GPIO) += pm8916_gpio.o
obj-$(CONFIG_MT7620_GPIO) += mt7620_gpio.o
obj-$(CONFIG_MT7621_GPIO) += mt7621_gpio.o
obj-$(CONFIG_MSCC_SGPIO) += mscc_sgpio.o
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
index 8c77777..bb2f232 100644
--- a/drivers/gpio/gpio-uclass.c
+++ b/drivers/gpio/gpio-uclass.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <dm.h>
+#include <dt-structs.h>
#include <log.h>
#include <dm/devres.h>
#include <dm/device_compat.h>
@@ -231,7 +232,7 @@
return gpio_xlate_offs_flags(desc->dev, desc, args);
}
-#if defined(CONFIG_GPIO_HOG)
+#if CONFIG_IS_ENABLED(GPIO_HOG)
struct gpio_hog_priv {
struct gpio_desc gpiod;
@@ -1137,7 +1138,7 @@
return ret;
}
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int _gpio_request_by_name_nodev(ofnode node, const char *list_name,
int index, struct gpio_desc *desc,
int flags, bool add_index)
@@ -1226,6 +1227,27 @@
}
#endif /* OF_PLATDATA */
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+int gpio_request_by_phandle(struct udevice *dev,
+ const struct phandle_2_arg *cells,
+ struct gpio_desc *desc, int flags)
+{
+ struct ofnode_phandle_args args;
+ struct udevice *gpio_dev;
+ const int index = 0;
+ int ret;
+
+ ret = device_get_by_ofplat_idx(cells->idx, &gpio_dev);
+ if (ret)
+ return ret;
+ args.args[0] = cells->arg[0];
+ args.args[1] = cells->arg[1];
+
+ return gpio_request_tail(ret, NULL, &args, NULL, index, desc, flags,
+ index > 0, gpio_dev);
+}
+#endif
+
int dm_gpio_free(struct udevice *dev, struct gpio_desc *desc)
{
/* For now, we don't do any checking of dev */
@@ -1430,7 +1452,7 @@
}
#endif
- if (IS_ENABLED(CONFIG_GPIO_HOG)) {
+ if (CONFIG_IS_ENABLED(OF_REAL) && IS_ENABLED(CONFIG_GPIO_HOG)) {
dev_for_each_subnode(node, dev) {
if (ofnode_read_bool(node, "gpio-hog")) {
const char *name = ofnode_get_name(node);
diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c
index f15ce7b..4a3ec6d 100644
--- a/drivers/gpio/intel_gpio.c
+++ b/drivers/gpio/intel_gpio.c
@@ -204,7 +204,7 @@
#endif
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id intel_intel_gpio_ids[] = {
{ .compatible = "intel,gpio" },
{ }
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index 7b9d88a..1356f89 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -262,7 +262,7 @@
return 0;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int mxs_of_to_plat(struct udevice *dev)
{
struct mxs_gpio_plat *plat = dev_get_plat(dev);
@@ -301,7 +301,7 @@
.probe = mxs_gpio_probe,
.priv_auto = sizeof(struct mxs_gpio_priv),
.plat_auto = sizeof(struct mxs_gpio_plat),
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = mxs_gpio_ids,
.of_to_plat = mxs_of_to_plat,
#endif
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index 316a28e..50c4f75 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -336,7 +336,7 @@
}
#endif
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id omap_gpio_ids[] = {
{ .compatible = "ti,omap3-gpio" },
{ .compatible = "ti,omap4-gpio" },
@@ -362,7 +362,7 @@
.name = "gpio_omap",
.id = UCLASS_GPIO,
#if CONFIG_IS_ENABLED(OF_CONTROL)
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = omap_gpio_ids,
.of_to_plat = of_match_ptr(omap_gpio_of_to_plat),
.plat_auto = sizeof(struct omap_gpio_plat),
diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c
index d008fdd..106b2a7 100644
--- a/drivers/gpio/sandbox.c
+++ b/drivers/gpio/sandbox.c
@@ -323,11 +323,13 @@
static int sandbox_gpio_of_to_plat(struct udevice *dev)
{
- struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- uc_priv->gpio_count = dev_read_u32_default(dev, "sandbox,gpio-count",
- 0);
- uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
+ uc_priv->gpio_count =
+ dev_read_u32_default(dev, "sandbox,gpio-count", 0);
+ uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
+ }
return 0;
}
@@ -371,6 +373,8 @@
DM_DRIVER_ALIAS(sandbox_gpio, sandbox_gpio_alias)
+#if CONFIG_IS_ENABLED(PINCTRL)
+
/* pincontrol: used only to check GPIO pin configuration (pinmux command) */
struct sb_pinctrl_priv {
@@ -579,3 +583,5 @@
.priv_auto = sizeof(struct sb_pinctrl_priv),
ACPI_OPS_PTR(&pinctrl_sandbox_acpi_ops)
};
+
+#endif /* PINCTRL */
diff --git a/drivers/gpio/sandbox_test.c b/drivers/gpio/sandbox_test.c
new file mode 100644
index 0000000..c76e199
--- /dev/null
+++ b/drivers/gpio/sandbox_test.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Sandbox driver for testing GPIOs with of-platdata
+ *
+ * Copyright 2021 Google LLC
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm-generic/gpio.h>
+
+static const struct udevice_id sandbox_gpio_test_ids[] = {
+ { .compatible = "sandbox,gpio-test" },
+ { }
+};
+
+U_BOOT_DRIVER(sandbox_gpio_test) = {
+ .name = "sandbox_gpio_test",
+ .id = UCLASS_MISC,
+ .of_match = sandbox_gpio_test_ids,
+};
diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index 5d3af8a..e00f104 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -23,8 +23,8 @@
#include <dm/device-internal.h>
#include <dt-bindings/gpio/gpio.h>
-static const int CONFIG_SFIO = 0;
-static const int CONFIG_GPIO = 1;
+static const int CFG_SFIO = 0;
+static const int CFG_GPIO = 1;
static const int DIRECTION_INPUT = 0;
static const int DIRECTION_OUTPUT = 1;
@@ -54,7 +54,7 @@
debug("get_config: port = %d, bit = %d is %s\n",
GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
- return type ? CONFIG_GPIO : CONFIG_SFIO;
+ return type ? CFG_GPIO : CFG_SFIO;
}
/* Config pin 'gpio' as GPIO or SFIO, based on 'type' */
@@ -68,7 +68,7 @@
GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
- if (type != CONFIG_SFIO)
+ if (type != CFG_SFIO)
u |= 1 << GPIO_BIT(gpio);
else
u &= ~(1 << GPIO_BIT(gpio));
@@ -216,7 +216,7 @@
set_direction(config[i].gpio, DIRECTION_OUTPUT);
break;
}
- set_config(config[i].gpio, CONFIG_GPIO);
+ set_config(config[i].gpio, CFG_GPIO);
}
}
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 63d03a3..57cac44 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -47,6 +47,35 @@
device (bus child) info is kept as parent platdata. The interface
is defined in include/i2c.h.
+config SYS_I2C_LEGACY
+ bool "Enable legacy I2C subsystem and drivers"
+ depends on !DM_I2C
+ help
+ Enable the legacy I2C subsystem and drivers. While this is
+ deprecated in U-Boot itself, this can be useful in some situations
+ in SPL or TPL.
+
+config SPL_SYS_I2C_LEGACY
+ bool "Enable legacy I2C subsystem and drivers in SPL"
+ depends on SUPPORT_SPL && !SPL_DM_I2C
+ help
+ Enable the legacy I2C subsystem and drivers in SPL. This is useful
+ in some size constrained situations.
+
+config TPL_SYS_I2C_LEGACY
+ bool "Enable legacy I2C subsystem and drivers in TPL"
+ depends on SUPPORT_TPL && !SPL_DM_I2C
+ help
+ Enable the legacy I2C subsystem and drivers in TPL. This is useful
+ in some size constrained situations.
+
+config SYS_I2C_EARLY_INIT
+ bool "Enable legacy I2C subsystem early in boot"
+ depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
+ help
+ Add the function prototype for i2c_early_init_f which is called in
+ board_early_init_f.
+
config I2C_CROS_EC_TUNNEL
tristate "Chrome OS EC tunnel I2C bus"
depends on CROS_EC
@@ -124,11 +153,36 @@
config SYS_I2C_FSL
bool "Freescale I2C bus driver"
- depends on DM_I2C
help
Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
MPC85xx processors.
+if SYS_I2C_FSL && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
+config SYS_FSL_I2C_OFFSET
+ hex "Offset from the IMMR of the address of the first I2C controller"
+
+config SYS_FSL_HAS_I2C2_OFFSET
+ bool "Support a second I2C controller"
+
+config SYS_FSL_I2C2_OFFSET
+ hex "Offset from the IMMR of the address of the second I2C controller"
+ depends on SYS_FSL_HAS_I2C2_OFFSET
+
+config SYS_FSL_HAS_I2C3_OFFSET
+ bool "Support a third I2C controller"
+
+config SYS_FSL_I2C3_OFFSET
+ hex "Offset from the IMMR of the address of the third I2C controller"
+ depends on SYS_FSL_HAS_I2C3_OFFSET
+
+config SYS_FSL_HAS_I2C4_OFFSET
+ bool "Support a fourth I2C controller"
+
+config SYS_FSL_I2C4_OFFSET
+ hex "Offset from the IMMR of the address of the fourth I2C controller"
+ depends on SYS_FSL_HAS_I2C4_OFFSET
+endif
+
config SYS_I2C_CADENCE
tristate "Cadence I2C Controller"
depends on DM_I2C
@@ -139,7 +193,6 @@
config SYS_I2C_CA
tristate "Cortina-Access I2C Controller"
depends on DM_I2C && CORTINA_PLATFORM
- default n
help
Add support for the Cortina Access I2C host controller.
Say yes here to select Cortina-Access I2C Host Controller.
@@ -152,7 +205,6 @@
config SYS_I2C_DW
bool "Designware I2C Controller"
- default n
help
Say yes here to select the Designware I2C Host Controller. This
controller is used in various SoCs, e.g. the ST SPEAr, Altera
@@ -205,10 +257,7 @@
channels and operating on standard mode up to 100 kbits/s and fast
mode up to 400 kbits/s.
-# These settings are not used with DM_I2C, however SPL doesn't use
-# DM_I2C even if DM_I2C is enabled, and so might use these settings even
-# when main u-boot does not!
-if SYS_I2C_MXC && (!DM_I2C || SPL)
+if SYS_I2C_MXC && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
config SYS_I2C_MXC_I2C1
bool "NXP MXC I2C1"
help
@@ -267,7 +316,7 @@
MXC I2C Channel 1 speed
config SYS_MXC_I2C1_SLAVE
- int "I2C1 Slave"
+ hex "I2C1 Slave"
default 0
help
MXC I2C1 Slave
@@ -282,7 +331,7 @@
MXC I2C Channel 2 speed
config SYS_MXC_I2C2_SLAVE
- int "I2C2 Slave"
+ hex "I2C2 Slave"
default 0
help
MXC I2C2 Slave
@@ -296,7 +345,7 @@
MXC I2C Channel 3 speed
config SYS_MXC_I2C3_SLAVE
- int "I2C3 Slave"
+ hex "I2C3 Slave"
default 0
help
MXC I2C3 Slave
@@ -310,7 +359,7 @@
MXC I2C Channel 4 speed
config SYS_MXC_I2C4_SLAVE
- int "I2C4 Slave"
+ hex "I2C4 Slave"
default 0
help
MXC I2C4 Slave
@@ -324,7 +373,7 @@
MXC I2C Channel 5 speed
config SYS_MXC_I2C5_SLAVE
- int "I2C5 Slave"
+ hex "I2C5 Slave"
default 0
help
MXC I2C5 Slave
@@ -338,7 +387,7 @@
MXC I2C Channel 6 speed
config SYS_MXC_I2C6_SLAVE
- int "I2C6 Slave"
+ hex "I2C6 Slave"
default 0
help
MXC I2C6 Slave
@@ -352,7 +401,7 @@
MXC I2C Channel 7 speed
config SYS_MXC_I2C7_SLAVE
- int "I2C7 Slave"
+ hex "I2C7 Slave"
default 0
help
MXC I2C7 Slave
@@ -366,7 +415,7 @@
MXC I2C Channel 8 speed
config SYS_MXC_I2C8_SLAVE
- int "I2C8 Slave"
+ hex "I2C8 Slave"
default 0
help
MXC I2C8 Slave
@@ -394,20 +443,6 @@
help
Add support for the OMAP2+ I2C driver.
-if SYS_I2C_OMAP24XX
-config SYS_OMAP24_I2C_SLAVE
- int "I2C Slave addr channel 0"
- default 1
- help
- OMAP24xx I2C Slave address channel 0
-
-config SYS_OMAP24_I2C_SPEED
- int "I2C Slave channel 0 speed"
- default 100000
- help
- OMAP24xx Slave speed channel 0
-endif
-
config SYS_I2C_RCAR_I2C
bool "Renesas RCar I2C driver"
depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
@@ -437,6 +472,73 @@
bus. Devices can be attached to the bus using the device tree
which specifies the driver to use. See sandbox.dts as an example.
+config SYS_I2C_SH
+ bool "Legacy SuperH I2C interface"
+ depends on ARCH_RMOBILE && SYS_I2C_LEGACY
+ help
+ Enable the legacy SuperH I2C interface.
+
+if SYS_I2C_SH
+config SYS_I2C_SH_NUM_CONTROLLERS
+ int
+ default 5
+
+config SYS_I2C_SH_BASE0
+ hex
+ default 0xE6820000
+
+config SYS_I2C_SH_BASE1
+ hex
+ default 0xE6822000
+
+config SYS_I2C_SH_BASE2
+ hex
+ default 0xE6824000
+
+config SYS_I2C_SH_BASE3
+ hex
+ default 0xE6826000
+
+config SYS_I2C_SH_BASE4
+ hex
+ default 0xE6828000
+
+config SH_I2C_8BIT
+ bool
+ default y
+
+config SH_I2C_DATA_HIGH
+ int
+ default 4
+
+config SH_I2C_DATA_LOW
+ int
+ default 5
+
+config SH_I2C_CLOCK
+ int
+ default 104000000
+endif
+
+config SYS_I2C_SOFT
+ bool "Legacy software I2C interface"
+ help
+ Enable the legacy software defined I2C interface
+
+config SYS_I2C_SOFT_SPEED
+ int "Software I2C bus speed"
+ depends on SYS_I2C_SOFT
+ default 100000
+ help
+ Speed of the software I2C bus
+
+config SYS_I2C_SOFT_SLAVE
+ hex "Software I2C slave address"
+ depends on SYS_I2C_SOFT
+ default 0xfe
+ help
+ Slave address of the software I2C bus
+
config SYS_I2C_OCTEON
bool "Octeon II/III/TX/TX2 I2C driver"
depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
@@ -449,7 +551,7 @@
config SYS_I2C_S3C24X0
bool "Samsung I2C driver"
- depends on ARCH_EXYNOS4 && DM_I2C
+ depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
help
Support for Samsung I2C controller as Samsung SoCs.
@@ -511,7 +613,6 @@
config SYS_I2C_MVTWSI
bool "Marvell I2C driver"
- depends on DM_I2C
help
Support for Marvell I2C controllers as used on the orion5x and
kirkwood SoC families.
@@ -526,6 +627,25 @@
by the BPMP, and can only be accessed by the main CPU via IPC
requests to the BPMP. This driver covers the latter case.
+config SYS_I2C_SLAVE
+ hex "I2C Slave address channel (all buses)"
+ depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
+ default 0xfe
+ help
+ I2C Slave address channel 0 for all buses in the legacy drivers.
+ Many boards/controllers/drivers don't support an I2C slave
+ interface so provide a default slave address for them for use in
+ common code. A real value for CONFIG_SYS_I2C_SLAVE should be
+ defined for any board which does support a slave interface and
+ this default used otherwise.
+
+config SYS_I2C_SPEED
+ int "I2C Slave channel 0 speed (all buses)"
+ depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
+ default 100000
+ help
+ I2C Slave speed channel 0 for all buses in the legacy drivers.
+
config SYS_I2C_BUS_MAX
int "Max I2C busses"
depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index c16ebb2..67841bf 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -11,7 +11,7 @@
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
obj-$(CONFIG_I2C_MV) += mv_i2c.o
-obj-$(CONFIG_SYS_I2C_LEGACY) += i2c_core.o
+obj-$(CONFIG_$(SPL_)SYS_I2C_LEGACY) += i2c_core.o
obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index e57eed0..d95f776 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -674,24 +674,6 @@
dw_i2c_write, dw_i2c_set_bus_speed,
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
-#if CONFIG_SYS_I2C_BUS_MAX >= 2
-U_BOOT_I2C_ADAP_COMPLETE(dw_1, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
- dw_i2c_write, dw_i2c_set_bus_speed,
- CONFIG_SYS_I2C_SPEED1, CONFIG_SYS_I2C_SLAVE1, 1)
-#endif
-
-#if CONFIG_SYS_I2C_BUS_MAX >= 3
-U_BOOT_I2C_ADAP_COMPLETE(dw_2, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
- dw_i2c_write, dw_i2c_set_bus_speed,
- CONFIG_SYS_I2C_SPEED2, CONFIG_SYS_I2C_SLAVE2, 2)
-#endif
-
-#if CONFIG_SYS_I2C_BUS_MAX >= 4
-U_BOOT_I2C_ADAP_COMPLETE(dw_3, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
- dw_i2c_write, dw_i2c_set_bus_speed,
- CONFIG_SYS_I2C_SPEED3, CONFIG_SYS_I2C_SLAVE3, 3)
-#endif
-
#else /* CONFIG_DM_I2C */
/* The DM I2C functions */
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index 2200303..eafd801 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -538,24 +538,24 @@
*/
U_BOOT_I2C_ADAP_COMPLETE(fsl_0, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read,
fsl_i2c_write, fsl_i2c_set_bus_speed,
- CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_FSL_I2C_SLAVE,
+ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
0)
#ifdef CONFIG_SYS_FSL_I2C2_OFFSET
U_BOOT_I2C_ADAP_COMPLETE(fsl_1, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read,
fsl_i2c_write, fsl_i2c_set_bus_speed,
- CONFIG_SYS_FSL_I2C2_SPEED, CONFIG_SYS_FSL_I2C2_SLAVE,
+ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
1)
#endif
#ifdef CONFIG_SYS_FSL_I2C3_OFFSET
U_BOOT_I2C_ADAP_COMPLETE(fsl_2, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read,
fsl_i2c_write, fsl_i2c_set_bus_speed,
- CONFIG_SYS_FSL_I2C3_SPEED, CONFIG_SYS_FSL_I2C3_SLAVE,
+ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
2)
#endif
#ifdef CONFIG_SYS_FSL_I2C4_OFFSET
U_BOOT_I2C_ADAP_COMPLETE(fsl_3, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read,
fsl_i2c_write, fsl_i2c_set_bus_speed,
- CONFIG_SYS_FSL_I2C4_SPEED, CONFIG_SYS_FSL_I2C4_SLAVE,
+ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
3)
#endif
#else /* CONFIG_DM_I2C */
diff --git a/drivers/i2c/i2c-emul-uclass.c b/drivers/i2c/i2c-emul-uclass.c
index aeec6aa..1107cf3 100644
--- a/drivers/i2c/i2c-emul-uclass.c
+++ b/drivers/i2c/i2c-emul-uclass.c
@@ -79,7 +79,7 @@
UCLASS_DRIVER(i2c_emul_parent) = {
.id = UCLASS_I2C_EMUL_PARENT,
.name = "i2c_emul_parent",
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
};
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index db1c9d9..71bc2b5 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -633,7 +633,7 @@
return ops->deblock(bus);
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip)
{
int addr;
@@ -655,7 +655,7 @@
static int i2c_pre_probe(struct udevice *dev)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
unsigned int max = 0;
ofnode node;
@@ -678,7 +678,7 @@
static int i2c_post_probe(struct udevice *dev)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency",
@@ -692,7 +692,7 @@
static int i2c_child_post_bind(struct udevice *dev)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
struct dm_i2c_chip *plat = dev_get_parent_plat(dev);
if (!dev_has_ofnode(dev))
@@ -709,7 +709,7 @@
debug("%s: %s, seq=%d\n", __func__, dev->name, dev_seq(dev));
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
ret = dm_scan_fdt_dev(dev);
#endif
return ret;
diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
index 85cf75e..09f91e6 100644
--- a/drivers/i2c/i2c_core.c
+++ b/drivers/i2c/i2c_core.c
@@ -190,11 +190,6 @@
{
}
-/* implement possible for i2c specific early i2c init */
-__weak void i2c_early_init_f(void)
-{
-}
-
/*
* i2c_init_all():
*
diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index 02f0144..ecca906 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -6,19 +6,14 @@
#include <common.h>
#include <i2c.h>
-#if CONFIG_IS_ENABLED(DM_I2C)
#include <dm.h>
#include <regmap.h>
-#else
-#include <gdsys_fpga.h>
-#endif
#include <log.h>
#include <asm/global_data.h>
#include <asm/unaligned.h>
#include <linux/bitops.h>
#include <linux/delay.h>
-#if CONFIG_IS_ENABLED(DM_I2C)
struct ihs_i2c_priv {
uint speed;
struct regmap *map;
@@ -39,37 +34,6 @@
#define ihs_i2c_get(map, member, valp) \
regmap_get(map, struct ihs_i2c_regs, member, valp)
-#else /* !CONFIG_DM_I2C */
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_SYS_I2C_IHS_DUAL
-
-#define I2C_SET_REG(fld, val) \
- do { \
- if (I2C_ADAP_HWNR & 0x10) \
- FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
- else \
- FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
- } while (0)
-#else
-#define I2C_SET_REG(fld, val) \
- FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
-#endif
-
-#ifdef CONFIG_SYS_I2C_IHS_DUAL
-#define I2C_GET_REG(fld, val) \
- do { \
- if (I2C_ADAP_HWNR & 0x10) \
- FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
- else \
- FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
- } while (0)
-#else
-#define I2C_GET_REG(fld, val) \
- FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
-#endif
-#endif /* CONFIG_DM_I2C */
-
enum {
I2CINT_ERROR_EV = BIT(13),
I2CINT_TRANSMIT_EV = BIT(14),
@@ -91,23 +55,13 @@
I2COP_READ = 1,
};
-#if CONFIG_IS_ENABLED(DM_I2C)
static int wait_for_int(struct udevice *dev, int read)
-#else
-static int wait_for_int(bool read)
-#endif
{
u16 val;
uint ctr = 0;
-#if CONFIG_IS_ENABLED(DM_I2C)
struct ihs_i2c_priv *priv = dev_get_priv(dev);
-#endif
-#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_get(priv->map, interrupt_status, &val);
-#else
- I2C_GET_REG(interrupt_status, &val);
-#endif
/* Wait until error or receive/transmit interrupt was raised */
while (!(val & (I2CINT_ERROR_EV
| (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV)))) {
@@ -116,40 +70,24 @@
debug("%s: timed out\n", __func__);
return -ETIMEDOUT;
}
-#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_get(priv->map, interrupt_status, &val);
-#else
- I2C_GET_REG(interrupt_status, &val);
-#endif
}
return (val & I2CINT_ERROR_EV) ? -EIO : 0;
}
-#if CONFIG_IS_ENABLED(DM_I2C)
static int ihs_i2c_transfer(struct udevice *dev, uchar chip,
uchar *buffer, int len, int read, bool is_last)
-#else
-static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read,
- bool is_last)
-#endif
{
u16 val;
u16 data;
int res;
-#if CONFIG_IS_ENABLED(DM_I2C)
struct ihs_i2c_priv *priv = dev_get_priv(dev);
-#endif
/* Clear interrupt status */
data = I2CINT_ERROR_EV | I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV;
-#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_set(priv->map, interrupt_status, data);
ihs_i2c_get(priv->map, interrupt_status, &val);
-#else
- I2C_SET_REG(interrupt_status, data);
- I2C_GET_REG(interrupt_status, &val);
-#endif
/* If we want to write and have data, write the bytes to the mailbox */
if (!read && len) {
@@ -157,11 +95,7 @@
if (len > 1)
val |= buffer[1] << 8;
-#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_set(priv->map, write_mailbox_ext, val);
-#else
- I2C_SET_REG(write_mailbox_ext, val);
-#endif
}
data = I2CMB_NATIVE
@@ -170,17 +104,9 @@
| ((len > 1) ? I2CMB_2BYTE : 0)
| (is_last ? 0 : I2CMB_HOLD_BUS);
-#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_set(priv->map, write_mailbox, data);
-#else
- I2C_SET_REG(write_mailbox, data);
-#endif
-#if CONFIG_IS_ENABLED(DM_I2C)
res = wait_for_int(dev, read);
-#else
- res = wait_for_int(read);
-#endif
if (res) {
if (res == -ETIMEDOUT)
debug("%s: time out while waiting for event\n", __func__);
@@ -190,11 +116,7 @@
/* If we want to read, get the bytes from the mailbox */
if (read) {
-#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_get(priv->map, read_mailbox_ext, &val);
-#else
- I2C_GET_REG(read_mailbox_ext, &val);
-#endif
buffer[0] = val & 0xff;
if (len > 1)
buffer[1] = val >> 8;
@@ -203,12 +125,7 @@
return 0;
}
-#if CONFIG_IS_ENABLED(DM_I2C)
static int ihs_i2c_send_buffer(struct udevice *dev, uchar chip, u8 *data, int len, bool hold_bus, int read)
-#else
-static int ihs_i2c_send_buffer(uchar chip, u8 *data, int len, bool hold_bus,
- int read)
-#endif
{
int res;
@@ -216,13 +133,8 @@
int transfer = min(len, 2);
bool is_last = len <= transfer;
-#if CONFIG_IS_ENABLED(DM_I2C)
res = ihs_i2c_transfer(dev, chip, data, transfer, read,
hold_bus ? false : is_last);
-#else
- res = ihs_i2c_transfer(chip, data, transfer, read,
- hold_bus ? false : is_last);
-#endif
if (res)
return res;
@@ -233,27 +145,14 @@
return 0;
}
-#if CONFIG_IS_ENABLED(DM_I2C)
static int ihs_i2c_address(struct udevice *dev, uchar chip, u8 *addr, int alen,
bool hold_bus)
-#else
-static int ihs_i2c_address(uchar chip, u8 *addr, int alen, bool hold_bus)
-#endif
{
-#if CONFIG_IS_ENABLED(DM_I2C)
return ihs_i2c_send_buffer(dev, chip, addr, alen, hold_bus, I2COP_WRITE);
-#else
- return ihs_i2c_send_buffer(chip, addr, alen, hold_bus, I2COP_WRITE);
-#endif
}
-#if CONFIG_IS_ENABLED(DM_I2C)
static int ihs_i2c_access(struct udevice *dev, uchar chip, u8 *addr,
int alen, uchar *buffer, int len, int read)
-#else
-static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, u8 *addr,
- int alen, uchar *buffer, int len, int read)
-#endif
{
int res;
@@ -261,23 +160,13 @@
if (len <= 0)
return -EINVAL;
-#if CONFIG_IS_ENABLED(DM_I2C)
res = ihs_i2c_address(dev, chip, addr, alen, len);
-#else
- res = ihs_i2c_address(chip, addr, alen, len);
-#endif
if (res)
return res;
-#if CONFIG_IS_ENABLED(DM_I2C)
return ihs_i2c_send_buffer(dev, chip, buffer, len, false, read);
-#else
- return ihs_i2c_send_buffer(chip, buffer, len, false, read);
-#endif
}
-#if CONFIG_IS_ENABLED(DM_I2C)
-
int ihs_i2c_probe(struct udevice *bus)
{
struct ihs_i2c_priv *priv = dev_get_priv(bus);
@@ -358,120 +247,3 @@
.priv_auto = sizeof(struct ihs_i2c_priv),
.ops = &ihs_i2c_ops,
};
-
-#else /* CONFIG_DM_I2C */
-
-static void ihs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
-{
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
- /*
- * Call board specific i2c bus reset routine before accessing the
- * environment, which might be in a chip on that bus. For details
- * about this problem see doc/I2C_Edge_Conditions.
- */
- i2c_init_board();
-#endif
-}
-
-static int ihs_i2c_probe(struct i2c_adapter *adap, uchar chip)
-{
- uchar buffer[2];
- int res;
-
- res = ihs_i2c_transfer(chip, buffer, 0, I2COP_READ, true);
- if (res)
- return res;
-
- return 0;
-}
-
-static int ihs_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
- int alen, uchar *buffer, int len)
-{
- u8 addr_bytes[4];
-
- put_unaligned_le32(addr, addr_bytes);
-
- return ihs_i2c_access(adap, chip, addr_bytes, alen, buffer, len,
- I2COP_READ);
-}
-
-static int ihs_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
- int alen, uchar *buffer, int len)
-{
- u8 addr_bytes[4];
-
- put_unaligned_le32(addr, addr_bytes);
-
- return ihs_i2c_access(adap, chip, addr_bytes, alen, buffer, len,
- I2COP_WRITE);
-}
-
-static unsigned int ihs_i2c_set_bus_speed(struct i2c_adapter *adap,
- unsigned int speed)
-{
- if (speed != adap->speed)
- return -EINVAL;
- return speed;
-}
-
-/*
- * Register IHS i2c adapters
- */
-#ifdef CONFIG_SYS_I2C_IHS_CH0
-U_BOOT_I2C_ADAP_COMPLETE(ihs0, ihs_i2c_init, ihs_i2c_probe,
- ihs_i2c_read, ihs_i2c_write,
- ihs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_IHS_SPEED_0,
- CONFIG_SYS_I2C_IHS_SLAVE_0, 0)
-#ifdef CONFIG_SYS_I2C_IHS_DUAL
-U_BOOT_I2C_ADAP_COMPLETE(ihs0_1, ihs_i2c_init, ihs_i2c_probe,
- ihs_i2c_read, ihs_i2c_write,
- ihs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_IHS_SPEED_0_1,
- CONFIG_SYS_I2C_IHS_SLAVE_0_1, 16)
-#endif
-#endif
-#ifdef CONFIG_SYS_I2C_IHS_CH1
-U_BOOT_I2C_ADAP_COMPLETE(ihs1, ihs_i2c_init, ihs_i2c_probe,
- ihs_i2c_read, ihs_i2c_write,
- ihs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_IHS_SPEED_1,
- CONFIG_SYS_I2C_IHS_SLAVE_1, 1)
-#ifdef CONFIG_SYS_I2C_IHS_DUAL
-U_BOOT_I2C_ADAP_COMPLETE(ihs1_1, ihs_i2c_init, ihs_i2c_probe,
- ihs_i2c_read, ihs_i2c_write,
- ihs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_IHS_SPEED_1_1,
- CONFIG_SYS_I2C_IHS_SLAVE_1_1, 17)
-#endif
-#endif
-#ifdef CONFIG_SYS_I2C_IHS_CH2
-U_BOOT_I2C_ADAP_COMPLETE(ihs2, ihs_i2c_init, ihs_i2c_probe,
- ihs_i2c_read, ihs_i2c_write,
- ihs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_IHS_SPEED_2,
- CONFIG_SYS_I2C_IHS_SLAVE_2, 2)
-#ifdef CONFIG_SYS_I2C_IHS_DUAL
-U_BOOT_I2C_ADAP_COMPLETE(ihs2_1, ihs_i2c_init, ihs_i2c_probe,
- ihs_i2c_read, ihs_i2c_write,
- ihs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_IHS_SPEED_2_1,
- CONFIG_SYS_I2C_IHS_SLAVE_2_1, 18)
-#endif
-#endif
-#ifdef CONFIG_SYS_I2C_IHS_CH3
-U_BOOT_I2C_ADAP_COMPLETE(ihs3, ihs_i2c_init, ihs_i2c_probe,
- ihs_i2c_read, ihs_i2c_write,
- ihs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_IHS_SPEED_3,
- CONFIG_SYS_I2C_IHS_SLAVE_3, 3)
-#ifdef CONFIG_SYS_I2C_IHS_DUAL
-U_BOOT_I2C_ADAP_COMPLETE(ihs3_1, ihs_i2c_init, ihs_i2c_probe,
- ihs_i2c_read, ihs_i2c_write,
- ihs_i2c_set_bus_speed,
- CONFIG_SYS_I2C_IHS_SPEED_3_1,
- CONFIG_SYS_I2C_IHS_SLAVE_3_1, 19)
-#endif
-#endif
-#endif /* CONFIG_DM_I2C */
diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c
index 20c5de0..0eff353 100644
--- a/drivers/i2c/mv_i2c.c
+++ b/drivers/i2c/mv_i2c.c
@@ -80,7 +80,7 @@
i2c_clk_enable();
- writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */
+ writel(0x0, &base->isar); /* set our slave address */
/* set control reg values */
writel(I2C_ICR_INIT | icr_mode, &base->icr);
writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index d33e2c7..236bfb8 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -17,7 +17,9 @@
#include <linux/bitops.h>
#include <linux/compat.h>
#if CONFIG_IS_ENABLED(DM_I2C)
+#include <clk.h>
#include <dm.h>
+#include <reset.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -835,7 +837,18 @@
static int mvtwsi_i2c_probe(struct udevice *bus)
{
struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
+ struct reset_ctl reset;
+ struct clk clk;
uint actual_speed;
+ int ret;
+
+ ret = reset_get_by_index(bus, 0, &reset);
+ if (!ret)
+ reset_deassert(&reset);
+
+ ret = clk_get_by_index(bus, 0, &clk);
+ if (!ret)
+ clk_enable(&clk);
__twsi_i2c_init(dev->base, dev->speed, dev->slaveadd, &actual_speed);
dev->speed = actual_speed;
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 003aa33..5057bd9 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -110,32 +110,6 @@
};
#endif
-#ifndef CONFIG_SYS_MXC_I2C1_SPEED
-#define CONFIG_SYS_MXC_I2C1_SPEED 100000
-#endif
-#ifndef CONFIG_SYS_MXC_I2C2_SPEED
-#define CONFIG_SYS_MXC_I2C2_SPEED 100000
-#endif
-#ifndef CONFIG_SYS_MXC_I2C3_SPEED
-#define CONFIG_SYS_MXC_I2C3_SPEED 100000
-#endif
-#ifndef CONFIG_SYS_MXC_I2C4_SPEED
-#define CONFIG_SYS_MXC_I2C4_SPEED 100000
-#endif
-
-#ifndef CONFIG_SYS_MXC_I2C1_SLAVE
-#define CONFIG_SYS_MXC_I2C1_SLAVE 0
-#endif
-#ifndef CONFIG_SYS_MXC_I2C2_SLAVE
-#define CONFIG_SYS_MXC_I2C2_SLAVE 0
-#endif
-#ifndef CONFIG_SYS_MXC_I2C3_SLAVE
-#define CONFIG_SYS_MXC_I2C3_SLAVE 0
-#endif
-#ifndef CONFIG_SYS_MXC_I2C4_SLAVE
-#define CONFIG_SYS_MXC_I2C4_SLAVE 0
-#endif
-
/*
* Calculate and set proper clock divider
*/
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 71f6f5f..a767dee 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -936,62 +936,34 @@
return __omap24_i2c_probe(i2c_base, ip_rev, adap->waitdelay, chip);
}
-#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED1)
-#define CONFIG_SYS_OMAP24_I2C_SPEED1 CONFIG_SYS_OMAP24_I2C_SPEED
-#endif
-#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE1)
-#define CONFIG_SYS_OMAP24_I2C_SLAVE1 CONFIG_SYS_OMAP24_I2C_SLAVE
-#endif
-
U_BOOT_I2C_ADAP_COMPLETE(omap24_0, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
- CONFIG_SYS_OMAP24_I2C_SPEED,
- CONFIG_SYS_OMAP24_I2C_SLAVE,
+ CONFIG_SYS_I2C_SPEED,
+ CONFIG_SYS_I2C_SLAVE,
0)
U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
- CONFIG_SYS_OMAP24_I2C_SPEED1,
- CONFIG_SYS_OMAP24_I2C_SLAVE1,
+ CONFIG_SYS_I2C_SPEED,
+ CONFIG_SYS_I2C_SLAVE,
1)
#if (CONFIG_SYS_I2C_BUS_MAX > 2)
-#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED2)
-#define CONFIG_SYS_OMAP24_I2C_SPEED2 CONFIG_SYS_OMAP24_I2C_SPEED
-#endif
-#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE2)
-#define CONFIG_SYS_OMAP24_I2C_SLAVE2 CONFIG_SYS_OMAP24_I2C_SLAVE
-#endif
-
U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, NULL,
- CONFIG_SYS_OMAP24_I2C_SPEED2,
- CONFIG_SYS_OMAP24_I2C_SLAVE2,
+ CONFIG_SYS_I2C_SPEED,
+ CONFIG_SYS_I2C_SLAVE,
2)
#if (CONFIG_SYS_I2C_BUS_MAX > 3)
-#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED3)
-#define CONFIG_SYS_OMAP24_I2C_SPEED3 CONFIG_SYS_OMAP24_I2C_SPEED
-#endif
-#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE3)
-#define CONFIG_SYS_OMAP24_I2C_SLAVE3 CONFIG_SYS_OMAP24_I2C_SLAVE
-#endif
-
U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, NULL,
- CONFIG_SYS_OMAP24_I2C_SPEED3,
- CONFIG_SYS_OMAP24_I2C_SLAVE3,
+ CONFIG_SYS_I2C_SPEED,
+ CONFIG_SYS_I2C_SLAVE,
3)
#if (CONFIG_SYS_I2C_BUS_MAX > 4)
-#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED4)
-#define CONFIG_SYS_OMAP24_I2C_SPEED4 CONFIG_SYS_OMAP24_I2C_SPEED
-#endif
-#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE4)
-#define CONFIG_SYS_OMAP24_I2C_SLAVE4 CONFIG_SYS_OMAP24_I2C_SLAVE
-#endif
-
U_BOOT_I2C_ADAP_COMPLETE(omap24_4, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, NULL,
- CONFIG_SYS_OMAP24_I2C_SPEED4,
- CONFIG_SYS_OMAP24_I2C_SLAVE4,
+ CONFIG_SYS_I2C_SPEED,
+ CONFIG_SYS_I2C_SLAVE,
4)
#endif
#endif
@@ -1062,7 +1034,7 @@
return 0;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int omap_i2c_of_to_plat(struct udevice *bus)
{
struct omap_i2c_plat *plat = dev_get_plat(bus);
@@ -1091,7 +1063,7 @@
U_BOOT_DRIVER(i2c_omap) = {
.name = "i2c_omap",
.id = UCLASS_I2C,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = omap_i2c_ids,
.of_to_plat = omap_i2c_of_to_plat,
.plat_auto = sizeof(struct omap_i2c_plat),
diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c
index 14bb660..d9ece5e 100644
--- a/drivers/i2c/rcar_i2c.c
+++ b/drivers/i2c/rcar_i2c.c
@@ -64,6 +64,8 @@
struct rcar_i2c_priv {
void __iomem *base;
struct clk clk;
+ u32 fall_ns;
+ u32 rise_ns;
u32 intdelay;
u32 icccr;
enum rcar_i2c_type type;
@@ -278,7 +280,7 @@
* = F[sum * ick / 1000000000]
* = F[(ick / 1000000) * sum / 1000]
*/
- sum = 35 + 200 + priv->intdelay;
+ sum = priv->fall_ns + priv->rise_ns + priv->intdelay;
round = (ick + 500000) / 1000000 * sum;
round = (round + 500) / 1000;
@@ -323,6 +325,10 @@
int ret;
priv->base = dev_read_addr_ptr(dev);
+ priv->rise_ns = dev_read_u32_default(dev,
+ "i2c-scl-rising-time-ns", 200);
+ priv->fall_ns = dev_read_u32_default(dev,
+ "i2c-scl-falling-time-ns", 35);
priv->intdelay = dev_read_u32_default(dev,
"i2c-scl-internal-delay-ns", 5);
priv->type = dev_get_driver_data(dev);
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 56f0f69..e0f499d 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -21,12 +21,6 @@
#include <i2c.h>
#include "s3c24x0_i2c.h"
-#ifndef CONFIG_SYS_I2C_S3C24X0_SLAVE
-#define SYS_I2C_S3C24X0_SLAVE_ADDR 0
-#else
-#define SYS_I2C_S3C24X0_SLAVE_ADDR CONFIG_SYS_I2C_S3C24X0_SLAVE
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
/*
@@ -83,6 +77,8 @@
writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->iicstat);
}
+#define SYS_I2C_S3C24X0_SLAVE_ADDR 0
+
static int s3c24x0_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)
{
struct s3c24x0_i2c_bus *i2c_bus = dev_get_priv(dev);
diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 26a8700..6cecec4 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -294,20 +294,20 @@
* Register RCAR i2c adapters
*/
U_BOOT_I2C_ADAP_COMPLETE(sh_0, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
- sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED0, 0, 0)
+ sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 0)
#ifdef CONFIG_SYS_I2C_SH_BASE1
U_BOOT_I2C_ADAP_COMPLETE(sh_1, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
- sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED1, 0, 1)
+ sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 1)
#endif
#ifdef CONFIG_SYS_I2C_SH_BASE2
U_BOOT_I2C_ADAP_COMPLETE(sh_2, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
- sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED2, 0, 2)
+ sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 2)
#endif
#ifdef CONFIG_SYS_I2C_SH_BASE3
U_BOOT_I2C_ADAP_COMPLETE(sh_3, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
- sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED3, 0, 3)
+ sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 3)
#endif
#ifdef CONFIG_SYS_I2C_SH_BASE4
U_BOOT_I2C_ADAP_COMPLETE(sh_4, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
- sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED4, 0, 4)
+ sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 4)
#endif
diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index db69c18..c72839e 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -438,80 +438,3 @@
soft_i2c_read, soft_i2c_write, NULL,
CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
0)
-#if defined(I2C_SOFT_DECLARATIONS2)
-U_BOOT_I2C_ADAP_COMPLETE(soft01, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_2,
- CONFIG_SYS_I2C_SOFT_SLAVE_2,
- 1)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS3)
-U_BOOT_I2C_ADAP_COMPLETE(soft02, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_3,
- CONFIG_SYS_I2C_SOFT_SLAVE_3,
- 2)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS4)
-U_BOOT_I2C_ADAP_COMPLETE(soft03, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_4,
- CONFIG_SYS_I2C_SOFT_SLAVE_4,
- 3)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS5)
-U_BOOT_I2C_ADAP_COMPLETE(soft04, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_5,
- CONFIG_SYS_I2C_SOFT_SLAVE_5,
- 4)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS6)
-U_BOOT_I2C_ADAP_COMPLETE(soft05, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_6,
- CONFIG_SYS_I2C_SOFT_SLAVE_6,
- 5)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS7)
-U_BOOT_I2C_ADAP_COMPLETE(soft06, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_7,
- CONFIG_SYS_I2C_SOFT_SLAVE_7,
- 6)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS8)
-U_BOOT_I2C_ADAP_COMPLETE(soft07, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_8,
- CONFIG_SYS_I2C_SOFT_SLAVE_8,
- 7)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS9)
-U_BOOT_I2C_ADAP_COMPLETE(soft08, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_9,
- CONFIG_SYS_I2C_SOFT_SLAVE_9,
- 8)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS10)
-U_BOOT_I2C_ADAP_COMPLETE(soft09, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_10,
- CONFIG_SYS_I2C_SOFT_SLAVE_10,
- 9)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS11)
-U_BOOT_I2C_ADAP_COMPLETE(soft10, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_11,
- CONFIG_SYS_I2C_SOFT_SLAVE_11,
- 10)
-#endif
-#if defined(I2C_SOFT_DECLARATIONS12)
-U_BOOT_I2C_ADAP_COMPLETE(soft11, soft_i2c_init, soft_i2c_probe,
- soft_i2c_read, soft_i2c_write, NULL,
- CONFIG_SYS_I2C_SOFT_SPEED_12,
- CONFIG_SYS_I2C_SOFT_SLAVE_12,
- 11)
-#endif
diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c
index 565d99e..d3743dc 100644
--- a/drivers/input/i8042.c
+++ b/drivers/input/i8042.c
@@ -150,8 +150,8 @@
else if ((quirk & QUIRK_DUP_POR) && config == KBD_POR)
config = kbd_cmd_read(CMD_RD_CONFIG);
- config |= CONFIG_AT_TRANS;
- config &= ~(CONFIG_KIRQ_EN | CONFIG_MIRQ_EN);
+ config |= CFG_AT_TRANS;
+ config &= ~(CFG_KIRQ_EN | CFG_MIRQ_EN);
if (kbd_cmd_write(CMD_WR_CONFIG, config))
goto err;
diff --git a/drivers/memory/ti-aemif.c b/drivers/memory/ti-aemif.c
index 6250e27..c4bc88c 100644
--- a/drivers/memory/ti-aemif.c
+++ b/drivers/memory/ti-aemif.c
@@ -9,11 +9,10 @@
#include <common.h>
#include <asm/ti-common/ti-aemif.h>
-#define AEMIF_WAITCYCLE_CONFIG (CONFIG_AEMIF_CNTRL_BASE + 0x4)
-#define AEMIF_NAND_CONTROL (CONFIG_AEMIF_CNTRL_BASE + 0x60)
-#define AEMIF_ONENAND_CONTROL (CONFIG_AEMIF_CNTRL_BASE + 0x5c)
-#define AEMIF_CONFIG(cs) (CONFIG_AEMIF_CNTRL_BASE + 0x10 \
- + (cs * 4))
+#define AEMIF_WAITCYCLE_CONFIG (KS2_AEMIF_CNTRL_BASE + 0x4)
+#define AEMIF_NAND_CONTROL (KS2_AEMIF_CNTRL_BASE + 0x60)
+#define AEMIF_ONENAND_CONTROL (KS2_AEMIF_CNTRL_BASE + 0x5c)
+#define AEMIF_CONFIG(cs) (KS2_AEMIF_CNTRL_BASE + 0x10 + (cs * 4))
#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 997b713..099ff29 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -398,36 +398,12 @@
This option is an SPL-variant of the I2C_EEPROM option.
See the help of I2C_EEPROM for details.
-if I2C_EEPROM
-
config SYS_I2C_EEPROM_ADDR
hex "Chip address of the EEPROM device"
- default 0
-
-config SYS_I2C_EEPROM_BUS
- int "I2C bus of the EEPROM device."
- default 0
-
-config SYS_EEPROM_SIZE
- int "Size in bytes of the EEPROM device"
- default 256
-
-config SYS_EEPROM_PAGE_WRITE_BITS
- int "Number of bits used to address bytes in a single page"
+ depends on ID_EEPROM || I2C_EEPROM || SPL_I2C_EEPROM || CMD_EEPROM || ENV_IS_IN_EEPROM
default 0
- help
- The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS.
- A 64 byte page, for example would require six bits.
-config SYS_EEPROM_PAGE_WRITE_DELAY_MS
- int "Number of milliseconds to delay between page writes"
- default 0
-
-config SYS_I2C_EEPROM_ADDR_LEN
- int "Length in bytes of the EEPROM memory array address"
- default 1
- help
- Note: This is NOT the chip address length!
+if I2C_EEPROM
config SYS_I2C_EEPROM_ADDR_OVERFLOW
hex "EEPROM Address Overflow"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index b64cd2a..c16a77c 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -42,7 +42,7 @@
obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
obj-$(CONFIG_IRQ) += irq-uclass.o
-obj-$(CONFIG_SANDBOX) += irq_sandbox.o
+obj-$(CONFIG_SANDBOX) += irq_sandbox.o irq_sandbox_test.o
obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
obj-$(CONFIG_IMX8) += imx8/
diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index 2a15094..1bbc0f9 100644
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -1671,7 +1671,7 @@
.id = UCLASS_CROS_EC,
.name = "cros-ec",
.per_device_auto = sizeof(struct cros_ec_dev),
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
.flags = DM_UC_FLAG_ALLOC_PRIV_DMA,
diff --git a/drivers/misc/irq-uclass.c b/drivers/misc/irq-uclass.c
index 3aa26f6..eb9f3b9 100644
--- a/drivers/misc/irq-uclass.c
+++ b/drivers/misc/irq-uclass.c
@@ -64,8 +64,8 @@
}
#if CONFIG_IS_ENABLED(OF_PLATDATA)
-int irq_get_by_driver_info(struct udevice *dev,
- struct phandle_1_arg *cells, struct irq *irq)
+int irq_get_by_phandle(struct udevice *dev, const struct phandle_2_arg *cells,
+ struct irq *irq)
{
int ret;
@@ -74,6 +74,12 @@
return ret;
irq->id = cells->arg[0];
+ /*
+ * Note: we could call irq_of_xlate_default() here to do this properly.
+ * For now, this is good enough for existing cases.
+ */
+ irq->flags = cells->arg[1];
+
return 0;
}
#else
diff --git a/drivers/misc/irq_sandbox.c b/drivers/misc/irq_sandbox.c
index 1f7e62e..8b5573f 100644
--- a/drivers/misc/irq_sandbox.c
+++ b/drivers/misc/irq_sandbox.c
@@ -9,19 +9,9 @@
#include <dm.h>
#include <irq.h>
#include <acpi/acpi_device.h>
+#include <asm/irq.h>
#include <asm/test.h>
-/**
- * struct sandbox_irq_priv - private data for this driver
- *
- * @count: Counts the number calls to the read_and_clear() method
- * @pending: true if an interrupt is pending, else false
- */
-struct sandbox_irq_priv {
- int count;
- bool pending;
-};
-
static int sandbox_set_polarity(struct udevice *dev, uint irq, bool active_low)
{
if (irq > 10)
@@ -103,10 +93,11 @@
{ }
};
-U_BOOT_DRIVER(sandbox_irq_drv) = {
+U_BOOT_DRIVER(sandbox_irq) = {
.name = "sandbox_irq",
.id = UCLASS_IRQ,
.of_match = sandbox_irq_ids,
.ops = &sandbox_irq_ops,
.priv_auto = sizeof(struct sandbox_irq_priv),
+ DM_HEADER(<asm/irq.h>)
};
diff --git a/drivers/misc/irq_sandbox_test.c b/drivers/misc/irq_sandbox_test.c
new file mode 100644
index 0000000..95c45c2
--- /dev/null
+++ b/drivers/misc/irq_sandbox_test.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Sandbox driver for testing interrupts with of-platdata
+ *
+ * Copyright 2021 Google LLC
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <irq.h>
+#include <asm/irq.h>
+
+static const struct udevice_id sandbox_irq_test_ids[] = {
+ { .compatible = "sandbox,irq-test" },
+ { }
+};
+
+U_BOOT_DRIVER(sandbox_irq_test) = {
+ .name = "sandbox_irq_test",
+ .id = UCLASS_MISC,
+ .of_match = sandbox_irq_test_ids,
+};
diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c
index 72720b0..cbfacc3 100644
--- a/drivers/misc/misc-uclass.c
+++ b/drivers/misc/misc-uclass.c
@@ -70,7 +70,7 @@
UCLASS_DRIVER(misc) = {
.id = UCLASS_MISC,
.name = "misc",
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
};
diff --git a/drivers/misc/p2sb-uclass.c b/drivers/misc/p2sb-uclass.c
index 94d273d..f24857a 100644
--- a/drivers/misc/p2sb-uclass.c
+++ b/drivers/misc/p2sb-uclass.c
@@ -183,16 +183,16 @@
static int p2sb_child_post_bind(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct p2sb_child_plat *pplat = dev_get_parent_plat(dev);
- int ret;
- u32 pid;
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct p2sb_child_plat *pplat = dev_get_parent_plat(dev);
+ int ret;
+ u32 pid;
- ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid);
- if (ret)
- return ret;
- pplat->pid = pid;
-#endif
+ ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid);
+ if (ret)
+ return ret;
+ pplat->pid = pid;
+ }
return 0;
}
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 1569e8c..e0927ce 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -123,7 +123,6 @@
config SPL_MMC_IO_VOLTAGE
bool "Support IO voltage configuration in SPL"
- default n
help
IO voltage configuration allows selecting the voltage level of the IO
lines (not the level of main supply). This is required for UHS
@@ -193,7 +192,6 @@
config MMC_TRACE
bool "MMC debugging"
- default n
help
This is an option for use by developer. Enable MMC core debugging.
@@ -221,7 +219,6 @@
depends on DM_MMC
depends on MMC_DW
depends on BLK
- default n
help
This selects support for Cortina SoC specific extensions to the
Synopsys DesignWare Memory Card Interface driver. Select this option
@@ -770,7 +767,6 @@
config FTSDC010_SDIO
bool "Support ftsdc010 sdio"
- default n
depends on FTSDC010
help
This can enable ftsdc010 sdio function.
@@ -805,7 +801,6 @@
config FSL_ESDHC_33V_IO_RELIABILITY_WORKAROUND
bool "enable eSDHC workaround for 3.3v IO reliability issue"
depends on FSL_ESDHC && DM_MMC
- default n
help
When eSDHC operates at 3.3v, damage can accumulate in an internal
level shifter at a higher than expected rate. The faster the interface
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index aabf395..5dfd484 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1411,7 +1411,6 @@
static int fsl_esdhc_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
#if CONFIG_IS_ENABLED(DM_REGULATOR)
struct udevice *vqmmc_dev;
@@ -1419,10 +1418,12 @@
#endif
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
-
fdt_addr_t addr;
unsigned int val;
+ if (!CONFIG_IS_ENABLED(OF_REAL))
+ return 0;
+
addr = dev_read_addr(dev);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
@@ -1494,7 +1495,7 @@
priv->vs18_enable = 1;
}
#endif
-#endif
+
return 0;
}
@@ -1598,11 +1599,11 @@
return ret;
}
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- ret = mmc_of_parse(dev, &plat->cfg);
- if (ret)
- return ret;
-#endif
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ ret = mmc_of_parse(dev, &plat->cfg);
+ if (ret)
+ return ret;
+ }
mmc = &plat->mmc;
mmc->cfg = &plat->cfg;
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
index 0fa0372..570d54c 100644
--- a/drivers/mmc/ftsdc010_mci.c
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -30,8 +30,6 @@
#include <syscon.h>
#include <linux/err.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 4) /* 250 ms */
#define CFG_RST_TIMEOUT CONFIG_SYS_HZ /* 1 sec reset timeout */
@@ -392,34 +390,29 @@
static int ftsdc010_mmc_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct ftsdc_priv *priv = dev_get_priv(dev);
struct ftsdc010_chip *chip = &priv->chip;
- chip->name = dev->name;
- chip->ioaddr = dev_read_addr_ptr(dev);
- chip->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "bus-width", 4);
- chip->priv = dev;
- priv->fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "fifo-depth", 0);
- priv->fifo_mode = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
- "fifo-mode");
- if (fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
- "clock-freq-min-max", priv->minmax, 2)) {
- int val = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "max-frequency", -EINVAL);
- if (val < 0)
- return val;
- priv->minmax[0] = 400000; /* 400 kHz */
- priv->minmax[1] = val;
- } else {
- debug("%s: 'clock-freq-min-max' property was deprecated.\n",
- __func__);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ chip->name = dev->name;
+ chip->ioaddr = dev_read_addr_ptr(dev);
+ chip->buswidth = dev_read_u32_default(dev, "bus-width", 4);
+ chip->priv = dev;
+ priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0);
+ priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
+ if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) {
+ if (dev_read_u32(dev, "max-frequency", &priv->minmax[1]))
+ return -EINVAL;
+
+ priv->minmax[0] = 400000; /* 400 kHz */
+ } else {
+ debug("%s: 'clock-freq-min-max' property was deprecated.\n",
+ __func__);
+ }
}
-#endif
chip->sclk = priv->minmax[1];
chip->regs = chip->ioaddr;
+
return 0;
}
@@ -440,7 +433,7 @@
chip->priv = dev;
chip->dev_index = 1;
memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax));
- ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_phandle(dev, dtplat->clocks, &priv->clk);
if (ret < 0)
return ret;
#endif
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 8fd4176..35a8e21 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -665,7 +665,7 @@
.set_ios = mxsmmc_set_ios,
};
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int mxsmmc_of_to_plat(struct udevice *bus)
{
struct mxsmmc_plat *plat = dev_get_plat(bus);
@@ -709,7 +709,7 @@
U_BOOT_DRIVER(fsl_imx23_mmc) = {
.name = "fsl_imx23_mmc",
.id = UCLASS_MMC,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = mxsmmc_ids,
.of_to_plat = mxsmmc_of_to_plat,
#endif
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 306ce0f..8200658 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -42,7 +42,7 @@
#include <asm/arch/mux_dra7xx.h>
#include <asm/arch/dra7xx_iodelay.h>
#endif
-#if !defined(CONFIG_SOC_KEYSTONE)
+#if !defined(CONFIG_ARCH_KEYSTONE)
#include <asm/gpio.h>
#include <asm/arch/sys_proto.h>
#endif
@@ -1559,7 +1559,7 @@
priv->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE;
#if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \
defined(CONFIG_DRA7XX) || defined(CONFIG_AM33XX) || \
- defined(CONFIG_AM43XX) || defined(CONFIG_SOC_KEYSTONE)) && \
+ defined(CONFIG_AM43XX) || defined(CONFIG_ARCH_KEYSTONE)) && \
defined(CONFIG_HSMMC2_8BIT)
/* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */
host_caps_val |= MMC_MODE_8BIT;
@@ -1891,7 +1891,7 @@
}
#endif
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
#ifdef CONFIG_OMAP54XX
__weak const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr)
{
@@ -2009,7 +2009,7 @@
return omap_hsmmc_init_setup(mmc);
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct omap_mmc_of_data dra7_mmc_of_data = {
.controller_flags = OMAP_HSMMC_REQUIRE_IODELAY,
@@ -2027,7 +2027,7 @@
U_BOOT_DRIVER(omap_hsmmc) = {
.name = "omap_hsmmc",
.id = UCLASS_MMC,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = omap_hsmmc_ids,
.of_to_plat = omap_hsmmc_of_to_plat,
.plat_auto = sizeof(struct omap_hsmmc_plat),
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index d7d5361..7f8dea1 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -52,10 +52,12 @@
static int rockchip_dwmmc_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
+ if (!CONFIG_IS_ENABLED(OF_REAL))
+ return 0;
+
host->name = dev->name;
host->ioaddr = dev_read_addr_ptr(dev);
host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
@@ -95,7 +97,7 @@
debug("%s: 'clock-freq-min-max' property was deprecated.\n",
__func__);
}
-#endif
+
return 0;
}
@@ -121,7 +123,7 @@
priv->minmax[0] = 400000; /* 400 kHz */
priv->minmax[1] = dtplat->max_frequency;
- ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_phandle(dev, dtplat->clocks, &priv->clk);
if (ret < 0)
return ret;
#else
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index a901ce5..bb8cffc 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -31,12 +31,10 @@
config ATMEL_NAND_HWECC
bool "Atmel Hardware ECC"
- default n
config ATMEL_NAND_HW_PMECC
bool "Atmel Programmable Multibit ECC (PMECC)"
select ATMEL_NAND_HWECC
- default n
help
The Programmable Multibit ECC (PMECC) controller is a programmable
binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
@@ -59,7 +57,6 @@
bool "Atmel PMECC Header Generation"
select ATMEL_NAND_HWECC
select ATMEL_NAND_HW_PMECC
- default n
help
Generate Programmable Multibit ECC (PMECC) header for SPL image.
@@ -108,6 +105,10 @@
Enable this driver for NAND flash controllers available in TI Davinci
and Keystone2 platforms
+config KEYSTONE_RBL_NAND
+ depends on ARCH_KEYSTONE
+ def_bool y
+
config NAND_DENALI
bool
select SYS_NAND_SELF_INIT
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index 9ad3a57..ef8e85a 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -347,9 +347,9 @@
};
#ifdef CONFIG_SYS_NAND_PAGE_2K
-#define CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE >> 11
+#define KEYSTONE_NAND_MAX_RBL_PAGE (0x100000 >> 11)
#elif defined(CONFIG_SYS_NAND_PAGE_4K)
-#define CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE >> 12
+#define KEYSTONE_NAND_MAX_RBL_PAGE (0x100000 >> 12)
#endif
/**
@@ -371,7 +371,7 @@
struct nand_ecclayout *saved_ecc_layout;
/* save current ECC layout and assign Keystone RBL ECC layout */
- if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) {
+ if (page < KEYSTONE_NAND_MAX_RBL_PAGE) {
saved_ecc_layout = chip->ecc.layout;
chip->ecc.layout = &nand_keystone_rbl_4bit_layout_oobfirst;
mtd->oobavail = chip->ecc.layout->oobavail;
@@ -402,7 +402,7 @@
err:
/* restore ECC layout */
- if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) {
+ if (page < KEYSTONE_NAND_MAX_RBL_PAGE) {
chip->ecc.layout = saved_ecc_layout;
mtd->oobavail = saved_ecc_layout->oobavail;
}
@@ -433,7 +433,7 @@
struct nand_ecclayout *saved_ecc_layout = chip->ecc.layout;
/* save current ECC layout and assign Keystone RBL ECC layout */
- if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) {
+ if (page < KEYSTONE_NAND_MAX_RBL_PAGE) {
chip->ecc.layout = &nand_keystone_rbl_4bit_layout_oobfirst;
mtd->oobavail = chip->ecc.layout->oobavail;
}
@@ -463,7 +463,7 @@
}
/* restore ECC layout */
- if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) {
+ if (page < KEYSTONE_NAND_MAX_RBL_PAGE) {
chip->ecc.layout = saved_ecc_layout;
mtd->oobavail = saved_ecc_layout->oobavail;
}
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index ab91db8..c827f80 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1246,7 +1246,7 @@
denali->active_bank = DENALI_INVALID_BANK;
- chip->flash_node = dev_of_offset(denali->dev);
+ chip->flash_node = dev_ofnode(denali->dev);
/* Fallback to the default name if DT did not give "label" property */
if (!mtd->name)
mtd->name = "denali-nand";
diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
index e6bbfac..748056a 100644
--- a/drivers/mtd/nand/raw/mxs_nand.c
+++ b/drivers/mtd/nand/raw/mxs_nand.c
@@ -1379,7 +1379,7 @@
nand->options |= NAND_NO_SUBPAGE_WRITE;
if (nand_info->dev)
- nand->flash_node = dev_of_offset(nand_info->dev);
+ nand->flash_node = dev_ofnode(nand_info->dev);
nand->cmd_ctrl = mxs_nand_cmd_ctrl;
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 3679ee7..b1fd779 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -29,9 +29,6 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <common.h>
-#if CONFIG_IS_ENABLED(OF_CONTROL)
-#include <fdtdec.h>
-#endif
#include <log.h>
#include <malloc.h>
#include <watchdog.h>
@@ -4576,23 +4573,20 @@
EXPORT_SYMBOL(nand_get_flash_type);
#if CONFIG_IS_ENABLED(OF_CONTROL)
-#include <asm/global_data.h>
-DECLARE_GLOBAL_DATA_PTR;
-static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
+static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node)
{
int ret, ecc_mode = -1, ecc_strength, ecc_step;
- const void *blob = gd->fdt_blob;
const char *str;
- ret = fdtdec_get_int(blob, node, "nand-bus-width", -1);
+ ret = ofnode_read_s32_default(node, "nand-bus-width", -1);
if (ret == 16)
chip->options |= NAND_BUSWIDTH_16;
- if (fdtdec_get_bool(blob, node, "nand-on-flash-bbt"))
+ if (ofnode_read_bool(node, "nand-on-flash-bbt"))
chip->bbt_options |= NAND_BBT_USE_FLASH;
- str = fdt_getprop(blob, node, "nand-ecc-mode", NULL);
+ str = ofnode_read_string(node, "nand-ecc-mode");
if (str) {
if (!strcmp(str, "none"))
ecc_mode = NAND_ECC_NONE;
@@ -4608,9 +4602,10 @@
ecc_mode = NAND_ECC_SOFT_BCH;
}
-
- ecc_strength = fdtdec_get_int(blob, node, "nand-ecc-strength", -1);
- ecc_step = fdtdec_get_int(blob, node, "nand-ecc-step-size", -1);
+ ecc_strength = ofnode_read_s32_default(node,
+ "nand-ecc-strength", -1);
+ ecc_step = ofnode_read_s32_default(node,
+ "nand-ecc-step-size", -1);
if ((ecc_step >= 0 && !(ecc_strength >= 0)) ||
(!(ecc_step >= 0) && ecc_strength >= 0)) {
@@ -4627,13 +4622,13 @@
if (ecc_step > 0)
chip->ecc.size = ecc_step;
- if (fdt_getprop(blob, node, "nand-ecc-maximize", NULL))
+ if (ofnode_read_bool(node, "nand-ecc-maximize"))
chip->ecc.options |= NAND_ECC_MAXIMIZE;
return 0;
}
#else
-static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
+static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node)
{
return 0;
}
@@ -4657,7 +4652,7 @@
struct nand_flash_dev *type;
int ret;
- if (chip->flash_node) {
+ if (ofnode_valid(chip->flash_node)) {
ret = nand_dt_init(mtd, chip, chip->flash_node);
if (ret)
return ret;
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index fd81a95..e17f1f8 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -823,7 +823,7 @@
nand->cs_used[i] = cs[i];
}
- nand->chip.flash_node = ofnode_to_offset(node);
+ nand->chip.flash_node = node;
return 0;
}
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 7bc6ec7..c378f08 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1711,7 +1711,7 @@
* in the DT.
*/
nand->ecc.mode = NAND_ECC_HW;
- nand->flash_node = node;
+ nand->flash_node = offset_to_ofnode(node);
nand->select_chip = sunxi_nfc_select_chip;
nand->cmd_ctrl = sunxi_nfc_cmd_ctrl;
nand->read_buf = sunxi_nfc_read_buf;
diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index e33953e..13fd631 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -109,19 +109,19 @@
#define STATUS_BYTE1_MASK 0x000000FF
/* NFC_FLASH_CONFIG Field */
-#define CONFIG_ECC_SRAM_ADDR_MASK 0x7FC00000
-#define CONFIG_ECC_SRAM_ADDR_SHIFT 22
-#define CONFIG_ECC_SRAM_REQ_BIT (1<<21)
-#define CONFIG_DMA_REQ_BIT (1<<20)
-#define CONFIG_ECC_MODE_MASK 0x000E0000
-#define CONFIG_ECC_MODE_SHIFT 17
-#define CONFIG_FAST_FLASH_BIT (1<<16)
-#define CONFIG_16BIT (1<<7)
-#define CONFIG_BOOT_MODE_BIT (1<<6)
-#define CONFIG_ADDR_AUTO_INCR_BIT (1<<5)
-#define CONFIG_BUFNO_AUTO_INCR_BIT (1<<4)
-#define CONFIG_PAGE_CNT_MASK 0xF
-#define CONFIG_PAGE_CNT_SHIFT 0
+#define CFG_ECC_SRAM_ADDR_MASK 0x7FC00000
+#define CFG_ECC_SRAM_ADDR_SHIFT 22
+#define CFG_ECC_SRAM_REQ_BIT (1<<21)
+#define CFG_DMA_REQ_BIT (1<<20)
+#define CFG_ECC_MODE_MASK 0x000E0000
+#define CFG_ECC_MODE_SHIFT 17
+#define CFG_FAST_FLASH_BIT (1<<16)
+#define CFG_16BIT (1<<7)
+#define CFG_BOOT_MODE_BIT (1<<6)
+#define CFG_ADDR_AUTO_INCR_BIT (1<<5)
+#define CFG_BUFNO_AUTO_INCR_BIT (1<<4)
+#define CFG_PAGE_CNT_MASK 0xF
+#define CFG_PAGE_CNT_SHIFT 0
/* NFC_IRQ_STATUS Field */
#define IDLE_IRQ_BIT (1<<29)
@@ -342,8 +342,8 @@
static inline void vf610_nfc_ecc_mode(struct mtd_info *mtd, int ecc_mode)
{
vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
- CONFIG_ECC_MODE_MASK,
- CONFIG_ECC_MODE_SHIFT, ecc_mode);
+ CFG_ECC_MODE_MASK,
+ CFG_ECC_MODE_SHIFT, ecc_mode);
}
static inline void vf610_nfc_transfer_size(void __iomem *regbase, int size)
@@ -666,16 +666,16 @@
chip->ecc.size = PAGE_2K;
/* Set configuration register. */
- vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
- vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_ADDR_AUTO_INCR_BIT);
- vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BUFNO_AUTO_INCR_BIT);
- vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BOOT_MODE_BIT);
- vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_DMA_REQ_BIT);
- vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_FAST_FLASH_BIT);
+ vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CFG_16BIT);
+ vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CFG_ADDR_AUTO_INCR_BIT);
+ vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CFG_BUFNO_AUTO_INCR_BIT);
+ vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CFG_BOOT_MODE_BIT);
+ vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CFG_DMA_REQ_BIT);
+ vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CFG_FAST_FLASH_BIT);
/* Disable virtual pages, only one elementary transfer unit */
- vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, CONFIG_PAGE_CNT_MASK,
- CONFIG_PAGE_CNT_SHIFT, 1);
+ vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, CFG_PAGE_CNT_MASK,
+ CFG_PAGE_CNT_SHIFT, 1);
/* first scan to find the device and get the page size */
if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL)) {
@@ -684,7 +684,7 @@
}
if (cfg.width == 16)
- vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
+ vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CFG_16BIT);
/* Bad block options. */
if (cfg.flash_bbt)
@@ -734,12 +734,12 @@
/* Set ECC_STATUS offset */
vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
- CONFIG_ECC_SRAM_ADDR_MASK,
- CONFIG_ECC_SRAM_ADDR_SHIFT,
+ CFG_ECC_SRAM_ADDR_MASK,
+ CFG_ECC_SRAM_ADDR_SHIFT,
ECC_SRAM_ADDR >> 3);
/* Enable ECC status in SRAM */
- vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_ECC_SRAM_REQ_BIT);
+ vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CFG_ECC_SRAM_REQ_BIT);
}
/* second phase scan */
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index b2291f7..ddeef37 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -99,7 +99,6 @@
config SPI_FLASH_SOFT_RESET
bool "Software Reset support for SPI NOR flashes"
- default n
help
Enable support for xSPI Software Reset. It will be used to switch from
Octal DTR mode to legacy mode on shutdown and boot (if enabled).
@@ -107,7 +106,6 @@
config SPI_FLASH_SOFT_RESET_ON_BOOT
bool "Perform a Software Reset on boot on flashes that boot in stateful mode"
depends on SPI_FLASH_SOFT_RESET
- default n
help
Perform a Software Reset on boot to allow detecting flashes that are
handed to us in Octal DTR mode. Do not enable this config on flashes
diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig
index a78fd51..67a3cf1 100644
--- a/drivers/mtd/ubi/Kconfig
+++ b/drivers/mtd/ubi/Kconfig
@@ -68,7 +68,6 @@
config MTD_UBI_FASTMAP
bool "UBI Fastmap (Experimental feature)"
- default n
help
Important: this feature is experimental so far and the on-flash
format for fastmap may change in the next kernel versions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index d4dc720..6c12959 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -2,6 +2,9 @@
source "drivers/net/pfe_eth/Kconfig"
source "drivers/net/fsl-mc/Kconfig"
+config ETH
+ def_bool y
+
config DM_ETH
bool "Enable Driver Model for Ethernet drivers"
depends on DM
@@ -557,7 +560,6 @@
config SMC911X_32_BIT
bool "Enable SMC911X 32-bit interface"
- default n
help
Define this if data bus is 32 bits. If your processor use a
narrower 16 bit bus or cannot convert one 32 bit word to two 16 bit
@@ -711,7 +713,6 @@
config PHY_NORXERR
bool "PHY_NORXERR"
depends on ETHER_ON_FEC1
- default n
help
The PHY does not have a RXERR line (RMII only).
(so program the FEC to ignore it).
@@ -736,7 +737,6 @@
config FEC2_PHY_NORXERR
bool "PHY_NORXERR"
depends on ETHER_ON_FEC2
- default n
help
The PHY does not have a RXERR line (RMII only).
(so program the FEC to ignore it).
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index b94ccea..e4078d1 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -3,13 +3,14 @@
# (C) Copyright 2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+obj-y += phy/
+
obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
obj-$(CONFIG_AG7XXX) += ag7xxx.o
obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
obj-$(CONFIG_BCM6348_ETH) += bcm6348-eth.o
obj-$(CONFIG_BCM6368_ETH) += bcm6368-eth.o
obj-$(CONFIG_BCMGENET) += bcmgenet.o
-obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
obj-$(CONFIG_BCM_SF2_ETH) += bcm-sf2-eth.o
obj-$(CONFIG_BCM_SF2_ETH_GMAC) += bcm-sf2-eth-gmac.o
@@ -33,6 +34,7 @@
obj-$(CONFIG_EP93XX) += ep93xx_eth.o
obj-$(CONFIG_ETHOC) += ethoc.o
obj-$(CONFIG_FEC_MXC) += fec_mxc.o
+obj-$(CONFIG_FMAN_ENET) += fm/
obj-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o
obj-$(CONFIG_FTGMAC100) += ftgmac100.o
obj-$(CONFIG_FTMAC110) += ftmac110.o
diff --git a/drivers/net/at91_emac.c b/drivers/net/at91_emac.c
deleted file mode 100644
index b4581d8..0000000
--- a/drivers/net/at91_emac.c
+++ /dev/null
@@ -1,519 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2009 BuS Elektronik GmbH & Co. KG
- * Jens Scharsig (esw@bus-elektronik.de)
- *
- * (C) Copyright 2003
- * Author : Hamid Ikdoumi (Atmel)
- */
-
-#include <common.h>
-#include <log.h>
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/at91_emac.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/at91_pio.h>
-#include <net.h>
-#include <netdev.h>
-#include <malloc.h>
-#include <miiphy.h>
-#include <linux/delay.h>
-#include <linux/mii.h>
-
-#undef MII_DEBUG
-#undef ET_DEBUG
-
-#if (CONFIG_SYS_RX_ETH_BUFFER > 1024)
-#error AT91 EMAC supports max 1024 RX buffers. \
- Please decrease the CONFIG_SYS_RX_ETH_BUFFER value
-#endif
-
-#ifndef CONFIG_DRIVER_AT91EMAC_PHYADDR
-#define CONFIG_DRIVER_AT91EMAC_PHYADDR 0
-#endif
-
-/* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */
-#if (AT91C_MASTER_CLOCK > 80000000)
- #define HCLK_DIV AT91_EMAC_CFG_MCLK_64
-#elif (AT91C_MASTER_CLOCK > 40000000)
- #define HCLK_DIV AT91_EMAC_CFG_MCLK_32
-#elif (AT91C_MASTER_CLOCK > 20000000)
- #define HCLK_DIV AT91_EMAC_CFG_MCLK_16
-#else
- #define HCLK_DIV AT91_EMAC_CFG_MCLK_8
-#endif
-
-#ifdef ET_DEBUG
-#define DEBUG_AT91EMAC 1
-#else
-#define DEBUG_AT91EMAC 0
-#endif
-
-#ifdef MII_DEBUG
-#define DEBUG_AT91PHY 1
-#else
-#define DEBUG_AT91PHY 0
-#endif
-
-#ifndef CONFIG_DRIVER_AT91EMAC_QUIET
-#define VERBOSEP 1
-#else
-#define VERBOSEP 0
-#endif
-
-#define RBF_ADDR 0xfffffffc
-#define RBF_OWNER (1<<0)
-#define RBF_WRAP (1<<1)
-#define RBF_BROADCAST (1<<31)
-#define RBF_MULTICAST (1<<30)
-#define RBF_UNICAST (1<<29)
-#define RBF_EXTERNAL (1<<28)
-#define RBF_UNKNOWN (1<<27)
-#define RBF_SIZE 0x07ff
-#define RBF_LOCAL4 (1<<26)
-#define RBF_LOCAL3 (1<<25)
-#define RBF_LOCAL2 (1<<24)
-#define RBF_LOCAL1 (1<<23)
-
-#define RBF_FRAMEMAX CONFIG_SYS_RX_ETH_BUFFER
-#define RBF_FRAMELEN 0x600
-
-typedef struct {
- unsigned long addr, size;
-} rbf_t;
-
-typedef struct {
- rbf_t rbfdt[RBF_FRAMEMAX];
- unsigned long rbindex;
-} emac_device;
-
-void at91emac_EnableMDIO(at91_emac_t *at91mac)
-{
- /* Mac CTRL reg set for MDIO enable */
- writel(readl(&at91mac->ctl) | AT91_EMAC_CTL_MPE, &at91mac->ctl);
-}
-
-void at91emac_DisableMDIO(at91_emac_t *at91mac)
-{
- /* Mac CTRL reg set for MDIO disable */
- writel(readl(&at91mac->ctl) & ~AT91_EMAC_CTL_MPE, &at91mac->ctl);
-}
-
-int at91emac_read(at91_emac_t *at91mac, unsigned char addr,
- unsigned char reg, unsigned short *value)
-{
- unsigned long netstat;
- at91emac_EnableMDIO(at91mac);
-
- writel(AT91_EMAC_MAN_HIGH | AT91_EMAC_MAN_RW_R |
- AT91_EMAC_MAN_REGA(reg) | AT91_EMAC_MAN_CODE_802_3 |
- AT91_EMAC_MAN_PHYA(addr),
- &at91mac->man);
-
- do {
- netstat = readl(&at91mac->sr);
- debug_cond(DEBUG_AT91PHY, "poll SR %08lx\n", netstat);
- } while (!(netstat & AT91_EMAC_SR_IDLE));
-
- *value = readl(&at91mac->man) & AT91_EMAC_MAN_DATA_MASK;
-
- at91emac_DisableMDIO(at91mac);
-
- debug_cond(DEBUG_AT91PHY,
- "AT91PHY read %p REG(%d)=%x\n", at91mac, reg, *value);
-
- return 0;
-}
-
-int at91emac_write(at91_emac_t *at91mac, unsigned char addr,
- unsigned char reg, unsigned short value)
-{
- unsigned long netstat;
- debug_cond(DEBUG_AT91PHY,
- "AT91PHY write %p REG(%d)=%p\n", at91mac, reg, &value);
-
- at91emac_EnableMDIO(at91mac);
-
- writel(AT91_EMAC_MAN_HIGH | AT91_EMAC_MAN_RW_W |
- AT91_EMAC_MAN_REGA(reg) | AT91_EMAC_MAN_CODE_802_3 |
- AT91_EMAC_MAN_PHYA(addr) | (value & AT91_EMAC_MAN_DATA_MASK),
- &at91mac->man);
-
- do {
- netstat = readl(&at91mac->sr);
- debug_cond(DEBUG_AT91PHY, "poll SR %08lx\n", netstat);
- } while (!(netstat & AT91_EMAC_SR_IDLE));
-
- at91emac_DisableMDIO(at91mac);
-
- return 0;
-}
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-
-at91_emac_t *get_emacbase_by_name(const char *devname)
-{
- struct eth_device *netdev;
-
- netdev = eth_get_dev_by_name(devname);
- return (at91_emac_t *) netdev->iobase;
-}
-
-int at91emac_mii_read(struct mii_dev *bus, int addr, int devad, int reg)
-{
- unsigned short value = 0;
- at91_emac_t *emac;
-
- emac = get_emacbase_by_name(bus->name);
- at91emac_read(emac , addr, reg, &value);
- return value;
-}
-
-
-int at91emac_mii_write(struct mii_dev *bus, int addr, int devad, int reg,
- u16 value)
-{
- at91_emac_t *emac;
-
- emac = get_emacbase_by_name(bus->name);
- at91emac_write(emac, addr, reg, value);
- return 0;
-}
-
-#endif
-
-static int at91emac_phy_reset(struct eth_device *netdev)
-{
- int i;
- u16 status, adv;
- at91_emac_t *emac;
-
- emac = (at91_emac_t *) netdev->iobase;
-
- adv = ADVERTISE_CSMA | ADVERTISE_ALL;
- at91emac_write(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
- MII_ADVERTISE, adv);
- debug_cond(VERBOSEP, "%s: Starting autonegotiation...\n", netdev->name);
- at91emac_write(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_BMCR,
- (BMCR_ANENABLE | BMCR_ANRESTART));
-
- for (i = 0; i < 30000; i++) {
- at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
- MII_BMSR, &status);
- if (status & BMSR_ANEGCOMPLETE)
- break;
- udelay(100);
- }
-
- if (status & BMSR_ANEGCOMPLETE) {
- debug_cond(VERBOSEP,
- "%s: Autonegotiation complete\n", netdev->name);
- } else {
- printf("%s: Autonegotiation timed out (status=0x%04x)\n",
- netdev->name, status);
- return -1;
- }
- return 0;
-}
-
-static int at91emac_phy_init(struct eth_device *netdev)
-{
- u16 phy_id, status, adv, lpa;
- int media, speed, duplex;
- int i;
- at91_emac_t *emac;
-
- emac = (at91_emac_t *) netdev->iobase;
-
- /* Check if the PHY is up to snuff... */
- at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
- MII_PHYSID1, &phy_id);
- if (phy_id == 0xffff) {
- printf("%s: No PHY present\n", netdev->name);
- return -1;
- }
-
- at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
- MII_BMSR, &status);
-
- if (!(status & BMSR_LSTATUS)) {
- /* Try to re-negotiate if we don't have link already. */
- if (at91emac_phy_reset(netdev))
- return -2;
-
- for (i = 0; i < 100000 / 100; i++) {
- at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
- MII_BMSR, &status);
- if (status & BMSR_LSTATUS)
- break;
- udelay(100);
- }
- }
- if (!(status & BMSR_LSTATUS)) {
- debug_cond(VERBOSEP, "%s: link down\n", netdev->name);
- return -3;
- } else {
- at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
- MII_ADVERTISE, &adv);
- at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
- MII_LPA, &lpa);
- media = mii_nway_result(lpa & adv);
- speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
- ? 1 : 0);
- duplex = (media & ADVERTISE_FULL) ? 1 : 0;
- debug_cond(VERBOSEP, "%s: link up, %sMbps %s-duplex\n",
- netdev->name,
- speed ? "100" : "10",
- duplex ? "full" : "half");
- }
- return 0;
-}
-
-int at91emac_UpdateLinkSpeed(at91_emac_t *emac)
-{
- unsigned short stat1;
-
- at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_BMSR, &stat1);
-
- if (!(stat1 & BMSR_LSTATUS)) /* link status up? */
- return -1;
-
- if (stat1 & BMSR_100FULL) {
- /*set Emac for 100BaseTX and Full Duplex */
- writel(readl(&emac->cfg) |
- AT91_EMAC_CFG_SPD | AT91_EMAC_CFG_FD,
- &emac->cfg);
- return 0;
- }
-
- if (stat1 & BMSR_10FULL) {
- /*set MII for 10BaseT and Full Duplex */
- writel((readl(&emac->cfg) &
- ~(AT91_EMAC_CFG_SPD | AT91_EMAC_CFG_FD)
- ) | AT91_EMAC_CFG_FD,
- &emac->cfg);
- return 0;
- }
-
- if (stat1 & BMSR_100HALF) {
- /*set MII for 100BaseTX and Half Duplex */
- writel((readl(&emac->cfg) &
- ~(AT91_EMAC_CFG_SPD | AT91_EMAC_CFG_FD)
- ) | AT91_EMAC_CFG_SPD,
- &emac->cfg);
- return 0;
- }
-
- if (stat1 & BMSR_10HALF) {
- /*set MII for 10BaseT and Half Duplex */
- writel((readl(&emac->cfg) &
- ~(AT91_EMAC_CFG_SPD | AT91_EMAC_CFG_FD)),
- &emac->cfg);
- return 0;
- }
- return 0;
-}
-
-static int at91emac_init(struct eth_device *netdev, struct bd_info *bd)
-{
- int i;
- u32 value;
- emac_device *dev;
- at91_emac_t *emac;
- at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
-
- emac = (at91_emac_t *) netdev->iobase;
- dev = (emac_device *) netdev->priv;
-
- /* PIO Disable Register */
- value = ATMEL_PMX_AA_EMDIO | ATMEL_PMX_AA_EMDC |
- ATMEL_PMX_AA_ERXER | ATMEL_PMX_AA_ERX1 |
- ATMEL_PMX_AA_ERX0 | ATMEL_PMX_AA_ECRS |
- ATMEL_PMX_AA_ETX1 | ATMEL_PMX_AA_ETX0 |
- ATMEL_PMX_AA_ETXEN | ATMEL_PMX_AA_EREFCK;
-
- writel(value, &pio->pioa.pdr);
- writel(value, &pio->pioa.mux.pio2.asr);
-
-#ifdef CONFIG_RMII
- value = ATMEL_PMX_BA_ERXCK;
-#else
- value = ATMEL_PMX_BA_ERXCK | ATMEL_PMX_BA_ECOL |
- ATMEL_PMX_BA_ERXDV | ATMEL_PMX_BA_ERX3 |
- ATMEL_PMX_BA_ERX2 | ATMEL_PMX_BA_ETXER |
- ATMEL_PMX_BA_ETX3 | ATMEL_PMX_BA_ETX2;
-#endif
- writel(value, &pio->piob.pdr);
- writel(value, &pio->piob.mux.pio2.bsr);
-
- at91_periph_clk_enable(ATMEL_ID_EMAC);
-
- writel(readl(&emac->ctl) | AT91_EMAC_CTL_CSR, &emac->ctl);
-
- /* Init Ethernet buffers */
- for (i = 0; i < RBF_FRAMEMAX; i++) {
- dev->rbfdt[i].addr = (unsigned long) net_rx_packets[i];
- dev->rbfdt[i].size = 0;
- }
- dev->rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;
- dev->rbindex = 0;
- writel((u32) &(dev->rbfdt[0]), &emac->rbqp);
-
- writel(readl(&emac->rsr) &
- ~(AT91_EMAC_RSR_OVR | AT91_EMAC_RSR_REC | AT91_EMAC_RSR_BNA),
- &emac->rsr);
-
- value = AT91_EMAC_CFG_CAF | AT91_EMAC_CFG_NBC |
- HCLK_DIV;
-#ifdef CONFIG_RMII
- value |= AT91_EMAC_CFG_RMII;
-#endif
- writel(value, &emac->cfg);
-
- writel(readl(&emac->ctl) | AT91_EMAC_CTL_TE | AT91_EMAC_CTL_RE,
- &emac->ctl);
-
- if (!at91emac_phy_init(netdev)) {
- at91emac_UpdateLinkSpeed(emac);
- return 0;
- }
- return -1;
-}
-
-static void at91emac_halt(struct eth_device *netdev)
-{
- at91_emac_t *emac;
-
- emac = (at91_emac_t *) netdev->iobase;
- writel(readl(&emac->ctl) & ~(AT91_EMAC_CTL_TE | AT91_EMAC_CTL_RE),
- &emac->ctl);
- debug_cond(DEBUG_AT91EMAC, "halt MAC\n");
-}
-
-static int at91emac_send(struct eth_device *netdev, void *packet, int length)
-{
- at91_emac_t *emac;
-
- emac = (at91_emac_t *) netdev->iobase;
-
- while (!(readl(&emac->tsr) & AT91_EMAC_TSR_BNQ))
- ;
- writel((u32) packet, &emac->tar);
- writel(AT91_EMAC_TCR_LEN(length), &emac->tcr);
- while (AT91_EMAC_TCR_LEN(readl(&emac->tcr)))
- ;
- debug_cond(DEBUG_AT91EMAC, "Send %d\n", length);
- writel(readl(&emac->tsr) | AT91_EMAC_TSR_COMP, &emac->tsr);
- return 0;
-}
-
-static int at91emac_recv(struct eth_device *netdev)
-{
- emac_device *dev;
- at91_emac_t *emac;
- rbf_t *rbfp;
- int size;
-
- emac = (at91_emac_t *) netdev->iobase;
- dev = (emac_device *) netdev->priv;
-
- rbfp = &dev->rbfdt[dev->rbindex];
- while (rbfp->addr & RBF_OWNER) {
- size = rbfp->size & RBF_SIZE;
- net_process_received_packet(net_rx_packets[dev->rbindex], size);
-
- debug_cond(DEBUG_AT91EMAC, "Recv[%ld]: %d bytes @ %lx\n",
- dev->rbindex, size, rbfp->addr);
-
- rbfp->addr &= ~RBF_OWNER;
- rbfp->size = 0;
- if (dev->rbindex < (RBF_FRAMEMAX-1))
- dev->rbindex++;
- else
- dev->rbindex = 0;
-
- rbfp = &(dev->rbfdt[dev->rbindex]);
- if (!(rbfp->addr & RBF_OWNER))
- writel(readl(&emac->rsr) | AT91_EMAC_RSR_REC,
- &emac->rsr);
- }
-
- if (readl(&emac->isr) & AT91_EMAC_IxR_RBNA) {
- /* EMAC silicon bug 41.3.1 workaround 1 */
- writel(readl(&emac->ctl) & ~AT91_EMAC_CTL_RE, &emac->ctl);
- writel(readl(&emac->ctl) | AT91_EMAC_CTL_RE, &emac->ctl);
- dev->rbindex = 0;
- printf("%s: reset receiver (EMAC dead lock bug)\n",
- netdev->name);
- }
- return 0;
-}
-
-static int at91emac_write_hwaddr(struct eth_device *netdev)
-{
- at91_emac_t *emac;
- emac = (at91_emac_t *) netdev->iobase;
-
- at91_periph_clk_enable(ATMEL_ID_EMAC);
-
- debug_cond(DEBUG_AT91EMAC,
- "init MAC-ADDR %02x:%02x:%02x:%02x:%02x:%02x\n",
- netdev->enetaddr[5], netdev->enetaddr[4], netdev->enetaddr[3],
- netdev->enetaddr[2], netdev->enetaddr[1], netdev->enetaddr[0]);
- writel( (netdev->enetaddr[0] | netdev->enetaddr[1] << 8 |
- netdev->enetaddr[2] << 16 | netdev->enetaddr[3] << 24),
- &emac->sa2l);
- writel((netdev->enetaddr[4] | netdev->enetaddr[5] << 8), &emac->sa2h);
- debug_cond(DEBUG_AT91EMAC, "init MAC-ADDR %x%x\n",
- readl(&emac->sa2h), readl(&emac->sa2l));
- return 0;
-}
-
-int at91emac_register(struct bd_info *bis, unsigned long iobase)
-{
- emac_device *emac;
- emac_device *emacfix;
- struct eth_device *dev;
-
- if (iobase == 0)
- iobase = ATMEL_BASE_EMAC;
- emac = malloc(sizeof(*emac)+512);
- if (emac == NULL)
- return -1;
- dev = malloc(sizeof(*dev));
- if (dev == NULL) {
- free(emac);
- return -1;
- }
- /* alignment as per Errata (64 bytes) is insufficient! */
- emacfix = (emac_device *) (((unsigned long) emac + 0x1ff) & 0xFFFFFE00);
- memset(emacfix, 0, sizeof(emac_device));
-
- memset(dev, 0, sizeof(*dev));
- strcpy(dev->name, "emac");
- dev->iobase = iobase;
- dev->priv = emacfix;
- dev->init = at91emac_init;
- dev->halt = at91emac_halt;
- dev->send = at91emac_send;
- dev->recv = at91emac_recv;
- dev->write_hwaddr = at91emac_write_hwaddr;
-
- eth_register(dev);
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- int retval;
- struct mii_dev *mdiodev = mdio_alloc();
- if (!mdiodev)
- return -ENOMEM;
- strlcpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
- mdiodev->read = at91emac_mii_read;
- mdiodev->write = at91emac_mii_write;
-
- retval = mdio_register(mdiodev);
- if (retval < 0)
- return retval;
-#endif
- return 1;
-}
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 64d5ddf..68ee7d7 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -71,7 +71,6 @@
config PHY_AQUANTIA_UPLOAD_FW
bool "Aquantia firmware loading support"
- default n
depends on PHY_AQUANTIA
help
Aquantia PHYs use firmware which can be either loaded automatically
@@ -102,7 +101,6 @@
config SYS_CORTINA_NO_FW_UPLOAD
bool "Cortina firmware loading support"
- default n
depends on PHY_CORTINA
help
Cortina phy has provision to store phy firmware in attached dedicated
@@ -250,7 +248,6 @@
config RTL8211F_PHY_FORCE_EEE_RXC_ON
bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI"
depends on PHY_REALTEK
- default n
help
The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate
transitions to/from a lower power consumption level (Low Power Idle
diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h
index 4c3acba..db324c1 100644
--- a/drivers/net/smc91111.h
+++ b/drivers/net/smc91111.h
@@ -251,18 +251,14 @@
* We have only 16 Bit PCMCIA access on Socket 0
*/
-#ifdef CONFIG_ADNPESC1
-#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1))))
-#elif CONFIG_ARM64
+#if CONFIG_ARM64
#define SMC_inw(a, r) (*((volatile word*)((a)->iobase+((dword)(r)))))
#else
#define SMC_inw(a, r) (*((volatile word*)((a)->iobase+(r))))
#endif
#define SMC_inb(a,r) (((r)&1) ? SMC_inw((a),(r)&~1)>>8 : SMC_inw((a),(r)&0xFF))
-#ifdef CONFIG_ADNPESC1
-#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+((r)<<1))) = d)
-#elif CONFIG_ARM64
+#if CONFIG_ARM64
#define SMC_outw(a, d, r) \
(*((volatile word*)((a)->iobase+((dword)(r)))) = d)
#else
@@ -442,11 +438,6 @@
#define RPC_DEFAULT ( RPC_SPEED | RPC_DPLX | RPC_ANEG \
| (RPC_LED_TX_RX << RPC_LSXA_SHFT) \
| (RPC_LED_100_10 << RPC_LSXB_SHFT) )
-#elif defined(CONFIG_ADNPESC1)
-/* SSV ADNP/ESC1 has only one LED: LEDa -> Rx/Tx indicator */
-#define RPC_DEFAULT ( RPC_SPEED | RPC_DPLX | RPC_ANEG \
- | (RPC_LED_TX_RX << RPC_LSXA_SHFT) \
- | (RPC_LED_100_10 << RPC_LSXB_SHFT) )
#else
/* SMSC reference design: LEDa --> green, LEDb --> yellow */
#define RPC_DEFAULT ( RPC_SPEED | RPC_DPLX | RPC_ANEG \
diff --git a/drivers/pch/pch-uclass.c b/drivers/pch/pch-uclass.c
index 7bc2372..af028f9 100644
--- a/drivers/pch/pch-uclass.c
+++ b/drivers/pch/pch-uclass.c
@@ -66,7 +66,7 @@
UCLASS_DRIVER(pch) = {
.id = UCLASS_PCH,
.name = "pch",
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
};
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index e4123ba..cc139af 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -21,7 +21,6 @@
config PCI_AARDVARK
bool "Enable Aardvark PCIe driver"
- default n
depends on DM_GPIO
depends on ARMADA_3700
help
@@ -37,7 +36,6 @@
config PCI_REGION_MULTI_ENTRY
bool "Enable Multiple entries of region type MEMORY in ranges for PCI"
- default n
help
Enable PCI memory regions to be of multiple entry. Multiple entry
here refers to allow more than one count of address ranges for MEMORY
@@ -47,7 +45,6 @@
config PCI_MAP_SYSTEM_MEMORY
bool "Map local system memory from a virtual base address"
depends on MIPS
- default n
help
Say Y if base address of system memory is being used as a virtual address
instead of a physical address (e.g. on MIPS). The PCI core will then remap
@@ -58,7 +55,6 @@
config PCI_SRIOV
bool "Enable Single Root I/O Virtualization support for PCI"
- default n
help
Say Y here if you want to enable PCI Single Root I/O Virtualization
capability support. This helps to enumerate Virtual Function devices
@@ -67,7 +63,6 @@
config PCI_ARID
bool "Enable Alternate Routing-ID support for PCI"
- default n
help
Say Y here if you want to enable Alternate Routing-ID capability
support on PCI devices. This helps to skip some devices in BDF
@@ -75,14 +70,12 @@
config PCIE_ECAM_GENERIC
bool "Generic ECAM-based PCI host controller support"
- default n
help
Say Y here if you want to enable support for generic ECAM-based
PCIe host controllers, such as the one emulated by QEMU.
config PCIE_ECAM_SYNQUACER
bool "SynQuacer ECAM-based PCI host controller support"
- default n
select PCI_INIT_R
select PCI_REGION_MULTI_ENTRY
help
@@ -186,7 +179,6 @@
config PCIE_LAYERSCAPE
bool
- default n
config PCIE_LAYERSCAPE_RC
bool "Layerscape PCIe Root Complex mode support"
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index ce2eb5d..4d0e938 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -856,10 +856,7 @@
/* Check only the first access, we don't expect problems */
ret = pci_bus_read_config(bus, bdf, PCI_VENDOR_ID, &vendor,
PCI_SIZE_16);
- if (ret)
- goto error;
-
- if (vendor == 0xffff || vendor == 0x0000)
+ if (ret || vendor == 0xffff || vendor == 0x0000)
continue;
pci_bus_read_config(bus, bdf, PCI_HEADER_TYPE,
@@ -940,10 +937,6 @@
}
return 0;
-error:
- printf("Cannot read bus configuration: %d\n", ret);
-
- return ret;
}
static void decode_regions(struct pci_controller *hose, ofnode parent_node,
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index b128a05..7b6e629 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -165,6 +165,7 @@
struct pci_region *pci_prefetch;
struct pci_region *pci_io;
u16 cmdstat, prefechable_64;
+ u8 io_32;
struct udevice *ctlr = pci_get_controller(dev);
struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr);
@@ -175,6 +176,8 @@
dm_pci_read_config16(dev, PCI_COMMAND, &cmdstat);
dm_pci_read_config16(dev, PCI_PREF_MEMORY_BASE, &prefechable_64);
prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
+ dm_pci_read_config8(dev, PCI_IO_LIMIT, &io_32);
+ io_32 &= PCI_IO_RANGE_TYPE_MASK;
/* Configure bus number registers */
dm_pci_write_config8(dev, PCI_PRIMARY_BUS,
@@ -191,7 +194,8 @@
* I/O space
*/
dm_pci_write_config16(dev, PCI_MEMORY_BASE,
- (pci_mem->bus_lower & 0xfff00000) >> 16);
+ ((pci_mem->bus_lower & 0xfff00000) >> 16) &
+ PCI_MEMORY_RANGE_MASK);
cmdstat |= PCI_COMMAND_MEMORY;
}
@@ -205,7 +209,8 @@
* I/O space
*/
dm_pci_write_config16(dev, PCI_PREF_MEMORY_BASE,
- (pci_prefetch->bus_lower & 0xfff00000) >> 16);
+ (((pci_prefetch->bus_lower & 0xfff00000) >> 16) &
+ PCI_PREF_RANGE_MASK) | prefechable_64);
if (prefechable_64 == PCI_PREF_RANGE_TYPE_64)
#ifdef CONFIG_SYS_PCI_64BIT
dm_pci_write_config32(dev, PCI_PREF_BASE_UPPER32,
@@ -217,8 +222,10 @@
cmdstat |= PCI_COMMAND_MEMORY;
} else {
/* We don't support prefetchable memory for now, so disable */
- dm_pci_write_config16(dev, PCI_PREF_MEMORY_BASE, 0x1000);
- dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, 0x0);
+ dm_pci_write_config16(dev, PCI_PREF_MEMORY_BASE, 0x1000 |
+ prefechable_64);
+ dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, 0x0 |
+ prefechable_64);
if (prefechable_64 == PCI_PREF_RANGE_TYPE_64) {
dm_pci_write_config16(dev, PCI_PREF_BASE_UPPER32, 0x0);
dm_pci_write_config16(dev, PCI_PREF_LIMIT_UPPER32, 0x0);
@@ -230,8 +237,10 @@
pciauto_region_align(pci_io, 0x1000);
dm_pci_write_config8(dev, PCI_IO_BASE,
- (pci_io->bus_lower & 0x0000f000) >> 8);
- dm_pci_write_config16(dev, PCI_IO_BASE_UPPER16,
+ (((pci_io->bus_lower & 0x0000f000) >> 8) &
+ PCI_IO_RANGE_MASK) | io_32);
+ if (io_32 == PCI_IO_RANGE_TYPE_32)
+ dm_pci_write_config16(dev, PCI_IO_BASE_UPPER16,
(pci_io->bus_lower & 0xffff0000) >> 16);
cmdstat |= PCI_COMMAND_IO;
@@ -261,7 +270,8 @@
pciauto_region_align(pci_mem, 0x100000);
dm_pci_write_config16(dev, PCI_MEMORY_LIMIT,
- (pci_mem->bus_lower - 1) >> 16);
+ ((pci_mem->bus_lower - 1) >> 16) &
+ PCI_MEMORY_RANGE_MASK);
}
if (pci_prefetch) {
@@ -275,7 +285,8 @@
pciauto_region_align(pci_prefetch, 0x100000);
dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT,
- (pci_prefetch->bus_lower - 1) >> 16);
+ (((pci_prefetch->bus_lower - 1) >> 16) &
+ PCI_PREF_RANGE_MASK) | prefechable_64);
if (prefechable_64 == PCI_PREF_RANGE_TYPE_64)
#ifdef CONFIG_SYS_PCI_64BIT
dm_pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32,
@@ -286,12 +297,20 @@
}
if (pci_io) {
+ u8 io_32;
+
+ dm_pci_read_config8(dev, PCI_IO_LIMIT,
+ &io_32);
+ io_32 &= PCI_IO_RANGE_TYPE_MASK;
+
/* Round I/O allocator to 4KB boundary */
pciauto_region_align(pci_io, 0x1000);
dm_pci_write_config8(dev, PCI_IO_LIMIT,
- ((pci_io->bus_lower - 1) & 0x0000f000) >> 8);
- dm_pci_write_config16(dev, PCI_IO_LIMIT_UPPER16,
+ ((((pci_io->bus_lower - 1) & 0x0000f000) >> 8) &
+ PCI_IO_RANGE_MASK) | io_32);
+ if (io_32 == PCI_IO_RANGE_TYPE_32)
+ dm_pci_write_config16(dev, PCI_IO_LIMIT_UPPER16,
((pci_io->bus_lower - 1) & 0xffff0000) >> 16);
}
}
diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c
index 12ce9d5..be03dcb 100644
--- a/drivers/pci/pcie_iproc.c
+++ b/drivers/pci/pcie_iproc.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2020 Broadcom
+ * Copyright (C) 2020-2021 Broadcom
*
*/
@@ -12,6 +12,7 @@
#include <malloc.h>
#include <asm/io.h>
#include <dm/device_compat.h>
+#include <linux/delay.h>
#include <linux/log2.h>
#define EP_PERST_SOURCE_SELECT_SHIFT 2
@@ -884,7 +885,7 @@
for (i = 0; i < hose->region_count; i++) {
if (hose->regions[i].flags == PCI_REGION_MEM ||
hose->regions[i].flags == PCI_REGION_PREFETCH) {
- debug("%d: bus_addr %p, axi_addr %p, size 0x%lx\n",
+ debug("%d: bus_addr %p, axi_addr %p, size 0x%llx\n",
i, &hose->regions[i].bus_start,
&hose->regions[i].phys_start,
hose->regions[i].size);
@@ -1049,7 +1050,7 @@
while (!pci_get_dma_regions(pcie->dev, ®ions, i)) {
dev_dbg(pcie->dev,
- "dma %d: bus_addr %#lx, axi_addr %#llx, size %#lx\n",
+ "dma %d: bus_addr %#llx, axi_addr %#llx, size %#llx\n",
i, regions.bus_start, regions.phys_start, regions.size);
/* Each range entry corresponds to an inbound mapping region */
diff --git a/drivers/phy/marvell/Kconfig b/drivers/phy/marvell/Kconfig
index 4240028..b5f69c0 100644
--- a/drivers/phy/marvell/Kconfig
+++ b/drivers/phy/marvell/Kconfig
@@ -1,6 +1,5 @@
config MVEBU_COMPHY_SUPPORT
bool "ComPhy SerDes driver"
- default n
help
Choose this option to add support
for Comphy driver.
diff --git a/drivers/pinctrl/intel/pinctrl_apl.c b/drivers/pinctrl/intel/pinctrl_apl.c
index acaa55d..181a6ff 100644
--- a/drivers/pinctrl/intel/pinctrl_apl.c
+++ b/drivers/pinctrl/intel/pinctrl_apl.c
@@ -155,7 +155,7 @@
return intel_pinctrl_of_to_plat(dev, comm, 2);
}
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id apl_gpio_ids[] = {
{ .compatible = "intel,apl-pinctrl"},
{ }
@@ -168,7 +168,7 @@
.of_match = of_match_ptr(apl_gpio_ids),
.probe = intel_pinctrl_probe,
.ops = &intel_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.of_to_plat = apl_pinctrl_of_to_plat,
diff --git a/drivers/pinctrl/nxp/pinctrl-mxs.c b/drivers/pinctrl/nxp/pinctrl-mxs.c
index e6b10a3..9a54b8b 100644
--- a/drivers/pinctrl/nxp/pinctrl-mxs.c
+++ b/drivers/pinctrl/nxp/pinctrl-mxs.c
@@ -186,7 +186,7 @@
.id = UCLASS_PINCTRL,
.of_match = of_match_ptr(mxs_pinctrl_match),
.probe = mxs_pinctrl_probe,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.priv_auto = sizeof(struct mxs_pinctrl_priv),
diff --git a/drivers/pinctrl/pinctrl-qe-io.c b/drivers/pinctrl/pinctrl-qe-io.c
index e129ab2..dc0be7c 100644
--- a/drivers/pinctrl/pinctrl-qe-io.c
+++ b/drivers/pinctrl/pinctrl-qe-io.c
@@ -248,7 +248,7 @@
.of_to_plat = qe_io_of_to_plat,
.plat_auto = sizeof(struct qe_io_plat),
.ops = &par_io_pinctrl_ops,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.flags = DM_FLAG_PRE_RELOC,
#endif
};
diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c
index dfe60b6..4462ed2 100644
--- a/drivers/pinctrl/pinctrl-uclass.c
+++ b/drivers/pinctrl/pinctrl-uclass.c
@@ -421,7 +421,7 @@
UCLASS_DRIVER(pinctrl) = {
.id = UCLASS_PINCTRL,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = pinctrl_post_bind,
#endif
.flags = DM_UC_FLAG_SEQ_ALIAS,
diff --git a/drivers/pinctrl/rockchip/pinctrl-px30.c b/drivers/pinctrl/rockchip/pinctrl-px30.c
index 6058d0f..9de29c0 100644
--- a/drivers/pinctrl/rockchip/pinctrl-px30.c
+++ b/drivers/pinctrl/rockchip/pinctrl-px30.c
@@ -363,7 +363,7 @@
.of_match = px30_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index 9ccee46..afcd343 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -103,7 +103,7 @@
.of_match = rk3036_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index 85c2e61..e6dc1af 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -205,7 +205,7 @@
.of_match = rk3128_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
index 06d53e2..9a982cb 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -126,7 +126,7 @@
.of_match = rk3188_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index fe38693..7c58f40 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -292,7 +292,7 @@
.of_match = rk3228_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index fc28102..5894f47 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -248,7 +248,7 @@
.of_match = rk3288_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3308.c b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
index a9b87b7..83186f4 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3308.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
@@ -459,7 +459,7 @@
.of_match = rk3308_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index aa8bd76..1c3c598 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -323,7 +323,7 @@
.of_match = rk3328_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index 18d3e3a..ba867a8 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -177,7 +177,7 @@
.of_match = rk3368_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 0c1adc3..caa9220 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -317,7 +317,7 @@
.of_match = rk3399_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
index d35425b..5b70b50 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -291,7 +291,7 @@
.of_match = rv1108_pinctrl_ids,
.priv_auto = sizeof(struct rockchip_pinctrl_priv),
.ops = &rockchip_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.bind = dm_scan_fdt_dev,
#endif
.probe = rockchip_pinctrl_probe,
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index c5fbf1f..2c20dc7 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -1,4 +1,46 @@
-menu "Power"
+menuconfig POWER
+ bool "Power"
+ default y
+ help
+ Enable support for power control in U-Boot. This includes support
+ for PMICs (Power-management Integrated Circuits) and some of the
+ features provided by PMICs. In particular, voltage regulators can
+ be used to enable/disable power and vary its voltage. That can be
+ useful in U-Boot to turn on boot peripherals and adjust CPU voltage
+ so that the clock speed can be increased. This enables the drivers
+ in drivers/power, drivers/power/pmic and drivers/power/regulator
+ as part of a build.
+
+if POWER
+
+config POWER_LEGACY
+ bool "Legacy power support"
+ help
+ Note: This is a legacy option. Use DM_PMIC instead.
+
+ Enable support for power control in U-Boot. This includes support
+ for PMICs (Power-management Integrated Circuits) and some of the
+ features provided by PMICs. In particular, voltage regulators can
+ be used to enable/disable power and vary its voltage. That can be
+ useful in U-Boot to turn on boot peripherals and adjust CPU voltage
+ so that the clock speed can be increased. This enables the drivers
+ in drivers/power, drivers/power/pmic and drivers/power/regulator
+ as part of a build.
+
+config SPL_POWER_LEGACY
+ bool "Legacy power support in SPL"
+ default y if POWER_LEGACY
+ help
+ Note: This is a legacy option. Use SPL_DM_PMIC instead.
+
+ Enable support for power control in SPL. This includes support
+ for PMICs (Power-management Integrated Circuits) and some of the
+ features provided by PMICs. In particular, voltage regulators can
+ be used to enable/disable power and vary its voltage. That can be
+ useful in SPL to turn on boot peripherals and adjust CPU voltage
+ so that the clock speed can be increased. This enables the drivers
+ in drivers/power, drivers/power/pmic and drivers/power/regulator
+ as part of a build.
source "drivers/power/acpi_pmc/Kconfig"
@@ -248,7 +290,6 @@
config AXP_ALDO3_INRUSH_QUIRK
bool "axp pmic (a)ldo3 inrush quirk"
depends on AXP209_POWER
- default n
---help---
The reference design denotes a value of 4.7 uF for the output capacitor
of LDO3. Some boards have too high capacitance causing an inrush current
@@ -357,7 +398,6 @@
config AXP_SW_ON
bool "axp pmic sw on"
depends on AXP809_POWER || AXP818_POWER
- default n
---help---
Enable to turn on axp pmic sw.
@@ -385,4 +425,25 @@
This adds poweroff driver for mt6323
this pmic is used on mt7623 / Bananapi R2
-endmenu
+config POWER_I2C
+ bool "I2C-based power control for legacy power"
+ depends on POWER_LEGACY
+ help
+ Enable this to use the I2C driver designed for the legacy PMIC
+ interface.
+
+ Not to be used for new designs and existing ones should be moved to
+ the new PMIC interface based on driver model.
+
+config SPL_POWER_I2C
+ bool "I2C-based power control for legacy power"
+ depends on SPL_POWER_LEGACY
+ default y if POWER_I2C
+ help
+ Enable this to use the I2C driver designed for the legacy PMIC
+ interface.
+
+ Not to be used for new designs and existing ones should be moved to
+ the new PMIC interface based on driver model.
+
+endif
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 0bef069..f805027 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -3,6 +3,14 @@
# Copyright (c) 2009 Wind River Systems, Inc.
# Tom Rix <Tom.Rix at windriver.com>
+obj-$(CONFIG_$(SPL_TPL_)ACPI_PMC) += acpi_pmc/
+obj-y += battery/
+obj-$(CONFIG_$(SPL_TPL_)POWER_DOMAIN) += domain/
+obj-y += fuel_gauge/
+obj-y += mfd/
+obj-y += pmic/
+obj-y += regulator/
+
obj-$(CONFIG_AXP152_POWER) += axp152.o
obj-$(CONFIG_AXP209_POWER) += axp209.o
obj-$(CONFIG_AXP221_POWER) += axp221.o
@@ -16,9 +24,9 @@
obj-$(CONFIG_TWL4030_POWER) += twl4030.o
obj-$(CONFIG_TWL6030_POWER) += twl6030.o
obj-$(CONFIG_PALMAS_POWER) += palmas.o
-obj-$(CONFIG_POWER) += power_core.o
+obj-$(CONFIG_$(SPL_TPL_)POWER_LEGACY) += power_core.o
obj-$(CONFIG_DIALOG_POWER) += power_dialog.o
obj-$(CONFIG_POWER_FSL) += power_fsl.o
-obj-$(CONFIG_POWER_I2C) += power_i2c.o
+obj-$(CONFIG_$(SPL_TPL_)POWER_I2C) += power_i2c.o
obj-$(CONFIG_POWER_SPI) += power_spi.o
obj-$(CONFIG_POWER_MT6323) += mt6323.o
diff --git a/drivers/power/acpi_pmc/Makefile b/drivers/power/acpi_pmc/Makefile
index 115788f..0db52a6 100644
--- a/drivers/power/acpi_pmc/Makefile
+++ b/drivers/power/acpi_pmc/Makefile
@@ -2,5 +2,5 @@
#
# Copyright 2019 Google LLC
-obj-$(CONFIG_$(SPL_TPL_)ACPI_PMC) += acpi-pmc-uclass.o
+obj-y += acpi-pmc-uclass.o
obj-$(CONFIG_$(SPL_TPL_)ACPI_PMC_SANDBOX) += sandbox.o pmc_emul.o
diff --git a/drivers/power/domain/power-domain-uclass.c b/drivers/power/domain/power-domain-uclass.c
index 00d1489..33f9206 100644
--- a/drivers/power/domain/power-domain-uclass.c
+++ b/drivers/power/domain/power-domain-uclass.c
@@ -112,7 +112,7 @@
return ops->off(power_domain);
}
-#if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA))
+#if CONFIG_IS_ENABLED(OF_REAL)
static int dev_power_domain_ctrl(struct udevice *dev, bool on)
{
struct power_domain pd;
@@ -162,7 +162,7 @@
{
return dev_power_domain_ctrl(dev, false);
}
-#endif
+#endif /* OF_REAL */
UCLASS_DRIVER(power_domain) = {
.id = UCLASS_POWER_DOMAIN,
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index fd6648b..cf2a9b2 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -10,6 +10,19 @@
- 'drivers/power/pmic/pmic-uclass.c'
- 'include/power/pmic.h'
+config SPL_DM_PMIC
+ bool "Enable Driver Model for PMIC drivers (UCLASS_PMIC) in SPL"
+ depends on SPL_DM
+ default y if DM_PMIC
+ ---help---
+ This config enables the driver-model PMIC support in SPL.
+ UCLASS_PMIC - designed to provide an I/O interface for PMIC devices.
+ For the multi-function PMIC devices, this can be used as parent I/O
+ device for each IC's interface. Then, each children uses its parent
+ for read/write. For detailed description, please refer to the files:
+ - 'drivers/power/pmic/pmic-uclass.c'
+ - 'include/power/pmic.h'
+
config PMIC_CHILDREN
bool "Allow child devices for PMICs"
depends on DM_PMIC
@@ -205,6 +218,15 @@
accessed via an I2C interface. The device is used with Rockchip SoCs.
This driver implements register read/write operations.
+config SPL_PMIC_RK8XX
+ bool "Enable support for Rockchip PMIC RK8XX"
+ depends on DM_PMIC
+ ---help---
+ The Rockchip RK808 PMIC provides four buck DC-DC convertors, 8 LDOs,
+ an RTC and two low Rds (resistance (drain to source)) switches. It is
+ accessed via an I2C interface. The device is used with Rockchip SoCs.
+ This driver implements register read/write operations.
+
config PMIC_S2MPS11
bool "Enable Driver Model for PMIC Samsung S2MPS11"
depends on DM_PMIC
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index 5d1a97e..5250eac 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -3,7 +3,7 @@
# Copyright (C) 2012 Samsung Electronics
# Lukasz Majewski <l.majewski@samsung.com>
-obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)DM_PMIC) += pmic-uclass.o
obj-$(CONFIG_DM_PMIC_FAN53555) += fan53555.o
obj-$(CONFIG_$(SPL_)DM_PMIC_DA9063) += da9063.o
obj-$(CONFIG_DM_PMIC_MAX77686) += max77686.o
@@ -20,7 +20,7 @@
obj-$(CONFIG_PMIC_AS3722) += as3722.o as3722_gpio.o
obj-$(CONFIG_PMIC_MAX8997) += max8997.o
obj-$(CONFIG_PMIC_PM8916) += pm8916.o
-obj-$(CONFIG_PMIC_RK8XX) += rk8xx.o
+obj-$(CONFIG_$(SPL_TPL_)PMIC_RK8XX) += rk8xx.o
obj-$(CONFIG_PMIC_RN5T567) += rn5t567.o
obj-$(CONFIG_PMIC_TPS65090) += tps65090.o
obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 677134c..4efb32a 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -16,7 +16,7 @@
obj-$(CONFIG_$(SPL_)DM_REGULATOR_COMMON) += regulator_common.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o
-obj-$(CONFIG_REGULATOR_RK8XX) += rk8xx.o
+obj-$(CONFIG_$(SPL_TPL_)REGULATOR_RK8XX) += rk8xx.o
obj-$(CONFIG_DM_REGULATOR_S2MPS11) += s2mps11_regulator.o
obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o
obj-$(CONFIG_DM_REGULATOR_SANDBOX) += sandbox.o
diff --git a/drivers/ram/aspeed/Kconfig b/drivers/ram/aspeed/Kconfig
index 049b9dc..576d5af 100644
--- a/drivers/ram/aspeed/Kconfig
+++ b/drivers/ram/aspeed/Kconfig
@@ -3,7 +3,6 @@
config ASPEED_DDR4_DUALX8
bool "Enable Dual X8 DDR4 die"
depends on DM && OF_CONTROL && ARCH_ASPEED
- default n
help
Say Y if dual X8 DDR4 die is used on the board. The aspeed ddr sdram
controller needs to know if the memory chip mounted on the board is dual
@@ -42,14 +41,12 @@
config ASPEED_BYPASS_SELFTEST
bool "bypass self test during DRAM initialization"
- default n
help
Say Y here to bypass DRAM self test to speed up the boot time
config ASPEED_ECC
bool "aspeed SDRAM error correcting code"
depends on DM && OF_CONTROL && ARCH_ASPEED
- default n
help
enable SDRAM ECC function
diff --git a/drivers/ram/octeon/Kconfig b/drivers/ram/octeon/Kconfig
index eb5a120..f199572 100644
--- a/drivers/ram/octeon/Kconfig
+++ b/drivers/ram/octeon/Kconfig
@@ -1,7 +1,6 @@
config RAM_OCTEON
bool "Ram drivers for Octeon SoCs"
depends on RAM && ARCH_OCTEON
- default n
help
This enables support for RAM drivers for Octeon SoCs.
@@ -9,7 +8,6 @@
config RAM_OCTEON_DDR4
bool "Octeon III DDR4 RAM support"
- default n
help
This enables support for DDR4 RAM suppoort for Octeon III. This does
not include support for Octeon CN70XX.
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index a9d0518..69c454a 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -883,13 +883,13 @@
{
int ret = 0;
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3368_sdram_params *plat = dev_get_plat(dev);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct rk3368_sdram_params *plat = dev_get_plat(dev);
- ret = regmap_init_mem(dev_ofnode(dev), &plat->map);
- if (ret)
- return ret;
-#endif
+ ret = regmap_init_mem(dev_ofnode(dev), &plat->map);
+ if (ret)
+ return ret;
+ }
return ret;
}
diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
index 25ae69e..d9ed8ad 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -816,10 +816,12 @@
static int rk3188_dmc_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3188_sdram_params *params = dev_get_plat(dev);
int ret;
+ if (!CONFIG_IS_ENABLED(OF_REAL))
+ return 0;
+
/* rk3188 supports only one-channel */
params->num_channels = 1;
ret = dev_read_u32_array(dev, "rockchip,pctl-timing",
@@ -846,7 +848,6 @@
ret = regmap_init_mem(dev_ofnode(dev), ¶ms->map);
if (ret)
return ret;
-#endif
return 0;
}
diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index 9057cca..30e9c3d 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -716,12 +716,14 @@
static int rk322x_dmc_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk322x_sdram_params *params = dev_get_plat(dev);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(dev);
int ret;
+ if (!CONFIG_IS_ENABLED(OF_REAL))
+ return 0;
+
params->num_channels = 1;
ret = fdtdec_get_int_array(blob, node, "rockchip,pctl-timing",
@@ -748,7 +750,6 @@
ret = regmap_init_mem(dev_ofnode(dev), ¶ms->map);
if (ret)
return ret;
-#endif
return 0;
}
diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c
index a933abf..f3e4a28 100644
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -973,10 +973,12 @@
static int rk3288_dmc_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3288_sdram_params *params = dev_get_plat(dev);
int ret;
+ if (!CONFIG_IS_ENABLED(OF_REAL))
+ return 0;
+
/* Rk3288 supports dual-channel, set default channel num to 2 */
params->num_channels = 2;
ret = dev_read_u32_array(dev, "rockchip,pctl-timing",
@@ -1008,7 +1010,6 @@
ret = regmap_init_mem(dev_ofnode(dev), ¶ms->map);
if (ret)
return ret;
-#endif
return 0;
}
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 9af4c37..9c6798f 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -517,7 +517,7 @@
struct rockchip_dmc_plat *plat = dev_get_plat(dev);
int ret;
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
struct rk3328_sdram_params *params = &plat->sdram_params;
#else
struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat;
@@ -549,7 +549,7 @@
static int rk3328_dmc_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
struct rockchip_dmc_plat *plat = dev_get_plat(dev);
int ret;
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index a83a670..c0a06dc 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -3013,10 +3013,12 @@
static int rk3399_dmc_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rockchip_dmc_plat *plat = dev_get_plat(dev);
int ret;
+ if (!CONFIG_IS_ENABLED(OF_REAL))
+ return 0;
+
ret = dev_read_u32_array(dev, "rockchip,sdram-params",
(u32 *)&plat->sdram_params,
sizeof(plat->sdram_params) / sizeof(u32));
@@ -3029,7 +3031,6 @@
if (ret)
printf("%s: regmap failed %d\n", __func__, ret);
-#endif
return 0;
}
@@ -3068,7 +3069,7 @@
struct dram_info *priv = dev_get_priv(dev);
struct rockchip_dmc_plat *plat = dev_get_plat(dev);
int ret;
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
struct rk3399_sdram_params *params = &plat->sdram_params;
#else
struct dtd_rockchip_rk3399_dmc *dtplat = &plat->dtplat;
@@ -3106,7 +3107,7 @@
priv->cic, priv->pmugrf, priv->pmusgrf, priv->pmucru, priv->pmu);
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->ddr_clk);
+ ret = clk_get_by_phandle(dev, dtplat->clocks, &priv->ddr_clk);
#else
ret = clk_get_by_index(dev, 0, &priv->ddr_clk);
#endif
diff --git a/drivers/ram/stm32mp1/Kconfig b/drivers/ram/stm32mp1/Kconfig
index 2fd8c7b..1aaf064 100644
--- a/drivers/ram/stm32mp1/Kconfig
+++ b/drivers/ram/stm32mp1/Kconfig
@@ -23,7 +23,6 @@
config STM32MP1_DDR_INTERACTIVE_FORCE
bool "STM32MP1 DDR driver : force interactive mode"
depends on STM32MP1_DDR_INTERACTIVE
- default n
help
force interactive mode in STM32MP1 DDR controller driver
skip the polling of character 'd' in console
diff --git a/drivers/reboot-mode/Kconfig b/drivers/reboot-mode/Kconfig
index ac67bfc..63ea18c 100644
--- a/drivers/reboot-mode/Kconfig
+++ b/drivers/reboot-mode/Kconfig
@@ -9,7 +9,6 @@
config DM_REBOOT_MODE
bool "Enable reboot mode using Driver Model"
depends on DM
- default n
help
Enable support for reboot mode control. This will allow users to
adjust the boot process based on reboot mode parameter
@@ -18,7 +17,6 @@
config DM_REBOOT_MODE_GPIO
bool "Use GPIOs as reboot mode backend"
depends on DM_REBOOT_MODE
- default n
help
Use GPIOs to control the reboot mode. This will allow users to boot
a device in a specific mode by using a GPIO that can be controlled
@@ -27,7 +25,6 @@
config DM_REBOOT_MODE_RTC
bool "Use RTC as reboot mode backend"
depends on DM_REBOOT_MODE
- default n
help
Use RTC non volatile memory to control the reboot mode. This will allow users to boot
a device in a specific mode by using a register(s) that can be controlled
diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index 94915d4..b1c5ab9 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -34,14 +34,12 @@
config RNG_STM32MP1
bool "Enable random number generator for STM32MP1"
depends on ARCH_STM32MP
- default n
help
Enable STM32MP1 rng driver.
config RNG_ROCKCHIP
bool "Enable random number generator for rockchip crypto rng"
depends on ARCH_ROCKCHIP && DM_RNG
- default n
help
Enable random number generator for rockchip.This driver is
support rng module of crypto v1 and crypto v2.
@@ -49,7 +47,6 @@
config RNG_IPROC200
bool "Broadcom iProc RNG200 random number generator"
depends on DM_RNG
- default n
help
Enable random number generator for RPI4.
endif
diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c
index 2015ce9..3be97c9 100644
--- a/drivers/rtc/ds1307.c
+++ b/drivers/rtc/ds1307.c
@@ -43,11 +43,21 @@
#define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */
+/* DS1307-specific bits */
#define RTC_CTL_BIT_RS0 0x01 /* Rate select 0 */
#define RTC_CTL_BIT_RS1 0x02 /* Rate select 1 */
#define RTC_CTL_BIT_SQWE 0x10 /* Square Wave Enable */
#define RTC_CTL_BIT_OUT 0x80 /* Output Control */
+/* DS1337-specific bits */
+#define DS1337_CTL_BIT_RS1 0x08 /* Rate select 1 */
+#define DS1337_CTL_BIT_RS2 0x10 /* Rate select 2 */
+#define DS1337_CTL_BIT_EOSC 0x80 /* Enable Oscillator */
+
+/* DS1340-specific bits */
+#define DS1340_SEC_BIT_EOSC 0x80 /* Enable Oscillator */
+#define DS1340_CTL_BIT_OUT 0x80 /* Output Control */
+
/* MCP7941X-specific bits */
#define MCP7941X_BIT_ST 0x80
#define MCP7941X_BIT_VBATEN 0x08
@@ -261,9 +271,25 @@
buf[RTC_SEC_REG_ADDR]);
return -1;
}
- }
-
- if (type == m41t11) {
+ } else if (type == ds_1337) {
+ if (buf[RTC_CTL_REG_ADDR] & DS1337_CTL_BIT_EOSC) {
+ printf("### Warning: RTC oscillator has stopped\n");
+ /* clear the not oscillator enable (~EOSC) flag */
+ buf[RTC_CTL_REG_ADDR] &= ~DS1337_CTL_BIT_EOSC;
+ dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
+ buf[RTC_CTL_REG_ADDR]);
+ return -1;
+ }
+ } else if (type == ds_1340) {
+ if (buf[RTC_SEC_REG_ADDR] & DS1340_SEC_BIT_EOSC) {
+ printf("### Warning: RTC oscillator has stopped\n");
+ /* clear the not oscillator enable (~EOSC) flag */
+ buf[RTC_SEC_REG_ADDR] &= ~DS1340_SEC_BIT_EOSC;
+ dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
+ buf[RTC_SEC_REG_ADDR]);
+ return -1;
+ }
+ } else if (type == m41t11) {
/* clock halted? turn it on, so clock can tick. */
if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) {
buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH;
@@ -273,9 +299,7 @@
buf[RTC_SEC_REG_ADDR]);
goto read_rtc;
}
- }
-
- if (type == mcp794xx) {
+ } else if (type == mcp794xx) {
/* make sure that the backup battery is enabled */
if (!(buf[RTC_DAY_REG_ADDR] & MCP7941X_BIT_VBATEN)) {
dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR,
@@ -314,18 +338,37 @@
static int ds1307_rtc_reset(struct udevice *dev)
{
int ret;
+ enum ds_type type = dev_get_driver_data(dev);
- /* clear Clock Halt */
+ /*
+ * reset clock/oscillator in the seconds register:
+ * on DS1307 bit 7 enables Clock Halt (CH),
+ * on DS1340 bit 7 disables the oscillator (not EOSC)
+ * on MCP794xx bit 7 enables Start Oscillator (ST)
+ */
ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00);
if (ret < 0)
return ret;
- ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
- RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 |
- RTC_CTL_BIT_RS0);
- if (ret < 0)
- return ret;
- return 0;
+ if (type == ds_1307) {
+ /* Write control register in order to enable square-wave
+ * output (SQWE) and set a default rate of 32.768kHz (RS1|RS0).
+ */
+ ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
+ RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 |
+ RTC_CTL_BIT_RS0);
+ } else if (type == ds_1337) {
+ /* Write control register in order to enable oscillator output
+ * (not EOSC) and set a default rate of 32.768kHz (RS2|RS1).
+ */
+ ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
+ DS1337_CTL_BIT_RS2 | DS1337_CTL_BIT_RS1);
+ } else if (type == ds_1340 || type == mcp794xx || type == m41t11) {
+ /* Reset clock calibration, frequency test and output level. */
+ ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR, 0x00);
+ }
+
+ return ret;
}
static int ds1307_probe(struct udevice *dev)
diff --git a/drivers/rtc/emul_rtc.c b/drivers/rtc/emul_rtc.c
index 8f0e1ab..6f47d82 100644
--- a/drivers/rtc/emul_rtc.c
+++ b/drivers/rtc/emul_rtc.c
@@ -9,8 +9,8 @@
#include <div64.h>
#include <dm.h>
#include <env.h>
-#include <generated/timestamp_autogenerated.h>
#include <rtc.h>
+#include <timestamp.h>
/**
* struct emul_rtc - private data for emulated RTC driver
diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c
index 321b873..e5ae6ea 100644
--- a/drivers/rtc/rtc-uclass.c
+++ b/drivers/rtc/rtc-uclass.c
@@ -177,7 +177,7 @@
.name = "rtc",
.id = UCLASS_RTC,
.flags = DM_UC_FLAG_SEQ_ALIAS,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
};
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 6fc5f4a..e9f8486 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -9,7 +9,7 @@
endif
ifdef CONFIG_SPL_BUILD
-ifdef CONFIG_SPL_SATA_SUPPORT
+ifdef CONFIG_SPL_SATA
obj-$(CONFIG_DM_SCSI) += scsi-uclass.o
obj-$(CONFIG_SCSI) += scsi.o
endif
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 93348c0..36ee432 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -2,7 +2,18 @@
# Serial device configuration
#
-menu "Serial drivers"
+menuconfig SERIAL
+ bool "Serial"
+ default y
+ help
+ Enable support for serial drivers. This allows use of a serial UART
+ for displaying messages while U-Boot is running. It also brings in
+ printf() and panic() functions. This should normally be enabled
+ unless there are space reasons not to. If you just need to disable
+ the console you can adjust the stdout environment variable or use
+ SILENT_CONSOLE.
+
+if SERIAL
config BAUDRATE
int "Default baudrate"
@@ -137,7 +148,6 @@
config SERIAL_PROBE_ALL
bool "Probe all available serial devices"
depends on DM_SERIAL
- default n
help
The serial subsystem only probes for a single serial device,
but does not probe for other remaining serial devices.
@@ -621,7 +631,6 @@
config MVEBU_A3700_UART
bool "UART support for Armada 3700"
- default n
help
Choose this option to add support for UART driver on the Marvell
Armada 3700 SoC. The base address is configured via DT.
@@ -939,4 +948,4 @@
depends on MPC8XX_CONS
default 0
-endmenu
+endif
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index cc121ee..796ff16 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -41,7 +41,7 @@
#endif
#endif /* !CONFIG_DM_SERIAL */
-#if defined(CONFIG_SOC_KEYSTONE)
+#if defined(CONFIG_ARCH_KEYSTONE)
#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
#undef UART_MCRVAL
@@ -267,7 +267,7 @@
/* /16 is proper to hit 115200 with 48MHz */
serial_out(0, &com_port->mdr1);
#endif
-#if defined(CONFIG_SOC_KEYSTONE)
+#if defined(CONFIG_ARCH_KEYSTONE)
serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
#endif
}
@@ -533,7 +533,7 @@
};
#endif
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
int ns16550_serial_of_to_plat(struct udevice *dev)
{
struct ns16550_plat *plat = dev_get_plat(dev);
@@ -588,7 +588,7 @@
.getinfo = ns16550_serial_getinfo,
};
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
/*
* Please consider existing compatible strings before adding a new
* one to keep this table compact. Or you may add a generic "ns16550"
@@ -602,7 +602,7 @@
{ .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
{}
};
-#endif /* OF_CONTROL && !OF_PLATDATA */
+#endif /* OF_REAL */
#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
@@ -611,7 +611,7 @@
U_BOOT_DRIVER(ns16550_serial) = {
.name = "ns16550_serial",
.id = UCLASS_SERIAL,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = ns16550_serial_ids,
.of_to_plat = ns16550_serial_of_to_plat,
.plat_auto = sizeof(struct ns16550_plat),
diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c
index 5243c95..dbbcea5 100644
--- a/drivers/serial/sandbox.c
+++ b/drivers/serial/sandbox.c
@@ -237,7 +237,7 @@
.flags = DM_FLAG_PRE_RELOC,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct sandbox_serial_plat platdata_non_fdt = {
.colour = -1,
};
diff --git a/drivers/serial/serial_mt7620.c b/drivers/serial/serial_mt7620.c
index 826a14b..76ecc2b 100644
--- a/drivers/serial/serial_mt7620.c
+++ b/drivers/serial/serial_mt7620.c
@@ -145,7 +145,7 @@
return 0;
}
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int mt7620_serial_of_to_plat(struct udevice *dev)
{
struct mt7620_serial_plat *plat = dev_get_plat(dev);
@@ -200,7 +200,7 @@
U_BOOT_DRIVER(serial_mt7620) = {
.name = "serial_mt7620",
.id = UCLASS_SERIAL,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = mt7620_serial_ids,
.of_to_plat = mt7620_serial_of_to_plat,
#endif
diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c
index 2b23ece..ee938f6 100644
--- a/drivers/serial/serial_omap.c
+++ b/drivers/serial/serial_omap.c
@@ -98,7 +98,7 @@
#if CONFIG_IS_ENABLED(DM_SERIAL)
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int omap_serial_of_to_plat(struct udevice *dev)
{
struct ns16550_plat *plat = dev_get_plat(dev);
@@ -149,13 +149,13 @@
{ .compatible = "ti,am654-uart", },
{}
};
-#endif /* OF_CONTROL && !OF_PLATDATA */
+#endif /* OF_REAL */
#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
U_BOOT_DRIVER(omap_serial) = {
.name = "omap_serial",
.id = UCLASS_SERIAL,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = omap_serial_ids,
.of_to_plat = omap_serial_of_to_plat,
.plat_auto = sizeof(struct ns16550_plat),
diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
index fadc9f3..989679e 100644
--- a/drivers/spi/altera_spi.c
+++ b/drivers/spi/altera_spi.c
@@ -19,9 +19,7 @@
#define ALTERA_SPI_STATUS_RRDY_MSK BIT(7)
#define ALTERA_SPI_CONTROL_SSO_MSK BIT(10)
-#ifndef CONFIG_ALTERA_SPI_IDLE_VAL
-#define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
-#endif
+#define ALTERA_SPI_IDLE_VAL 0xff
struct altera_spi_regs {
u32 rxdata;
@@ -119,7 +117,7 @@
if (txp)
data = *txp++;
else
- data = CONFIG_ALTERA_SPI_IDLE_VAL;
+ data = ALTERA_SPI_IDLE_VAL;
debug("%s: tx:%x ", __func__, data);
writel(data, ®s->txdata);
diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c
index 6511c0e..ea23357 100644
--- a/drivers/spi/cf_spi.c
+++ b/drivers/spi/cf_spi.c
@@ -384,7 +384,7 @@
return 0;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int coldfire_dspi_of_to_plat(struct udevice *bus)
{
fdt_addr_t addr;
@@ -450,7 +450,7 @@
U_BOOT_DRIVER(coldfire_spi) = {
.name = "spi_coldfire",
.id = UCLASS_SPI,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = coldfire_spi_ids,
.of_to_plat = coldfire_dspi_of_to_plat,
.plat_auto = sizeof(struct coldfire_spi_plat),
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 15557a6..0ee6171 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -391,7 +391,7 @@
return 0;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int davinci_ofdata_to_platadata(struct udevice *bus)
{
struct davinci_spi_plat *plat = dev_get_plat(bus);
@@ -418,7 +418,7 @@
U_BOOT_DRIVER(davinci_spi) = {
.name = "davinci_spi",
.id = UCLASS_SPI,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = davinci_spi_ids,
.of_to_plat = davinci_ofdata_to_platadata,
.plat_auto = sizeof(struct davinci_spi_plat),
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
index 387b547..c7a6926 100644
--- a/drivers/spi/fsl_espi.c
+++ b/drivers/spi/fsl_espi.c
@@ -541,7 +541,7 @@
.set_mode = fsl_espi_set_mode,
};
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int fsl_espi_of_to_plat(struct udevice *bus)
{
fdt_addr_t addr;
@@ -572,7 +572,7 @@
U_BOOT_DRIVER(fsl_espi) = {
.name = "fsl_espi",
.id = UCLASS_SPI,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = fsl_espi_ids,
.of_to_plat = fsl_espi_of_to_plat,
#endif
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 08d54e8..42071bb 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -604,7 +604,7 @@
return ret;
}
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
/**
* ich_spi_get_basics() - Get basic information about the ICH device
*
@@ -672,7 +672,7 @@
uint *map_sizep, uint *offsetp)
{
pci_dev_t spi_bdf;
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
if (device_is_on_pci_bus(bus)) {
struct pci_child_plat *pplat;
@@ -940,7 +940,7 @@
{
struct ich_spi_plat *plat = dev_get_plat(dev);
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
struct ich_spi_priv *priv = dev_get_priv(dev);
int ret;
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index d41352a..773e26b 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -440,7 +440,7 @@
*/
};
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int mxs_of_to_plat(struct udevice *bus)
{
struct mxs_spi_plat *plat = dev_get_plat(bus);
@@ -483,7 +483,7 @@
U_BOOT_DRIVER(fsl_imx23_spi) = {
.name = "fsl_imx23_spi",
.id = UCLASS_SPI,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = mxs_spi_ids,
.of_to_plat = mxs_of_to_plat,
#endif
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index c69f8fe..ea38a0f 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -481,7 +481,7 @@
*/
};
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static struct omap2_mcspi_platform_config omap2_pdata = {
.regs_offset = 0,
};
@@ -516,7 +516,7 @@
.name = "omap3_spi",
.id = UCLASS_SPI,
.flags = DM_FLAG_PRE_RELOC,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = omap3_spi_ids,
.of_to_plat = omap3_spi_of_to_plat,
.plat_auto = sizeof(struct omap3_spi_plat),
diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c
index 9856a56..ea16914 100644
--- a/drivers/spi/pl022_spi.c
+++ b/drivers/spi/pl022_spi.c
@@ -286,7 +286,7 @@
.cs_info = pl022_cs_info,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int pl022_spi_of_to_plat(struct udevice *bus)
{
struct pl022_spi_pdata *plat = dev_get_plat(bus);
@@ -315,7 +315,7 @@
U_BOOT_DRIVER(pl022_spi) = {
.name = "pl022_spi",
.id = UCLASS_SPI,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = pl022_spi_ids,
.of_to_plat = pl022_spi_of_to_plat,
#endif
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index 40bd885..cb80be7 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -183,7 +183,7 @@
plat->base = dtplat->reg[0];
plat->frequency = 20000000;
- ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_phandle(dev, dtplat->clocks, &priv->clk);
if (ret < 0)
return ret;
@@ -193,31 +193,31 @@
static int rockchip_spi_of_to_plat(struct udevice *bus)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rockchip_spi_plat *plat = dev_get_plat(bus);
struct rockchip_spi_priv *priv = dev_get_priv(bus);
int ret;
- plat->base = dev_read_addr(bus);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ plat->base = dev_read_addr(bus);
- ret = clk_get_by_index(bus, 0, &priv->clk);
- if (ret < 0) {
- debug("%s: Could not get clock for %s: %d\n", __func__,
- bus->name, ret);
- return ret;
- }
+ ret = clk_get_by_index(bus, 0, &priv->clk);
+ if (ret < 0) {
+ debug("%s: Could not get clock for %s: %d\n", __func__,
+ bus->name, ret);
+ return ret;
+ }
- plat->frequency =
- dev_read_u32_default(bus, "spi-max-frequency", 50000000);
- plat->deactivate_delay_us =
- dev_read_u32_default(bus, "spi-deactivate-delay", 0);
- plat->activate_delay_us =
- dev_read_u32_default(bus, "spi-activate-delay", 0);
+ plat->frequency = dev_read_u32_default(bus, "spi-max-frequency",
+ 50000000);
+ plat->deactivate_delay_us =
+ dev_read_u32_default(bus, "spi-deactivate-delay", 0);
+ plat->activate_delay_us =
+ dev_read_u32_default(bus, "spi-activate-delay", 0);
- debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n",
- __func__, (uint)plat->base, plat->frequency,
- plat->deactivate_delay_us);
-#endif
+ debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n",
+ __func__, (uint)plat->base, plat->frequency,
+ plat->deactivate_delay_us);
+ }
return 0;
}
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index d867b27..f8ec312 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -162,7 +162,7 @@
return ret;
}
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static int spi_child_post_bind(struct udevice *dev)
{
struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
@@ -176,11 +176,11 @@
static int spi_post_probe(struct udevice *bus)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
- spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0);
-#endif
+ spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0);
+ }
#if defined(CONFIG_NEEDS_MANUAL_RELOC)
struct dm_spi_ops *ops = spi_get_ops(bus);
static int reloc_done;
@@ -531,7 +531,7 @@
.id = UCLASS_SPI,
.name = "spi",
.flags = DM_UC_FLAG_SEQ_ALIAS,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
.post_probe = spi_post_probe,
@@ -539,7 +539,7 @@
.per_device_auto = sizeof(struct dm_spi_bus),
.per_child_auto = sizeof(struct spi_slave),
.per_child_plat_auto = sizeof(struct dm_spi_slave_plat),
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.child_post_bind = spi_child_post_bind,
#endif
};
diff --git a/drivers/sysreset/sysreset_sandbox.c b/drivers/sysreset/sysreset_sandbox.c
index 0868582..0ee286c 100644
--- a/drivers/sysreset/sysreset_sandbox.c
+++ b/drivers/sysreset/sysreset_sandbox.c
@@ -133,7 +133,7 @@
.ops = &sandbox_warm_sysreset_ops,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
/* This is here in case we don't have a device tree */
U_BOOT_DRVINFO(sysreset_sandbox_non_fdt) = {
.name = "sysreset_sandbox",
diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index 18c6145..62eacb9 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -55,8 +55,7 @@
/* The timer is available */
rate = timer_get_rate(gd->timer);
timer_get_count(gd->timer, &ticks);
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- } else if (ret == -EAGAIN) {
+ } else if (CONFIG_IS_ENABLED(OF_REAL) && ret == -EAGAIN) {
/* We have been called so early that the DM is not ready,... */
ofnode node = offset_to_ofnode(-1);
struct rk_timer *timer = NULL;
@@ -79,7 +78,6 @@
debug("%s: could not read clock-frequency\n", __func__);
return 0;
}
-#endif
} else {
return 0;
}
@@ -100,13 +98,13 @@
static int rockchip_clk_of_to_plat(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rockchip_timer_priv *priv = dev_get_priv(dev);
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct rockchip_timer_priv *priv = dev_get_priv(dev);
- priv->timer = dev_read_addr_ptr(dev);
- if (!priv->timer)
- return -ENOENT;
-#endif
+ priv->timer = dev_read_addr_ptr(dev);
+ if (!priv->timer)
+ return -ENOENT;
+ }
return 0;
}
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index c8e8419..6ea9e39 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -50,27 +50,29 @@
static int timer_pre_probe(struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- struct clk timer_clk;
- int err;
- ulong ret;
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct clk timer_clk;
+ int err;
+ ulong ret;
- /* It is possible that a timer device has a null ofnode */
- if (!dev_has_ofnode(dev))
- return 0;
+ /*
+ * It is possible that a timer device has a null ofnode
+ */
+ if (!dev_has_ofnode(dev))
+ return 0;
- err = clk_get_by_index(dev, 0, &timer_clk);
- if (!err) {
- ret = clk_get_rate(&timer_clk);
- if (IS_ERR_VALUE(ret))
- return ret;
- uc_priv->clock_rate = ret;
- } else {
- uc_priv->clock_rate =
- dev_read_u32_default(dev, "clock-frequency", 0);
+ err = clk_get_by_index(dev, 0, &timer_clk);
+ if (!err) {
+ ret = clk_get_rate(&timer_clk);
+ if (IS_ERR_VALUE(ret))
+ return ret;
+ uc_priv->clock_rate = ret;
+ } else {
+ uc_priv->clock_rate =
+ dev_read_u32_default(dev, "clock-frequency", 0);
+ }
}
-#endif
return 0;
}
@@ -136,23 +138,23 @@
if (gd->dm_root == NULL)
return -EAGAIN;
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- /* Check for a chosen timer to be used for tick */
- node = ofnode_get_chosen_node("tick-timer");
+ if (CONFIG_IS_ENABLED(OF_REAL)) {
+ /* Check for a chosen timer to be used for tick */
+ node = ofnode_get_chosen_node("tick-timer");
- if (ofnode_valid(node) &&
- uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
- /*
- * If the timer is not marked to be bound before
- * relocation, bind it anyway.
- */
- if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
- ret = device_probe(dev);
- if (ret)
- return ret;
+ if (ofnode_valid(node) &&
+ uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
+ /*
+ * If the timer is not marked to be bound before
+ * relocation, bind it anyway.
+ */
+ if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
+ ret = device_probe(dev);
+ if (ret)
+ return ret;
+ }
}
}
-#endif
if (!dev) {
/* Fall back to the first available timer */
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index adef50c..192c7b7 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -479,7 +479,7 @@
.get_count = tsc_timer_get_count,
};
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id tsc_timer_ids[] = {
{ .compatible = "x86,tsc-timer", },
{ }
diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c
index 35774a6..f67fe10 100644
--- a/drivers/tpm/tpm-uclass.c
+++ b/drivers/tpm/tpm-uclass.c
@@ -140,7 +140,7 @@
.id = UCLASS_TPM,
.name = "tpm",
.flags = DM_UC_FLAG_SEQ_ALIAS,
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
.post_bind = dm_scan_fdt_dev,
#endif
.per_device_auto = sizeof(struct tpm_chip_priv),
diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
index 4b33ac8..1d24d32 100644
--- a/drivers/tpm/tpm2_tis_spi.c
+++ b/drivers/tpm/tpm2_tis_spi.c
@@ -589,18 +589,25 @@
if (CONFIG_IS_ENABLED(DM_GPIO)) {
struct gpio_desc reset_gpio;
- ret = gpio_request_by_name(dev, "gpio-reset", 0,
+ ret = gpio_request_by_name(dev, "reset-gpios", 0,
&reset_gpio, GPIOD_IS_OUT);
if (ret) {
- log(LOGC_NONE, LOGL_NOTICE, "%s: missing reset GPIO\n",
- __func__);
- } else {
- dm_gpio_set_value(&reset_gpio, 1);
- mdelay(1);
- dm_gpio_set_value(&reset_gpio, 0);
+ /* legacy reset */
+ ret = gpio_request_by_name(dev, "gpio-reset", 0,
+ &reset_gpio, GPIOD_IS_OUT);
+ if (ret) {
+ log(LOGC_NONE, LOGL_NOTICE,
+ "%s: missing reset GPIO\n", __func__);
+ goto init;
+ }
+ log(LOGC_NONE, LOGL_NOTICE,
+ "%s: gpio-reset is deprecated\n", __func__);
}
+ dm_gpio_set_value(&reset_gpio, 1);
+ mdelay(1);
+ dm_gpio_set_value(&reset_gpio, 0);
}
-
+init:
/* Ensure a minimum amount of time elapsed since reset of the TPM */
mdelay(drv_data->time_before_first_cmd_ms);
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index bd846ce..98a7ffa 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -17,7 +17,6 @@
#include <linux/usb/gadget.h>
#include <linux/usb/composite.h>
#include <linux/compiler.h>
-#include <version.h>
#include <g_dnl.h>
#include <asm/arch-rockchip/f_rockusb.h>
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 427b360..10b0479 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -57,6 +57,16 @@
family SoCs. This is a driver for the dwc3 to provide the glue logic
to configure the controller.
+config USB_XHCI_OMAP
+ bool "Support for TI OMAP family xHCI USB controller"
+ depends on ARCH_OMAP2PLUS
+ help
+ Enables support for the on-chip xHCI controller found on some TI SoC
+ families. Note that some families have multiple contollers while
+ others only have something such as DesignWare-based controllers.
+ Consult the SoC documentation to determine if this option applies
+ to your hardware.
+
config USB_XHCI_PCI
bool "Support for PCI-based xHCI USB controller"
depends on DM_USB
@@ -146,7 +156,6 @@
config USB_EHCI_MX5
bool "Support for i.MX5 on-chip EHCI USB controller"
depends on ARCH_MX5
- default n
help
Enables support for the on-chip EHCI controller on i.MX5 SoCs.
@@ -174,6 +183,40 @@
Enables support for the on-chip EHCI controller on OMAP3 and later
SoCs.
+if USB_EHCI_OMAP
+
+config HAS_OMAP_EHCI_PHY1_RESET_GPIO
+ bool "PHY #1 requires a GPIO hold to it in RESET while PHY settles"
+ help
+ Enable this to be able to configure the GPIO number used to hold the
+ PHY in RESET for enough time until the PHY is settled and ready.
+
+config OMAP_EHCI_PHY1_RESET_GPIO
+ int "GPIO number to hold PHY #1 in RESET"
+ depends on HAS_OMAP_EHCI_PHY1_RESET_GPIO
+
+config HAS_OMAP_EHCI_PHY2_RESET_GPIO
+ bool "PHY #2 requires a GPIO hold to it in RESET while PHY settles"
+ help
+ Enable this to be able to configure the GPIO number used to hold the
+ PHY in RESET for enough time until the PHY is settled and ready.
+
+config OMAP_EHCI_PHY2_RESET_GPIO
+ int "GPIO number to hold PHY #2 in RESET"
+ depends on HAS_OMAP_EHCI_PHY2_RESET_GPIO
+
+config HAS_OMAP_EHCI_PHY3_RESET_GPIO
+ bool "PHY #3 requires a GPIO hold to it in RESET while PHY settles"
+ help
+ Enable this to be able to configure the GPIO number used to hold the
+ PHY in RESET for enough time until the PHY is settled and ready.
+
+config OMAP_EHCI_PHY3_RESET_GPIO
+ int "GPIO number to hold PHY #3 in RESET"
+ depends on HAS_OMAP_EHCI_PHY3_RESET_GPIO
+
+endif
+
config USB_EHCI_VF
bool "Support for Vybrid on-chip EHCI USB controller"
depends on ARCH_VF610
@@ -195,7 +238,6 @@
depends on DM_USB
select USB_ULPI_VIEWPORT
select MSM8916_USB_PHY
- default n
---help---
Enables support for the on-chip EHCI controller on Qualcomm
Snapdragon SoCs.
@@ -222,13 +264,11 @@
bool "Support for generic EHCI USB controller"
depends on DM_USB
default ARCH_SUNXI
- default n
---help---
Enables support for generic EHCI controller.
config USB_EHCI_FSL
bool "Support for FSL on-chip EHCI USB controller"
- default n
select CONFIG_EHCI_HCD_INIT_AFTER_RESET
---help---
Enables support for the on-chip EHCI controller on FSL chips.
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 43cc2e0..23060fc 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -86,14 +86,14 @@
{
uint32_t phyclk;
-#if (CONFIG_DWC2_PHY_TYPE == DWC2_PHY_TYPE_FS)
+#if (DWC2_PHY_TYPE == DWC2_PHY_TYPE_FS)
phyclk = DWC2_HCFG_FSLSPCLKSEL_48_MHZ; /* Full speed PHY */
#else
/* High speed PHY running at full speed or high speed */
phyclk = DWC2_HCFG_FSLSPCLKSEL_30_60_MHZ;
#endif
-#ifdef CONFIG_DWC2_ULPI_FS_LS
+#ifdef DWC2_ULPI_FS_LS
uint32_t hwcfg2 = readl(®s->ghwcfg2);
uint32_t hval = (ghwcfg2 & DWC2_HWCFG2_HS_PHY_TYPE_MASK) >>
DWC2_HWCFG2_HS_PHY_TYPE_OFFSET;
@@ -257,28 +257,28 @@
/* Initialize Host Configuration Register */
init_fslspclksel(regs);
-#ifdef CONFIG_DWC2_DFLT_SPEED_FULL
+#ifdef DWC2_DFLT_SPEED_FULL
setbits_le32(®s->host_regs.hcfg, DWC2_HCFG_FSLSSUPP);
#endif
/* Configure data FIFO sizes */
-#ifdef CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
+#ifdef DWC2_ENABLE_DYNAMIC_FIFO
if (readl(®s->ghwcfg2) & DWC2_HWCFG2_DYNAMIC_FIFO) {
/* Rx FIFO */
- writel(CONFIG_DWC2_HOST_RX_FIFO_SIZE, ®s->grxfsiz);
+ writel(DWC2_HOST_RX_FIFO_SIZE, ®s->grxfsiz);
/* Non-periodic Tx FIFO */
- nptxfifosize |= CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE <<
+ nptxfifosize |= DWC2_HOST_NPERIO_TX_FIFO_SIZE <<
DWC2_FIFOSIZE_DEPTH_OFFSET;
- nptxfifosize |= CONFIG_DWC2_HOST_RX_FIFO_SIZE <<
+ nptxfifosize |= DWC2_HOST_RX_FIFO_SIZE <<
DWC2_FIFOSIZE_STARTADDR_OFFSET;
writel(nptxfifosize, ®s->gnptxfsiz);
/* Periodic Tx FIFO */
- ptxfifosize |= CONFIG_DWC2_HOST_PERIO_TX_FIFO_SIZE <<
+ ptxfifosize |= DWC2_HOST_PERIO_TX_FIFO_SIZE <<
DWC2_FIFOSIZE_DEPTH_OFFSET;
- ptxfifosize |= (CONFIG_DWC2_HOST_RX_FIFO_SIZE +
- CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE) <<
+ ptxfifosize |= (DWC2_HOST_RX_FIFO_SIZE +
+ DWC2_HOST_NPERIO_TX_FIFO_SIZE) <<
DWC2_FIFOSIZE_STARTADDR_OFFSET;
writel(ptxfifosize, ®s->hptxfsiz);
}
@@ -340,7 +340,7 @@
struct dwc2_core_regs *regs = priv->regs;
uint32_t ahbcfg = 0;
uint32_t usbcfg = 0;
- uint8_t brst_sz = CONFIG_DWC2_DMA_BURST_SIZE;
+ uint8_t brst_sz = DWC2_DMA_BURST_SIZE;
/* Common Initialization */
usbcfg = readl(®s->gusbcfg);
@@ -357,7 +357,7 @@
}
/* Set external TS Dline pulsing */
-#ifdef CONFIG_DWC2_TS_DLINE
+#ifdef DWC2_TS_DLINE
usbcfg |= DWC2_GUSBCFG_TERM_SEL_DL_PULSE;
#else
usbcfg &= ~DWC2_GUSBCFG_TERM_SEL_DL_PULSE;
@@ -371,8 +371,8 @@
* This programming sequence needs to happen in FS mode before
* any other programming occurs
*/
-#if defined(CONFIG_DWC2_DFLT_SPEED_FULL) && \
- (CONFIG_DWC2_PHY_TYPE == DWC2_PHY_TYPE_FS)
+#if defined(DWC2_DFLT_SPEED_FULL) && \
+ (DWC2_PHY_TYPE == DWC2_PHY_TYPE_FS)
/* If FS mode with FS PHY */
setbits_le32(®s->gusbcfg, DWC2_GUSBCFG_PHYSEL);
@@ -387,7 +387,7 @@
if (readl(®s->gintsts) & DWC2_GINTSTS_CURMODE_HOST)
init_fslspclksel(regs);
-#ifdef CONFIG_DWC2_I2C_ENABLE
+#ifdef DWC2_I2C_ENABLE
/* Program GUSBCFG.OtgUtmifsSel to I2C */
setbits_le32(®s->gusbcfg, DWC2_GUSBCFG_OTGUTMIFSSEL);
@@ -407,16 +407,16 @@
* immediately after setting phyif.
*/
usbcfg &= ~(DWC2_GUSBCFG_ULPI_UTMI_SEL | DWC2_GUSBCFG_PHYIF);
- usbcfg |= CONFIG_DWC2_PHY_TYPE << DWC2_GUSBCFG_ULPI_UTMI_SEL_OFFSET;
+ usbcfg |= DWC2_PHY_TYPE << DWC2_GUSBCFG_ULPI_UTMI_SEL_OFFSET;
if (usbcfg & DWC2_GUSBCFG_ULPI_UTMI_SEL) { /* ULPI interface */
-#ifdef CONFIG_DWC2_PHY_ULPI_DDR
+#ifdef DWC2_PHY_ULPI_DDR
usbcfg |= DWC2_GUSBCFG_DDRSEL;
#else
usbcfg &= ~DWC2_GUSBCFG_DDRSEL;
#endif
} else { /* UTMI+ interface */
-#if (CONFIG_DWC2_UTMI_WIDTH == 16)
+#if (DWC2_UTMI_WIDTH == 16)
usbcfg |= DWC2_GUSBCFG_PHYIF;
#endif
}
@@ -429,7 +429,7 @@
usbcfg = readl(®s->gusbcfg);
usbcfg &= ~(DWC2_GUSBCFG_ULPI_FSLS | DWC2_GUSBCFG_ULPI_CLK_SUS_M);
-#ifdef CONFIG_DWC2_ULPI_FS_LS
+#ifdef DWC2_ULPI_FS_LS
uint32_t hwcfg2 = readl(®s->ghwcfg2);
uint32_t hval = (ghwcfg2 & DWC2_HWCFG2_HS_PHY_TYPE_MASK) >>
DWC2_HWCFG2_HS_PHY_TYPE_OFFSET;
@@ -456,14 +456,14 @@
brst_sz >>= 1;
}
-#ifdef CONFIG_DWC2_DMA_ENABLE
+#ifdef DWC2_DMA_ENABLE
ahbcfg |= DWC2_GAHBCFG_DMAENABLE;
#endif
break;
case DWC2_HWCFG2_ARCHITECTURE_INT_DMA:
ahbcfg |= DWC2_GAHBCFG_HBURSTLEN_INCR4;
-#ifdef CONFIG_DWC2_DMA_ENABLE
+#ifdef DWC2_DMA_ENABLE
ahbcfg |= DWC2_GAHBCFG_DMAENABLE;
#endif
break;
@@ -476,7 +476,7 @@
if (!priv->hnp_srp_disable)
usbcfg |= DWC2_GUSBCFG_HNPCAP | DWC2_GUSBCFG_SRPCAP;
-#ifdef CONFIG_DWC2_IC_USB_CAP
+#ifdef DWC2_IC_USB_CAP
usbcfg |= DWC2_GUSBCFG_IC_USB_CAP;
#endif
@@ -939,9 +939,9 @@
debug("%s: msg: pipe %lx pid %d in %d len %d\n", __func__, pipe, *pid,
in, len);
- max_xfer_len = CONFIG_DWC2_MAX_PACKET_COUNT * max;
- if (max_xfer_len > CONFIG_DWC2_MAX_TRANSFER_SIZE)
- max_xfer_len = CONFIG_DWC2_MAX_TRANSFER_SIZE;
+ max_xfer_len = DWC2_MAX_PACKET_COUNT * max;
+ if (max_xfer_len > DWC2_MAX_TRANSFER_SIZE)
+ max_xfer_len = DWC2_MAX_TRANSFER_SIZE;
if (max_xfer_len > DWC2_DATA_BUF_SIZE)
max_xfer_len = DWC2_DATA_BUF_SIZE;
@@ -1198,7 +1198,7 @@
return -ENODEV;
}
-#ifdef CONFIG_DWC2_PHY_ULPI_EXT_VBUS
+#ifdef DWC2_PHY_ULPI_EXT_VBUS
priv->ext_vbus = 1;
#else
priv->ext_vbus = 0;
diff --git a/drivers/usb/host/dwc2.h b/drivers/usb/host/dwc2.h
index 97a06c4..a6f562f 100644
--- a/drivers/usb/host/dwc2.h
+++ b/drivers/usb/host/dwc2.h
@@ -759,32 +759,32 @@
#define RH_B_PPCM 0xffff0000 /* port power control mask */
/* Default driver configuration */
-#define CONFIG_DWC2_DMA_ENABLE
-#define CONFIG_DWC2_DMA_BURST_SIZE 32 /* DMA burst len */
-#undef CONFIG_DWC2_DFLT_SPEED_FULL /* Do not force DWC2 to FS */
-#define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO /* Runtime FIFO size detect */
-#define CONFIG_DWC2_MAX_CHANNELS 16 /* Max # of EPs */
-#define CONFIG_DWC2_HOST_RX_FIFO_SIZE (516 + CONFIG_DWC2_MAX_CHANNELS)
-#define CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE 0x100 /* nPeriodic TX FIFO */
-#define CONFIG_DWC2_HOST_PERIO_TX_FIFO_SIZE 0x200 /* Periodic TX FIFO */
-#define CONFIG_DWC2_MAX_TRANSFER_SIZE 65535
-#define CONFIG_DWC2_MAX_PACKET_COUNT 511
+#define DWC2_DMA_ENABLE
+#define DWC2_DMA_BURST_SIZE 32 /* DMA burst len */
+#undef DWC2_DFLT_SPEED_FULL /* Do not force DWC2 to FS */
+#define DWC2_ENABLE_DYNAMIC_FIFO /* Runtime FIFO size detect */
+#define DWC2_MAX_CHANNELS 16 /* Max # of EPs */
+#define DWC2_HOST_RX_FIFO_SIZE (516 + DWC2_MAX_CHANNELS)
+#define DWC2_HOST_NPERIO_TX_FIFO_SIZE 0x100 /* nPeriodic TX FIFO */
+#define DWC2_HOST_PERIO_TX_FIFO_SIZE 0x200 /* Periodic TX FIFO */
+#define DWC2_MAX_TRANSFER_SIZE 65535
+#define DWC2_MAX_PACKET_COUNT 511
#define DWC2_PHY_TYPE_FS 0
#define DWC2_PHY_TYPE_UTMI 1
#define DWC2_PHY_TYPE_ULPI 2
-#define CONFIG_DWC2_PHY_TYPE DWC2_PHY_TYPE_UTMI /* PHY type */
-#ifndef CONFIG_DWC2_UTMI_WIDTH
-#define CONFIG_DWC2_UTMI_WIDTH 8 /* UTMI bus width (8/16) */
+#define DWC2_PHY_TYPE DWC2_PHY_TYPE_UTMI /* PHY type */
+#ifndef DWC2_UTMI_WIDTH
+#define DWC2_UTMI_WIDTH 8 /* UTMI bus width (8/16) */
#endif
-#undef CONFIG_DWC2_PHY_ULPI_DDR /* ULPI PHY uses DDR mode */
-#define CONFIG_DWC2_PHY_ULPI_EXT_VBUS /* ULPI PHY controls VBUS */
-#undef CONFIG_DWC2_I2C_ENABLE /* Enable I2C */
-#undef CONFIG_DWC2_ULPI_FS_LS /* ULPI is FS/LS */
-#undef CONFIG_DWC2_TS_DLINE /* External DLine pulsing */
-#undef CONFIG_DWC2_THR_CTL /* Threshold control */
-#define CONFIG_DWC2_TX_THR_LENGTH 64
-#undef CONFIG_DWC2_IC_USB_CAP /* IC Cap */
+#undef DWC2_PHY_ULPI_DDR /* ULPI PHY uses DDR mode */
+#define DWC2_PHY_ULPI_EXT_VBUS /* ULPI PHY controls VBUS */
+#undef DWC2_I2C_ENABLE /* Enable I2C */
+#undef DWC2_ULPI_FS_LS /* ULPI is FS/LS */
+#undef DWC2_TS_DLINE /* External DLine pulsing */
+#undef DWC2_THR_CTL /* Threshold control */
+#define DWC2_TX_THR_LENGTH 64
+#undef DWC2_IC_USB_CAP /* IC Cap */
#endif /* __DWC2_H__ */
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 12c422d..d5facf1 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -183,17 +183,8 @@
* Based on "drivers/usb/host/ehci-omap.c" from Linux 3.1
* See there for additional Copyrights.
*/
-#if !CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)
-
-int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
- *hccr = (struct ehci_hccr *)(OMAP_EHCI_BASE);
- *hcor = (struct ehci_hcor *)(OMAP_EHCI_BASE + 0x10);
-#else
int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata)
{
-#endif
int ret;
unsigned int i, reg = 0, rev = 0;
@@ -304,8 +295,6 @@
return 0;
}
-#if CONFIG_IS_ENABLED(DM_USB)
-
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -409,5 +398,3 @@
.ops = &ehci_usb_ops,
.flags = DM_FLAG_ALLOC_PRIV_DMA,
};
-
-#endif
diff --git a/drivers/usb/musb-new/Kconfig b/drivers/usb/musb-new/Kconfig
index a9a7c26..6dd830c 100644
--- a/drivers/usb/musb-new/Kconfig
+++ b/drivers/usb/musb-new/Kconfig
@@ -34,7 +34,6 @@
bool "Enable TI OTG USB controller"
depends on AM33XX
select USB_MUSB_DSPS
- default n
help
Say y here to enable support for the dual role high
speed USB controller based on the Mentor Graphics
@@ -53,7 +52,6 @@
config USB_MUSB_MT85XX
bool "Enable Mediatek MT85XX DRC USB controller"
depends on ARCH_MEDIATEK
- default n
help
Say y to enable Mediatek MT85XX USB DRC controller support
if it is available on your Mediatek MUSB IP based platform.
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 8741553..c505862 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -8,8 +8,5 @@
config TWL4030_USB
bool "TWL4030 PHY"
-config OMAP_USB_PHY
- bool "OMAP PHY"
-
config ROCKCHIP_USB2_PHY
bool "Rockchip USB2 PHY"
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 20f7edf..b67a70b 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -4,5 +4,4 @@
# Tom Rix <Tom.Rix@windriver.com>
obj-$(CONFIG_TWL4030_USB) += twl4030.o
-obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o
obj-$(CONFIG_ROCKCHIP_USB2_PHY) += rockchip_usb2_phy.o
diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
deleted file mode 100644
index be733f3..0000000
--- a/drivers/usb/phy/omap_usb_phy.c
+++ /dev/null
@@ -1,267 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * OMAP USB PHY Support
- *
- * (C) Copyright 2013
- * Texas Instruments, <www.ti.com>
- *
- * Author: Dan Murphy <dmurphy@ti.com>
- */
-
-#include <common.h>
-#include <usb.h>
-#include <dm/device_compat.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/omap_common.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/sys_proto.h>
-
-#include <linux/compat.h>
-#include <linux/usb/dwc3.h>
-#include <linux/usb/xhci-omap.h>
-
-#include <usb/xhci.h>
-
-#ifdef CONFIG_OMAP_USB3PHY1_HOST
-struct usb3_dpll_params {
- u16 m;
- u8 n;
- u8 freq:3;
- u8 sd;
- u32 mf;
-};
-
-struct usb3_dpll_map {
- unsigned long rate;
- struct usb3_dpll_params params;
- struct usb3_dpll_map *dpll_map;
-};
-
-static struct usb3_dpll_map dpll_map_usb[] = {
- {12000000, {1250, 5, 4, 20, 0} }, /* 12 MHz */
- {16800000, {3125, 20, 4, 20, 0} }, /* 16.8 MHz */
- {19200000, {1172, 8, 4, 20, 65537} }, /* 19.2 MHz */
- {20000000, {1000, 7, 4, 10, 0} }, /* 20 MHz */
- {26000000, {1250, 12, 4, 20, 0} }, /* 26 MHz */
- {38400000, {3125, 47, 4, 20, 92843} }, /* 38.4 MHz */
- { }, /* Terminator */
-};
-
-static struct usb3_dpll_params *omap_usb3_get_dpll_params(void)
-{
- unsigned long rate;
- struct usb3_dpll_map *dpll_map = dpll_map_usb;
-
- rate = get_sys_clk_freq();
-
- for (; dpll_map->rate; dpll_map++) {
- if (rate == dpll_map->rate)
- return &dpll_map->params;
- }
-
- dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate);
-
- return NULL;
-}
-
-static void omap_usb_dpll_relock(struct omap_usb3_phy *phy_regs)
-{
- u32 val;
-
- writel(SET_PLL_GO, &phy_regs->pll_go);
- do {
- val = readl(&phy_regs->pll_status);
- if (val & PLL_LOCK)
- break;
- } while (1);
-}
-
-static void omap_usb_dpll_lock(struct omap_usb3_phy *phy_regs)
-{
- struct usb3_dpll_params *dpll_params;
- u32 val;
-
- dpll_params = omap_usb3_get_dpll_params();
- if (!dpll_params)
- return;
-
- val = readl(&phy_regs->pll_config_1);
- val &= ~PLL_REGN_MASK;
- val |= dpll_params->n << PLL_REGN_SHIFT;
- writel(val, &phy_regs->pll_config_1);
-
- val = readl(&phy_regs->pll_config_2);
- val &= ~PLL_SELFREQDCO_MASK;
- val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT;
- writel(val, &phy_regs->pll_config_2);
-
- val = readl(&phy_regs->pll_config_1);
- val &= ~PLL_REGM_MASK;
- val |= dpll_params->m << PLL_REGM_SHIFT;
- writel(val, &phy_regs->pll_config_1);
-
- val = readl(&phy_regs->pll_config_4);
- val &= ~PLL_REGM_F_MASK;
- val |= dpll_params->mf << PLL_REGM_F_SHIFT;
- writel(val, &phy_regs->pll_config_4);
-
- val = readl(&phy_regs->pll_config_3);
- val &= ~PLL_SD_MASK;
- val |= dpll_params->sd << PLL_SD_SHIFT;
- writel(val, &phy_regs->pll_config_3);
-
- omap_usb_dpll_relock(phy_regs);
-}
-
-static void usb3_phy_partial_powerup(struct omap_usb3_phy *phy_regs)
-{
- u32 rate = get_sys_clk_freq()/1000000;
- u32 val;
-
- val = readl((*ctrl)->control_phy_power_usb);
- val &= ~(USB3_PWRCTL_CLK_CMD_MASK | USB3_PWRCTL_CLK_FREQ_MASK);
- val |= (USB3_PHY_PARTIAL_RX_POWERON | USB3_PHY_TX_RX_POWERON);
- val |= rate << USB3_PWRCTL_CLK_FREQ_SHIFT;
-
- writel(val, (*ctrl)->control_phy_power_usb);
-}
-
-void usb_phy_power(int on)
-{
- u32 val;
-
- val = readl((*ctrl)->control_phy_power_usb);
- if (on) {
- val &= ~USB3_PWRCTL_CLK_CMD_MASK;
- val |= USB3_PHY_TX_RX_POWERON;
- } else {
- val &= (~USB3_PWRCTL_CLK_CMD_MASK & ~USB3_PHY_TX_RX_POWERON);
- }
-
- writel(val, (*ctrl)->control_phy_power_usb);
-}
-
-void omap_usb3_phy_init(struct omap_usb3_phy *phy_regs)
-{
- omap_usb_dpll_lock(phy_regs);
- usb3_phy_partial_powerup(phy_regs);
- /*
- * Give enough time for the PHY to partially power-up before
- * powering it up completely. delay value suggested by the HW
- * team.
- */
- mdelay(100);
-}
-
-static void omap_enable_usb3_phy(struct omap_xhci *omap)
-{
- u32 val;
-
- val = (USBOTGSS_DMADISABLE |
- USBOTGSS_STANDBYMODE_SMRT_WKUP |
- USBOTGSS_IDLEMODE_NOIDLE);
- writel(val, &omap->otg_wrapper->sysconfig);
-
- /* Clear the utmi OTG status */
- val = readl(&omap->otg_wrapper->utmi_otg_status);
- writel(val, &omap->otg_wrapper->utmi_otg_status);
-
- /* Enable interrupts */
- writel(USBOTGSS_COREIRQ_EN, &omap->otg_wrapper->irqenable_set_0);
- val = (USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN |
- USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN |
- USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN |
- USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN |
- USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN |
- USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN |
- USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN |
- USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN |
- USBOTGSS_IRQ_SET_1_OEVT_EN);
- writel(val, &omap->otg_wrapper->irqenable_set_1);
-
- /* Clear the IRQ status */
- val = readl(&omap->otg_wrapper->irqstatus_1);
- writel(val, &omap->otg_wrapper->irqstatus_1);
- val = readl(&omap->otg_wrapper->irqstatus_0);
- writel(val, &omap->otg_wrapper->irqstatus_0);
-};
-#endif /* CONFIG_OMAP_USB3PHY1_HOST */
-
-#ifdef CONFIG_OMAP_USB2PHY2_HOST
-static void omap_enable_usb2_phy2(struct omap_xhci *omap)
-{
- u32 reg, val;
-
- val = (~USB2PHY_AUTORESUME_EN & USB2PHY_DISCHGDET);
- writel(val, (*ctrl)->control_srcomp_north_side);
-
- setbits_le32((*prcm)->cm_coreaon_usb_phy2_core_clkctrl,
- USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K);
-
- setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
- (USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K |
- OTG_SS_CLKCTRL_MODULEMODE_HW));
-
- /* This is an undocumented Reserved register */
- reg = 0x4a0086c0;
- val = readl(reg);
- val |= 0x100;
- setbits_le32(reg, val);
-}
-
-void usb_phy_power(int on)
-{
- return;
-}
-#endif /* CONFIG_OMAP_USB2PHY2_HOST */
-
-#ifdef CONFIG_AM437X_USB2PHY2_HOST
-static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
-{
- const u32 usb_otg_ss_clk_val = (USBOTGSSX_CLKCTRL_MODULE_EN |
- USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960);
-
- writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS0_CLKCTRL);
- writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS1_CLKCTRL);
-
- writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP0_CLKCTRL);
- writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP1_CLKCTRL);
-}
-
-void usb_phy_power(int on)
-{
- u32 val;
-
- /* USB1_CTRL */
- val = readl(USB1_CTRL);
- if (on) {
- /*
- * these bits are re-used on AM437x to power up/down the USB
- * CM and OTG PHYs, if we don't toggle them, USB will not be
- * functional on newer silicon revisions
- */
- val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN);
- } else {
- val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN;
- }
-
- writel(val, USB1_CTRL);
-}
-#endif /* CONFIG_AM437X_USB2PHY2_HOST */
-
-void omap_enable_phy(struct omap_xhci *omap)
-{
-#ifdef CONFIG_OMAP_USB2PHY2_HOST
- omap_enable_usb2_phy2(omap);
-#endif
-
-#ifdef CONFIG_AM437X_USB2PHY2_HOST
- am437x_enable_usb2_phy2(omap);
-#endif
-
-#ifdef CONFIG_OMAP_USB3PHY1_HOST
- omap_enable_usb3_phy(omap);
- omap_usb3_phy_init(omap->usb3_phy);
-#endif
-}
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 8b940d7..b1f8a9c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -259,7 +259,6 @@
config VIDEO_VESA
bool "Enable VESA video driver support"
- default n
help
Turn on this option to enable a very simple driver which uses vesa
to discover the video mode and then provides a frame buffer for use
@@ -406,7 +405,6 @@
config VIDEO_LCD_ANX9804
bool "ANX9804 bridge chip"
- default n
---help---
Support for the ANX9804 bridge chip, which can take pixel data coming
from a parallel LCD interface and translate it on the fy into a DP
@@ -416,7 +414,6 @@
bool "OTM8009A DSI LCD panel support"
depends on DM_VIDEO
select VIDEO_MIPI_DSI
- default n
help
Say Y here if you want to enable support for Orise Technology
otm8009a 480x800 dsi 2dl panel.
@@ -425,14 +422,12 @@
bool "RM68200 DSI LCD panel support"
depends on DM_VIDEO
select VIDEO_MIPI_DSI
- default n
help
Say Y here if you want to enable support for Raydium RM68200
720x1280 DSI video mode panel.
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
- default n
---help---
Support for the SSD2828 bridge chip, which can take pixel data coming
from a parallel LCD interface and translate it on the fly into MIPI DSI
@@ -463,14 +458,12 @@
bool "TDO TL070WSH30 DSI LCD panel support"
depends on DM_VIDEO
select VIDEO_MIPI_DSI
- default n
help
Say Y here if you want to enable support for TDO TL070WSH30
1024x600 DSI video mode panel.
config VIDEO_LCD_HITACHI_TX18D42VM
bool "Hitachi tx18d42vm LVDS LCD panel support"
- default n
---help---
Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
lcd controller which needs to be initialized over SPI, once that is
@@ -523,7 +516,6 @@
config VIDEO_MVEBU
bool "Armada XP LCD controller"
- default n
---help---
Support for the LCD controller integrated in the Marvell
Armada XP SoC.
@@ -536,14 +528,12 @@
config I2C_EDID
bool "Enable EDID library"
- default n
help
This enables library for accessing EDID data from an LCD panel.
config DISPLAY
bool "Enable Display support"
depends on DM
- default n
select I2C_EDID
help
This supports drivers that provide a display, such as eDP (Embedded
@@ -554,7 +544,6 @@
config NXP_TDA19988
bool "Enable NXP TDA19988 support"
depends on DISPLAY
- default n
help
This enables support for the NXP TDA19988 HDMI encoder. This encoder
will convert RGB data streams into HDMI-encoded signals.
@@ -868,7 +857,6 @@
config OSD
bool "Enable OSD support"
depends on DM
- default n
help
This supports drivers that provide a OSD (on-screen display), which
is a (usually text-oriented) graphics buffer to show information on
@@ -1008,7 +996,6 @@
config VIDEO_VCXK
bool "Enable VCXK video controller driver support"
- default n
help
This enables VCXK driver which can be used with VC2K, VC4K
and VC8K devices on various boards from BuS Elektronik GmbH.
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 7ae0ab2..f6d07b3 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -25,7 +25,6 @@
obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
obj-y += ti/
-obj-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
diff --git a/drivers/video/ati_ids.h b/drivers/video/ati_ids.h
deleted file mode 100644
index 3e72a7d..0000000
--- a/drivers/video/ati_ids.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * ATI PCI IDs from XFree86, kept here to make sync'ing with
- * XFree much simpler. Currently, this list is only used by
- * radeonfb
- */
-
-#define PCI_CHIP_RV380_3150 0x3150
-#define PCI_CHIP_RV380_3151 0x3151
-#define PCI_CHIP_RV380_3152 0x3152
-#define PCI_CHIP_RV380_3153 0x3153
-#define PCI_CHIP_RV380_3154 0x3154
-#define PCI_CHIP_RV380_3156 0x3156
-#define PCI_CHIP_RV380_3E50 0x3E50
-#define PCI_CHIP_RV380_3E51 0x3E51
-#define PCI_CHIP_RV380_3E52 0x3E52
-#define PCI_CHIP_RV380_3E53 0x3E53
-#define PCI_CHIP_RV380_3E54 0x3E54
-#define PCI_CHIP_RV380_3E56 0x3E56
-#define PCI_CHIP_RS100_4136 0x4136
-#define PCI_CHIP_RS200_4137 0x4137
-#define PCI_CHIP_R300_AD 0x4144
-#define PCI_CHIP_R300_AE 0x4145
-#define PCI_CHIP_R300_AF 0x4146
-#define PCI_CHIP_R300_AG 0x4147
-#define PCI_CHIP_R350_AH 0x4148
-#define PCI_CHIP_R350_AI 0x4149
-#define PCI_CHIP_R350_AJ 0x414A
-#define PCI_CHIP_R350_AK 0x414B
-#define PCI_CHIP_RV350_AP 0x4150
-#define PCI_CHIP_RV350_AQ 0x4151
-#define PCI_CHIP_RV360_AR 0x4152
-#define PCI_CHIP_RV350_AS 0x4153
-#define PCI_CHIP_RV350_AT 0x4154
-#define PCI_CHIP_RV350_AV 0x4156
-#define PCI_CHIP_MACH32 0x4158
-#define PCI_CHIP_RS250_4237 0x4237
-#define PCI_CHIP_R200_BB 0x4242
-#define PCI_CHIP_R200_BC 0x4243
-#define PCI_CHIP_RS100_4336 0x4336
-#define PCI_CHIP_RS200_4337 0x4337
-#define PCI_CHIP_MACH64CT 0x4354
-#define PCI_CHIP_MACH64CX 0x4358
-#define PCI_CHIP_RS250_4437 0x4437
-#define PCI_CHIP_MACH64ET 0x4554
-#define PCI_CHIP_MACH64GB 0x4742
-#define PCI_CHIP_MACH64GD 0x4744
-#define PCI_CHIP_MACH64GI 0x4749
-#define PCI_CHIP_MACH64GL 0x474C
-#define PCI_CHIP_MACH64GM 0x474D
-#define PCI_CHIP_MACH64GN 0x474E
-#define PCI_CHIP_MACH64GO 0x474F
-#define PCI_CHIP_MACH64GP 0x4750
-#define PCI_CHIP_MACH64GQ 0x4751
-#define PCI_CHIP_MACH64GR 0x4752
-#define PCI_CHIP_MACH64GS 0x4753
-#define PCI_CHIP_MACH64GT 0x4754
-#define PCI_CHIP_MACH64GU 0x4755
-#define PCI_CHIP_MACH64GV 0x4756
-#define PCI_CHIP_MACH64GW 0x4757
-#define PCI_CHIP_MACH64GX 0x4758
-#define PCI_CHIP_MACH64GY 0x4759
-#define PCI_CHIP_MACH64GZ 0x475A
-#define PCI_CHIP_RV250_Id 0x4964
-#define PCI_CHIP_RV250_Ie 0x4965
-#define PCI_CHIP_RV250_If 0x4966
-#define PCI_CHIP_RV250_Ig 0x4967
-#define PCI_CHIP_R420_JH 0x4A48
-#define PCI_CHIP_R420_JI 0x4A49
-#define PCI_CHIP_R420_JJ 0x4A4A
-#define PCI_CHIP_R420_JK 0x4A4B
-#define PCI_CHIP_R420_JL 0x4A4C
-#define PCI_CHIP_R420_JM 0x4A4D
-#define PCI_CHIP_R420_JN 0x4A4E
-#define PCI_CHIP_R420_JP 0x4A50
-#define PCI_CHIP_MACH64LB 0x4C42
-#define PCI_CHIP_MACH64LD 0x4C44
-#define PCI_CHIP_RAGE128LE 0x4C45
-#define PCI_CHIP_RAGE128LF 0x4C46
-#define PCI_CHIP_MACH64LG 0x4C47
-#define PCI_CHIP_MACH64LI 0x4C49
-#define PCI_CHIP_MACH64LM 0x4C4D
-#define PCI_CHIP_MACH64LN 0x4C4E
-#define PCI_CHIP_MACH64LP 0x4C50
-#define PCI_CHIP_MACH64LQ 0x4C51
-#define PCI_CHIP_MACH64LR 0x4C52
-#define PCI_CHIP_MACH64LS 0x4C53
-#define PCI_CHIP_MACH64LT 0x4C54
-#define PCI_CHIP_RADEON_LW 0x4C57
-#define PCI_CHIP_RADEON_LX 0x4C58
-#define PCI_CHIP_RADEON_LY 0x4C59
-#define PCI_CHIP_RADEON_LZ 0x4C5A
-#define PCI_CHIP_RV250_Ld 0x4C64
-#define PCI_CHIP_RV250_Le 0x4C65
-#define PCI_CHIP_RV250_Lf 0x4C66
-#define PCI_CHIP_RV250_Lg 0x4C67
-#define PCI_CHIP_RV250_Ln 0x4C6E
-#define PCI_CHIP_RAGE128MF 0x4D46
-#define PCI_CHIP_RAGE128ML 0x4D4C
-#define PCI_CHIP_R300_ND 0x4E44
-#define PCI_CHIP_R300_NE 0x4E45
-#define PCI_CHIP_R300_NF 0x4E46
-#define PCI_CHIP_R300_NG 0x4E47
-#define PCI_CHIP_R350_NH 0x4E48
-#define PCI_CHIP_R350_NI 0x4E49
-#define PCI_CHIP_R360_NJ 0x4E4A
-#define PCI_CHIP_R350_NK 0x4E4B
-#define PCI_CHIP_RV350_NP 0x4E50
-#define PCI_CHIP_RV350_NQ 0x4E51
-#define PCI_CHIP_RV350_NR 0x4E52
-#define PCI_CHIP_RV350_NS 0x4E53
-#define PCI_CHIP_RV350_NT 0x4E54
-#define PCI_CHIP_RV350_NV 0x4E56
-#define PCI_CHIP_RAGE128PA 0x5041
-#define PCI_CHIP_RAGE128PB 0x5042
-#define PCI_CHIP_RAGE128PC 0x5043
-#define PCI_CHIP_RAGE128PD 0x5044
-#define PCI_CHIP_RAGE128PE 0x5045
-#define PCI_CHIP_RAGE128PF 0x5046
-#define PCI_CHIP_RAGE128PG 0x5047
-#define PCI_CHIP_RAGE128PH 0x5048
-#define PCI_CHIP_RAGE128PI 0x5049
-#define PCI_CHIP_RAGE128PJ 0x504A
-#define PCI_CHIP_RAGE128PK 0x504B
-#define PCI_CHIP_RAGE128PL 0x504C
-#define PCI_CHIP_RAGE128PM 0x504D
-#define PCI_CHIP_RAGE128PN 0x504E
-#define PCI_CHIP_RAGE128PO 0x504F
-#define PCI_CHIP_RAGE128PP 0x5050
-#define PCI_CHIP_RAGE128PQ 0x5051
-#define PCI_CHIP_RAGE128PR 0x5052
-#define PCI_CHIP_RAGE128PS 0x5053
-#define PCI_CHIP_RAGE128PT 0x5054
-#define PCI_CHIP_RAGE128PU 0x5055
-#define PCI_CHIP_RAGE128PV 0x5056
-#define PCI_CHIP_RAGE128PW 0x5057
-#define PCI_CHIP_RAGE128PX 0x5058
-#define PCI_CHIP_RADEON_QD 0x5144
-#define PCI_CHIP_RADEON_QE 0x5145
-#define PCI_CHIP_RADEON_QF 0x5146
-#define PCI_CHIP_RADEON_QG 0x5147
-#define PCI_CHIP_R200_QH 0x5148
-#define PCI_CHIP_R200_QI 0x5149
-#define PCI_CHIP_R200_QJ 0x514A
-#define PCI_CHIP_R200_QK 0x514B
-#define PCI_CHIP_R200_QL 0x514C
-#define PCI_CHIP_R200_QM 0x514D
-#define PCI_CHIP_R200_QN 0x514E
-#define PCI_CHIP_R200_QO 0x514F
-#define PCI_CHIP_RV200_QW 0x5157
-#define PCI_CHIP_RV200_QX 0x5158
-#define PCI_CHIP_RV100_QY 0x5159
-#define PCI_CHIP_RV100_QZ 0x515A
-#define PCI_CHIP_RN50 0x515E
-#define PCI_CHIP_RAGE128RE 0x5245
-#define PCI_CHIP_RAGE128RF 0x5246
-#define PCI_CHIP_RAGE128RG 0x5247
-#define PCI_CHIP_RAGE128RK 0x524B
-#define PCI_CHIP_RAGE128RL 0x524C
-#define PCI_CHIP_RAGE128SE 0x5345
-#define PCI_CHIP_RAGE128SF 0x5346
-#define PCI_CHIP_RAGE128SG 0x5347
-#define PCI_CHIP_RAGE128SH 0x5348
-#define PCI_CHIP_RAGE128SK 0x534B
-#define PCI_CHIP_RAGE128SL 0x534C
-#define PCI_CHIP_RAGE128SM 0x534D
-#define PCI_CHIP_RAGE128SN 0x534E
-#define PCI_CHIP_RAGE128TF 0x5446
-#define PCI_CHIP_RAGE128TL 0x544C
-#define PCI_CHIP_RAGE128TR 0x5452
-#define PCI_CHIP_RAGE128TS 0x5453
-#define PCI_CHIP_RAGE128TT 0x5454
-#define PCI_CHIP_RAGE128TU 0x5455
-#define PCI_CHIP_RV370_5460 0x5460
-#define PCI_CHIP_RV370_5461 0x5461
-#define PCI_CHIP_RV370_5462 0x5462
-#define PCI_CHIP_RV370_5463 0x5463
-#define PCI_CHIP_RV370_5464 0x5464
-#define PCI_CHIP_RV370_5465 0x5465
-#define PCI_CHIP_RV370_5466 0x5466
-#define PCI_CHIP_RV370_5467 0x5467
-#define PCI_CHIP_R423_UH 0x5548
-#define PCI_CHIP_R423_UI 0x5549
-#define PCI_CHIP_R423_UJ 0x554A
-#define PCI_CHIP_R423_UK 0x554B
-#define PCI_CHIP_R423_UQ 0x5551
-#define PCI_CHIP_R423_UR 0x5552
-#define PCI_CHIP_R423_UT 0x5554
-#define PCI_CHIP_MACH64VT 0x5654
-#define PCI_CHIP_MACH64VU 0x5655
-#define PCI_CHIP_MACH64VV 0x5656
-#define PCI_CHIP_RS300_5834 0x5834
-#define PCI_CHIP_RS300_5835 0x5835
-#define PCI_CHIP_RS300_5836 0x5836
-#define PCI_CHIP_RS300_5837 0x5837
-#define PCI_CHIP_RV370_5B60 0x5B60
-#define PCI_CHIP_RV370_5B61 0x5B61
-#define PCI_CHIP_RV370_5B62 0x5B62
-#define PCI_CHIP_RV370_5B63 0x5B63
-#define PCI_CHIP_RV370_5B64 0x5B64
-#define PCI_CHIP_RV370_5B65 0x5B65
-#define PCI_CHIP_RV370_5B66 0x5B66
-#define PCI_CHIP_RV370_5B67 0x5B67
-#define PCI_CHIP_RV280_5960 0x5960
-#define PCI_CHIP_RV280_5961 0x5961
-#define PCI_CHIP_RV280_5962 0x5962
-#define PCI_CHIP_RV280_5964 0x5964
-#define PCI_CHIP_RV280_5C61 0x5C61
-#define PCI_CHIP_RV280_5C63 0x5C63
-#define PCI_CHIP_R423_5D57 0x5D57
-#define PCI_CHIP_RS350_7834 0x7834
-#define PCI_CHIP_RS350_7835 0x7835
diff --git a/drivers/video/ati_radeon_fb.c b/drivers/video/ati_radeon_fb.c
deleted file mode 100644
index 3836667..0000000
--- a/drivers/video/ati_radeon_fb.c
+++ /dev/null
@@ -1,761 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * ATI Radeon Video card Framebuffer driver.
- *
- * Copyright 2007 Freescale Semiconductor, Inc.
- * Zhang Wei <wei.zhang@freescale.com>
- * Jason Jin <jason.jin@freescale.com>
- *
- * Some codes of this file is partly ported from Linux kernel
- * ATI video framebuffer driver.
- *
- * Now the driver is tested on below ATI chips:
- * 9200
- * X300
- * X700
- */
-
-#include <common.h>
-#include <linux/delay.h>
-
-#include <command.h>
-#include <bios_emul.h>
-#include <env.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <linux/errno.h>
-#include <asm/io.h>
-#include <malloc.h>
-#include <video_fb.h>
-#include "videomodes.h"
-
-#include <radeon.h>
-#include "ati_ids.h"
-#include "ati_radeon_fb.h"
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DPRINT(x...) printf(x)
-#else
-#define DPRINT(x...) do{}while(0)
-#endif
-
-#define MAX_MAPPED_VRAM (2048*2048*4)
-#define MIN_MAPPED_VRAM (1024*768*1)
-
-#define RADEON_BUFFER_ALIGN 0x00000fff
-#define SURF_UPPER_BOUND(x,y,bpp) (((((x) * (((y) + 15) & ~15) * (bpp)/8) + RADEON_BUFFER_ALIGN) \
- & ~RADEON_BUFFER_ALIGN) - 1)
-#define RADEON_CRT_PITCH(width, bpp) ((((width) * (bpp) + ((bpp) * 8 - 1)) / ((bpp) * 8)) | \
- ((((width) * (bpp) + ((bpp) * 8 - 1)) / ((bpp) * 8)) << 16))
-
-#define CRTC_H_TOTAL_DISP_VAL(htotal, hdisp) \
- (((((htotal) / 8) - 1) & 0x3ff) | (((((hdisp) / 8) - 1) & 0x1ff) << 16))
-#define CRTC_HSYNC_STRT_WID_VAL(hsync_srtr, hsync_wid) \
- (((hsync_srtr) & 0x1fff) | (((hsync_wid) & 0x3f) << 16))
-#define CRTC_V_TOTAL_DISP_VAL(vtotal, vdisp) \
- ((((vtotal) - 1) & 0xffff) | (((vdisp) - 1) << 16))
-#define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \
- ((((vsync_srtr) - 1) & 0xfff) | (((vsync_wid) & 0x1f) << 16))
-
-/*#define PCI_VENDOR_ID_ATI*/
-#define PCI_CHIP_RV280_5960 0x5960
-#define PCI_CHIP_RV280_5961 0x5961
-#define PCI_CHIP_RV280_5962 0x5962
-#define PCI_CHIP_RV280_5964 0x5964
-#define PCI_CHIP_RV280_5C63 0x5C63
-#define PCI_CHIP_RV370_5B60 0x5B60
-#define PCI_CHIP_RV380_5657 0x5657
-#define PCI_CHIP_R420_554d 0x554d
-
-static struct pci_device_id ati_radeon_pci_ids[] = {
- {PCI_VENDOR_ID_ATI, PCI_CHIP_RV280_5960},
- {PCI_VENDOR_ID_ATI, PCI_CHIP_RV280_5961},
- {PCI_VENDOR_ID_ATI, PCI_CHIP_RV280_5962},
- {PCI_VENDOR_ID_ATI, PCI_CHIP_RV280_5964},
- {PCI_VENDOR_ID_ATI, PCI_CHIP_RV280_5C63},
- {PCI_VENDOR_ID_ATI, PCI_CHIP_RV370_5B60},
- {PCI_VENDOR_ID_ATI, PCI_CHIP_RV380_5657},
- {PCI_VENDOR_ID_ATI, PCI_CHIP_R420_554d},
- {0, 0}
-};
-
-static u16 ati_radeon_id_family_table[][2] = {
- {PCI_CHIP_RV280_5960, CHIP_FAMILY_RV280},
- {PCI_CHIP_RV280_5961, CHIP_FAMILY_RV280},
- {PCI_CHIP_RV280_5962, CHIP_FAMILY_RV280},
- {PCI_CHIP_RV280_5964, CHIP_FAMILY_RV280},
- {PCI_CHIP_RV280_5C63, CHIP_FAMILY_RV280},
- {PCI_CHIP_RV370_5B60, CHIP_FAMILY_RV380},
- {PCI_CHIP_RV380_5657, CHIP_FAMILY_RV380},
- {PCI_CHIP_R420_554d, CHIP_FAMILY_R420},
- {0, 0}
-};
-
-u16 get_radeon_id_family(u16 device)
-{
- int i;
- for (i=0; ati_radeon_id_family_table[0][i]; i+=2)
- if (ati_radeon_id_family_table[0][i] == device)
- return ati_radeon_id_family_table[0][i + 1];
- return 0;
-}
-
-struct radeonfb_info *rinfo;
-
-static void radeon_identify_vram(struct radeonfb_info *rinfo)
-{
- u32 tmp;
-
- /* framebuffer size */
- if ((rinfo->family == CHIP_FAMILY_RS100) ||
- (rinfo->family == CHIP_FAMILY_RS200) ||
- (rinfo->family == CHIP_FAMILY_RS300)) {
- u32 tom = INREG(NB_TOM);
- tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
-
- radeon_fifo_wait(6);
- OUTREG(MC_FB_LOCATION, tom);
- OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
- OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
- OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16);
-
- /* This is supposed to fix the crtc2 noise problem. */
- OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000);
-
- if ((rinfo->family == CHIP_FAMILY_RS100) ||
- (rinfo->family == CHIP_FAMILY_RS200)) {
- /* This is to workaround the asic bug for RMX, some versions
- of BIOS dosen't have this register initialized correctly.
- */
- OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN,
- ~CRTC_H_CUTOFF_ACTIVE_EN);
- }
- } else {
- tmp = INREG(CONFIG_MEMSIZE);
- }
-
- /* mem size is bits [28:0], mask off the rest */
- rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK;
-
- /*
- * Hack to get around some busted production M6's
- * reporting no ram
- */
- if (rinfo->video_ram == 0) {
- switch (rinfo->pdev.device) {
- case PCI_CHIP_RADEON_LY:
- case PCI_CHIP_RADEON_LZ:
- rinfo->video_ram = 8192 * 1024;
- break;
- default:
- break;
- }
- }
-
- /*
- * Now try to identify VRAM type
- */
- if ((rinfo->family >= CHIP_FAMILY_R300) ||
- (INREG(MEM_SDRAM_MODE_REG) & (1<<30)))
- rinfo->vram_ddr = 1;
- else
- rinfo->vram_ddr = 0;
-
- tmp = INREG(MEM_CNTL);
- if (IS_R300_VARIANT(rinfo)) {
- tmp &= R300_MEM_NUM_CHANNELS_MASK;
- switch (tmp) {
- case 0: rinfo->vram_width = 64; break;
- case 1: rinfo->vram_width = 128; break;
- case 2: rinfo->vram_width = 256; break;
- default: rinfo->vram_width = 128; break;
- }
- } else if ((rinfo->family == CHIP_FAMILY_RV100) ||
- (rinfo->family == CHIP_FAMILY_RS100) ||
- (rinfo->family == CHIP_FAMILY_RS200)){
- if (tmp & RV100_MEM_HALF_MODE)
- rinfo->vram_width = 32;
- else
- rinfo->vram_width = 64;
- } else {
- if (tmp & MEM_NUM_CHANNELS_MASK)
- rinfo->vram_width = 128;
- else
- rinfo->vram_width = 64;
- }
-
- /* This may not be correct, as some cards can have half of channel disabled
- * ToDo: identify these cases
- */
-
- DPRINT("radeonfb: Found %dk of %s %d bits wide videoram\n",
- rinfo->video_ram / 1024,
- rinfo->vram_ddr ? "DDR" : "SDRAM",
- rinfo->vram_width);
-
-}
-
-static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *mode)
-{
- int i;
-
- radeon_fifo_wait(20);
-
-#if 0
- /* Workaround from XFree */
- if (rinfo->is_mobility) {
- /* A temporal workaround for the occational blanking on certain laptop
- * panels. This appears to related to the PLL divider registers
- * (fail to lock?). It occurs even when all dividers are the same
- * with their old settings. In this case we really don't need to
- * fiddle with PLL registers. By doing this we can avoid the blanking
- * problem with some panels.
- */
- if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) &&
- (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) &
- (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) {
- /* We still have to force a switch to selected PPLL div thanks to
- * an XFree86 driver bug which will switch it away in some cases
- * even when using UseFDev */
- OUTREGP(CLOCK_CNTL_INDEX,
- mode->clk_cntl_index & PPLL_DIV_SEL_MASK,
- ~PPLL_DIV_SEL_MASK);
- radeon_pll_errata_after_index(rinfo);
- radeon_pll_errata_after_data(rinfo);
- return;
- }
- }
-#endif
- if(rinfo->pdev.device == PCI_CHIP_RV370_5B60) return;
-
- /* Swich VCKL clock input to CPUCLK so it stays fed while PPLL updates*/
- OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_CPUCLK, ~VCLK_SRC_SEL_MASK);
-
- /* Reset PPLL & enable atomic update */
- OUTPLLP(PPLL_CNTL,
- PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN,
- ~(PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN));
-
- /* Switch to selected PPLL divider */
- OUTREGP(CLOCK_CNTL_INDEX,
- mode->clk_cntl_index & PPLL_DIV_SEL_MASK,
- ~PPLL_DIV_SEL_MASK);
-
- /* Set PPLL ref. div */
- if (rinfo->family == CHIP_FAMILY_R300 ||
- rinfo->family == CHIP_FAMILY_RS300 ||
- rinfo->family == CHIP_FAMILY_R350 ||
- rinfo->family == CHIP_FAMILY_RV350) {
- if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) {
- /* When restoring console mode, use saved PPLL_REF_DIV
- * setting.
- */
- OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, 0);
- } else {
- /* R300 uses ref_div_acc field as real ref divider */
- OUTPLLP(PPLL_REF_DIV,
- (mode->ppll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT),
- ~R300_PPLL_REF_DIV_ACC_MASK);
- }
- } else
- OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, ~PPLL_REF_DIV_MASK);
-
- /* Set PPLL divider 3 & post divider*/
- OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK);
- OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK);
-
- /* Write update */
- while (INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R)
- ;
- OUTPLLP(PPLL_REF_DIV, PPLL_ATOMIC_UPDATE_W, ~PPLL_ATOMIC_UPDATE_W);
-
- /* Wait read update complete */
- /* FIXME: Certain revisions of R300 can't recover here. Not sure of
- the cause yet, but this workaround will mask the problem for now.
- Other chips usually will pass at the very first test, so the
- workaround shouldn't have any effect on them. */
- for (i = 0; (i < 10000 && INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); i++)
- ;
-
- OUTPLL(HTOTAL_CNTL, 0);
-
- /* Clear reset & atomic update */
- OUTPLLP(PPLL_CNTL, 0,
- ~(PPLL_RESET | PPLL_SLEEP | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN));
-
- /* We may want some locking ... oh well */
- udelay(5000);
-
- /* Switch back VCLK source to PPLL */
- OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_PPLLCLK, ~VCLK_SRC_SEL_MASK);
-}
-
-typedef struct {
- u16 reg;
- u32 val;
-} reg_val;
-
-#if 0 /* unused ? -> scheduled for removal */
-/* these common regs are cleared before mode setting so they do not
- * interfere with anything
- */
-static reg_val common_regs[] = {
- { OVR_CLR, 0 },
- { OVR_WID_LEFT_RIGHT, 0 },
- { OVR_WID_TOP_BOTTOM, 0 },
- { OV0_SCALE_CNTL, 0 },
- { SUBPIC_CNTL, 0 },
- { VIPH_CONTROL, 0 },
- { I2C_CNTL_1, 0 },
- { GEN_INT_CNTL, 0 },
- { CAP0_TRIG_CNTL, 0 },
- { CAP1_TRIG_CNTL, 0 },
-};
-#endif /* 0 */
-
-void radeon_setmode(void)
-{
- struct radeon_regs *mode = malloc(sizeof(struct radeon_regs));
-
- mode->crtc_gen_cntl = 0x03000200;
- mode->crtc_ext_cntl = 0x00008048;
- mode->dac_cntl = 0xff002100;
- mode->crtc_h_total_disp = 0x4f0063;
- mode->crtc_h_sync_strt_wid = 0x8c02a2;
- mode->crtc_v_total_disp = 0x01df020c;
- mode->crtc_v_sync_strt_wid = 0x8201ea;
- mode->crtc_pitch = 0x00500050;
-
- OUTREG(CRTC_GEN_CNTL, mode->crtc_gen_cntl);
- OUTREGP(CRTC_EXT_CNTL, mode->crtc_ext_cntl,
- ~(CRTC_HSYNC_DIS | CRTC_VSYNC_DIS | CRTC_DISPLAY_DIS));
- OUTREGP(DAC_CNTL, mode->dac_cntl, DAC_RANGE_CNTL | DAC_BLANKING);
- OUTREG(CRTC_H_TOTAL_DISP, mode->crtc_h_total_disp);
- OUTREG(CRTC_H_SYNC_STRT_WID, mode->crtc_h_sync_strt_wid);
- OUTREG(CRTC_V_TOTAL_DISP, mode->crtc_v_total_disp);
- OUTREG(CRTC_V_SYNC_STRT_WID, mode->crtc_v_sync_strt_wid);
- OUTREG(CRTC_OFFSET, 0);
- OUTREG(CRTC_OFFSET_CNTL, 0);
- OUTREG(CRTC_PITCH, mode->crtc_pitch);
-
- mode->clk_cntl_index = 0x300;
- mode->ppll_ref_div = 0xc;
- mode->ppll_div_3 = 0x00030059;
-
- radeon_write_pll_regs(rinfo, mode);
-}
-
-static void set_pal(void)
-{
- int idx, val = 0;
-
- for (idx = 0; idx < 256; idx++) {
- OUTREG8(PALETTE_INDEX, idx);
- OUTREG(PALETTE_DATA, val);
- val += 0x00010101;
- }
-}
-
-void radeon_setmode_9200(int vesa_idx, int bpp)
-{
- struct radeon_regs *mode = malloc(sizeof(struct radeon_regs));
-
- mode->crtc_gen_cntl = CRTC_EN | CRTC_EXT_DISP_EN;
- mode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN | CRTC_CRT_ON;
- mode->dac_cntl = DAC_MASK_ALL | DAC_VGA_ADR_EN | DAC_8BIT_EN;
- mode->crtc_offset_cntl = CRTC_OFFSET_CNTL__CRTC_TILE_EN;
-
- switch (bpp) {
- case 24:
- mode->crtc_gen_cntl |= 0x6 << 8; /* x888 */
-#if defined(__BIG_ENDIAN)
- mode->surface_cntl = NONSURF_AP0_SWP_32BPP | NONSURF_AP1_SWP_32BPP;
- mode->surf_info[0] = NONSURF_AP0_SWP_32BPP | NONSURF_AP1_SWP_32BPP;
-#endif
- break;
- case 16:
- mode->crtc_gen_cntl |= 0x4 << 8; /* 565 */
-#if defined(__BIG_ENDIAN)
- mode->surface_cntl = NONSURF_AP0_SWP_16BPP | NONSURF_AP1_SWP_16BPP;
- mode->surf_info[0] = NONSURF_AP0_SWP_16BPP | NONSURF_AP1_SWP_16BPP;
-#endif
- break;
- default:
- mode->crtc_gen_cntl |= 0x2 << 8; /* palette */
- mode->surface_cntl = 0x00000000;
- break;
- }
-
- switch (vesa_idx) {
- case RES_MODE_1280x1024:
- mode->crtc_h_total_disp = CRTC_H_TOTAL_DISP_VAL(1688,1280);
- mode->crtc_v_total_disp = CRTC_V_TOTAL_DISP_VAL(1066,1024);
- mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3);
-#if defined(CONFIG_RADEON_VREFRESH_75HZ)
- mode->crtc_h_sync_strt_wid = CRTC_HSYNC_STRT_WID_VAL(1288,18);
- mode->ppll_div_3 = 0x00010078;
-#else /* default @ 60 Hz */
- mode->crtc_h_sync_strt_wid = CRTC_HSYNC_STRT_WID_VAL(1320,14);
- mode->ppll_div_3 = 0x00010060;
-#endif
- /*
- * for this mode pitch expands to the same value for 32, 16 and 8 bpp,
- * so we set it here once only.
- */
- mode->crtc_pitch = RADEON_CRT_PITCH(1280,32);
- switch (bpp) {
- case 24:
- mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (1280 * 4 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(1280,1024,32);
- break;
- case 16:
- mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (1280 * 2 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(1280,1024,16);
- break;
- default: /* 8 bpp */
- mode->surf_info[0] = R200_SURF_TILE_COLOR_MACRO | (1280 * 1 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(1280,1024,8);
- break;
- }
- break;
- case RES_MODE_1024x768:
-#if defined(CONFIG_RADEON_VREFRESH_75HZ)
- mode->crtc_h_total_disp = CRTC_H_TOTAL_DISP_VAL(1312,1024);
- mode->crtc_h_sync_strt_wid = CRTC_HSYNC_STRT_WID_VAL(1032,12);
- mode->crtc_v_total_disp = CRTC_V_TOTAL_DISP_VAL(800,768);
- mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3);
- mode->ppll_div_3 = 0x0002008c;
-#else /* @ 60 Hz */
- mode->crtc_h_total_disp = CRTC_H_TOTAL_DISP_VAL(1344,1024);
- mode->crtc_h_sync_strt_wid = CRTC_HSYNC_STRT_WID_VAL(1040,17) | CRTC_H_SYNC_POL;
- mode->crtc_v_total_disp = CRTC_V_TOTAL_DISP_VAL(806,768);
- mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL;
- mode->ppll_div_3 = 0x00020074;
-#endif
- /* also same pitch value for 32, 16 and 8 bpp */
- mode->crtc_pitch = RADEON_CRT_PITCH(1024,32);
- switch (bpp) {
- case 24:
- mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (1024 * 4 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(1024,768,32);
- break;
- case 16:
- mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (1024 * 2 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(1024,768,16);
- break;
- default: /* 8 bpp */
- mode->surf_info[0] = R200_SURF_TILE_COLOR_MACRO | (1024 * 1 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(1024,768,8);
- break;
- }
- break;
- case RES_MODE_800x600:
- mode->crtc_h_total_disp = CRTC_H_TOTAL_DISP_VAL(1056,800);
-#if defined(CONFIG_RADEON_VREFRESH_75HZ)
- mode->crtc_h_sync_strt_wid = CRTC_HSYNC_STRT_WID_VAL(808,10);
- mode->crtc_v_total_disp = CRTC_V_TOTAL_DISP_VAL(625,600);
- mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3);
- mode->ppll_div_3 = 0x000300b0;
-#else /* @ 60 Hz */
- mode->crtc_h_sync_strt_wid = CRTC_HSYNC_STRT_WID_VAL(832,16);
- mode->crtc_v_total_disp = CRTC_V_TOTAL_DISP_VAL(628,600);
- mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4);
- mode->ppll_div_3 = 0x0003008e;
-#endif
- switch (bpp) {
- case 24:
- mode->crtc_pitch = RADEON_CRT_PITCH(832,32);
- mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (832 * 4 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(832,600,32);
- break;
- case 16:
- mode->crtc_pitch = RADEON_CRT_PITCH(896,16);
- mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (896 * 2 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(896,600,16);
- break;
- default: /* 8 bpp */
- mode->crtc_pitch = RADEON_CRT_PITCH(1024,8);
- mode->surf_info[0] = R200_SURF_TILE_COLOR_MACRO | (1024 * 1 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(1024,600,8);
- break;
- }
- break;
- default: /* RES_MODE_640x480 */
-#if defined(CONFIG_RADEON_VREFRESH_75HZ)
- mode->crtc_h_total_disp = CRTC_H_TOTAL_DISP_VAL(840,640);
- mode->crtc_h_sync_strt_wid = CRTC_HSYNC_STRT_WID_VAL(648,8) | CRTC_H_SYNC_POL;
- mode->crtc_v_total_disp = CRTC_V_TOTAL_DISP_VAL(500,480);
- mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL;
- mode->ppll_div_3 = 0x00030070;
-#else /* @ 60 Hz */
- mode->crtc_h_total_disp = CRTC_H_TOTAL_DISP_VAL(800,640);
- mode->crtc_h_sync_strt_wid = CRTC_HSYNC_STRT_WID_VAL(674,12) | CRTC_H_SYNC_POL;
- mode->crtc_v_total_disp = CRTC_V_TOTAL_DISP_VAL(525,480);
- mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL;
- mode->ppll_div_3 = 0x00030059;
-#endif
- /* also same pitch value for 32, 16 and 8 bpp */
- mode->crtc_pitch = RADEON_CRT_PITCH(640,32);
- switch (bpp) {
- case 24:
- mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (640 * 4 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(640,480,32);
- break;
- case 16:
- mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (640 * 2 / 16);
- mode->surf_upper_bound[0] = SURF_UPPER_BOUND(640,480,16);
- break;
- default: /* 8 bpp */
- mode->crtc_offset_cntl = 0x00000000;
- break;
- }
- break;
- }
-
- OUTREG(CRTC_GEN_CNTL, mode->crtc_gen_cntl | CRTC_DISP_REQ_EN_B);
- OUTREGP(CRTC_EXT_CNTL, mode->crtc_ext_cntl,
- (CRTC_HSYNC_DIS | CRTC_VSYNC_DIS | CRTC_DISPLAY_DIS));
- OUTREGP(DAC_CNTL, mode->dac_cntl, DAC_RANGE_CNTL | DAC_BLANKING);
- OUTREG(CRTC_H_TOTAL_DISP, mode->crtc_h_total_disp);
- OUTREG(CRTC_H_SYNC_STRT_WID, mode->crtc_h_sync_strt_wid);
- OUTREG(CRTC_V_TOTAL_DISP, mode->crtc_v_total_disp);
- OUTREG(CRTC_V_SYNC_STRT_WID, mode->crtc_v_sync_strt_wid);
- OUTREG(CRTC_OFFSET, 0);
- OUTREG(CRTC_OFFSET_CNTL, mode->crtc_offset_cntl);
- OUTREG(CRTC_PITCH, mode->crtc_pitch);
- OUTREG(CRTC_GEN_CNTL, mode->crtc_gen_cntl);
-
- mode->clk_cntl_index = 0x300;
- mode->ppll_ref_div = 0xc;
-
- radeon_write_pll_regs(rinfo, mode);
-
- OUTREGP(CRTC_EXT_CNTL, mode->crtc_ext_cntl,
- ~(CRTC_HSYNC_DIS | CRTC_VSYNC_DIS | CRTC_DISPLAY_DIS));
- OUTREG(SURFACE0_INFO, mode->surf_info[0]);
- OUTREG(SURFACE0_LOWER_BOUND, 0);
- OUTREG(SURFACE0_UPPER_BOUND, mode->surf_upper_bound[0]);
- OUTREG(SURFACE_CNTL, mode->surface_cntl);
-
- if (bpp > 8)
- set_pal();
-
- free(mode);
-}
-
-#include "../bios_emulator/include/biosemu.h"
-
-int radeon_probe(struct radeonfb_info *rinfo)
-{
- pci_dev_t pdev;
- u16 did;
-
- pdev = pci_find_devices(ati_radeon_pci_ids, 0);
-
- if (pdev != -1) {
- pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
- printf("ATI Radeon video card (%04x, %04x) found @(%d:%d:%d)\n",
- PCI_VENDOR_ID_ATI, did, (pdev >> 16) & 0xff,
- (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
-
- strcpy(rinfo->name, "ATI Radeon");
- rinfo->pdev.vendor = PCI_VENDOR_ID_ATI;
- rinfo->pdev.device = did;
- rinfo->family = get_radeon_id_family(rinfo->pdev.device);
- pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0,
- &rinfo->fb_base_bus);
- pci_read_config_dword(pdev, PCI_BASE_ADDRESS_2,
- &rinfo->mmio_base_bus);
- rinfo->fb_base_bus &= 0xfffff000;
- rinfo->mmio_base_bus &= ~0x04;
-
- rinfo->mmio_base = pci_bus_to_virt(pdev, rinfo->mmio_base_bus,
- PCI_REGION_MEM, 0, MAP_NOCACHE);
- DPRINT("rinfo->mmio_base = 0x%p bus=0x%x\n",
- rinfo->mmio_base, rinfo->mmio_base_bus);
- rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16;
- DPRINT("rinfo->fb_local_base = 0x%x\n",rinfo->fb_local_base);
- /* PostBIOS with x86 emulater */
- if (!BootVideoCardBIOS(pdev, NULL, 0))
- return -1;
-
- /*
- * Check for errata
- * (These will be added in the future for the chipfamily
- * R300, RV200, RS200, RV100, RS100.)
- */
-
- /* Get VRAM size and type */
- radeon_identify_vram(rinfo);
-
- rinfo->mapped_vram = min_t(unsigned long, MAX_MAPPED_VRAM,
- rinfo->video_ram);
- rinfo->fb_base = pci_bus_to_virt(pdev, rinfo->fb_base_bus,
- PCI_REGION_MEM, 0, MAP_NOCACHE);
- DPRINT("Radeon: framebuffer base address 0x%08x, "
- "bus address 0x%08x\n"
- "MMIO base address 0x%08x, bus address 0x%08x, "
- "framebuffer local base 0x%08x.\n ",
- (u32)rinfo->fb_base, rinfo->fb_base_bus,
- (u32)rinfo->mmio_base, rinfo->mmio_base_bus,
- rinfo->fb_local_base);
- return 0;
- }
- return -1;
-}
-
-/*
- * The Graphic Device
- */
-GraphicDevice ctfb;
-
-#define CURSOR_SIZE 0x1000 /* in KByte for HW Cursor */
-#define PATTERN_ADR (pGD->dprBase + CURSOR_SIZE) /* pattern Memory after Cursor Memory */
-#define PATTERN_SIZE 8*8*4 /* 4 Bytes per Pixel 8 x 8 Pixel */
-#define ACCELMEMORY (CURSOR_SIZE + PATTERN_SIZE) /* reserved Memory for BITBlt and hw cursor */
-
-void *video_hw_init(void)
-{
- GraphicDevice *pGD = (GraphicDevice *) & ctfb;
- u32 *vm;
- char *penv;
- unsigned long t1, hsynch, vsynch;
- int bits_per_pixel, i, tmp, vesa_idx = 0, videomode;
- struct ctfb_res_modes *res_mode;
- struct ctfb_res_modes var_mode;
-
- rinfo = malloc(sizeof(struct radeonfb_info));
-
- printf("Video: ");
- if(radeon_probe(rinfo)) {
- printf("No radeon video card found!\n");
- return NULL;
- }
-
- tmp = 0;
-
- videomode = CONFIG_SYS_DEFAULT_VIDEO_MODE;
- /* get video mode via environment */
- penv = env_get("videomode");
- if (penv) {
- /* deceide if it is a string */
- if (penv[0] <= '9') {
- videomode = (int)hextoul(penv, NULL);
- tmp = 1;
- }
- } else {
- tmp = 1;
- }
- if (tmp) {
- /* parameter are vesa modes */
- /* search params */
- for (i = 0; i < VESA_MODES_COUNT; i++) {
- if (vesa_modes[i].vesanr == videomode)
- break;
- }
- if (i == VESA_MODES_COUNT) {
- printf ("no VESA Mode found, switching to mode 0x%x ", CONFIG_SYS_DEFAULT_VIDEO_MODE);
- i = 0;
- }
- res_mode = (struct ctfb_res_modes *) &res_mode_init[vesa_modes[i].resindex];
- bits_per_pixel = vesa_modes[i].bits_per_pixel;
- vesa_idx = vesa_modes[i].resindex;
- } else {
- res_mode = (struct ctfb_res_modes *) &var_mode;
- bits_per_pixel = video_get_params (res_mode, penv);
- }
-
- /* calculate hsynch and vsynch freq (info only) */
- t1 = (res_mode->left_margin + res_mode->xres +
- res_mode->right_margin + res_mode->hsync_len) / 8;
- t1 *= 8;
- t1 *= res_mode->pixclock;
- t1 /= 1000;
- hsynch = 1000000000L / t1;
- t1 *= (res_mode->upper_margin + res_mode->yres +
- res_mode->lower_margin + res_mode->vsync_len);
- t1 /= 1000;
- vsynch = 1000000000L / t1;
-
- /* fill in Graphic device struct */
- sprintf (pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", res_mode->xres,
- res_mode->yres, bits_per_pixel, (hsynch / 1000),
- (vsynch / 1000));
- printf ("%s\n", pGD->modeIdent);
- pGD->winSizeX = res_mode->xres;
- pGD->winSizeY = res_mode->yres;
- pGD->plnSizeX = res_mode->xres;
- pGD->plnSizeY = res_mode->yres;
-
- switch (bits_per_pixel) {
- case 24:
- pGD->gdfBytesPP = 4;
- pGD->gdfIndex = GDF_32BIT_X888RGB;
- if (res_mode->xres == 800) {
- pGD->winSizeX = 832;
- pGD->plnSizeX = 832;
- }
- break;
- case 16:
- pGD->gdfBytesPP = 2;
- pGD->gdfIndex = GDF_16BIT_565RGB;
- if (res_mode->xres == 800) {
- pGD->winSizeX = 896;
- pGD->plnSizeX = 896;
- }
- break;
- default:
- if (res_mode->xres == 800) {
- pGD->winSizeX = 1024;
- pGD->plnSizeX = 1024;
- }
- pGD->gdfBytesPP = 1;
- pGD->gdfIndex = GDF__8BIT_INDEX;
- break;
- }
-
- pGD->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
- pGD->pciBase = (unsigned int)rinfo->fb_base;
- pGD->frameAdrs = (unsigned int)rinfo->fb_base;
- pGD->memSize = 64 * 1024 * 1024;
-
- /* Cursor Start Address */
- pGD->dprBase = (pGD->winSizeX * pGD->winSizeY * pGD->gdfBytesPP) +
- (unsigned int)rinfo->fb_base;
- if ((pGD->dprBase & 0x0fff) != 0) {
- /* allign it */
- pGD->dprBase &= 0xfffff000;
- pGD->dprBase += 0x00001000;
- }
- DPRINT ("Cursor Start %x Pattern Start %x\n", pGD->dprBase,
- PATTERN_ADR);
- pGD->vprBase = (unsigned int)rinfo->fb_base; /* Dummy */
- pGD->cprBase = (unsigned int)rinfo->fb_base; /* Dummy */
- /* set up Hardware */
-
- /* Clear video memory (only visible screen area) */
- i = pGD->winSizeX * pGD->winSizeY * pGD->gdfBytesPP / 4;
- vm = (unsigned int *) pGD->pciBase;
- while (i--)
- *vm++ = 0;
- /*SetDrawingEngine (bits_per_pixel);*/
-
- if (rinfo->family == CHIP_FAMILY_RV280)
- radeon_setmode_9200(vesa_idx, bits_per_pixel);
- else
- radeon_setmode();
-
- return ((void *) pGD);
-}
-
-void video_set_lut (unsigned int index, /* color number */
- unsigned char r, /* red */
- unsigned char g, /* green */
- unsigned char b /* blue */
- )
-{
- OUTREG(PALETTE_INDEX, index);
- OUTREG(PALETTE_DATA, (r << 16) | (g << 8) | b);
-}
diff --git a/drivers/video/ati_radeon_fb.h b/drivers/video/ati_radeon_fb.h
deleted file mode 100644
index 9dd638b..0000000
--- a/drivers/video/ati_radeon_fb.h
+++ /dev/null
@@ -1,282 +0,0 @@
-#ifndef __ATI_RADEON_FB_H
-#define __ATI_RADEON_FB_H
-
-/***************************************************************
- * Most of the definitions here are adapted right from XFree86 *
- ***************************************************************/
-
-/*
- * Chip families. Must fit in the low 16 bits of a long word
- */
-enum radeon_family {
- CHIP_FAMILY_UNKNOW,
- CHIP_FAMILY_LEGACY,
- CHIP_FAMILY_RADEON,
- CHIP_FAMILY_RV100,
- CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/
- CHIP_FAMILY_RV200,
- CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350),
- RS250 (IGP 7000) */
- CHIP_FAMILY_R200,
- CHIP_FAMILY_RV250,
- CHIP_FAMILY_RS300, /* Radeon 9000 IGP */
- CHIP_FAMILY_RV280,
- CHIP_FAMILY_R300,
- CHIP_FAMILY_R350,
- CHIP_FAMILY_RV350,
- CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */
- CHIP_FAMILY_R420, /* R420/R423/M18 */
- CHIP_FAMILY_LAST,
-};
-
-#define IS_RV100_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_RV100) || \
- ((rinfo)->family == CHIP_FAMILY_RV200) || \
- ((rinfo)->family == CHIP_FAMILY_RS100) || \
- ((rinfo)->family == CHIP_FAMILY_RS200) || \
- ((rinfo)->family == CHIP_FAMILY_RV250) || \
- ((rinfo)->family == CHIP_FAMILY_RV280) || \
- ((rinfo)->family == CHIP_FAMILY_RS300))
-
-#define IS_R300_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_R300) || \
- ((rinfo)->family == CHIP_FAMILY_RV350) || \
- ((rinfo)->family == CHIP_FAMILY_R350) || \
- ((rinfo)->family == CHIP_FAMILY_RV380) || \
- ((rinfo)->family == CHIP_FAMILY_R420))
-
-struct radeonfb_info {
- char name[20];
-
- struct pci_device_id pdev;
- u16 family;
-
- u32 fb_base_bus;
- u32 mmio_base_bus;
-
- void *mmio_base;
- void *fb_base;
-
- u32 video_ram;
- u32 mapped_vram;
- int vram_width;
- int vram_ddr;
-
- u32 fb_local_base;
-};
-
-#define INREG8(addr) readb((rinfo->mmio_base)+addr)
-#define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr)
-#define INREG16(addr) readw((rinfo->mmio_base)+addr)
-#define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr)
-#define INREG(addr) readl((rinfo->mmio_base)+addr)
-#define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr)
-
-static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr,
- u32 val, u32 mask)
-{
- unsigned int tmp;
-
- tmp = INREG(addr);
- tmp &= (mask);
- tmp |= (val);
- OUTREG(addr, tmp);
-}
-
-#define OUTREGP(addr,val,mask) _OUTREGP(rinfo, addr, val,mask)
-
-/*
- * 2D Engine helper routines
- */
-static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
-{
- int i;
-
- /* initiate flush */
- OUTREGP(RB2D_DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL,
- ~RB2D_DC_FLUSH_ALL);
-
- for (i=0; i < 2000000; i++) {
- if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY))
- return;
- udelay(1);
- }
- printf("radeonfb: Flush Timeout !\n");
-}
-
-static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)
-{
- int i;
-
- for (i=0; i<2000000; i++) {
- if ((INREG(RBBM_STATUS) & 0x7f) >= entries)
- return;
- udelay(1);
- }
- printf("radeonfb: FIFO Timeout !\n");
-}
-
-static inline void _radeon_engine_idle(struct radeonfb_info *rinfo)
-{
- int i;
-
- /* ensure FIFO is empty before waiting for idle */
- _radeon_fifo_wait (rinfo, 64);
-
- for (i=0; i<2000000; i++) {
- if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) {
- radeon_engine_flush (rinfo);
- return;
- }
- udelay(1);
- }
- printf("radeonfb: Idle Timeout !\n");
-}
-
-#define radeon_engine_idle() _radeon_engine_idle(rinfo)
-#define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries)
-#define radeon_msleep(ms) _radeon_msleep(rinfo,ms)
-
-/*
- * This structure contains the various registers manipulated by this
- * driver for setting or restoring a mode. It's mostly copied from
- * XFree's RADEONSaveRec structure. A few chip settings might still be
- * tweaked without beeing reflected or saved in these registers though
- */
-struct radeon_regs {
- /* Common registers */
- u32 ovr_clr;
- u32 ovr_wid_left_right;
- u32 ovr_wid_top_bottom;
- u32 ov0_scale_cntl;
- u32 mpp_tb_config;
- u32 mpp_gp_config;
- u32 subpic_cntl;
- u32 viph_control;
- u32 i2c_cntl_1;
- u32 gen_int_cntl;
- u32 cap0_trig_cntl;
- u32 cap1_trig_cntl;
- u32 bus_cntl;
- u32 surface_cntl;
- u32 bios_5_scratch;
-
- /* Other registers to save for VT switches or driver load/unload */
- u32 dp_datatype;
- u32 rbbm_soft_reset;
- u32 clock_cntl_index;
- u32 amcgpio_en_reg;
- u32 amcgpio_mask;
-
- /* Surface/tiling registers */
- u32 surf_lower_bound[8];
- u32 surf_upper_bound[8];
- u32 surf_info[8];
-
- /* CRTC registers */
- u32 crtc_gen_cntl;
- u32 crtc_ext_cntl;
- u32 dac_cntl;
- u32 crtc_h_total_disp;
- u32 crtc_h_sync_strt_wid;
- u32 crtc_v_total_disp;
- u32 crtc_v_sync_strt_wid;
- u32 crtc_offset;
- u32 crtc_offset_cntl;
- u32 crtc_pitch;
- u32 disp_merge_cntl;
- u32 grph_buffer_cntl;
- u32 crtc_more_cntl;
-
- /* CRTC2 registers */
- u32 crtc2_gen_cntl;
- u32 dac2_cntl;
- u32 disp_output_cntl;
- u32 disp_hw_debug;
- u32 disp2_merge_cntl;
- u32 grph2_buffer_cntl;
- u32 crtc2_h_total_disp;
- u32 crtc2_h_sync_strt_wid;
- u32 crtc2_v_total_disp;
- u32 crtc2_v_sync_strt_wid;
- u32 crtc2_offset;
- u32 crtc2_offset_cntl;
- u32 crtc2_pitch;
-
- /* Flat panel regs */
- u32 fp_crtc_h_total_disp;
- u32 fp_crtc_v_total_disp;
- u32 fp_gen_cntl;
- u32 fp2_gen_cntl;
- u32 fp_h_sync_strt_wid;
- u32 fp2_h_sync_strt_wid;
- u32 fp_horz_stretch;
- u32 fp_panel_cntl;
- u32 fp_v_sync_strt_wid;
- u32 fp2_v_sync_strt_wid;
- u32 fp_vert_stretch;
- u32 lvds_gen_cntl;
- u32 lvds_pll_cntl;
- u32 tmds_crc;
- u32 tmds_transmitter_cntl;
-
- /* Computed values for PLL */
- u32 dot_clock_freq;
- int feedback_div;
- int post_div;
-
- /* PLL registers */
- u32 ppll_div_3;
- u32 ppll_ref_div;
- u32 vclk_ecp_cntl;
- u32 clk_cntl_index;
-
- /* Computed values for PLL2 */
- u32 dot_clock_freq_2;
- int feedback_div_2;
- int post_div_2;
-
- /* PLL2 registers */
- u32 p2pll_ref_div;
- u32 p2pll_div_0;
- u32 htotal_cntl2;
-
- /* Palette */
- int palette_valid;
-};
-
-static inline u32 __INPLL(struct radeonfb_info *rinfo, u32 addr)
-{
- u32 data;
-
- OUTREG8(CLOCK_CNTL_INDEX, addr & 0x0000003f);
- /* radeon_pll_errata_after_index(rinfo); */
- data = INREG(CLOCK_CNTL_DATA);
- /* radeon_pll_errata_after_data(rinfo); */
- return data;
-}
-
-static inline void __OUTPLL(struct radeonfb_info *rinfo, unsigned int index,
- u32 val)
-{
-
- OUTREG8(CLOCK_CNTL_INDEX, (index & 0x0000003f) | 0x00000080);
- /* radeon_pll_errata_after_index(rinfo); */
- OUTREG(CLOCK_CNTL_DATA, val);
- /* radeon_pll_errata_after_data(rinfo); */
-}
-
-static inline void __OUTPLLP(struct radeonfb_info *rinfo, unsigned int index,
- u32 val, u32 mask)
-{
- unsigned int tmp;
-
- tmp = __INPLL(rinfo, index);
- tmp &= (mask);
- tmp |= (val);
- __OUTPLL(rinfo, index, tmp);
-}
-
-#define INPLL(addr) __INPLL(rinfo, addr)
-#define OUTPLL(index, val) __OUTPLL(rinfo, index, val)
-#define OUTPLLP(index, val, mask) __OUTPLLP(rinfo, index, val, mask)
-
-#endif
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 5e1ee06..566fc1e 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -71,10 +71,11 @@
#include <fdtdec.h>
#include <gzip.h>
#include <log.h>
-#include <version.h>
+#include <version_string.h>
#include <malloc.h>
#include <video.h>
#include <asm/global_data.h>
+#include <dm/ofnode.h>
#include <linux/compiler.h>
#if defined(CONFIG_VIDEO_MXS)
@@ -108,7 +109,6 @@
* Console device
*/
-#include <version.h>
#include <linux/types.h>
#include <stdio_dev.h>
#include <video_font.h>
@@ -2138,8 +2138,7 @@
#if defined(CONFIG_VGA_AS_SINGLE_DEVICE)
have_keyboard = false;
#elif defined(CONFIG_OF_CONTROL)
- have_keyboard = !fdtdec_get_config_bool(gd->fdt_blob,
- "u-boot,no-keyboard");
+ have_keyboard = !ofnode_conf_read_bool("u-boot,no-keyboard");
#else
have_keyboard = true;
#endif
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
index c56eadc..804fcd0 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -288,8 +288,8 @@
dt->rx_timeout = fdtdec_get_int(blob, node,
"samsung,dsim-config-rx-timeout", 0);
- lcd_dt->name = fdtdec_get_config_string(blob,
- "samsung,dsim-device-name");
+ lcd_dt->name = fdt_getprop(blob, node, "samsung,dsim-device-name",
+ NULL);
lcd_dt->id = fdtdec_get_int(blob, node,
"samsung,dsim-device-id", 0);
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c
index 67f5266..21ade8d 100644
--- a/drivers/video/pxa_lcd.c
+++ b/drivers/video/pxa_lcd.c
@@ -199,72 +199,6 @@
/*----------------------------------------------------------------------*/
-#ifdef CONFIG_ACX517AKN
-
-# define LCD_BPP LCD_COLOR8
-
-/* you have to set lccr0 and lccr3 (including pcd) */
-# define REG_LCCR0 0x003008f9
-# define REG_LCCR3 0x03700006
-
-vidinfo_t panel_info = {
- .vl_col = 320,
- .vl_row = 320,
- .vl_width = 320,
- .vl_height = 320,
- .vl_clkp = CONFIG_SYS_HIGH,
- .vl_oep = CONFIG_SYS_LOW,
- .vl_hsp = CONFIG_SYS_LOW,
- .vl_vsp = CONFIG_SYS_LOW,
- .vl_dp = CONFIG_SYS_HIGH,
- .vl_bpix = LCD_BPP,
- .vl_lbw = 0,
- .vl_splt = 1,
- .vl_clor = 1,
- .vl_tft = 1,
- .vl_hpw = 0x04,
- .vl_blw = 0x1c,
- .vl_elw = 0x08,
- .vl_vpw = 0x01,
- .vl_bfw = 0x07,
- .vl_efw = 0x08,
-};
-#endif /* CONFIG_ACX517AKN */
-
-#ifdef CONFIG_ACX544AKN
-
-# define LCD_BPP LCD_COLOR16
-
-/* you have to set lccr0 and lccr3 (including pcd) */
-# define REG_LCCR0 0x003008f9
-# define REG_LCCR3 0x04700007 /* 16bpp */
-
-vidinfo_t panel_info = {
- .vl_col = 320,
- .vl_row = 320,
- .vl_width = 320,
- .vl_height = 320,
- .vl_clkp = CONFIG_SYS_LOW,
- .vl_oep = CONFIG_SYS_LOW,
- .vl_hsp = CONFIG_SYS_LOW,
- .vl_vsp = CONFIG_SYS_LOW,
- .vl_dp = CONFIG_SYS_LOW,
- .vl_bpix = LCD_BPP,
- .vl_lbw = 0,
- .vl_splt = 0,
- .vl_clor = 1,
- .vl_tft = 1,
- .vl_hpw = 0x05,
- .vl_blw = 0x13,
- .vl_elw = 0x08,
- .vl_vpw = 0x02,
- .vl_bfw = 0x07,
- .vl_efw = 0x05,
-};
-#endif /* CONFIG_ACX544AKN */
-
-/*----------------------------------------------------------------------*/
-
#ifdef CONFIG_LQ038J7DH53
# define LCD_BPP LCD_COLOR8
@@ -295,7 +229,7 @@
.vl_bfw = 0x04,
.vl_efw = 0x01,
};
-#endif /* CONFIG_ACX517AKN */
+#endif /* CONFIG_LQ038J7DH53 */
/*----------------------------------------------------------------------*/
diff --git a/drivers/w1/Kconfig b/drivers/w1/Kconfig
index 031bab2..a2c5108 100644
--- a/drivers/w1/Kconfig
+++ b/drivers/w1/Kconfig
@@ -6,7 +6,6 @@
config W1
bool "Enable 1-wire controllers support"
- default no
depends on DM
help
Support for the Dallas 1-Wire bus.
@@ -15,14 +14,12 @@
config W1_GPIO
bool "Enable 1-wire GPIO bitbanging"
- default no
depends on DM_GPIO
help
Emulate a 1-wire bus using a GPIO.
config W1_MXC
bool "Enable 1-wire controller on i.MX processors"
- default no
depends on ARCH_MX25 || ARCH_MX31 || ARCH_MX5
help
Support the one wire controller found in some members of the NXP
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index f0ff261..6fbb5c1 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -147,6 +147,15 @@
This driver support all CPU ISAs supported by Cortina
Access CAxxxx SoCs.
+config WDT_GPIO
+ bool "External gpio watchdog support"
+ depends on WDT
+ depends on DM_GPIO
+ help
+ Support for external watchdog fed by toggling a gpio. See
+ doc/device-tree-bindings/watchdog/gpio-wdt.txt for
+ information on how to describe the watchdog in device tree.
+
config WDT_MPC8xx
bool "MPC8xx watchdog timer support"
depends on WDT && MPC8xx
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 5c7ef59..f14415b 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -25,6 +25,7 @@
obj-$(CONFIG_WDT_CORTINA) += cortina_wdt.o
obj-$(CONFIG_WDT_ORION) += orion_wdt.o
obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
+obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o
obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
diff --git a/drivers/watchdog/gpio_wdt.c b/drivers/watchdog/gpio_wdt.c
new file mode 100644
index 0000000..982a66b
--- /dev/null
+++ b/drivers/watchdog/gpio_wdt.c
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <wdt.h>
+#include <asm/gpio.h>
+
+struct gpio_wdt_priv {
+ struct gpio_desc gpio;
+ bool always_running;
+ int state;
+};
+
+static int gpio_wdt_reset(struct udevice *dev)
+{
+ struct gpio_wdt_priv *priv = dev_get_priv(dev);
+
+ priv->state = !priv->state;
+
+ return dm_gpio_set_value(&priv->gpio, priv->state);
+}
+
+static int gpio_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+ struct gpio_wdt_priv *priv = dev_get_priv(dev);
+
+ if (priv->always_running)
+ return 0;
+
+ return -ENOSYS;
+}
+
+static int dm_probe(struct udevice *dev)
+{
+ struct gpio_wdt_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ priv->always_running = dev_read_bool(dev, "always-running");
+ ret = gpio_request_by_name(dev, "gpios", 0, &priv->gpio, GPIOD_IS_OUT);
+ if (ret < 0) {
+ dev_err(dev, "Request for wdt gpio failed: %d\n", ret);
+ return ret;
+ }
+
+ if (priv->always_running)
+ ret = gpio_wdt_reset(dev);
+
+ return ret;
+}
+
+static const struct wdt_ops gpio_wdt_ops = {
+ .start = gpio_wdt_start,
+ .reset = gpio_wdt_reset,
+};
+
+static const struct udevice_id gpio_wdt_ids[] = {
+ { .compatible = "linux,wdt-gpio" },
+ {}
+};
+
+U_BOOT_DRIVER(wdt_gpio) = {
+ .name = "wdt_gpio",
+ .id = UCLASS_WDT,
+ .of_match = gpio_wdt_ids,
+ .ops = &gpio_wdt_ops,
+ .probe = dm_probe,
+ .priv_auto = sizeof(struct gpio_wdt_priv),
+};
diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c
index 17334db..7570710 100644
--- a/drivers/watchdog/wdt-uclass.c
+++ b/drivers/watchdog/wdt-uclass.c
@@ -20,53 +20,67 @@
#define WATCHDOG_TIMEOUT_SECS (CONFIG_WATCHDOG_TIMEOUT_MSECS / 1000)
-/*
- * Reset every 1000ms, or however often is required as indicated by a
- * hw_margin_ms property.
- */
-static ulong reset_period = 1000;
+struct wdt_priv {
+ /* Timeout, in seconds, to configure this device to. */
+ u32 timeout;
+ /*
+ * Time, in milliseconds, between calling the device's ->reset()
+ * method from watchdog_reset().
+ */
+ ulong reset_period;
+ /*
+ * Next time (as returned by get_timer(0)) to call
+ * ->reset().
+ */
+ ulong next_reset;
+ /* Whether watchdog_start() has been called on the device. */
+ bool running;
+};
-int initr_watchdog(void)
+static void init_watchdog_dev(struct udevice *dev)
{
- u32 timeout = WATCHDOG_TIMEOUT_SECS;
+ struct wdt_priv *priv;
int ret;
- /*
- * Init watchdog: This will call the probe function of the
- * watchdog driver, enabling the use of the device
- */
- if (uclass_get_device_by_seq(UCLASS_WDT, 0,
- (struct udevice **)&gd->watchdog_dev)) {
- debug("WDT: Not found by seq!\n");
- if (uclass_get_device(UCLASS_WDT, 0,
- (struct udevice **)&gd->watchdog_dev)) {
- printf("WDT: Not found!\n");
- return 0;
- }
- }
-
- if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
- timeout = dev_read_u32_default(gd->watchdog_dev, "timeout-sec",
- WATCHDOG_TIMEOUT_SECS);
- reset_period = dev_read_u32_default(gd->watchdog_dev,
- "hw_margin_ms",
- 4 * reset_period) / 4;
- }
+ priv = dev_get_uclass_priv(dev);
if (!IS_ENABLED(CONFIG_WATCHDOG_AUTOSTART)) {
- printf("WDT: Not starting\n");
- return 0;
+ printf("WDT: Not starting %s\n", dev->name);
+ return;
}
- ret = wdt_start(gd->watchdog_dev, timeout * 1000, 0);
+ ret = wdt_start(dev, priv->timeout * 1000, 0);
if (ret != 0) {
- printf("WDT: Failed to start\n");
+ printf("WDT: Failed to start %s\n", dev->name);
+ return;
+ }
+
+ printf("WDT: Started %s with%s servicing (%ds timeout)\n", dev->name,
+ IS_ENABLED(CONFIG_WATCHDOG) ? "" : "out", priv->timeout);
+}
+
+int initr_watchdog(void)
+{
+ struct udevice *dev;
+ struct uclass *uc;
+ int ret;
+
+ ret = uclass_get(UCLASS_WDT, &uc);
+ if (ret) {
+ log_debug("Error getting UCLASS_WDT: %d\n", ret);
return 0;
}
- printf("WDT: Started with%s servicing (%ds timeout)\n",
- IS_ENABLED(CONFIG_WATCHDOG) ? "" : "out", timeout);
+ uclass_foreach_dev(dev, uc) {
+ ret = device_probe(dev);
+ if (ret) {
+ log_debug("Error probing %s: %d\n", dev->name, ret);
+ continue;
+ }
+ init_watchdog_dev(dev);
+ }
+ gd->flags |= GD_FLG_WDT_READY;
return 0;
}
@@ -79,8 +93,11 @@
return -ENOSYS;
ret = ops->start(dev, timeout_ms, flags);
- if (ret == 0)
- gd->flags |= GD_FLG_WDT_READY;
+ if (ret == 0) {
+ struct wdt_priv *priv = dev_get_uclass_priv(dev);
+
+ priv->running = true;
+ }
return ret;
}
@@ -94,12 +111,40 @@
return -ENOSYS;
ret = ops->stop(dev);
- if (ret == 0)
- gd->flags &= ~GD_FLG_WDT_READY;
+ if (ret == 0) {
+ struct wdt_priv *priv = dev_get_uclass_priv(dev);
+
+ priv->running = false;
+ }
return ret;
}
+int wdt_stop_all(void)
+{
+ struct wdt_priv *priv;
+ struct udevice *dev;
+ struct uclass *uc;
+ int ret, err;
+
+ ret = uclass_get(UCLASS_WDT, &uc);
+ if (ret)
+ return ret;
+
+ uclass_foreach_dev(dev, uc) {
+ if (!device_active(dev))
+ continue;
+ priv = dev_get_uclass_priv(dev);
+ if (!priv->running)
+ continue;
+ err = wdt_stop(dev);
+ if (!ret)
+ ret = err;
+ }
+
+ return ret;
+}
+
int wdt_reset(struct udevice *dev)
{
const struct wdt_ops *ops = device_get_ops(dev);
@@ -120,10 +165,8 @@
if (ops->expire_now) {
return ops->expire_now(dev, flags);
} else {
- if (!ops->start)
- return -ENOSYS;
+ ret = wdt_start(dev, 1, flags);
- ret = ops->start(dev, 1, flags);
if (ret < 0)
return ret;
@@ -141,18 +184,36 @@
*/
void watchdog_reset(void)
{
- static ulong next_reset;
+ struct wdt_priv *priv;
+ struct udevice *dev;
+ struct uclass *uc;
ulong now;
/* Exit if GD is not ready or watchdog is not initialized yet */
if (!gd || !(gd->flags & GD_FLG_WDT_READY))
return;
- /* Do not reset the watchdog too often */
- now = get_timer(0);
- if (time_after_eq(now, next_reset)) {
- next_reset = now + reset_period;
- wdt_reset(gd->watchdog_dev);
+ if (uclass_get(UCLASS_WDT, &uc))
+ return;
+
+ /*
+ * All devices bound to the wdt uclass should have been probed
+ * in initr_watchdog(). But just in case something went wrong,
+ * check device_active() before accessing the uclass private
+ * data.
+ */
+ uclass_foreach_dev(dev, uc) {
+ if (!device_active(dev))
+ continue;
+ priv = dev_get_uclass_priv(dev);
+ if (!priv->running)
+ continue;
+ /* Do not reset the watchdog too often */
+ now = get_timer(0);
+ if (time_after_eq(now, priv->next_reset)) {
+ priv->next_reset = now + priv->reset_period;
+ wdt_reset(dev);
+ }
}
}
#endif
@@ -179,9 +240,38 @@
return 0;
}
+static int wdt_pre_probe(struct udevice *dev)
+{
+ u32 timeout = WATCHDOG_TIMEOUT_SECS;
+ /*
+ * Reset every 1000ms, or however often is required as
+ * indicated by a hw_margin_ms property.
+ */
+ ulong reset_period = 1000;
+ struct wdt_priv *priv;
+
+ if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
+ timeout = dev_read_u32_default(dev, "timeout-sec", timeout);
+ reset_period = dev_read_u32_default(dev, "hw_margin_ms",
+ 4 * reset_period) / 4;
+ }
+ priv = dev_get_uclass_priv(dev);
+ priv->timeout = timeout;
+ priv->reset_period = reset_period;
+ /*
+ * Pretend this device was last reset "long" ago so the first
+ * watchdog_reset will actually call its ->reset method.
+ */
+ priv->next_reset = get_timer(0);
+
+ return 0;
+}
+
UCLASS_DRIVER(wdt) = {
- .id = UCLASS_WDT,
- .name = "watchdog",
- .flags = DM_UC_FLAG_SEQ_ALIAS,
- .post_bind = wdt_post_bind,
+ .id = UCLASS_WDT,
+ .name = "watchdog",
+ .flags = DM_UC_FLAG_SEQ_ALIAS,
+ .post_bind = wdt_post_bind,
+ .pre_probe = wdt_pre_probe,
+ .per_device_auto = sizeof(struct wdt_priv),
};
diff --git a/dts/Kconfig b/dts/Kconfig
index dabe008..0cc562c 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -44,10 +44,19 @@
bool "Run-time configuration via Device Tree"
select DTC
select OF_LIBFDT if !OF_PLATDATA
+ select OF_REAL if !OF_PLATDATA
help
This feature provides for run-time configuration of U-Boot
via a flattened device tree.
+config OF_REAL
+ bool
+ help
+ Indicates that a real devicetree is available which can be accessed
+ at runtime. This means that dev_read_...() functions can be used to
+ read data from the devicetree for each device. This is true if
+ OF_CONTROL is enabled in U-Boot proper.
+
config OF_BOARD_FIXUP
bool "Board-specific manipulation of Device Tree"
help
@@ -62,6 +71,7 @@
bool "Enable run-time configuration via Device Tree in SPL"
depends on SPL && OF_CONTROL
select SPL_OF_LIBFDT if !SPL_OF_PLATDATA
+ select SPL_OF_REAL if !SPL_OF_PLATDATA
help
Some boards use device tree in U-Boot but only have 4KB of SRAM
which is not enough to support device tree. Disable this option to
@@ -71,6 +81,7 @@
bool "Enable run-time configuration via Device Tree in TPL"
depends on TPL && OF_CONTROL
select TPL_OF_LIBFDT if !TPL_OF_PLATDATA
+ select TPL_OF_REAL if !TPL_OF_PLATDATA
help
Some boards use device tree in U-Boot but only have 4KB of SRAM
which is not enough to support device tree. Enable this option to
@@ -236,7 +247,7 @@
config SPL_MULTI_DTB_FIT
- depends on SPL_LOAD_FIT && SPL_OF_CONTROL && !SPL_OF_PLATDATA
+ depends on SPL_LOAD_FIT && SPL_OF_REAL
bool "Support embedding several DTBs in a FIT image for the SPL"
help
This option provides the SPL with the ability to select its own
@@ -374,6 +385,14 @@
compatible string, then adding platform data and U_BOOT_DRVINFO
declarations for each node. See of-plat.txt for more information.
+config SPL_OF_REAL
+ bool
+ help
+ Indicates that a real devicetree is available which can be accessed
+ at runtime. This means that dev_read_...() functions can be used to
+ read data from the devicetree for each device. This is true if
+ SPL_OF_CONTROL is enabled and not SPL_OF_PLATDATA
+
if SPL_OF_PLATDATA
config SPL_OF_PLATDATA_PARENT
@@ -421,6 +440,14 @@
endif
+config TPL_OF_REAL
+ bool
+ help
+ Indicates that a real devicetree is available which can be accessed
+ at runtime. This means that dev_read_...() functions can be used to
+ read data from the devicetree for each device. This is true if
+ TPL_OF_CONTROL is enabled and not TPL_OF_PLATDATA
+
config TPL_OF_PLATDATA
bool "Generate platform data for use in TPL"
depends on TPL_OF_CONTROL
diff --git a/env/Kconfig b/env/Kconfig
index c0dff1f..f75f2b1 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -44,10 +44,6 @@
still be one byte because the extra address bits are hidden
in the chip address.
- - CONFIG_ENV_EEPROM_IS_ON_I2C
- define this, if you have I2C and SPI activated, and your
- EEPROM, which holds the environment, is on the I2C bus.
-
- CONFIG_I2C_ENV_EEPROM_BUS
if you have an Environment on an EEPROM reached over
I2C muxes, you can define here, how to reach this
@@ -689,7 +685,6 @@
config ENV_APPEND
bool "Always append the environment with new data"
- default n
help
If defined, the environment hash table is only ever appended with new
data, but the existing hash table can never be dropped and reloaded
@@ -698,7 +693,6 @@
config ENV_WRITEABLE_LIST
bool "Permit write access only to listed variables"
- default n
help
If defined, only environment variables which explicitly set the 'w'
writeable flag can be written and modified at runtime. No variables
@@ -706,7 +700,6 @@
config ENV_ACCESS_IGNORE_FORCE
bool "Block forced environment operations"
- default n
help
If defined, don't allow the -f switch to env set override variable
access flags.
diff --git a/env/eeprom.c b/env/eeprom.c
index ba16801..253bdf1 100644
--- a/env/eeprom.c
+++ b/env/eeprom.c
@@ -76,7 +76,7 @@
if (gd->env_valid == ENV_REDUND)
off = CONFIG_ENV_OFFSET_REDUND;
#endif
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR,
off + index + offsetof(env_t, data), &c, 1);
return c;
@@ -100,11 +100,11 @@
for (i = 0; i < 2; i++) {
/* read CRC */
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR,
off_env[i] + offsetof(env_t, crc),
(uchar *)&crc[i], sizeof(ulong));
/* read FLAGS */
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR,
off_env[i] + offsetof(env_t, flags),
(uchar *)&flags[i], sizeof(uchar));
@@ -114,7 +114,7 @@
while (len > 0) {
int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len;
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR, off,
+ eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR, off,
rdbuf, n);
crc_tmp = crc32(crc_tmp, rdbuf, n);
@@ -156,7 +156,7 @@
eeprom_init(-1); /* prepare for EEPROM read/write */
/* read old CRC */
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR,
CONFIG_ENV_OFFSET + offsetof(env_t, crc),
(uchar *)&crc, sizeof(ulong));
@@ -166,7 +166,7 @@
while (len > 0) {
int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len;
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR,
CONFIG_ENV_OFFSET + off, rdbuf, n);
new = crc32(new, rdbuf, n);
len -= n;
@@ -186,7 +186,7 @@
off = CONFIG_ENV_OFFSET_REDUND;
#endif
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR,
off, (uchar *)buf_env, CONFIG_ENV_SIZE);
return env_import(buf_env, 1, H_EXTERNAL);
@@ -215,12 +215,12 @@
env_new.flags = ENV_REDUND_ACTIVE;
#endif
- rc = eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
+ rc = eeprom_bus_write(CONFIG_SYS_I2C_EEPROM_ADDR,
off, (uchar *)&env_new, CONFIG_ENV_SIZE);
#ifdef CONFIG_ENV_OFFSET_REDUND
if (rc == 0) {
- eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
+ eeprom_bus_write(CONFIG_SYS_I2C_EEPROM_ADDR,
off_red + offsetof(env_t, flags),
(uchar *)&flag_obsolete, 1);
diff --git a/env/mmc.c b/env/mmc.c
index 09e94f0..c4cb163 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -19,6 +19,7 @@
#include <part.h>
#include <search.h>
#include <errno.h>
+#include <dm/ofnode.h>
#define __STR(X) #X
#define STR(X) __STR(X)
@@ -73,7 +74,7 @@
int err;
/* look for the partition in mmc CONFIG_SYS_MMC_ENV_DEV */
- str = fdtdec_get_config_string(gd->fdt_blob, dt_prop.partition);
+ str = ofnode_conf_read_str(dt_prop.partition);
if (str) {
/* try to place the environment at end of the partition */
err = mmc_offset_try_partition(str, copy, &val);
@@ -90,7 +91,7 @@
propname = dt_prop.offset_redund;
}
#endif
- return fdtdec_get_config_int(gd->fdt_blob, propname, defvalue);
+ return ofnode_conf_read_int(propname, defvalue);
}
#else
static inline s64 mmc_offset(int copy)
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 12f9579..eb7736d 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -918,7 +918,11 @@
ret = btrfs_scan_one_device(desc, part, fs_devices, &total_devs);
if (ret) {
- fprintf(stderr, "No valid Btrfs found\n");
+ /*
+ * Avoid showing this when probing for a possible Btrfs
+ *
+ * fprintf(stderr, "No valid Btrfs found\n");
+ */
return ret;
}
return 0;
@@ -1007,7 +1011,7 @@
disk_super = fs_info->super_copy;
ret = btrfs_read_dev_super(desc, part, disk_super);
if (ret) {
- printk("No valid btrfs found\n");
+ debug("No valid btrfs found\n");
goto out_devices;
}
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index 92ab8ac..e2d91c6 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -1090,7 +1090,7 @@
/* Make sure it has a valid SquashFS magic number*/
if (get_unaligned_le32(&sblk->s_magic) != SQFS_MAGIC_NUMBER) {
- printf("Bad magic number for SquashFS image.\n");
+ debug("Bad magic number for SquashFS image.\n");
ret = -EINVAL;
goto error;
}
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index e550703..16fd305 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -277,7 +277,7 @@
*/
void *trace_buff;
#endif
-#if defined(CONFIG_SYS_I2C_LEGACY)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
/**
* @cur_i2c_bus: currently used I2C bus
*/
@@ -447,12 +447,6 @@
*/
fdt_addr_t translation_offset;
#endif
-#if CONFIG_IS_ENABLED(WDT)
- /**
- * @watchdog_dev: watchdog device
- */
- struct udevice *watchdog_dev;
-#endif
#ifdef CONFIG_GENERATE_ACPI_TABLE
/**
* @acpi_ctx: ACPI context pointer
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index e33cde7..6de13d9 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -608,6 +608,11 @@
*/
int dm_gpio_request(struct gpio_desc *desc, const char *label);
+struct phandle_2_arg;
+int gpio_request_by_phandle(struct udevice *dev,
+ const struct phandle_2_arg *cells,
+ struct gpio_desc *desc, int flags);
+
/**
* gpio_get_list_count() - Returns the number of GPIOs in a list
*
diff --git a/include/clk.h b/include/clk.h
index f3c88fe..a928879 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -89,11 +89,36 @@
#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)
struct phandle_1_arg;
-int clk_get_by_driver_info(struct udevice *dev,
- struct phandle_1_arg *cells, struct clk *clk);
+/**
+ * clk_get_by_phandle() - Get a clock by its phandle information (of-platadata)
+ *
+ * This function is used when of-platdata is enabled.
+ *
+ * This looks up a clock using the phandle info. With dtoc, each phandle in the
+ * 'clocks' property is transformed into an idx representing the device. For
+ * example:
+ *
+ * clocks = <&dpll_mpu_ck 23>;
+ *
+ * might result in:
+ *
+ * .clocks = {1, {23}},},
+ *
+ * indicating that the clock is udevice idx 1 in dt-plat.c with an argument of
+ * 23. This function can return a valid clock given the above information. In
+ * this example it would return a clock containing the 'dpll_mpu_ck' device and
+ * the clock ID 23.
+ *
+ * @dev: Device containing the phandle
+ * @cells: Phandle info
+ * @clock: A pointer to a clock struct to initialise
+ * @return 0 if OK, or a negative error code.
+ */
+int clk_get_by_phandle(struct udevice *dev, const struct phandle_1_arg *cells,
+ struct clk *clk);
/**
- * clk_get_by_index - Get/request a clock by integer index.
+ * clk_get_by_index() - Get/request a clock by integer index.
*
* This looks up and requests a clock. The index is relative to the client
* device; each device is assumed to have n clocks associated with it somehow,
@@ -300,9 +325,7 @@
CLK_DEFAULTS_POST_FORCE,
};
-#if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) && \
- CONFIG_IS_ENABLED(CLK)
-
+#if CONFIG_IS_ENABLED(OF_REAL) && CONFIG_IS_ENABLED(CLK)
/**
* clk_set_defaults - Process 'assigned-{clocks/clock-parents/clock-rates}'
* properties to configure clocks
diff --git a/include/clock_legacy.h b/include/clock_legacy.h
index b0a8333..29261b6 100644
--- a/include/clock_legacy.h
+++ b/include/clock_legacy.h
@@ -11,4 +11,15 @@
unsigned long get_bus_freq(unsigned long dummy);
int get_serial_clock(void);
+/*
+ * If we have CONFIG_DYNAMIC_DDR_CLK_FREQ then there will be an
+ * implentation of get_board_ddr_clk() somewhere. Otherwise we have
+ * a static value to use now.
+ */
+#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
+unsigned long get_board_ddr_clk(void);
+#else
+#define get_board_ddr_clk() CONFIG_DDR_CLK_FREQ
+#endif
+
#endif
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index aaf016c..167d44e 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -46,10 +46,4 @@
#define CONFIG_SYS_MAXARGS 16
#endif
-#if CONFIG_IS_ENABLED(DM_I2C)
-# ifdef CONFIG_SYS_I2C_LEGACY
-# error "Cannot define CONFIG_SYS_I2C_LEGACY when CONFIG_DM_I2C is used"
-# endif
-#endif
-
#endif /* __CONFIG_FALLBACKS_H */
diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h
index 3ffc744..709a449 100644
--- a/include/configs/10m50_devboard.h
+++ b/include/configs/10m50_devboard.h
@@ -47,7 +47,6 @@
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \
CONFIG_SYS_SDRAM_SIZE - \
CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_MALLOC_LEN 0x20000
/*
* ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
@@ -57,10 +56,5 @@
* (which is common practice).
*/
-/*
- * MISC
- */
-#define CONFIG_SYS_LOAD_ADDR 0xcc000000 /* Half of RAM */
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#endif /* __CONFIG_H */
diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h
index 3f065ff..f7ad7ef 100644
--- a/include/configs/3c120_devboard.h
+++ b/include/configs/3c120_devboard.h
@@ -47,7 +47,6 @@
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \
CONFIG_SYS_SDRAM_SIZE - \
CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_MALLOC_LEN 0x20000
/*
* ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
@@ -57,10 +56,5 @@
* (which is common practice).
*/
-/*
- * MISC
- */
-#define CONFIG_SYS_LOAD_ADDR 0xd4000000 /* Half of RAM */
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#endif /* __CONFIG_H */
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index 1b8312b..e0c8d36 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -40,11 +40,6 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 80000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_UDP_CHECKSUM
@@ -71,8 +66,6 @@
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LOAD_ADDR 0x40010000
-
#define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */
#define CONFIG_SYS_PLL_ODR 0x36
#define CONFIG_SYS_PLL_FDR 0x7D
@@ -108,7 +101,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
-#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
@@ -138,7 +130,6 @@
env/embedded.o(.text*);
/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index d061f45..f983281 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -49,11 +49,6 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_i2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 80000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi)
#define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
@@ -83,8 +78,6 @@
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE+0x20000)
-
#define CONFIG_SYS_CLK 75000000
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
@@ -116,7 +109,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
-#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
@@ -154,7 +146,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index 1a1a110..7015f79 100644
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -31,8 +31,6 @@
*/
#undef CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
-
/*
* Clock configuration: enable only one of the following options
*/
@@ -78,7 +76,6 @@
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
#define CONFIG_SYS_MONITOR_LEN 0x20000
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024*1024) /* Reserve 1 MB for malloc() */
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
/*
@@ -104,7 +101,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 8ac0086..d892cbb 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -70,18 +70,11 @@
#define CONFIG_HOSTNAME "M5253DEMO"
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 80000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000280
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C))
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF)
#define CONFIG_SYS_I2C_PINMUX_SET (0)
-#define CONFIG_SYS_LOAD_ADDR 0x00100000
-
#undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */
#define CONFIG_SYS_FAST_CLK
#ifdef CONFIG_SYS_FAST_CLK
@@ -124,7 +117,6 @@
#endif
#define CONFIG_SYS_MONITOR_LEN 0x40000
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
/*
@@ -160,7 +152,6 @@
#endif
/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 2cdd436..01c8ac6 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -75,7 +75,6 @@
"save\0" \
""
-#define CONFIG_SYS_LOAD_ADDR 0x20000
#define CONFIG_SYS_CLK 66000000
/*
@@ -111,7 +110,6 @@
#endif
#define CONFIG_SYS_MONITOR_LEN 0x20000
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
/*
@@ -134,7 +132,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index eb7823a..3504861 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -59,18 +59,11 @@
#endif
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 80000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
-#define CONFIG_SYS_LOAD_ADDR 0x800000
-
#define CONFIG_BOOTCOMMAND "bootm ffe40000"
#ifdef CONFIG_MCFFEC
@@ -124,7 +117,6 @@
#endif
#define CONFIG_SYS_MONITOR_LEN 0x20000
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
/*
@@ -147,7 +139,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index 6a50a25..fde1084 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -72,8 +72,6 @@
"save\0" \
""
-#define CONFIG_SYS_LOAD_ADDR 0x20000
-
#define CONFIG_SYS_CLK 64000000
/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
@@ -116,7 +114,6 @@
#endif
#define CONFIG_SYS_MONITOR_LEN 0x20000
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
/*
@@ -142,7 +139,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index a063b92..2e5b82a 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -55,11 +55,6 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 80000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_UDP_CHECKSUM
@@ -86,8 +81,6 @@
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LOAD_ADDR 0x40010000
-
#define CONFIG_SYS_CLK 80000000
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
@@ -124,7 +117,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
-#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
@@ -158,7 +150,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 4fc6d38..e3e7d8b 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -49,11 +49,6 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 80000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_UDP_CHECKSUM
@@ -80,8 +75,6 @@
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LOAD_ADDR 0x40010000
-
#define CONFIG_SYS_CLK 80000000
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
@@ -120,7 +113,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
-#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
@@ -165,7 +157,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index 7a9240a..256a66f 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -51,11 +51,6 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 80000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_UDP_CHECKSUM
@@ -82,8 +77,6 @@
#define CONFIG_PRAM 512 /* 512 KB */
-#define CONFIG_SYS_LOAD_ADDR 0x40010000
-
#define CONFIG_SYS_CLK 80000000
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
@@ -122,7 +115,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
-#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
@@ -167,7 +159,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
index 48e9ecd..65c1638 100644
--- a/include/configs/MCR3000.h
+++ b/include/configs/MCR3000.h
@@ -60,8 +60,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR 0x200000
-
#define CONFIG_SYS_HZ 1000
/* Definitions for initial stack pointer and data area (in DPRAM) */
@@ -86,7 +84,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
#define CONFIG_SYS_MONITOR_LEN (320 << 10)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN (4096 << 10)
/* Environment Configuration */
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index b4e1cae..dd11e98 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -22,8 +22,6 @@
/*
* DDR Setup
*/
-#define CONFIG_DDR_ECC /* support DDR ECC function */
-#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
/*
@@ -35,26 +33,11 @@
#define SPD_EEPROM_ADDRESS2 0x51
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
-/*
- * 32-bit data path mode.
- *
- * Please note that using this mode for devices with the real density of 64-bit
- * effectively reduces the amount of available memory due to the effect of
- * wrapping around while translating address to row/columns, for example in the
- * 256MB module the upper 128MB get aliased with contents of the lower
- * 128MB); normally this define should be used for devices with real 32-bit
- * data path.
- */
-#undef CONFIG_DDR_32BIT
-
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \
| DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
-#undef CONFIG_DDR_2T_TIMING
-
/*
* DDRCDR - DDR Control Driver Register
*/
@@ -70,21 +53,6 @@
* Manually set up DDR parameters
*/
#define CONFIG_SYS_DDR_SIZE 256 /* MB */
-#if defined(CONFIG_DDR_II)
-#define CONFIG_SYS_DDRCDR 0x80080001
-#define CONFIG_SYS_DDR_CS2_BNDS 0x0000000f
-#define CONFIG_SYS_DDR_CS2_CONFIG 0x80330102
-#define CONFIG_SYS_DDR_TIMING_0 0x00220802
-#define CONFIG_SYS_DDR_TIMING_1 0x38357322
-#define CONFIG_SYS_DDR_TIMING_2 0x2f9048c8
-#define CONFIG_SYS_DDR_TIMING_3 0x00000000
-#define CONFIG_SYS_DDR_CLK_CNTL 0x02000000
-#define CONFIG_SYS_DDR_MODE 0x47d00432
-#define CONFIG_SYS_DDR_MODE2 0x8000c000
-#define CONFIG_SYS_DDR_INTERVAL 0x03cf0080
-#define CONFIG_SYS_DDR_SDRAM_CFG 0x43000000
-#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000
-#else
#define CONFIG_SYS_DDR_CS2_CONFIG (CSCONFIG_EN \
| CSCONFIG_ROW_BIT_13 \
| CSCONFIG_COL_BIT_10)
@@ -93,17 +61,10 @@
#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */
#define CONFIG_SYS_DDR_INTERVAL 0x04060100 /* autocharge,no open page */
-#if defined(CONFIG_DDR_32BIT)
-/* set burst length to 8 for 32-bit data path */
- /* DLL,normal,seq,4/2.5, 8 burst len */
-#define CONFIG_SYS_DDR_MODE 0x00000023
-#else
/* the default burst length is 4 - for 64-bit data path */
/* DLL,normal,seq,4/2.5, 4 burst len */
#define CONFIG_SYS_DDR_MODE 0x00000022
#endif
-#endif
-#endif
/*
* SDRAM on the Local Bus
@@ -149,7 +110,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserved for malloc */
/*
* Serial Port
@@ -165,14 +125,6 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
/* SPI */
@@ -218,9 +170,6 @@
#if defined(CONFIG_PCI)
-#define CONFIG_83XX_PCI_STREAMING
-
-
#if !defined(CONFIG_PCI_PNP)
#define PCI_ENET0_IOADDR 0xFIXME
#define PCI_ENET0_MEMADDR 0xFIXME
@@ -280,7 +229,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -320,8 +268,6 @@
#define CONFIG_ROOTPATH "/nfsroot/rootfs"
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=mpc8349emds\0" \
@@ -346,7 +292,7 @@
"fdtfile=mpc834x_mds.dtb\0" \
""
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:" \
@@ -356,7 +302,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 7924cbc..2a53b14 100644
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -22,8 +22,6 @@
/*
* DDR Setup
*/
-#define CONFIG_DDR_ECC /* support DDR ECC function */
-#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
/*
@@ -35,26 +33,11 @@
#define SPD_EEPROM_ADDRESS2 0x51
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
-/*
- * 32-bit data path mode.
- *
- * Please note that using this mode for devices with the real density of 64-bit
- * effectively reduces the amount of available memory due to the effect of
- * wrapping around while translating address to row/columns, for example in the
- * 256MB module the upper 128MB get aliased with contents of the lower
- * 128MB); normally this define should be used for devices with real 32-bit
- * data path.
- */
-#undef CONFIG_DDR_32BIT
-
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \
| DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
-#undef CONFIG_DDR_2T_TIMING
-
/*
* DDRCDR - DDR Control Driver Register
*/
@@ -70,21 +53,6 @@
* Manually set up DDR parameters
*/
#define CONFIG_SYS_DDR_SIZE 256 /* MB */
-#if defined(CONFIG_DDR_II)
-#define CONFIG_SYS_DDRCDR 0x80080001
-#define CONFIG_SYS_DDR_CS2_BNDS 0x0000000f
-#define CONFIG_SYS_DDR_CS2_CONFIG 0x80330102
-#define CONFIG_SYS_DDR_TIMING_0 0x00220802
-#define CONFIG_SYS_DDR_TIMING_1 0x38357322
-#define CONFIG_SYS_DDR_TIMING_2 0x2f9048c8
-#define CONFIG_SYS_DDR_TIMING_3 0x00000000
-#define CONFIG_SYS_DDR_CLK_CNTL 0x02000000
-#define CONFIG_SYS_DDR_MODE 0x47d00432
-#define CONFIG_SYS_DDR_MODE2 0x8000c000
-#define CONFIG_SYS_DDR_INTERVAL 0x03cf0080
-#define CONFIG_SYS_DDR_SDRAM_CFG 0x43000000
-#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000
-#else
#define CONFIG_SYS_DDR_CS2_CONFIG (CSCONFIG_EN \
| CSCONFIG_ROW_BIT_13 \
| CSCONFIG_COL_BIT_10)
@@ -93,17 +61,10 @@
#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */
#define CONFIG_SYS_DDR_INTERVAL 0x04060100 /* autocharge,no open page */
-#if defined(CONFIG_DDR_32BIT)
-/* set burst length to 8 for 32-bit data path */
- /* DLL,normal,seq,4/2.5, 8 burst len */
-#define CONFIG_SYS_DDR_MODE 0x00000023
-#else
/* the default burst length is 4 - for 64-bit data path */
/* DLL,normal,seq,4/2.5, 4 burst len */
#define CONFIG_SYS_DDR_MODE 0x00000022
#endif
-#endif
-#endif
/*
* SDRAM on the Local Bus
@@ -146,7 +107,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserved for malloc */
/*
* The MPC834xEA MDS for 834xE rev3.1 may not be assembled SDRAM memory.
@@ -220,14 +180,6 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
/* SPI */
@@ -273,9 +225,6 @@
#if defined(CONFIG_PCI)
-#define CONFIG_83XX_PCI_STREAMING
-
-
#if !defined(CONFIG_PCI_PNP)
#define PCI_ENET0_IOADDR 0xFIXME
#define PCI_ENET0_MEMADDR 0xFIXME
@@ -335,7 +284,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -377,8 +325,6 @@
#define CONFIG_ROOTPATH "/nfsroot/rootfs"
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=mpc8349emds\0" \
@@ -403,7 +349,7 @@
"fdtfile=mpc834x_mds.dtb\0" \
""
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:" \
@@ -413,7 +359,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index a13b178..26c6180 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -66,9 +66,6 @@
#define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN)
-#undef CONFIG_DDR_ECC /* support DDR ECC function */
-#undef CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
-
#undef CONFIG_NEVER_ASSERT_ODT_TO_CPU /* Never assert ODT to internal IOs */
/*
@@ -113,17 +110,9 @@
| (0 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
/* 0x06090100 */
-#if defined(CONFIG_DDR_2T_TIMING)
-#define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SREN \
- | SDRAM_CFG_SDRAM_TYPE_DDR2 \
- | SDRAM_CFG_32_BE \
- | SDRAM_CFG_2T_EN)
- /* 0x43088000 */
-#else
#define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SREN \
| SDRAM_CFG_SDRAM_TYPE_DDR2)
/* 0x43000000 */
-#endif
#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00001000 /* 1 posted refresh */
#define CONFIG_SYS_DDR_MODE ((0x0406 << SDRAM_MODE_ESD_SHIFT) \
| (0x0442 << SDRAM_MODE_SD_SHIFT))
@@ -147,7 +136,6 @@
#endif
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
/*
* Initial RAM Base Address Setup
@@ -203,11 +191,6 @@
#define CONFIG_FSL_SERDES2 0xe3100
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} }
/*
@@ -329,7 +312,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -361,9 +343,6 @@
#define CONFIG_UBOOTPATH "u-boot.bin"
#define CONFIG_FDTFILE "mpc8379_rdb.dtb"
- /* default location for tftp and bootm */
-#define CONFIG_LOADADDR 800000
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=" CONFIG_NETDEV "\0" \
"uboot=" CONFIG_UBOOTPATH "\0" \
@@ -390,7 +369,7 @@
"$netdev:off " \
"root=$rootdev rw console=$console,$baudrate $othbootargs\0"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv rootdev /dev/nfs;" \
"run setbootargs;" \
"run setipargs;" \
@@ -398,7 +377,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv rootdev /dev/ram;" \
"run setbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 549fbfa..fc9d949 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -61,7 +61,6 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
@@ -189,7 +188,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
@@ -205,11 +203,6 @@
/*
* I2C
*/
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
/* RapidIO MMU */
@@ -286,7 +279,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -321,8 +313,6 @@
#define CONFIG_GATEWAYIP 192.168.1.1
#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
@@ -331,7 +321,7 @@
"fdtaddr=400000\0" \
"fdtfile=your.fdt.dtb\0"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -340,7 +330,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -348,6 +338,6 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND NFSBOOTCOMMAND
#endif /* __CONFIG_H */
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index d3e5da0..f7d05ff 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -45,10 +45,7 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/
@@ -278,7 +275,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
@@ -295,23 +291,13 @@
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
#else
#define CONFIG_SYS_SPD_BUS_NUM 0
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
#endif
-#define CONFIG_SYS_I2C_FSL
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_CCID
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* General PCI
@@ -420,7 +406,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -455,8 +440,6 @@
#define CONFIG_GATEWAYIP 192.168.1.1
#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:ecc=off\0" \
"netdev=eth0\0" \
@@ -478,7 +461,7 @@
"fdtaddr=1e00000\0" \
"fdtfile=mpc8548cds.dtb\0"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -487,7 +470,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -495,6 +478,6 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND NFSBOOTCOMMAND
#endif /* __CONFIG_H */
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 5254936..e1e0717 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -28,7 +28,6 @@
*/
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
-#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
/*
@@ -62,7 +61,6 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
@@ -190,7 +188,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
#define CONFIG_CONS_ON_SCC /* define if console on SCC */
@@ -202,11 +199,6 @@
/*
* I2C
*/
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
/* RapidIO MMU */
@@ -258,50 +250,6 @@
#endif /* CONFIG_TSEC_ENET */
-#ifdef CONFIG_ETHER_ON_FCC /* CPM FCC Ethernet */
-
-#undef CONFIG_ETHER_NONE /* define if ether on something else */
-#define CONFIG_ETHER_INDEX 2 /* which channel for ether */
-
-#if (CONFIG_ETHER_INDEX == 2)
- /*
- * - Rx-CLK is CLK13
- * - Tx-CLK is CLK14
- * - Select bus for bd/buffers
- * - Full duplex
- */
- #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
- #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
- #define CONFIG_SYS_CPMFCR_RAMTYPE 0
- #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE)
- #define FETH2_RST 0x01
-#elif (CONFIG_ETHER_INDEX == 3)
- /* need more definitions here for FE3 */
- #define FETH3_RST 0x80
-#endif /* CONFIG_ETHER_INDEX */
-
-/*
- * GPIO pins used for bit-banged MII communications
- */
-#define MDIO_PORT 2 /* Port C */
-#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
- (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
-#define MDC_DECLARE MDIO_DECLARE
-
-#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
-#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
-#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
-
-#define MDIO(bit) if(bit) iop->pdat |= 0x00400000; \
- else iop->pdat &= ~0x00400000
-
-#define MDC(bit) if(bit) iop->pdat |= 0x00200000; \
- else iop->pdat &= ~0x00200000
-
-#define MIIDELAY udelay(1)
-
-#endif
-
/*
* Environment
*/
@@ -319,7 +267,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
@@ -338,7 +285,7 @@
/*
* Environment Configuration
*/
-#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
+#if defined(CONFIG_TSEC_ENET)
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH2
@@ -355,8 +302,6 @@
#define CONFIG_GATEWAYIP 192.168.1.1
#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyCPM\0" \
@@ -365,7 +310,7 @@
"fdtaddr=400000\0" \
"fdtfile=mpc8560ads.dtb\0"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -374,7 +319,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -382,6 +327,6 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND NFSBOOTCOMMAND
#endif /* __CONFIG_H */
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index b7e44d1..02b0b71 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -153,7 +153,6 @@
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif
-#define CONFIG_DDR_CLK_FREQ 66666666 /* DDRCLK on P1010 RDB */
#define CONFIG_SYS_CLK_FREQ 66666666 /* SYSCLK for P1010 RDB */
#define CONFIG_HWCONFIG
@@ -168,7 +167,6 @@
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS 0x52
@@ -443,7 +441,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc*/
/*
* Config the L2 Cache as L2 SRAM
@@ -497,38 +494,19 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
#define I2C_PCA9557_ADDR1 0x18
#define I2C_PCA9557_ADDR2 0x19
#define I2C_PCA9557_BUS_NUM 0
-#define CONFIG_SYS_I2C_FSL
/* I2C EEPROM */
#if defined(CONFIG_TARGET_P1010RDB_PB)
-#define CONFIG_ID_EEPROM
#ifdef CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#endif
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define MAX_NUM_PORTS 9 /* for 128Bytes EEPROM */
#endif
/* enable read and write access to EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* RTC */
#define CONFIG_RTC_PT7C4338
@@ -632,7 +610,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -660,9 +637,6 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=" __stringify(CONFIG_DEF_HWCONFIG) "\0" \
"netdev=eth0\0" \
@@ -715,7 +689,7 @@
"i2c mw 19 1 4; i2c mw 19 3 f3; reset\0"
#endif
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs; " \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -723,7 +697,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RAMBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 4ef0613..6da44e7 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -14,8 +14,6 @@
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p2041rdb.cfg
#endif
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
@@ -88,11 +86,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* DDR Setup
@@ -104,8 +99,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x52
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
@@ -240,7 +233,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
/* Serial Port - controlled on board with jumper J8
* open - index 2
@@ -259,19 +251,6 @@
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-#define CONFIG_SYS_I2C_FSL
/*
@@ -478,7 +457,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -499,9 +477,6 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH u-boot.bin
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
-
#define __USB_PHY_TYPE utmi
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -525,14 +500,14 @@
"fdtfile=p2041rdb/p2041rdb.dtb\0" \
"bdev=sda3\0"
-#define CONFIG_HDBOOT \
+#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -541,7 +516,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -549,7 +524,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_HDBOOT
+#define CONFIG_BOOTCOMMAND HDBOOT
#include <asm/fsl_secure_boot.h>
diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h
index ded494c..fc6167c 100644
--- a/include/configs/SBx81LIFKW.h
+++ b/include/configs/SBx81LIFKW.h
@@ -11,7 +11,6 @@
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
/* additions for new ARM relocation support */
@@ -38,15 +37,6 @@
* for your console driver.
*/
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
-#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
-
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
#define MTDPARTS_MTDOOPS "errlog"
#define CONFIG_DOS_PARTITION
@@ -60,13 +50,7 @@
*/
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */
-#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4.0 MB for malloc */
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/
/* size in bytes reserved for initial data */
@@ -89,6 +73,4 @@
#define CONFIG_PHY_BASE_ADR 0x01
#endif /* CONFIG_CMD_NET */
-#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */
-
#endif /* _CONFIG_SBX81LIFKW_H */
diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h
index 06bbd86..06be63e 100644
--- a/include/configs/SBx81LIFXCAT.h
+++ b/include/configs/SBx81LIFXCAT.h
@@ -11,7 +11,6 @@
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
/* additions for new ARM relocation support */
@@ -38,15 +37,6 @@
* for your console driver.
*/
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
-#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
-
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
#define MTDPARTS_MTDOOPS "errlog"
#define CONFIG_DOS_PARTITION
@@ -60,7 +50,6 @@
*/
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */
-#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4.0 MB for malloc */
/*
* For booting Linux, the board info and command line data
@@ -89,6 +78,4 @@
#define CONFIG_PHY_BASE_ADR 0x01
#endif /* CONFIG_CMD_NET */
-#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */
-
#endif /* _CONFIG_SBX81LIFXCAT_H */
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 1873044..3ae8a14 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -26,7 +26,6 @@
#endif
#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_PAD_TO 0x40000
#define CONFIG_SPL_MAX_SIZE 0x28000
@@ -43,11 +42,6 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_nand_rcw.cfg
-#elif defined(CONFIG_TARGET_T1023RDB)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_nand_rcw.cfg
-#endif
#endif
#ifdef CONFIG_SPIFLASH
@@ -60,11 +54,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_spi_rcw.cfg
-#elif defined(CONFIG_TARGET_T1023RDB)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_spi_rcw.cfg
-#endif
#endif
#ifdef CONFIG_SDCARD
@@ -76,11 +65,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_sd_rcw.cfg
-#elif defined(CONFIG_TARGET_T1023RDB)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_sd_rcw.cfg
-#endif
#endif
#endif /* CONFIG_RAMBOOT_PBL */
@@ -134,11 +118,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
/*
* These can be toggled for performance analysis, otherwise use default.
@@ -147,9 +129,7 @@
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -170,13 +150,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/*
* DDR Setup
@@ -187,7 +162,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
@@ -392,7 +366,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
@@ -422,20 +395,7 @@
#endif
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#define I2C_PCA6408_BUS_NUM 1
#define I2C_PCA6408_ADDR 0x20
@@ -615,7 +575,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -635,7 +594,6 @@
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
-#define CONFIG_LOADADDR 1000000 /* default location for tftp, bootm */
#define __USB_PHY_TYPE utmi
#ifdef CONFIG_ARCH_T1024
@@ -668,7 +626,7 @@
"fdtaddr=1e00000\0" \
"bdev=sda3\0"
-#define CONFIG_LINUX \
+#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
@@ -676,7 +634,7 @@
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -685,7 +643,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_LINUX
+#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index fb215bb..910baef 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -15,14 +15,6 @@
#include <asm/config_mpc85xx.h>
#ifdef CONFIG_RAMBOOT_PBL
-
-#ifndef CONFIG_NXP_ESBC
-#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg
-#else
-#define CONFIG_SYS_FSL_PBL_PBI \
- $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi_sb.cfg
-#endif
-
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_PAD_TO 0x40000
#define CONFIG_SPL_MAX_SIZE 0x28000
@@ -49,26 +41,6 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#ifdef CONFIG_TARGET_T1040RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1040_nand_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1042RDB_PI
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1042_pi_nand_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1042RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1042_nand_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1040D4RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1040d4_nand_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1042D4RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1042d4_nand_rcw.cfg
-#endif
#endif
#ifdef CONFIG_SPIFLASH
@@ -81,26 +53,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#ifdef CONFIG_TARGET_T1040RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1040_spi_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1042RDB_PI
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1042_pi_spi_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1042RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1042_spi_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1040D4RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1040d4_spi_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1042D4RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1042d4_spi_rcw.cfg
-#endif
#endif
#ifdef CONFIG_SDCARD
@@ -112,26 +64,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#ifdef CONFIG_TARGET_T1040RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1040_sd_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1042RDB_PI
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1042_pi_sd_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1042RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1042_sd_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1040D4RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1040d4_sd_rcw.cfg
-#endif
-#ifdef CONFIG_TARGET_T1042D4RDB
-#define CONFIG_SYS_FSL_PBL_RCW \
-$(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
-#endif
#endif
#endif
@@ -164,7 +96,6 @@
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 66666666
/*
* These can be toggled for performance analysis, otherwise use default.
@@ -173,9 +104,7 @@
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -211,8 +140,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51
@@ -421,7 +348,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
/* Serial Port - controlled on board with jumper J8
* open - index 2
@@ -452,26 +378,7 @@
#endif
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000
-#define CONFIG_SYS_FSL_I2C3_SPEED 400000
-#define CONFIG_SYS_FSL_I2C4_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
-#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000
-#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
/* I2C bus multiplexer */
#define I2C_MUX_PCA_ADDR 0x70
#define I2C_MUX_CH_DEFAULT 0x8
@@ -676,7 +583,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -701,9 +607,6 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
-
#define __USB_PHY_TYPE utmi
#define RAMDISKFILE "t104xrdb/ramdisk.uboot"
@@ -746,7 +649,7 @@
"fdtfile=" __stringify(FDTFILE) "\0" \
"bdev=sda3\0"
-#define CONFIG_LINUX \
+#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
@@ -754,14 +657,14 @@
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_HDBOOT \
+#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -770,7 +673,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -778,7 +681,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_LINUX
+#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index f61b40f..315d1f7 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -29,8 +29,6 @@
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg
-
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_PAD_TO 0x40000
#define CONFIG_SPL_MAX_SIZE 0x28000
@@ -47,9 +45,6 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#if defined(CONFIG_ARCH_T2080)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_nand_rcw.cfg
-#endif
#endif
#ifdef CONFIG_SPIFLASH
@@ -62,9 +57,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#if defined(CONFIG_ARCH_T2080)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_spi_rcw.cfg
-#endif
#endif
#ifdef CONFIG_SDCARD
@@ -76,9 +68,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#if defined(CONFIG_ARCH_T2080)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_sd_rcw.cfg
-#endif
#endif
#endif /* CONFIG_RAMBOOT_PBL */
@@ -101,19 +90,15 @@
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
/*
* Config the L3 Cache as L3 SRAM
@@ -130,11 +115,8 @@
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
/*
* DDR Setup
@@ -144,7 +126,6 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */
#define SPD_EEPROM_ADDRESS1 0x51
@@ -352,7 +333,6 @@
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
/*
* Serial Port
@@ -370,23 +350,6 @@
/*
* I2C
*/
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
-#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000
-#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100
-#define CONFIG_SYS_FSL_I2C_SPEED 100000
-#define CONFIG_SYS_FSL_I2C2_SPEED 100000
-#define CONFIG_SYS_FSL_I2C3_SPEED 100000
-#define CONFIG_SYS_FSL_I2C4_SPEED 100000
-#endif
-
-#define CONFIG_SYS_I2C_FSL
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */
#define I2C_MUX_PCA_ADDR_SEC1 0x75 /* I2C bus multiplexer,secondary 1 */
@@ -613,7 +576,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -635,8 +597,6 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
#define __USB_PHY_TYPE utmi
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -664,7 +624,7 @@
* For emulation this causes u-boot to jump to the start of the
* proof point app code automatically
*/
-#define CONFIG_PROOF_POINTS \
+#define PROOF_POINTS \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"cpu 1 release 0x29000000 - - -;" \
@@ -676,11 +636,11 @@
"cpu 7 release 0x29000000 - - -;" \
"go 0x29000000"
-#define CONFIG_HVBOOT \
+#define HVBOOT \
"setenv bootargs config-addr=0x60000000; " \
"bootm 0x01000000 - 0x00f00000"
-#define CONFIG_ALU \
+#define ALU \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"cpu 1 release 0x01000000 - - -;" \
@@ -692,7 +652,7 @@
"cpu 7 release 0x01000000 - - -;" \
"go 0x01000000"
-#define CONFIG_LINUX \
+#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
@@ -700,14 +660,14 @@
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_HDBOOT \
+#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -716,7 +676,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -724,7 +684,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_LINUX
+#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 601e67c..6824be9 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -24,8 +24,6 @@
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg
-
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_PAD_TO 0x40000
#define CONFIG_SPL_MAX_SIZE 0x28000
@@ -42,7 +40,6 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_nand_rcw.cfg
#endif
#ifdef CONFIG_SPIFLASH
@@ -55,7 +52,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_spi_rcw.cfg
#endif
#ifdef CONFIG_SDCARD
@@ -67,7 +63,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_sd_rcw.cfg
#endif
#endif /* CONFIG_RAMBOOT_PBL */
@@ -90,19 +85,15 @@
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ 66660000
-#define CONFIG_DDR_CLK_FREQ 133330000
/*
* Config the L3 Cache as L3 SRAM
@@ -119,11 +110,8 @@
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* DDR Setup
@@ -133,7 +121,6 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */
#define SPD_EEPROM_ADDRESS1 0x51
@@ -304,7 +291,6 @@
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
/*
* Serial Port
@@ -322,26 +308,6 @@
/*
* I2C
*/
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
-#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000
-#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100
-#define CONFIG_SYS_FSL_I2C_SPEED 100000
-#define CONFIG_SYS_FSL_I2C2_SPEED 100000
-#define CONFIG_SYS_FSL_I2C3_SPEED 100000
-#define CONFIG_SYS_FSL_I2C4_SPEED 100000
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-
-#define CONFIG_SYS_I2C_FSL
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */
#define I2C_MUX_PCA_ADDR_SEC1 0x75 /* I2C bus multiplexer,secondary 1 */
@@ -565,7 +531,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -587,8 +552,6 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
#define __USB_PHY_TYPE utmi
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -616,7 +579,7 @@
* For emulation this causes u-boot to jump to the start of the
* proof point app code automatically
*/
-#define CONFIG_PROOF_POINTS \
+#define PROOF_POINTS \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"cpu 1 release 0x29000000 - - -;" \
@@ -628,11 +591,11 @@
"cpu 7 release 0x29000000 - - -;" \
"go 0x29000000"
-#define CONFIG_HVBOOT \
+#define HVBOOT \
"setenv bootargs config-addr=0x60000000; " \
"bootm 0x01000000 - 0x00f00000"
-#define CONFIG_ALU \
+#define ALU \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"cpu 1 release 0x01000000 - - -;" \
@@ -644,7 +607,7 @@
"cpu 7 release 0x01000000 - - -;" \
"go 0x01000000"
-#define CONFIG_LINUX \
+#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
@@ -652,14 +615,14 @@
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_HDBOOT \
+#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -668,7 +631,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -676,7 +639,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_LINUX
+#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index c796b1d..54db021 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -18,7 +18,6 @@
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg
#ifndef CONFIG_SDCARD
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
@@ -38,7 +37,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4rdb/t4_sd_rcw.cfg
#endif
#ifdef CONFIG_SPL_BUILD
@@ -50,8 +48,6 @@
#endif
#endif /* CONFIG_RAMBOOT_PBL */
-#define CONFIG_DDR_ECC
-
/* High Level Configuration Options */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
@@ -72,7 +68,6 @@
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -102,8 +97,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
-
/*
* IFC Definitions
*/
@@ -135,7 +128,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
/* Serial Port - controlled on board with jumper J8
* open - index 2
@@ -154,18 +146,6 @@
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-
-#define CONFIG_SYS_I2C_FSL
/*
* General PCI
@@ -225,7 +205,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -246,19 +225,14 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
-
-#define CONFIG_HVBOOT \
+#define HVBOOT \
"setenv bootargs config-addr=0x60000000; " \
"bootm 0x01000000 - 0x00f00000"
#define CONFIG_SYS_CLK_FREQ 66666666
-#define CONFIG_DDR_CLK_FREQ 133333333
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
/*
@@ -429,8 +403,6 @@
#endif
/* I2C */
-#define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */
-#define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */
#define I2C_MUX_PCA_ADDR_SEC 0x76 /* I2C bus multiplexer,secondary */
@@ -600,11 +572,11 @@
"fdtfile=t4240rdb/t4240rdb.dtb\0" \
"bdev=sda3\0"
-#define CONFIG_HVBOOT \
+#define HVBOOT \
"setenv bootargs config-addr=0x60000000; " \
"bootm 0x01000000 - 0x00f00000"
-#define CONFIG_LINUX \
+#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
@@ -612,14 +584,14 @@
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_HDBOOT \
+#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -628,7 +600,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -636,7 +608,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_LINUX
+#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h
index a7adb59..b6a78b1 100644
--- a/include/configs/adp-ae3xx.h
+++ b/include/configs/adp-ae3xx.h
@@ -15,8 +15,6 @@
*/
#define CONFIG_USE_INTERRUPT
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_SKIP_TRUNOFF_WATCHDOG
#define CONFIG_ARCH_MAP_SYSMEM
@@ -86,7 +84,6 @@
* Size of malloc() pool
*/
/* 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough */
-#define CONFIG_SYS_MALLOC_LEN (512 << 10)
/*
* Physical Memory Map
@@ -105,14 +102,6 @@
GENERATED_GBL_DATA_SIZE)
/*
- * Load address and memory test area should agree with
- * arch/nds32/config.mk. Be careful not to overwrite U-Boot itself.
- */
-#define CONFIG_SYS_LOAD_ADDR 0x300000
-
-/* memtest works on 63 MB in DRAM */
-
-/*
* Static memory controller configuration
*/
#define CONFIG_FTSMC020
diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h
index afec9ba..3e78d5c 100644
--- a/include/configs/adp-ag101p.h
+++ b/include/configs/adp-ag101p.h
@@ -15,8 +15,6 @@
*/
#define CONFIG_USE_INTERRUPT
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_ARCH_MAP_SYSMEM
#define CONFIG_BOOTP_SERVERIP
@@ -83,12 +81,6 @@
/*
* Miscellaneous configurable options
*/
-
-/*
- * Size of malloc() pool
- */
-/* 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough */
-#define CONFIG_SYS_MALLOC_LEN (512 << 10)
/*
* AHB Controller configuration
@@ -217,14 +209,6 @@
#endif /* CONFIG_MEM_REMAP */
/*
- * Load address and memory test area should agree with
- * arch/nds32/config.mk. Be careful not to overwrite U-Boot itself.
- */
-#define CONFIG_SYS_LOAD_ADDR 0x300000
-
-/* memtest works on 63 MB in DRAM */
-
-/*
* Static memory controller configuration
*/
#define CONFIG_FTSMC020
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index ad5616d..0f6ffd9 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -25,8 +25,6 @@
#define CONFIG_SYS_BOOTM_LEN SZ_16M
-#define CONFIG_MACH_TYPE MACH_TYPE_AM335XEVM
-
/* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
@@ -168,10 +166,6 @@
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-
/* PMIC support */
#define CONFIG_POWER_TPS65217
#define CONFIG_POWER_TPS65910
diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h
index c161b93..d93db09 100644
--- a/include/configs/am335x_guardian.h
+++ b/include/configs/am335x_guardian.h
@@ -22,8 +22,6 @@
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
#ifndef CONFIG_SPL_BUILD
#define MEM_LAYOUT_ENV_SETTINGS \
diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h
index 387d50d..584b025 100644
--- a/include/configs/am335x_shc.h
+++ b/include/configs/am335x_shc.h
@@ -223,10 +223,4 @@
#endif
#define CONFIG_NET_RETRY_COUNT 10
-
-/* I2C configuration */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#define CONFIG_SYS_I2C_SPEED 400000
-#define CONFIG_SYS_I2C_SLAVE 1
#endif /* ! __CONFIG_AM335X_SHC_H */
diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h
index 16849d8..dff9468 100644
--- a/include/configs/am335x_sl50.h
+++ b/include/configs/am335x_sl50.h
@@ -16,8 +16,6 @@
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
-/*#define CONFIG_MACH_TYPE 3589 Until the next sync */
-
/* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
@@ -55,10 +53,6 @@
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-
/* PMIC support */
#define CONFIG_POWER_TPS65217
#define CONFIG_POWER_TPS65910
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index a9c14a1..e54708c 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -14,23 +14,6 @@
#include <configs/ti_omap3_common.h>
-#define CONFIG_REVISION_TAG
-
-/* Hardware drivers */
-
-/*
- * USB configuration
- * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
- * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
- */
-#ifdef CONFIG_SPL_BUILD
-#undef CONFIG_USB_EHCI_OMAP
-#else
-#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
-#endif
-
-/* I2C */
-
/* Ethernet */
#define CONFIG_NET_RETRY_COUNT 10
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 31a1c7e..0042659 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -21,15 +21,8 @@
#endif
/* I2C Configuration */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* Power */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#endif
#define CONFIG_POWER_TPS65218
#define CONFIG_POWER_TPS62362
@@ -42,14 +35,6 @@
#define CONFIG_SYS_PL310_BASE 0x48242000
/*
- * Since SPL did pll and ddr initialization for us,
- * we don't need to do it twice.
- */
-#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
-/*
* When building U-Boot such that there is no previous loader
* we need to call board_early_init_f. This is taken care of in
* s_init when we have SPL used.
@@ -69,12 +54,9 @@
#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
-#define CONFIG_USB_XHCI_OMAP
-
-#define CONFIG_AM437X_USB2PHY2_HOST
#endif
-#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_ETHER)
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_GADGET)
#undef CONFIG_USB_DWC3_PHY_OMAP
#undef CONFIG_USB_DWC3_OMAP
#undef CONFIG_USB_DWC3
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index c47ffcc..9568444 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -22,10 +22,6 @@
#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-
#define CONFIG_SYS_OMAP_ABE_SYSCK
#ifndef CONFIG_SPL_BUILD
@@ -52,11 +48,6 @@
#define CONFIG_NET_RETRY_COUNT 10
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
-/* USB xHCI HOST */
-#define CONFIG_USB_XHCI_OMAP
-
-#define CONFIG_OMAP_USB3PHY1_HOST
-
/* SATA */
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h
index 57cd520..9962408 100644
--- a/include/configs/am64x_evm.h
+++ b/include/configs/am64x_evm.h
@@ -22,10 +22,6 @@
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin"
#endif
-#ifndef CONFIG_CPU_V7R
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
#if defined(CONFIG_TARGET_AM642_A53_EVM)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
index d4514a0..55fa641 100644
--- a/include/configs/am65x_evm.h
+++ b/include/configs/am65x_evm.h
@@ -49,10 +49,6 @@
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin"
#endif
-#ifndef CONFIG_CPU_V7R
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
#define CONFIG_SYS_BOOTM_LEN SZ_64M
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index 641d8fd..4fd02cd 100644
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -28,10 +28,6 @@
"erase 0xfff00000 0xffffffff; " \
"cp.b 0x20000 0xfff00000 ${filesize}\0"
-/* undef to save memory */
-
-#define CONFIG_SYS_LOAD_ADDR 0x20000 /* default load address */
-
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 45000000
@@ -58,7 +54,6 @@
/* reserve 128-4KB */
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
#define CONFIG_SYS_MONITOR_LEN ((128 - 4) * 1024)
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
#define LDS_BOARD_TEXT \
@@ -75,7 +70,6 @@
* This is a single unified instruction/data cache.
* sdram - single region - no masks
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/ap121.h b/include/configs/ap121.h
index 4902d07..fb2a0b3 100644
--- a/include/configs/ap121.h
+++ b/include/configs/ap121.h
@@ -12,11 +12,9 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN 0x40000
#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_LOAD_ADDR 0x81000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
diff --git a/include/configs/ap143.h b/include/configs/ap143.h
index c79e050..bb9544b 100644
--- a/include/configs/ap143.h
+++ b/include/configs/ap143.h
@@ -12,11 +12,9 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN 0x40000
#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_LOAD_ADDR 0x81000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
diff --git a/include/configs/ap152.h b/include/configs/ap152.h
index 0d2c484..766f10b 100644
--- a/include/configs/ap152.h
+++ b/include/configs/ap152.h
@@ -12,11 +12,9 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN 0x40000
#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_LOAD_ADDR 0x81000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h
index b04a03f..8059454 100644
--- a/include/configs/apalis-imx8.h
+++ b/include/configs/apalis-imx8.h
@@ -18,8 +18,6 @@
#define USDHC2_BASE_ADDR 0x5b020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
/* Networking */
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
@@ -70,9 +68,6 @@
"${blkcnt}; fi\0"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x80280000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
@@ -83,9 +78,6 @@
#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h
index 2ad4ca3..cd00223 100644
--- a/include/configs/apalis-imx8x.h
+++ b/include/configs/apalis-imx8x.h
@@ -17,8 +17,6 @@
#define USDHC2_BASE_ADDR 0x5b020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1
@@ -97,9 +95,6 @@
"vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x89000000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
@@ -112,9 +107,6 @@
#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 12de010..23fca1e 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -14,8 +14,6 @@
#undef CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_MACH_TYPE 4886
-
#include <asm/arch/imx-regs.h>
#include <asm/mach-imx/gpio.h>
@@ -23,25 +21,8 @@
#include "imx6_spl.h"
#endif
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_SERIAL_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
-/* I2C Configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_MXC_I2C3_SPEED 400000
-
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 3
@@ -80,8 +61,6 @@
#undef CONFIG_SERVERIP
#define CONFIG_SERVERIP 192.168.10.1
-#define CONFIG_LOADADDR 0x12000000
-
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
@@ -162,7 +141,7 @@
"load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"splashpos=m,m\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"vidargs=mxc_hdmi.only_cea=1 fbmem=32M\0"
/* Miscellaneous configurable options */
@@ -171,8 +150,6 @@
#undef CONFIG_SYS_MAXARGS
#define CONFIG_SYS_MAXARGS 48
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h
index 9e5f523..eab4f22 100644
--- a/include/configs/apalis_t30.h
+++ b/include/configs/apalis_t30.h
@@ -23,8 +23,6 @@
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_APALIS_T30
-
/* PCI networking support */
#define CONFIG_E1000_NO_NVM
diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index 78fa1a9..b73b0d5 100644
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -28,7 +28,6 @@
#include "mx6_common.h"
-#define CONFIG_MACH_TYPE 4501
#define CONFIG_MMCROOT "/dev/mmcblk0p1"
/* MMC Configs */
@@ -93,13 +92,13 @@
#endif
#if (CONFIG_SYS_BOARD_VERSION == 5)
-#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
+#define EXTRA_ENV_BOARD_SETTINGS \
"dead=while true; do; " \
"led led_red on; sleep 1;" \
"led led_red off; sleep 1;" \
"done\0"
#elif (CONFIG_SYS_BOARD_VERSION == 6)
-#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
+#define EXTRA_ENV_BOARD_SETTINGS \
"dead=while true; do; " \
"led led_red on; led led_red2 on; sleep 1;" \
"led led_red off; led led_red2 off;; sleep 1;" \
@@ -414,7 +413,7 @@
"run main_rescue_boot;" \
"fi; \0"\
HAB_EXTRA_SETTINGS \
- CONFIG_EXTRA_ENV_BOARD_SETTINGS
+ EXTRA_ENV_BOARD_SETTINGS
#define CONFIG_ARP_TIMEOUT 200UL
diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
index 06704e5..73f63c5 100644
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -44,12 +44,9 @@
#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
- 64 * 1024 * 1024)
#define CONFIG_SYS_MONITOR_BASE 0x00000000
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
/* FLASH */
diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h
index df0f5d2..5177bf2 100644
--- a/include/configs/aspeed-common.h
+++ b/include/configs/aspeed-common.h
@@ -13,9 +13,6 @@
#include <asm/arch/platform.h>
/* Misc CPU related */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
#define CONFIG_SYS_SDRAM_BASE ASPEED_DRAM_BASE
@@ -32,8 +29,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (SYS_INIT_RAM_END \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN (32 << 20)
-
/*
* NS16550 Configuration
*/
diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h
index 88e1bf1..4a25d56 100644
--- a/include/configs/aspenite.h
+++ b/include/configs/aspenite.h
@@ -14,8 +14,6 @@
*/
#define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */
#define CONFIG_ARMADA100 1 /* SOC Family Name */
-#define CONFIG_ARMADA168 1 /* SOC Used on this Board */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
/*
* There is no internal RAM in ARMADA100, using DRAM
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 2ea33e5..077af08 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -22,17 +22,17 @@
* set the card type to actually compile for; either of
* the possibilities listed below has to be used!
*/
-#define CONFIG_ASTRO_V532 1
+#define ASTRO_V532 1
-#if CONFIG_ASTRO_V532
+#if ASTRO_V532
#define ASTRO_ID 0xF8
-#elif CONFIG_ASTRO_V512
+#elif ASTRO_V512
#define ASTRO_ID 0xFA
-#elif CONFIG_ASTRO_TWIN7S2
+#elif ASTRO_TWIN7S2
#define ASTRO_ID 0xF9
-#elif CONFIG_ASTRO_V912
+#elif ASTRO_V912
#define ASTRO_ID 0xFC
-#elif CONFIG_ASTRO_COFDMDUOS2
+#elif ASTRO_COFDMDUOS2
#define ASTRO_ID 0xFB
#else
#error No card type defined!
@@ -58,11 +58,6 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 80000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/*
@@ -149,7 +144,7 @@
#ifdef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */
#else
-#if CONFIG_ASTRO_V532
+#if ASTRO_V532
#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
"run xilinxload&&run alteraload&&bootm 0x80000;"\
"update;reset"
@@ -159,9 +154,6 @@
#endif
#endif
-/* default RAM address for user programs */
-#define CONFIG_SYS_LOAD_ADDR 0x20000
-
#define CONFIG_FPGA_COUNT 1
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_SYS_FPGA_WAIT 1000
@@ -240,8 +232,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
-/* Reserve 128 kB for malloc() */
-#define CONFIG_SYS_MALLOC_LEN (128 << 10)
/*
* For booting Linux, the board info and command line data
@@ -272,7 +262,6 @@
#endif
/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index ba21149..9a73e3a 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -15,10 +15,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
/*
* BOOTP options
*/
@@ -54,7 +50,4 @@
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-
#endif
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 780bf0c..d09a5db 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -35,10 +35,6 @@
#endif
/* Misc CPU related */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
@@ -68,24 +64,6 @@
(ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
-/*
- * The (arm)linux board id set by generic code depending on configured board
- * (see boards.cfg for different boards)
- */
-#ifdef CONFIG_AT91SAM9G20
- /* the sam9g20 variants have two different board ids */
-# ifdef CONFIG_AT91SAM9G20EK_2MMC
- /* we may be setup for the 2MMC variant of at91sam9g20ek */
-# define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9G20EK_2MMC
-# else
- /* or the normal at91sam9g20ek */
-# define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9G20EK
-# endif
-#else
- /* otherwise default to good old at91sam9260ek */
-# define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9260EK
-#endif
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -106,8 +84,6 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
@@ -134,9 +110,4 @@
"fatload mmc 0:1 0x22000000 uImage; bootm"
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
-
#endif
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index c3fe416..fb4695c 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -22,12 +22,6 @@
#include <asm/hardware.h>
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_ATMEL_LEGACY
/*
@@ -93,8 +87,6 @@
#endif
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
@@ -115,9 +107,4 @@
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
-
#endif
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 51ecf41..f8df5b0 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -22,12 +22,7 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
#ifndef CONFIG_SYS_USE_BOOT_NORFLASH
-#define CONFIG_SKIP_LOWLEVEL_INIT
#else
#define CONFIG_SYS_USE_NORFLASH
#endif
@@ -209,8 +204,6 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
@@ -224,9 +217,4 @@
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
-
#endif
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index b4aaf59..78ff577 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -18,11 +18,6 @@
#define CONFIG_AT91SAM9M10G45EK
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
@@ -67,8 +62,6 @@
#define CONFIG_RESET_PHY_R
#define CONFIG_AT91_WANTS_COMMON_PHY
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#ifdef CONFIG_NAND_BOOT
/* bootstrap + u-boot + env in nandflash */
@@ -83,11 +76,6 @@
"bootz 0x72000000 - 0x71000000"
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
-
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE 0x010000
#define CONFIG_SPL_STACK 0x310000
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index fe99253..4ae6b66 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -14,10 +14,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
/* Misc CPU related */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT
/* LCD */
#define LCD_BPP LCD_COLOR16
@@ -61,9 +57,6 @@
"bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
"bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
-/* Ethernet */
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* USB host */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
@@ -102,11 +95,6 @@
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-
/* SPL */
#define CONFIG_SPL_MAX_SIZE 0x6000
#define CONFIG_SPL_STACK 0x308000
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 92b87a2..c703276 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -16,12 +16,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
#define CONFIG_ATMEL_LEGACY
/*
@@ -62,10 +56,6 @@
/* Ethernet - not present */
-/* USB - not supported */
-
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
@@ -87,10 +77,4 @@
"fatload mmc 0:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
#endif
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
-
#endif
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 6a95b39..33481dc 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -12,11 +12,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
@@ -65,8 +60,6 @@
#endif
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#ifdef CONFIG_NAND_BOOT
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_BOOTCOMMAND "nand read " \
@@ -85,11 +78,6 @@
"bootm 0x22000000"
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
-
/* SPL */
#define CONFIG_SPL_MAX_SIZE 0x6000
#define CONFIG_SPL_STACK 0x308000
diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
index bd9c371..bf3f34e 100644
--- a/include/configs/ax25-ae350.h
+++ b/include/configs/ax25-ae350.h
@@ -12,7 +12,7 @@
#define CONFIG_SPL_BSS_START_ADDR 0x04000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb"
#endif
#endif
@@ -47,12 +47,6 @@
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/*
- * Size of malloc() pool
- * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
- */
-#define CONFIG_SYS_MALLOC_LEN (512 << 10)
-
/* DT blob (fdt) address */
#define CONFIG_SYS_FDT_BASE 0x800f0000
@@ -79,20 +73,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \
GENERATED_GBL_DATA_SIZE)
-/*
- * Load address and memory test area should agree with
- * arch/riscv/config.mk. Be careful not to overwrite U-Boot itself.
- */
-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* SDRAM */
-
-/*
- * memtest works on 512 MB in DRAM
- */
-
-/*
- * FLASH and environment organization
- */
-
/* use CFI framework */
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h
index 0c5a3af..c02d25c 100644
--- a/include/configs/axs10x.h
+++ b/include/configs/axs10x.h
@@ -27,9 +27,7 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN SZ_2M
#define CONFIG_SYS_BOOTM_LEN SZ_128M
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
/*
* UART configuration
@@ -63,7 +61,6 @@
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
* Console configuration
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index 42a5abd..2fe6c86 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -19,8 +19,6 @@
#include <linux/sizes.h>
#include <configs/ti_am335x_common.h>
-#define CONFIG_MACH_TYPE MACH_TYPE_AM335XEVM
-
/* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
@@ -204,10 +202,6 @@
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-
/* PMIC support */
#define CONFIG_POWER_TPS65910
diff --git a/include/configs/bcm7260.h b/include/configs/bcm7260.h
index f72d62e..d799ffd 100644
--- a/include/configs/bcm7260.h
+++ b/include/configs/bcm7260.h
@@ -15,8 +15,6 @@
#define CONFIG_SYS_TEXT_BASE 0x10100000
#define CONFIG_SYS_INIT_RAM_ADDR 0x10200000
-#define CONFIG_SYS_MALLOC_LEN ((40 * 1024) << 10) /* 40 MiB */
-
#include "bcmstb.h"
#define BCMSTB_TIMER_LOW 0xf0412008
diff --git a/include/configs/bcm7445.h b/include/configs/bcm7445.h
index ce865cb..989482e 100644
--- a/include/configs/bcm7445.h
+++ b/include/configs/bcm7445.h
@@ -15,8 +15,6 @@
#define CONFIG_SYS_TEXT_BASE 0x80100000
#define CONFIG_SYS_INIT_RAM_ADDR 0x80200000
-#define CONFIG_SYS_MALLOC_LEN ((10 * 1024) << 10) /* 10 MiB */
-
#include "bcmstb.h"
#define BCMSTB_TIMER_LOW 0xf0412008
diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h
index 14275ab..be60fe7 100644
--- a/include/configs/bcm_ns3.h
+++ b/include/configs/bcm_ns3.h
@@ -16,7 +16,6 @@
#define PHYS_SDRAM_1 V2M_BASE
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x80000)
/*
* Initial SP before reloaction is placed at end of first DRAM bank,
@@ -26,7 +25,6 @@
*/
#define CONFIG_SYS_INIT_SP_ADDR (PHYS_SDRAM_1 + 0x80000000)
/* 12MB Malloc size */
-#define CONFIG_SYS_MALLOC_LEN (SZ_8M + SZ_4M)
/* console configuration */
#define CONFIG_SYS_NS16550_CLK 25000000
diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h
index d7f9e5b..c3c28ea 100644
--- a/include/configs/bcmstb.h
+++ b/include/configs/bcmstb.h
@@ -10,7 +10,6 @@
#ifndef __BCMSTB_H
#define __BCMSTB_H
-#include "version.h"
#include <linux/sizes.h>
#ifndef __ASSEMBLY__
@@ -36,7 +35,6 @@
/*
* CPU configuration.
*/
-#define CONFIG_SKIP_LOWLEVEL_INIT
/*
* Memory configuration.
@@ -88,7 +86,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_LOAD_ADDR 0x2000000
/*
* CONFIG_SYS_LOAD_ADDR - 1 MiB.
@@ -121,7 +118,6 @@
/*
* Informational display configuration.
*/
-#define CONFIG_REVISION_TAG
/*
* Command configuration.
diff --git a/include/configs/beaver.h b/include/configs/beaver.h
index 0daa20e..8be491e 100644
--- a/include/configs/beaver.h
+++ b/include/configs/beaver.h
@@ -20,8 +20,6 @@
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_BEAVER
-
/* SPI */
#define CONFIG_TEGRA_SLINK_CTRLS 6
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
diff --git a/include/configs/bg0900.h b/include/configs/bg0900.h
index b541236..d9599b8 100644
--- a/include/configs/bg0900.h
+++ b/include/configs/bg0900.h
@@ -20,8 +20,6 @@
/* Boot Linux */
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_BOOTCOMMAND "bootm"
-#define CONFIG_LOADADDR 0x42000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h
index 2abbe7b..84ea032 100644
--- a/include/configs/bk4r1.h
+++ b/include/configs/bk4r1.h
@@ -60,14 +60,6 @@
#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
-/* Enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 4 * SZ_1M)
-
/* NAND support */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -81,8 +73,6 @@
#define CONFIG_SYS_FSL_QSPI_LE
#endif
-#define CONFIG_LOADADDR 0x82000000
-
/* We boot from the gfxRAM area of the OCRAM. */
#define CONFIG_BOARD_SIZE_LIMIT 520192
@@ -230,10 +220,6 @@
"source to NAND\0" \
"active_workset=1\0"
-/* Miscellaneous configurable options */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Physical memory map */
#define PHYS_SDRAM (0x80000000)
#define PHYS_SDRAM_SIZE (SZ_512M)
diff --git a/include/configs/bmips_bcm3380.h b/include/configs/bmips_bcm3380.h
index 573ff3e..66c23cd 100644
--- a/include/configs/bmips_bcm3380.h
+++ b/include/configs/bmips_bcm3380.h
@@ -15,10 +15,8 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h
index 45eb931..412471a 100644
--- a/include/configs/bmips_bcm6318.h
+++ b/include/configs/bmips_bcm6318.h
@@ -24,10 +24,8 @@
#endif /* CONFIG_USB_OHCI_HCD */
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h
index eed321e..8caddf3 100644
--- a/include/configs/bmips_bcm63268.h
+++ b/include/configs/bmips_bcm63268.h
@@ -24,10 +24,8 @@
#endif /* CONFIG_USB_OHCI_HCD */
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h
index c78099a..892a3e2 100644
--- a/include/configs/bmips_bcm6328.h
+++ b/include/configs/bmips_bcm6328.h
@@ -24,10 +24,8 @@
#endif /* CONFIG_USB_OHCI_HCD */
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h
index 38dd9e3..6eaca1c 100644
--- a/include/configs/bmips_bcm6338.h
+++ b/include/configs/bmips_bcm6338.h
@@ -15,10 +15,8 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h
index 547cf85..5bfbcb7 100644
--- a/include/configs/bmips_bcm6348.h
+++ b/include/configs/bmips_bcm6348.h
@@ -22,10 +22,8 @@
#endif /* CONFIG_USB_OHCI_HCD */
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h
index 116e970..f8c81f6 100644
--- a/include/configs/bmips_bcm6358.h
+++ b/include/configs/bmips_bcm6358.h
@@ -24,10 +24,8 @@
#endif /* CONFIG_USB_OHCI_HCD */
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h
index e5e8b15..92ab0ba 100644
--- a/include/configs/bmips_bcm6362.h
+++ b/include/configs/bmips_bcm6362.h
@@ -24,10 +24,8 @@
#endif /* CONFIG_USB_OHCI_HCD */
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h
index 4d4403f..7d321e1 100644
--- a/include/configs/bmips_bcm6368.h
+++ b/include/configs/bmips_bcm6368.h
@@ -24,10 +24,8 @@
#endif /* CONFIG_USB_OHCI_HCD */
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_bcm6838.h b/include/configs/bmips_bcm6838.h
index f1ff054..481dfc2 100644
--- a/include/configs/bmips_bcm6838.h
+++ b/include/configs/bmips_bcm6838.h
@@ -15,10 +15,8 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
/* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M
#if defined(CONFIG_BMIPS_BOOT_RAM)
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
#endif
diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h
index 3cb2d40..0f63239 100644
--- a/include/configs/bmips_common.h
+++ b/include/configs/bmips_common.h
@@ -18,7 +18,6 @@
/* Memory usage */
#define CONFIG_SYS_MAXARGS 24
-#define CONFIG_SYS_MALLOC_LEN SZ_2M
#define CONFIG_SYS_BOOTPARAMS_LEN SZ_128K
#define CONFIG_SYS_CBSIZE SZ_512
diff --git a/include/configs/boston.h b/include/configs/boston.h
index b9a9965e..cd70e7b 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -33,10 +33,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000)
-
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
-
/*
* Console
*/
diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h
index 238ae9c..6bdca17 100644
--- a/include/configs/broadcom_bcm963158.h
+++ b/include/configs/broadcom_bcm963158.h
@@ -14,7 +14,6 @@
230400, 500000, 1500000 }
/* Memory usage */
#define CONFIG_SYS_MAXARGS 24
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
#define CONFIG_SYS_BOOTM_LEN (16 * 1024 * 1024)
/*
@@ -26,9 +25,6 @@
/* U-Boot */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M)
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/broadcom_bcm968360bg.h b/include/configs/broadcom_bcm968360bg.h
index 77690ff..66c1267 100644
--- a/include/configs/broadcom_bcm968360bg.h
+++ b/include/configs/broadcom_bcm968360bg.h
@@ -14,7 +14,6 @@
230400, 500000, 1500000 }
/* Memory usage */
#define CONFIG_SYS_MAXARGS 24
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
/*
* 6858
@@ -25,9 +24,6 @@
/* U-Boot */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M)
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h
index febe6c0..ba5c3d8 100644
--- a/include/configs/broadcom_bcm968580xref.h
+++ b/include/configs/broadcom_bcm968580xref.h
@@ -14,7 +14,6 @@
230400, 500000, 1500000 }
/* Memory usage */
#define CONFIG_SYS_MAXARGS 24
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
/*
* 6858
@@ -25,9 +24,6 @@
/* U-Boot */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M)
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index f9a0632..9fb861b 100644
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -16,7 +16,6 @@
#include <linux/stringify.h>
/* ------------------------------------------------------------------------- */
/* memory */
-#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
#define CONFIG_SYS_BOOTM_LEN SZ_32M
/* Clock Defines */
@@ -25,13 +24,6 @@
#define CONFIG_POWER_TPS65217
-/* Support both device trees and ATAGs. */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-/*#define CONFIG_MACH_TYPE 3589*/
-#define CONFIG_MACH_TYPE 0xFFFFFFFF /* TODO: check with kernel*/
-
/*
* When we have NAND flash we expect to be making use of mtdparts,
* both for ease of use in U-Boot and for passing information on to
diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h
index 333d3f4..3f54baf 100644
--- a/include/configs/brppt2.h
+++ b/include/configs/brppt2.h
@@ -20,20 +20,12 @@
#define CONFIG_BOARD_POSTCLK_INIT
#define CONFIG_MXC_GPT_HCLK
-#define CONFIG_LOADADDR 0x10700000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* MMC */
#define CONFIG_FSL_USDHC
/* Boot */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_MACH_TYPE 0xFFFFFFFF
/* misc */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* Environment */
diff --git a/include/configs/brsmarc1.h b/include/configs/brsmarc1.h
index d0cc08b..f1e6dbf 100644
--- a/include/configs/brsmarc1.h
+++ b/include/configs/brsmarc1.h
@@ -18,15 +18,12 @@
/* ------------------------------------------------------------------------- */
/* memory */
-#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)
/* Clock Defines */
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-#define CONFIG_MACH_TYPE 3589
-
#ifndef CONFIG_SPL_BUILD
/* Default environment */
@@ -61,11 +58,6 @@
" bootm ${loadaddr} - ${dtbaddr}\0"
#endif /* !CONFIG_SPL_BUILD*/
-/* Support both device trees and ATAGs. */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
/* SPI Flash */
/* Environment */
diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h
index d6a7af1..d917976 100644
--- a/include/configs/brxre1.h
+++ b/include/configs/brxre1.h
@@ -18,14 +18,11 @@
#define LCD_BPP LCD_COLOR32
/* memory */
-#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
/* Clock Defines */
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-#define CONFIG_MACH_TYPE 3589
-
#ifndef CONFIG_SPL_BUILD
/* Default environment */
@@ -58,11 +55,6 @@
#define CONFIG_BOOTCOMMAND "mmc dev 1; run b_default"
-/* Support both device trees and ATAGs. */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
/* Environment */
#endif /* __CONFIG_BRXRE1_H__ */
diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h
index 51585fc..9b2e8b5 100644
--- a/include/configs/bur_am335x_common.h
+++ b/include/configs/bur_am335x_common.h
@@ -19,8 +19,6 @@
#define CONFIG_SYS_NS16550_CLK (48000000)
#define CONFIG_SYS_NS16550_COM1 0x44e09000
-#define CONFIG_SYS_I2C_LEGACY
-
#endif /* CONFIG_DM */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
@@ -47,14 +45,6 @@
* Since SPL did pll and ddr initialization for us,
* we don't need to do it twice.
*/
-#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif /* !CONFIG_SPL_BUILD, ... */
-/*
- * Our DDR memory always starts at 0x80000000 and U-Boot shall have
- * relocated itself to higher in memory by the time this value is used.
- */
-#define CONFIG_SYS_LOAD_ADDR 0x80000000
/*
* ----------------------------------------------------------------------------
* DDR information. We say (for simplicity) that we have 1 bank,
diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h
index b310e6c..59e827e 100644
--- a/include/configs/capricorn-common.h
+++ b/include/configs/capricorn-common.h
@@ -51,7 +51,6 @@
/* I2C Configuration */
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SYS_I2C_SPEED 400000
/* EEPROM */
#define EEPROM_I2C_BUS 0 /* I2C0 */
#define EEPROM_I2C_ADDR 0x50
@@ -128,17 +127,12 @@
"reset;"
/* Default location for tftp and bootm */
-#define CONFIG_LOADADDR 0x80280000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
/* On CCP board, USDHC1 is for eMMC */
#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* eMMC */
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
index 8e8b106..f3416b5 100644
--- a/include/configs/cardhu.h
+++ b/include/configs/cardhu.h
@@ -24,8 +24,6 @@
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_CARDHU
-
/* SPI */
#define CONFIG_TEGRA_SLINK_CTRLS 6
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h
index 15c5027..304c876 100644
--- a/include/configs/cgtqmx8.h
+++ b/include/configs/cgtqmx8.h
@@ -50,8 +50,6 @@
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
/* Boot M4 */
#define M4_BOOT_ENV \
"m4_0_image=m4_0.bin\0" \
@@ -147,9 +145,6 @@
"else booti ${loadaddr} - ${fdt_addr}; fi"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x80280000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
@@ -158,9 +153,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
#define CONFIG_SYS_FSL_USDHC_NUM 3
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
diff --git a/include/configs/ci20.h b/include/configs/ci20.h
index 6e46d29..1d4503b 100644
--- a/include/configs/ci20.h
+++ b/include/configs/ci20.h
@@ -9,8 +9,6 @@
#ifndef __CONFIG_CI20_H__
#define __CONFIG_CI20_H__
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/* Ingenic JZ4780 clock configuration. */
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_MHZ 1200
@@ -18,13 +16,10 @@
/* Memory configuration */
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
-#define CONFIG_SYS_LOAD_ADDR 0x81000000
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h
index b8928ba..ebfe356 100644
--- a/include/configs/cl-som-imx7.h
+++ b/include/configs/cl-som-imx7.h
@@ -12,9 +12,6 @@
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-
/* Network */
#define CONFIG_FEC_MXC
#define CONFIG_FEC_XCV_TYPE RGMII
@@ -25,22 +22,9 @@
#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE3000
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
-/* I2C configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
-#define CONFIG_SYS_I2C_SPEED 100000
-#define SYS_I2C_BUS_SOM 0
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM
-
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
@@ -108,7 +92,6 @@
"echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
"echo USB boot attempt ...; run usbbootscript; "
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index a496a80..a22fd0e 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -14,7 +14,6 @@
/* Machine config */
#define CONFIG_SYS_LITTLE_ENDIAN
-#define CONFIG_MACH_TYPE 4273
/* MMC */
#define CONFIG_SYS_FSL_USDHC_NUM 3
@@ -43,9 +42,9 @@
"initrd_high=0xffffffff\0" \
"fdt_addr_r=0x18000000\0" \
"ramdisk_addr_r=0x13000000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"fdtfile=undefined\0" \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
@@ -165,19 +164,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
-/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_MXC_I2C3_SPEED 400000
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_I2C_EEPROM_BUS 2
-
/* SATA */
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_LBA48
@@ -186,10 +172,8 @@
/* Boot */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
-#define CONFIG_SERIAL_TAG
/* misc */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* SPL */
#include "imx6_spl.h"
@@ -201,10 +185,5 @@
#define CONFIG_VIDEO_BMP_LOGO
/* EEPROM */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-#define CONFIG_SYS_EEPROM_SIZE 256
#endif /* __CONFIG_CM_FX6_H */
diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h
index 342cc7f..38e421e 100644
--- a/include/configs/cm_t335.h
+++ b/include/configs/cm_t335.h
@@ -10,15 +10,11 @@
#ifndef __CONFIG_CM_T335_H
#define __CONFIG_CM_T335_H
-#define CONFIG_CM_T335
-
#include <configs/ti_am335x_common.h>
#undef CONFIG_MAX_RAM_BANK_SIZE
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */
-#define CONFIG_MACH_TYPE MACH_TYPE_CM_T335
-
/* Clock Defines */
#define V_OSCK 25000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
@@ -83,9 +79,6 @@
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
/* I2C Configuration */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_I2C_EEPROM_BUS 0
/* SPL */
@@ -128,11 +121,6 @@
/* Status LED polarity is inversed, so init it in the "off" state */
/* EEPROM */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-#define CONFIG_SYS_EEPROM_SIZE 256
#ifndef CONFIG_SPL_BUILD
/*
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index 73205d0..6e5c26e 100644
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -8,7 +8,6 @@
#ifndef __CONFIG_CM_T43_H
#define __CONFIG_CM_T43_H
-#define CONFIG_CM_T43
#define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
@@ -45,13 +44,7 @@
/* CPSW Ethernet support */
#define CONFIG_SYS_RX_ETH_BUFFER 64
-/* USB support */
-#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_AM437X_USB2PHY2_HOST
-
/* Power */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_TPS65218
/* Enabling L2 Cache */
@@ -62,9 +55,6 @@
* Since SPL did pll and ddr initialization for us,
* we don't need to do it twice.
*/
-#if !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
#define CONFIG_HSMMC2_8BIT
@@ -114,10 +104,5 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
/* EEPROM */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-#define CONFIG_SYS_EEPROM_SIZE 256
#endif /* __CONFIG_CM_T43_H */
diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index c859616..efc6b5b 100644
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -135,9 +135,6 @@
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
-from which user programs will be started */
-
/*---*/
/*
@@ -217,7 +214,6 @@
#endif
#define CONFIG_SYS_MONITOR_LEN 0x20000
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
/*
@@ -237,7 +233,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h
index 2fa3485..d95c838 100644
--- a/include/configs/colibri-imx6ull.h
+++ b/include/configs/colibri-imx6ull.h
@@ -15,9 +15,6 @@
#define PHYS_SDRAM_SIZE SZ_512M
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-
/* ENET1 */
#define IMX_FEC_BASE ENET2_BASE_ADDR
@@ -25,9 +22,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 1
-/* I2C configs */
-#define CONFIG_SYS_I2C_SPEED 100000
-
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1
@@ -106,11 +100,10 @@
"fatload ${interface} 0:1 ${loadaddr} " \
"${board}/flash_blk.img && source ${loadaddr}\0" \
"splashpos=m,m\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
"vidargs=video=mxsfb:640x480M-16@60"
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h
index cb22b3c..e823497c 100644
--- a/include/configs/colibri-imx8x.h
+++ b/include/configs/colibri-imx8x.h
@@ -19,8 +19,6 @@
#define USDHC2_BASE_ADDR 0x5b020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1
@@ -102,9 +100,6 @@
"vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x80280000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
@@ -117,9 +112,6 @@
#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 804a144..44135b2 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -21,25 +21,8 @@
#include "imx6_spl.h"
#endif
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_SERIAL_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
-/* I2C Configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_MXC_I2C3_SPEED 400000
-
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
@@ -68,8 +51,6 @@
#undef CONFIG_SERVERIP
#define CONFIG_SERVERIP 192.168.10.1
-#define CONFIG_LOADADDR 0x12000000
-
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
@@ -142,7 +123,7 @@
"load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"splashpos=m,m\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"vidargs=fbmem=8M\0"
/* Miscellaneous configurable options */
@@ -151,8 +132,6 @@
#undef CONFIG_SYS_MAXARGS
#define CONFIG_SYS_MAXARGS 48
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 2fffaa3..6509366 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -13,9 +13,6 @@
#include "mx7_common.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-
/* MMC Config*/
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND
@@ -24,10 +21,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
#endif
-/* I2C configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_SPEED 100000
-
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1
@@ -171,13 +164,12 @@
"fatload ${interface} 0:1 ${loadaddr} " \
"${board}/flash_blk.img && source ${loadaddr}\0" \
"splashpos=m,m\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
"updlevel=2\0"
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 6889e8b..0878676 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -19,7 +19,6 @@
/*
* Environment settings
*/
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
#define CONFIG_BOOTCOMMAND \
"if fatload mmc 0 0xa0000000 uImage; then " \
"bootm 0xa0000000; " \
@@ -29,8 +28,6 @@
"fi; " \
"bootm 0xc0000;"
#define CONFIG_TIMESTAMP
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
/*
* Serial Console Configuration
@@ -41,11 +38,10 @@
*/
/* I2C support */
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
#define CONFIG_SYS_I2C_PXA
#define CONFIG_PXA_STD_I2C
#define CONFIG_PXA_PWR_I2C
-#define CONFIG_SYS_I2C_SPEED 100000
#endif
/* LCD support */
@@ -83,7 +79,6 @@
#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */
-#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index 158bb09..e947b58 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -15,8 +15,6 @@
#define CONFIG_TEGRA_UARTA_SDIO1
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_TEGRA2
-
/* LCD support */
#define CONFIG_LCD_LOGO
diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h
index 30b48c5..324e607 100644
--- a/include/configs/colibri_t30.h
+++ b/include/configs/colibri_t30.h
@@ -24,8 +24,6 @@
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_T30
-
/* Increase console I/O buffer size */
#undef CONFIG_SYS_CBSIZE
#define CONFIG_SYS_CBSIZE 1024
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 5bd440f..f9d0d92 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -16,8 +16,6 @@
#define CONFIG_SYS_FSL_CLK
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#ifdef CONFIG_VIDEO_FSL_DCU_FB
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
@@ -27,9 +25,6 @@
#define DCU_LAYER_MAX_NUM 64
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M)
-
/* NAND support */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -38,7 +33,6 @@
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1
-#define CONFIG_LOADADDR 0x80008000
#define CONFIG_FDTADDR 0x84000000
/* We boot from the gfxRAM area of the OCRAM. */
@@ -117,7 +111,6 @@
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical memory map */
diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
index 3b17f75..efd04c6 100644
--- a/include/configs/controlcenterdc.h
+++ b/include/configs/controlcenterdc.h
@@ -12,16 +12,12 @@
*/
#define CONFIG_CUSTOMER_BOARD_SUPPORT
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-
/*
* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_LOADADDR 1000000
-
/*
* SATA/SCSI/AHCI configuration
*/
@@ -85,7 +81,7 @@
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */
-#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
@@ -134,7 +130,7 @@
" gpio clear ${gpio1}; gpio set ${gpio2};" \
" fi; sleep 0.12; done\0"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
@@ -142,7 +138,7 @@
"tftpboot ${bootfile_addr} ${bootfile}; " \
"bootm ${bootfile_addr}"
-#define CONFIG_MMCBOOTCOMMAND \
+#define MMCBOOTCOMMAND \
"setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
"console=${consoledev},${baudrate} ${othbootargs}; " \
"ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index c877f3c..2a0a6be 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -25,18 +25,8 @@
#else
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg
-#if defined(CONFIG_TARGET_P3041DS)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p3041ds.cfg
-#elif defined(CONFIG_TARGET_P4080DS)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p4080ds.cfg
-#elif defined(CONFIG_TARGET_P5020DS)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5020ds.cfg
-#elif defined(CONFIG_TARGET_P5040DS)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg
#endif
#endif
-#endif
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
/* Set 1M boot space */
@@ -73,9 +63,7 @@
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -101,11 +89,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
/*
* DDR Setup
@@ -117,8 +102,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52
@@ -250,7 +233,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port - controlled on board with jumper J8
* open - index 2
@@ -269,19 +251,6 @@
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-#define CONFIG_SYS_I2C_FSL
/*
* RapidIO
@@ -488,7 +457,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -509,9 +477,6 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
-
#ifdef CONFIG_TARGET_P4080DS
#define __USB_PHY_TYPE ulpi
#else
@@ -539,14 +504,14 @@
"fdtfile=p4080ds/p4080ds.dtb\0" \
"bdev=sda3\0"
-#define CONFIG_HDBOOT \
+#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -555,7 +520,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
@@ -563,7 +528,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_HDBOOT
+#define CONFIG_BOOTCOMMAND HDBOOT
#include <asm/fsl_secure_boot.h>
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index bd4d6e8..32f4a10 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -29,11 +29,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
@@ -83,20 +78,12 @@
/* DFU class support */
#define DFU_MANIFEST_POLL_TIMEOUT 25000
-#define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6
-
/* bootstrap + u-boot + env in nandflash */
#define CONFIG_BOOTCOMMAND \
"nand read 0x70000000 0x200000 0x300000;" \
"bootm 0x70000000"
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
- SZ_4M, 0x1000)
-
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE (12 * SZ_1K)
#define CONFIG_SPL_STACK (SZ_16K)
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 883cbc9..34683f6 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -22,7 +22,6 @@
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#ifdef CONFIG_MTD_NOR_FLASH
#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11)
@@ -31,7 +30,6 @@
/*
* Memory Info
*/
-#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
@@ -173,16 +171,12 @@
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
/*
* Linux Information
*/
#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
#define CONFIG_HWCONFIG /* enable hwconfig */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTCOMMAND \
"run envboot; " \
diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h
index 18d9ba1..2a020e9 100644
--- a/include/configs/dalmore.h
+++ b/include/configs/dalmore.h
@@ -17,8 +17,6 @@
#define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_DALMORE
-
/* Environment in eMMC, at the end of 2nd "boot sector" */
/* SPI */
diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h
index dccfa03..6f861a0 100644
--- a/include/configs/dart_6ul.h
+++ b/include/configs/dart_6ul.h
@@ -29,9 +29,6 @@
#endif
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
/* Environment settings */
/* Environment in SD */
@@ -47,15 +44,9 @@
#define CONFIG_SUPPORT_EMMC_BOOT
/* I2C configs */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_SPEED 100000
-#endif
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h
index 18f4707..95f5cf0 100644
--- a/include/configs/db-88f6720.h
+++ b/include/configs/db-88f6720.h
@@ -17,11 +17,7 @@
*/
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index 1ab4232..6bae063 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -11,11 +11,7 @@
*/
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
/*
* SATA/SCSI/AHCI configuration
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index dd0c3cb..9f5e665 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -18,11 +18,7 @@
*/
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 33d71a7..c2340b2 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -12,38 +12,20 @@
#include <linux/sizes.h>
#include <asm/arch/cpu.h>
-#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250
-
-#if !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
/*
* Memory configurations
*/
-#define CONFIG_SYS_MALLOC_LEN SZ_1M
#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_64M
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K)
-
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \
- GENERATED_GBL_DATA_SIZE)
/*
* DMA
*/
-#if !defined(CONFIG_SPL_BUILD)
-#define CONFIG_DMA_LPC32XX
-#endif
/*
- * I2C
- */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_SPEED 100000
-
-/*
* GPIO
*/
#define CONFIG_LPC32XX_GPIO
@@ -124,15 +106,8 @@
/*
* U-Boot Commands
*/
-
-/*
- * Boot Linux
- */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR 0x80008000
/*
* SPL specific defines
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 87da441..a2a1d93 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -15,7 +15,6 @@
#define __CONFIG_H
/* High Level Configuration Options */
-#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
@@ -34,12 +33,6 @@
#include <configs/ti_omap3_common.h>
-#define CONFIG_REVISION_TAG 1
-
-/* Size of malloc() pool */
-#undef CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
-
/* Hardware drivers */
/* DM9000 */
#define CONFIG_NET_RETRY_COUNT 20
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index d9be1c3..7af8fce 100644
--- a/include/configs/dh_imx6.h
+++ b/include/configs/dh_imx6.h
@@ -27,14 +27,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
-
/* Bootcounter */
#define CONFIG_SYS_BOOTCOUNT_BE
@@ -81,9 +73,6 @@
#define CONFIG_HW_WATCHDOG
#endif
-#define CONFIG_LOADADDR 0x12000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
#ifndef CONFIG_SPL_BUILD
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200\0" \
diff --git a/include/configs/display5.h b/include/configs/display5.h
index 40bb3b5..27854df 100644
--- a/include/configs/display5.h
+++ b/include/configs/display5.h
@@ -47,14 +47,6 @@
#include "imx6_spl.h"
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
-
#define CONFIG_MXC_UART_BASE UART5_BASE
/* I2C Configs */
diff --git a/include/configs/dns325.h b/include/configs/dns325.h
index 8990efb..18ff1bb 100644
--- a/include/configs/dns325.h
+++ b/include/configs/dns325.h
@@ -13,16 +13,10 @@
#define _CONFIG_DNS325_H
/*
- * Machine number definition
- */
-#define CONFIG_MACH_TYPE MACH_TYPE_DNS325
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
#define CONFIG_KW88F6281 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#include "mv-common.h"
diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h
index 04dd0f6..75a2476 100644
--- a/include/configs/dockstar.h
+++ b/include/configs/dockstar.h
@@ -16,7 +16,6 @@
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
/*
* mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index cc18bce..361ee96 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -31,10 +31,6 @@
#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-
#define CONFIG_SYS_OMAP_ABE_SYSCK
#ifndef CONFIG_SPL_BUILD
@@ -78,11 +74,6 @@
/* SPI SPL */
-/* USB xHCI HOST */
-#define CONFIG_USB_XHCI_OMAP
-
-#define CONFIG_OMAP_USB2PHY2_HOST
-
/* SATA */
#define CONFIG_SCSI_AHCI_PLAT
diff --git a/include/configs/draco.h b/include/configs/draco.h
index 396eb7d..29ce3a5 100644
--- a/include/configs/draco.h
+++ b/include/configs/draco.h
@@ -12,8 +12,6 @@
#ifndef __CONFIG_DRACO_H
#define __CONFIG_DRACO_H
-#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_DRACO
-
#include "siemens-am33x-common.h"
#define DDR_PLL_FREQ 303
@@ -29,13 +27,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
-/* I2C Configuration */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define EEPROM_ADDR_DDR3 0x90
-#define EEPROM_ADDR_CHIP 0x120
-
#define CONFIG_FACTORYSET
/* Define own nand partitions */
diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h
index 6474e57..624f611 100644
--- a/include/configs/dragonboard410c.h
+++ b/include/configs/dragonboard410c.h
@@ -20,7 +20,6 @@
#define PHYS_SDRAM_1_SIZE SZ_1G
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* UART */
@@ -82,9 +81,6 @@
"pxefile_addr_r=0x90100000\0"\
BOOTENV
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
-
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 64 /* max command args */
diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h
index 4256e6f..e71dd24 100644
--- a/include/configs/dragonboard820c.h
+++ b/include/configs/dragonboard820c.h
@@ -21,7 +21,6 @@
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* Generic Timer Definitions */
@@ -50,9 +49,6 @@
"pxefile_addr_r=0x90100000\0"\
BOOTENV
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
-
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 64
diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h
index 65962ee..5b71f70 100644
--- a/include/configs/dreamplug.h
+++ b/include/configs/dreamplug.h
@@ -15,7 +15,6 @@
* High Level Configuration Options (easy to change)
*/
#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
-#define CONFIG_MACH_TYPE MACH_TYPE_DREAMPLUG
#include "mv-plug-common.h"
diff --git a/include/configs/ds109.h b/include/configs/ds109.h
index f232abe..62fe144 100644
--- a/include/configs/ds109.h
+++ b/include/configs/ds109.h
@@ -11,9 +11,6 @@
#ifndef _CONFIG_DS109_H
#define _CONFIG_DS109_H
-/* Provide the MACH_TYPE value that the vendor kernel requires. */
-#define CONFIG_MACH_TYPE 527
-
/*
* High Level Configuration Options (easy to change)
*/
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index 5d40128..58ecc5f 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -6,9 +6,6 @@
#ifndef _CONFIG_SYNOLOGY_DS414_H
#define _CONFIG_SYNOLOGY_DS414_H
-/* Vendor kernel expects this MACH_TYPE */
-#define CONFIG_MACH_TYPE 3036
-
/*
* High Level Configuration Options (easy to change)
*/
@@ -20,11 +17,7 @@
*/
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
/* PCIe support */
#ifndef CONFIG_SPL_BUILD
@@ -67,11 +60,7 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-/* DS414 bus width is 32bits */
-#define CONFIG_DDR_32BIT
-
/* Default Environment */
-#define CONFIG_LOADADDR 0x80000
#define CONFIG_BOOTCOMMAND \
"sf probe; " \
"sf read ${loadaddr} 0xd0000 0x2d0000; " \
diff --git a/include/configs/durian.h b/include/configs/durian.h
index fa48e5c..1dec09b 100644
--- a/include/configs/durian.h
+++ b/include/configs/durian.h
@@ -13,11 +13,6 @@
#define PHYS_SDRAM_1_SIZE 0x7B000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000000)
-
-/* Size of Malloc Pool */
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024 + CONFIG_ENV_SIZE)
-
#define CONFIG_SYS_INIT_SP_ADDR (0x88000000 - 0x100000)
/* PCI CONFIG */
diff --git a/include/configs/ea-lpc3250devkitv2.h b/include/configs/ea-lpc3250devkitv2.h
index c1a37c8..220c3c4 100644
--- a/include/configs/ea-lpc3250devkitv2.h
+++ b/include/configs/ea-lpc3250devkitv2.h
@@ -13,20 +13,16 @@
/*
* SoC and board defines
*/
-#define CONFIG_MACH_TYPE MACH_TYPE_LPC3XXX
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_SIZE_LIMIT 0x000fffff /* maximum allowable size for full U-Boot binary */
/*
* RAM
*/
-#define CONFIG_SYS_MALLOC_LEN SZ_4M
#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
/*
* cmd
*/
-#define CONFIG_SYS_LOAD_ADDR 0x80100000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE)
/*
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index 77584fa..6a5e1d3 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -47,8 +47,6 @@
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LOAD_ADDR 0x20000
-
/*#define CONFIG_SYS_DRAM_TEST 1 */
#undef CONFIG_SYS_DRAM_TEST
@@ -104,7 +102,6 @@
#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0
#define CONFIG_SYS_MONITOR_LEN 0x20000
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
/*
@@ -135,7 +132,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
@@ -194,15 +190,8 @@
* I2C
*/
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
-#define CONFIG_SYS_FSL_I2C_SPEED 100000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0
-
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_DS1338
#define CONFIG_I2C_RTC_ADDR 0x68
diff --git a/include/configs/edison.h b/include/configs/edison.h
index 0e1205b..3ec35db 100644
--- a/include/configs/edison.h
+++ b/include/configs/edison.h
@@ -15,7 +15,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Memory */
-#define CONFIG_SYS_LOAD_ADDR 0x100000
#define CONFIG_PHYSMEM
#define CONFIG_SYS_STACK_SIZE (32 * 1024)
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index 7e0a0ea..fbe4680 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -94,15 +94,6 @@
/* auto boot */
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
-#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
-
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
/*
@@ -153,11 +144,7 @@
* I2C related stuff
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
#endif
/*
@@ -165,15 +152,9 @@
*/
/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (1024 * 256) /* 256kB for malloc() */
-
-/*
* Other required minimal configurations
*/
-#define CONFIG_SYS_LOAD_ADDR 0x00800000
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000
/* Enable command line editing */
diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h
index b117176..279d712 100644
--- a/include/configs/el6x_common.h
+++ b/include/configs/el6x_common.h
@@ -14,9 +14,6 @@
#include "mx6_common.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
#ifdef CONFIG_SPL
#include "imx6_spl.h"
#endif
@@ -25,17 +22,7 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
-/* I2C config */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
@@ -55,9 +42,9 @@
"fdt_addr_r=0x18000000\0" \
"fdt_addr=0x18000000\0" \
"findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
BOOTENV
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
index 401b50d..9769155 100644
--- a/include/configs/embestmx6boards.h
+++ b/include/configs/embestmx6boards.h
@@ -17,17 +17,6 @@
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
-/* I2C Configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* USB Configs */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h
index a872d48..c99222d 100644
--- a/include/configs/emsdp.h
+++ b/include/configs/emsdp.h
@@ -15,14 +15,10 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_1M)
-#define CONFIG_SYS_MALLOC_LEN SZ_64K
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
-
/*
* Environment
*/
#define CONFIG_BOOTFILE "app.bin"
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_EXTRA_ENV_SETTINGS \
"upgrade_image=u-boot.bin\0" \
diff --git a/include/configs/etamin.h b/include/configs/etamin.h
index 880149f..47617c2 100644
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -86,10 +86,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
-/* I2C Configuration */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define EEPROM_ADDR_DDR3 0x90
#define EEPROM_ADDR_CHIP 0x120
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 3f26654..80108fc 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -14,10 +14,6 @@
/* The first stage boot loader expects u-boot running at this address. */
/* The first stage boot loader takes care of low level initialization. */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
-/* Set our official architecture number. */
-#define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
/* CPU information */
@@ -34,9 +30,6 @@
/* 128MB SDRAM in 1 bank */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE (128 << 20)
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
/* 512kB on-chip NOR flash */
# define CONFIG_SYS_MAX_FLASH_BANKS 1
@@ -97,11 +90,6 @@
/* I2C */
#define CONFIG_SYS_MAX_I2C_BUS 1
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SOFT_SPEED 100000
-#define CONFIG_SYS_I2C_SOFT_SLAVE 0
-
#define I2C_SOFT_DECLARATIONS
#define GPIO_I2C_SCL AT91_PIO_PORTA, 24
@@ -131,9 +119,6 @@
/* File systems */
/* Boot command */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
"sf read 0x22000000 0xc6000 0x294000; " \
"bootm 0x22000000"
diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h
index 0ff01af..dc032c1 100644
--- a/include/configs/evb_ast2500.h
+++ b/include/configs/evb_ast2500.h
@@ -13,7 +13,4 @@
#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
-/* Memory Info */
-#define CONFIG_SYS_LOAD_ADDR 0x83000000
-
#endif /* __CONFIG_H */
diff --git a/include/configs/evb_ast2600.h b/include/configs/evb_ast2600.h
index e7975bf..177a52e 100644
--- a/include/configs/evb_ast2600.h
+++ b/include/configs/evb_ast2600.h
@@ -10,7 +10,4 @@
#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
-/* Memory Info */
-#define CONFIG_SYS_LOAD_ADDR 0x83000000
-
#endif /* __CONFIG_H */
diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h
index 8adaf29..95aaa74 100644
--- a/include/configs/exynos-common.h
+++ b/include/configs/exynos-common.h
@@ -16,21 +16,12 @@
#include <linux/sizes.h>
#include <linux/stringify.h>
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/* Keep L2 Cache Disabled */
/* input clock of PLL: 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-
-/* Size of malloc() pool before and after relocation */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
-
/* select serial console configuration */
/* PWM */
diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h
index 5e2aca3..52dcf7a 100644
--- a/include/configs/exynos4-common.h
+++ b/include/configs/exynos4-common.h
@@ -14,8 +14,6 @@
#define CONFIG_BOARD_COMMON
-#define CONFIG_REVISION_TAG
-
/* SD/MMC configuration */
#define CONFIG_MMC_DEFAULT_DEV 0
@@ -32,7 +30,7 @@
#define CONFIG_USB_GADGET_DWC2_OTG_PHY
/* Common environment variables */
-#define CONFIG_EXTRA_ENV_ITB \
+#define ENV_ITB \
"loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \
"${kernelname}\0" \
"loadinitrd=load mmc ${mmcbootdev}:${mmcbootpart} ${initrdaddr} " \
diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index 9297fbd..e492396 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -45,12 +45,6 @@
/* MMC SPL */
#define COPY_BL2_FNPTR_ADDR 0x02020030
-/* specific .lds file */
-
-/* Boot Argument Buffer Size */
-/* memtest works on */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-
#define CONFIG_RD_LVL
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
@@ -96,11 +90,6 @@
#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058
#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
-/* I2C */
-#define CONFIG_SYS_I2C_S3C24X0
-#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* 100 Kbps */
-#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x0
-
/* SPI */
/* Ethernet Controllor Driver */
diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h
index 65da381..36c3a61 100644
--- a/include/configs/exynos5250-common.h
+++ b/include/configs/exynos5250-common.h
@@ -13,8 +13,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5250
-
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
#define CONFIG_IRAM_STACK 0x02050000
diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h
index 2d362f3..7762c77 100644
--- a/include/configs/exynos5420-common.h
+++ b/include/configs/exynos5420-common.h
@@ -12,9 +12,6 @@
#define CONFIG_EXYNOS5_DT
-/* Provide the MACH_TYPE value that the vendor kernel requires. */
-#define CONFIG_MACH_TYPE 8002
-
#define CONFIG_VAR_SIZE_SPL
#define CONFIG_IRAM_TOP 0x02074000
diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h
index 6c0aa9b..4a1ecbb 100644
--- a/include/configs/exynos7420-common.h
+++ b/include/configs/exynos7420-common.h
@@ -16,9 +16,6 @@
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <linux/sizes.h>
-/* Size of malloc() pool before and after relocation */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
-
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
@@ -42,8 +39,6 @@
/* select serial console configuration */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
diff --git a/include/configs/falcon.h b/include/configs/falcon.h
index 5ecbd1d..67931fe 100644
--- a/include/configs/falcon.h
+++ b/include/configs/falcon.h
@@ -11,14 +11,13 @@
#include "rcar-gen3-common.h"
-/* Generic Interrupt Controller Definitions */
-#ifdef CONFIG_GICV2
-#undef CONFIG_GICV2
+/*
+ * Generic Interrupt Controller Definitions. Undefine v2 locations and define
+ * v3 locations.
+ */
#undef GICD_BASE
#undef GICC_BASE
#undef GICR_BASE
-#endif
-#define CONFIG_GICV3
#define GICD_BASE 0xF1000000
#define GICR_BASE 0xF1060000
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index c345fb2..6c3b2c4 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -17,32 +17,14 @@
/* High Level Configuration Options */
#define CONFIG_MX35
-#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
-
/* Set TEXT at the beginning of the NOR flash */
/* This is required to setup the ESDC controller */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_REVISION_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
-
/*
* Hardware drivers
*/
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
-#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
/*
* UART (console)
@@ -55,9 +37,6 @@
#define CONFIG_NET_RETRY_COUNT 100
-
-#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
-
/*
* Ethernet on SOC (FEC)
*/
@@ -75,8 +54,6 @@
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/*
* Physical Memory Map
*/
diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h
index 007cbb0..72852a0 100644
--- a/include/configs/gardena-smart-gateway-at91sam.h
+++ b/include/configs/gardena-smart-gateway-at91sam.h
@@ -17,11 +17,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
@@ -32,8 +27,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
-
/* NAND flash */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
@@ -45,8 +38,6 @@
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* SPL */
#define CONFIG_SPL_MAX_SIZE 0x7000
#define CONFIG_SPL_STACK 0x308000
diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h
index 1b26466..d287942 100644
--- a/include/configs/gardena-smart-gateway-mt7688.h
+++ b/include/configs/gardena-smart-gateway-mt7688.h
@@ -12,14 +12,9 @@
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
-
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
/* SPL */
-#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SPL_BSS_START_ADDR 0x80010000
@@ -31,7 +26,7 @@
#define CONFIG_SYS_UBOOT_BASE 0
/* Serial SPL */
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_CLK 40000000
#define CONFIG_SYS_NS16550_REG_SIZE -4
@@ -46,7 +41,6 @@
/* Memory usage */
#define CONFIG_SYS_MAXARGS 64
-#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
#define CONFIG_SYS_CBSIZE 512
diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h
index 560d6a3..12d108d 100644
--- a/include/configs/gazerbeam.h
+++ b/include/configs/gazerbeam.h
@@ -27,7 +27,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
/*
* Initial RAM Base Address Setup
@@ -60,7 +59,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
@@ -84,8 +82,6 @@
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
-#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-
/* TODO: Turn into string option and migrate to Kconfig */
#define CONFIG_HOSTNAME "gazerbeam"
#define CONFIG_ROOTPATH "/opt/nfsroot"
@@ -105,7 +101,7 @@
__stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
"upd=run load update\0" \
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -114,13 +110,13 @@
"tftp ${fdt_addr} $fdtfile;" \
"bootm ${kernel_addr} - ${fdt_addr}"
-#define CONFIG_MMCBOOTCOMMAND \
+#define MMCBOOTCOMMAND \
"setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
"console=$consoledev,$baudrate $othbootargs;" \
"ext2load mmc 0:2 ${kernel_addr} $bootfile;" \
"ext2load mmc 0:2 ${fdt_addr} $fdtfile;" \
"bootm ${kernel_addr} - ${fdt_addr}"
-#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND MMCBOOTCOMMAND
#endif /* __CONFIG_H */
diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h
index 7db6afd..1a5db24 100644
--- a/include/configs/ge_b1x5v2.h
+++ b/include/configs/ge_b1x5v2.h
@@ -15,9 +15,6 @@
#include "imx6_spl.h"
#define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
/* PWM */
#define CONFIG_IMX6_PWM_PER_CLK 66000000
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 5be3a49..0eeffd4 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -19,12 +19,6 @@
#include "mx6_common.h"
#include <linux/sizes.h>
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
/* SATA Configs */
#ifdef CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
@@ -33,10 +27,6 @@
#define CONFIG_LBA48
#endif
-/* Serial Flash */
-
-#define CONFIG_LOADADDR 0x12000000
-
#ifdef CONFIG_CMD_NFS
#define NETWORKBOOT \
"setnetworkboot=" \
@@ -53,7 +43,7 @@
"nfs ${loadaddr} /srv/nfs/fitImage; " \
"bootm ${loadaddr}\0" \
-#define CONFIG_NETWORKBOOTCOMMAND \
+#define NETWORKBOOTCOMMAND \
"run networkboot; " \
#else
@@ -108,21 +98,16 @@
"run doboot; " \
"run failbootcmd\0" \
-#define CONFIG_MMCBOOTCOMMAND \
+#define MMCBOOTCOMMAND \
"run doquiet; " \
"run tryboot; " \
#ifdef CONFIG_CMD_NFS
-#define CONFIG_BOOTCOMMAND CONFIG_NETWORKBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND NETWORKBOOTCOMMAND
#else
-#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND MMCBOOTCOMMAND
#endif
-
-/* Miscellaneous configurable options */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h
index 2e89d72..43027a5 100644
--- a/include/configs/goflexhome.h
+++ b/include/configs/goflexhome.h
@@ -19,7 +19,6 @@
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
/*
* Default GPIO configuration and LED status
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 4d5eab0..29a446c 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -13,18 +13,13 @@
/* Miscellaneous */
#define CONFIG_SYS_PBSIZE 256
-#define CONFIG_CMDLINE_TAG
/* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE (10 * 1024 * 1024)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 1024 * 1024)
-#define CONFIG_SYS_LOAD_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
-/* Malloc */
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
/* Network interface */
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 4f27273..f028958 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -24,14 +24,6 @@
#include "imx6_spl.h" /* common IMX6 SPL configuration */
#include "mx6_common.h"
-#define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
-
-/* Serial ATAG */
-#define CONFIG_SERIAL_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
/* Serial */
#define CONFIG_MXC_UART_BASE UART2_BASE
@@ -42,12 +34,6 @@
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* I2C Configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_GSC 0
#define CONFIG_I2C_EDID
@@ -74,8 +60,6 @@
/*
* PMIC
*/
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#define CONFIG_POWER_LTC3676
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index b2464f9..5a1e72c 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -23,8 +23,6 @@
#define CONFIG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE
#endif
-#define CONFIG_MACH_TYPE MACH_TYPE_HARMONY
-
/* NAND support */
#define CONFIG_TEGRA_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/highbank.h b/include/configs/highbank.h
index ff92c4f..4ef3a46 100644
--- a/include/configs/highbank.h
+++ b/include/configs/highbank.h
@@ -12,11 +12,6 @@
#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4)
#define CONFIG_SYS_TIMER_COUNTS_DOWN
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
-
#define CONFIG_PL011_CLOCK 150000000
#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
@@ -36,7 +31,6 @@
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LOAD_ADDR 0x800000
#define CONFIG_SYS_64BIT_LBA
/* Environment data setup
@@ -46,7 +40,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x20000000\0" \
diff --git a/include/configs/hikey.h b/include/configs/hikey.h
index 659fbee..387971c 100644
--- a/include/configs/hikey.h
+++ b/include/configs/hikey.h
@@ -13,7 +13,6 @@
#include <linux/sizes.h>
-#define CONFIG_POWER
#define CONFIG_POWER_HI6553
#define CONFIG_REMAKE_ELF
@@ -35,8 +34,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000)
-
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000
@@ -44,13 +41,6 @@
#define GICD_BASE 0xf6801000
#define GICC_BASE 0xf6802000
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
-
-#ifdef CONFIG_USB_DWC2
-#define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
-#endif
-
#define CONFIG_HIKEY_GPIO
/* BOOTP options */
diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h
index 04d4587..f446ecb 100644
--- a/include/configs/hikey960.h
+++ b/include/configs/hikey960.h
@@ -24,8 +24,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000)
-
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000
@@ -33,9 +31,6 @@
#define GICD_BASE 0xe82b1000
#define GICC_BASE 0xe82b2000
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0)
#include <config_distro_bootcmd.h>
diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h
index 5678f0a..21a984a 100644
--- a/include/configs/hsdk-4xd.h
+++ b/include/configs/hsdk-4xd.h
@@ -29,9 +29,7 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN SZ_2M
#define CONFIG_SYS_BOOTM_LEN SZ_128M
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
/*
* UART configuration
@@ -107,7 +105,6 @@
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/* Cli configuration */
#define CONFIG_SYS_CBSIZE SZ_2K
diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h
index 3cc3b8c..c8c28bb 100644
--- a/include/configs/hsdk.h
+++ b/include/configs/hsdk.h
@@ -28,9 +28,7 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN SZ_2M
#define CONFIG_SYS_BOOTM_LEN SZ_128M
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
/*
* UART configuration
@@ -106,7 +104,6 @@
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/* Cli configuration */
#define CONFIG_SYS_CBSIZE SZ_2K
diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h
index ba859a9..4bd3494 100644
--- a/include/configs/ib62x0.h
+++ b/include/configs/ib62x0.h
@@ -13,7 +13,6 @@
*/
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
#define CONFIG_KW88F6281 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#include "mv-common.h"
diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h
index c99490b..1a716df 100644
--- a/include/configs/iconnect.h
+++ b/include/configs/iconnect.h
@@ -13,12 +13,6 @@
*/
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
#define CONFIG_KW88F6281 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-
-/*
- * Machine type
- */
-#define CONFIG_MACH_TYPE MACH_TYPE_ICONNECT
#include "mv-common.h"
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 19d3fbf..e759db2 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -163,11 +163,6 @@
/*
* I2C setup
*/
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3100
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
/*
@@ -217,7 +212,6 @@
*/
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (8 * 1024 * 1024)
/*
* Environment Configuration
@@ -229,7 +223,6 @@
#define CONFIG_BOOTFILE "ids8313/uImage"
#define CONFIG_UBOOTPATH "ids8313/u-boot.bin"
#define CONFIG_FDTFILE "ids8313/ids8313.dtb"
-#define CONFIG_LOADADDR 0x400000
#define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mo,eth1addr:mo"
/* Initial Memory map for Linux*/
@@ -241,7 +234,6 @@
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LOAD_ADDR 0x100000
#define CONFIG_LOADS_ECHO
#define CONFIG_TIMESTAMP
#define CONFIG_BOOTCOMMAND "run boot_cramfs"
@@ -284,7 +276,7 @@
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
"\0"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv rootdev /dev/nfs;" \
"run setipargs;run addmtd;" \
"tftp ${loadaddr} ${bootfile};" \
diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h
index fcf1b7f..fc27ca4 100644
--- a/include/configs/imgtec_xilfpga.h
+++ b/include/configs/imgtec_xilfpga.h
@@ -11,7 +11,6 @@
#define __XILFPGA_CONFIG_H
/* BootROM + MIG is pretty smart. DDR and Cache initialized */
-#define CONFIG_SKIP_LOWLEVEL_INIT
/*--------------------------------------------
* CPU configuration
@@ -29,9 +28,7 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000)
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_LOAD_ADDR 0x80500000 /* default load address */
/*----------------------------------------------------------------------
* Commands
diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
index 8c5c061..27aab38 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -15,10 +15,6 @@
#define CONFIG_MX27
#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
/*
* Lowlevel configuration
*/
@@ -67,8 +63,6 @@
/*
* Memory Info
*/
-/* malloc() len */
-#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
/* memtest start address */
#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
@@ -120,9 +114,6 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h
index bfe83b8..cf46b54 100644
--- a/include/configs/imx6-engicam.h
+++ b/include/configs/imx6-engicam.h
@@ -13,9 +13,6 @@
#include <linux/stringify.h>
#include "mx6_common.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
/* Total Size of Environment Sector */
/* Environment */
@@ -30,7 +27,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"splashpos=m,m\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"image=uImage\0" \
"fit_image=fit.itb\0" \
"fdt_high=0xffffffff\0" \
@@ -103,7 +100,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
#ifdef CONFIG_MX6UL
@@ -174,7 +170,7 @@
# ifdef CONFIG_ENV_IS_IN_NAND
# define CONFIG_SPL_NAND_SUPPORT
# else
-# define CONFIG_SPL_MMC_SUPPORT
+# define CONFIG_SPL_MMC
# endif
# include "imx6_spl.h"
diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
index 6b992f9..e493703 100644
--- a/include/configs/imx6_logic.h
+++ b/include/configs/imx6_logic.h
@@ -17,9 +17,6 @@
#include "mx6_common.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
@@ -36,7 +33,7 @@
"bootm_size=0x10000000\0" \
"fdt_addr_r=0x14000000\0" \
"ramdisk_addr_r=0x14080000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_file=rootfs.cpio.uboot\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
index ede81cc..234aacb 100644
--- a/include/configs/imx6_spl.h
+++ b/include/configs/imx6_spl.h
@@ -54,12 +54,12 @@
#endif
/* MMC support */
-#if defined(CONFIG_SPL_MMC_SUPPORT)
+#if defined(CONFIG_SPL_MMC)
#define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */
#endif
/* SATA support */
-#if defined(CONFIG_SPL_SATA_SUPPORT)
+#if defined(CONFIG_SPL_SATA)
#define CONFIG_SPL_SATA_BOOT_DEVICE 0
#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1
#endif
diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h
index 4027f32..367f78d 100644
--- a/include/configs/imx6dl-mamoj.h
+++ b/include/configs/imx6dl-mamoj.h
@@ -13,9 +13,6 @@
#include <linux/sizes.h>
#include "mx6_common.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M)
-
/* Total Size of Environment Sector */
/* Environment */
@@ -65,7 +62,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h
index 4a3706d..270c44e 100644
--- a/include/configs/imx7-cm.h
+++ b/include/configs/imx7-cm.h
@@ -12,9 +12,6 @@
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-
#define CONFIG_ETHPRIME "FEC"
#undef CONFIG_SYS_AUTOLOAD
@@ -75,7 +72,6 @@
#define CONFIG_BOOTCOMMAND "run boot${boot-mode}"
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h
index abf3dd5..01d1cd8 100644
--- a/include/configs/imx7_spl.h
+++ b/include/configs/imx7_spl.h
@@ -31,7 +31,7 @@
#define CONFIG_SPL_PAD_TO 0x11000
/* MMC support */
-#if defined(CONFIG_SPL_MMC_SUPPORT)
+#if defined(CONFIG_SPL_MMC)
#define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */
#endif
diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h
index faeee21..9b86e0a 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -140,9 +140,6 @@
#endif
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
@@ -153,9 +150,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
@@ -178,8 +172,6 @@
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-#define CONFIG_SYS_I2C_SPEED 100000
-
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
index 94f4a12..2bdcc0a 100644
--- a/include/configs/imx8mm_beacon.h
+++ b/include/configs/imx8mm_beacon.h
@@ -93,9 +93,6 @@
"fi;"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
@@ -104,9 +101,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
@@ -128,9 +122,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-/* I2C */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* FEC*/
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 8f3dd8f..a03a7a7 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -44,8 +44,8 @@
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"image=Image\0" \
"console=ttymxc1,115200\0" \
"fdt_addr_r=0x43000000\0" \
@@ -57,9 +57,6 @@
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
@@ -70,9 +67,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
@@ -94,8 +88,6 @@
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-#define CONFIG_SYS_I2C_SPEED 100000
-
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h
index af5be68..4b22ba1 100644
--- a/include/configs/imx8mm_icore_mx8mm.h
+++ b/include/configs/imx8mm_icore_mx8mm.h
@@ -56,8 +56,6 @@
BOOTENV
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
@@ -66,8 +64,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* SDRAM configuration */
@@ -94,7 +90,4 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-/* I2C */
-#define CONFIG_SYS_I2C_SPEED 100000
-
#endif /* __IMX8MM_ICORE_MX8MM_H */
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index 9166925..63f02bf 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -37,8 +37,6 @@
"scriptaddr=0x46000000\0"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Enable Distro Boot */
#ifndef CONFIG_SPL_BUILD
@@ -87,8 +85,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* SDRAM configuration */
@@ -112,9 +108,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-/* I2C */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* FEC */
#define CONFIG_ETHPRIME "eth0"
#define CONFIG_FEC_XCV_TYPE RGMII
diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index 9ce60fd..cb85c35 100644
--- a/include/configs/imx8mn_beacon.h
+++ b/include/configs/imx8mn_beacon.h
@@ -108,9 +108,6 @@
"else booti ${loadaddr} - ${fdt_addr}; fi"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
@@ -121,9 +118,6 @@
#define CONFIG_ENV_OVERWRITE
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#if CONFIG_IS_ENABLED(IMX8MN_BEACON_2GB_LPDDR)
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index 985bec8..1e18a87 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -44,8 +44,8 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"image=Image\0" \
BOOTENV \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"console=ttymxc1,115200\0" \
"fdt_addr_r=0x43000000\0" \
"boot_fit=no\0" \
@@ -56,9 +56,6 @@
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
@@ -69,9 +66,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
@@ -93,6 +87,4 @@
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-#define CONFIG_SYS_I2C_SPEED 100000
-
#endif
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index a6569d5..bec6c1d 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -30,15 +30,9 @@
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#undef CONFIG_DM_MMC
-#undef CONFIG_DM_PMIC
-#undef CONFIG_DM_PMIC_PFUZE100
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PCA9450
-#define CONFIG_SYS_I2C_LEGACY
-
#endif
#if defined(CONFIG_CMD_NET)
@@ -68,8 +62,8 @@
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"image=Image\0" \
"console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
"fdt_addr_r=0x43000000\0" \
@@ -81,9 +75,6 @@
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
@@ -94,9 +85,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
-
/* Totally 6GB DDR */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
@@ -120,6 +108,4 @@
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-#define CONFIG_SYS_I2C_SPEED 100000
-
#endif
diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h
index 9db3bd5..9b78662 100644
--- a/include/configs/imx8mq_cm.h
+++ b/include/configs/imx8mq_cm.h
@@ -65,9 +65,6 @@
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
@@ -78,9 +75,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index af81a43..9b9d6fd 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -28,7 +28,7 @@
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO
-#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC
#define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
@@ -41,18 +41,7 @@
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#undef CONFIG_DM_MMC
-#undef CONFIG_DM_PMIC
-#undef CONFIG_DM_PMIC_PFUZE100
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#endif
@@ -99,9 +88,6 @@
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
@@ -112,9 +98,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
@@ -139,13 +122,6 @@
#define CONFIG_MXC_GPIO
-/* I2C Configs */
-#define CONFIG_SYS_I2C_SPEED 100000
-
#define CONFIG_OF_SYSTEM_SETUP
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_DM_PMIC
-#endif
-
#endif
diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h
index 8038abc..0ec1f69 100644
--- a/include/configs/imx8mq_phanbell.h
+++ b/include/configs/imx8mq_phanbell.h
@@ -25,7 +25,7 @@
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO
-#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC
#define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
@@ -38,18 +38,6 @@
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#undef CONFIG_DM_MMC
-#undef CONFIG_DM_PMIC
-#undef CONFIG_DM_PMIC_PFUZE100
-
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#endif
#define CONFIG_REMAKE_ELF
@@ -142,9 +130,6 @@
"else booti ${loadaddr} - ${fdt_addr}; fi"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
@@ -155,9 +140,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
@@ -184,13 +166,6 @@
#define CONFIG_MXC_GPIO
-/* I2C Configs */
-#define CONFIG_SYS_I2C_SPEED 100000
-
#define CONFIG_OF_SYSTEM_SETUP
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_DM_PMIC
-#endif
-
#endif
diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h
index 99e73a9..152fa6f 100644
--- a/include/configs/imx8qm_mek.h
+++ b/include/configs/imx8qm_mek.h
@@ -42,8 +42,6 @@
#define USDHC2_BASE_ADDR 0x5B020000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
#ifdef CONFIG_AHAB_BOOT
#define AHAB_ENV "sec_boot=yes\0"
#else
@@ -145,9 +143,6 @@
"else booti ${loadaddr} - ${fdt_addr}; fi"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x80280000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
@@ -159,9 +154,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
#define CONFIG_SYS_FSL_USDHC_NUM 2
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h
index fcbf8ee..89b4554 100644
--- a/include/configs/imx8qm_rom7720.h
+++ b/include/configs/imx8qm_rom7720.h
@@ -24,7 +24,6 @@
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* FUSE command */
/* Boot M4 */
@@ -122,9 +121,6 @@
"else booti ${loadaddr} - ${fdt_addr}; fi"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x80280000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
@@ -146,9 +142,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */
#define CONFIG_SYS_FSL_USDHC_NUM 3
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h
index a7d623a..a7ca48f 100644
--- a/include/configs/imx8qxp_mek.h
+++ b/include/configs/imx8qxp_mek.h
@@ -41,8 +41,6 @@
#define USDHC1_BASE_ADDR 0x5B010000
#define USDHC2_BASE_ADDR 0x5B020000
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
#ifdef CONFIG_AHAB_BOOT
#define AHAB_ENV "sec_boot=yes\0"
#else
@@ -144,9 +142,6 @@
"else booti ${loadaddr} - ${fdt_addr}; fi"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x80280000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
@@ -158,9 +153,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
#define CONFIG_SYS_FSL_USDHC_NUM 2
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h
index 32f8773..8e9a159 100644
--- a/include/configs/imx8ulp_evk.h
+++ b/include/configs/imx8ulp_evk.h
@@ -33,8 +33,6 @@
#endif
-#define CONFIG_SERIAL_TAG
-
#define CONFIG_REMAKE_ELF
#define CONFIG_BOARD_EARLY_INIT_F
@@ -63,8 +61,8 @@
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"image=Image\0" \
"console=ttyLP1,115200 earlycon\0" \
"fdt_addr_r=0x83000000\0" \
@@ -76,9 +74,6 @@
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
/* Link Definitions */
-#define CONFIG_LOADADDR 0x80480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
@@ -88,9 +83,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_MMCROOT "/dev/mmcblk2p2"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_16M)
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
diff --git a/include/configs/imxrt1020-evk.h b/include/configs/imxrt1020-evk.h
index 4fb4477..64c0f5e 100644
--- a/include/configs/imxrt1020-evk.h
+++ b/include/configs/imxrt1020-evk.h
@@ -11,13 +11,6 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x20240000
-#ifdef CONFIG_SUPPORT_SPL
-#define CONFIG_SYS_LOAD_ADDR 0x20209000
-#else
-#define CONFIG_SYS_LOAD_ADDR 0x80000000
-#define CONFIG_LOADADDR 0x80000000
-#endif
-
#define CONFIG_SYS_FSL_ERRATUM_ESDHC135 1
#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1
@@ -31,7 +24,6 @@
/*
* Configuration of the external SDRAM memory
*/
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
/* For SPL */
#ifdef CONFIG_SUPPORT_SPL
diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h
index c8d661f..1b67542 100644
--- a/include/configs/imxrt1050-evk.h
+++ b/include/configs/imxrt1050-evk.h
@@ -11,13 +11,6 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x20280000
-#ifdef CONFIG_SUPPORT_SPL
-#define CONFIG_SYS_LOAD_ADDR 0x20209000
-#else
-#define CONFIG_SYS_LOAD_ADDR 0x80000000
-#define CONFIG_LOADADDR 0x80000000
-#endif
-
#define CONFIG_SYS_FSL_ERRATUM_ESDHC135 1
#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1
@@ -42,7 +35,6 @@
/*
* Configuration of the external SDRAM memory
*/
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
/* For SPL */
#ifdef CONFIG_SUPPORT_SPL
diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h
index 89ab0da..b573bdc 100644
--- a/include/configs/integrator-common.h
+++ b/include/configs/integrator-common.h
@@ -7,11 +7,6 @@
*/
#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
-#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
/*
* There are various dependencies on the core module (CM) fitted
@@ -48,7 +43,6 @@
* image to run at reset/power up
* e.g. whether the ARM Boot Monitor runs before U-Boot
*/
-/* #define CONFIG_SKIP_LOWLEVEL_INIT */
/*
* The ARM boot monitor does not relocate U-Boot.
diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h
index 1ba69d9..a1b8c06 100644
--- a/include/configs/iot_devkit.h
+++ b/include/configs/iot_devkit.h
@@ -57,9 +57,7 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K)
-#define CONFIG_SYS_MALLOC_LEN SZ_64K
#define CONFIG_SYS_BOOTM_LEN SZ_128K
-#define CONFIG_SYS_LOAD_ADDR SRAM_BASE
#define ROM_BASE CONFIG_SYS_MONITOR_BASE
#define ROM_SIZE SZ_256K
@@ -75,6 +73,5 @@
* Environment
*/
#define CONFIG_BOOTFILE "app.bin"
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#endif /* _CONFIG_IOT_DEVKIT_H_ */
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index 716ae3b..9b25c34 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -11,9 +11,6 @@
#include <environment/ti/spi.h>
-/* Platform type */
-#define CONFIG_SOC_K2E
-
#ifdef CONFIG_TI_SECURE_DEVICE
#define DEFAULT_SEC_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
@@ -23,7 +20,7 @@
#endif
/* U-Boot general configuration */
-#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
+#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_SEC_BOOT_ENV \
"boot=ubi\0" \
@@ -47,6 +44,4 @@
#define CONFIG_KSNET_CPSW_NUM_PORTS 9
#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
-#define CONFIG_DDR_SPD
-
#endif /* __CONFIG_K2E_EVM_H */
diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h
index 4471eb4..56dd9c7 100644
--- a/include/configs/k2g_evm.h
+++ b/include/configs/k2g_evm.h
@@ -12,11 +12,8 @@
#include <environment/ti/mmc.h>
#include <environment/ti/spi.h>
-/* Platform type */
-#define CONFIG_SOC_K2G
-
/* U-Boot general configuration */
-#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
+#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_MMC_TI_ARGS \
DEFAULT_PMMC_BOOT_ENV \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index d90b264..cfc34c7 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -11,9 +11,6 @@
#include <environment/ti/spi.h>
-/* Platform type */
-#define CONFIG_SOC_K2HK
-
#ifdef CONFIG_TI_SECURE_DEVICE
#define DEFAULT_SEC_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
@@ -23,7 +20,7 @@
#endif
/* U-Boot general configuration */
-#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
+#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_SEC_BOOT_ENV \
"boot=ubi\0" \
@@ -46,6 +43,4 @@
#define CONFIG_KSNET_NETCP_V1_0
#define CONFIG_KSNET_CPSW_NUM_PORTS 5
-#define CONFIG_DDR_SPD
-
#endif /* __CONFIG_K2HK_EVM_H */
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 152cea0..65988ff 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -11,9 +11,6 @@
#include <environment/ti/spi.h>
-/* Platform type */
-#define CONFIG_SOC_K2L
-
#ifdef CONFIG_TI_SECURE_DEVICE
#define DEFAULT_SEC_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
@@ -23,7 +20,7 @@
#endif
/* U-Boot general configuration */
-#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
+#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_SEC_BOOT_ENV \
"boot=ubi\0" \
diff --git a/include/configs/km/km-mpc8309.h b/include/configs/km/km-mpc8309.h
index e710c04..ff97c6c 100644
--- a/include/configs/km/km-mpc8309.h
+++ b/include/configs/km/km-mpc8309.h
@@ -8,7 +8,6 @@
/*
* System Clock Setup
*/
-#define CONFIG_83XX_CLKIN 66000000
#define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000
@@ -123,7 +122,6 @@
#define CONFIG_SYS_KMBEC_FPGA_SIZE 128
/* EEprom support */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
/* ethernet port connected to piggy (UEC2) */
#define CONFIG_HAS_ETH1
diff --git a/include/configs/km/km-mpc832x.h b/include/configs/km/km-mpc832x.h
index 22dfb5d..537a9d5 100644
--- a/include/configs/km/km-mpc832x.h
+++ b/include/configs/km/km-mpc832x.h
@@ -6,7 +6,6 @@
/*
* System Clock Setup
*/
-#define CONFIG_83XX_CLKIN 66000000
#define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000
@@ -72,5 +71,4 @@
#define CONFIG_SYS_KMBEC_FPGA_SIZE 128
/* EEprom support */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
diff --git a/include/configs/km/km-mpc8360.h b/include/configs/km/km-mpc8360.h
index 798b126..92e046d 100644
--- a/include/configs/km/km-mpc8360.h
+++ b/include/configs/km/km-mpc8360.h
@@ -67,7 +67,6 @@
#define CONFIG_SYS_DDR_TIMING_3 0x00000000
/* EEprom support */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* PAXE on the local bus CS3
diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h
index ecf4378..45db5cf 100644
--- a/include/configs/km/km-mpc83xx.h
+++ b/include/configs/km/km-mpc83xx.h
@@ -18,7 +18,6 @@
/*
* Manually set up DDR parameters
*/
-#define CONFIG_DDR_II
#define CONFIG_SYS_DDR_SIZE 2048 /* MB */
/*
@@ -62,17 +61,8 @@
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_NUM_I2C_BUSES 4
#define CONFIG_SYS_I2C_MAX_HOPS 1
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 200000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
-#define CONFIG_SYS_I2C_OFFSET 0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED 200000
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h
index 3be926c..a9a6a41 100644
--- a/include/configs/km/km-powerpc.h
+++ b/include/configs/km/km-powerpc.h
@@ -11,13 +11,6 @@
/* EEprom support 24C08, 24C16, 24C64 */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 8 Byte write page */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
-
-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-
-/* Reserve 4 MB for malloc */
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
/* Increase max size of compressed kernel */
#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 179e145..cca624e 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -25,23 +25,16 @@
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
#define CONFIG_KW88F6281 /* SOC Name */
-#define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD
-
#define CONFIG_NAND_ECC_BCH
/* include common defines/options for all Keymile boards */
#include "keymile-common.h"
-/* Reserve 4 MB for malloc */
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-
/* Increase max size of compressed kernel */
#define CONFIG_SYS_BOOTM_LEN (32 << 20)
#include "asm/arch/config.h"
-#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
-
/* architecture specific default bootargs */
#define CONFIG_KM_DEF_BOOT_ARGS_CPU \
"bootcountaddr=${bootcountaddr} ${mtdparts}" \
@@ -59,17 +52,6 @@
"appended one; fi\0" \
""
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_INITRD_TAG /* enable INITRD tag */
-#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
-
/*
* NAND Flash configuration
*/
@@ -90,8 +72,6 @@
* I2C related stuff
*/
#undef CONFIG_I2C_MVTWSI
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
@@ -125,16 +105,8 @@
#define I2C_DELAY udelay(1)
#define I2C_SOFT_DECLARATIONS
-#define CONFIG_SYS_I2C_SOFT_SLAVE 0x0
-#define CONFIG_SYS_I2C_SOFT_SPEED 100000
-
/* EEprom support 24C128, 24C256 valid for environment eeprom */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* Environment variables configurations
@@ -142,8 +114,6 @@
#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */
#else
-#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_EEPROM_WREN
#define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */
#endif
@@ -165,9 +135,9 @@
"newenv=setenv addr 0x100000 && " \
"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \
"mw.b ${addr} 0 4 && " \
- "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
+ "eeprom write " __stringify(CONFIG_SYS_I2C_EEPROM_ADDR) \
" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \
- "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
+ "eeprom write " __stringify(CONFIG_SYS_I2C_EEPROM_ADDR) \
" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
#endif
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index a4cc477..75d109a 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -8,16 +8,9 @@
#define CONFIG_SYS_FSL_CLK
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/* include common defines/options for all Keymile boards */
#include "keymile-common.h"
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024 * 1024)
-
#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
@@ -26,12 +19,6 @@
CONFIG_KM_RESERVED_PRAM) >> 10)
#define CONFIG_SYS_CLK_FREQ 66666666
-/*
- * Take into account default implementation where DDR_FDBK_MULTI is consider as
- * configured for DDR_PLL = 2*MEM_PLL_RAT.
- * In our case DDR_FDBK_MULTI is 2, means DDR_PLL = MEM_PLL_RAT.
- */
-#define CONFIG_DDR_CLK_FREQ (100000000 >> 1)
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
@@ -42,8 +29,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x54
@@ -191,9 +176,7 @@
/*
* I2C
*/
-#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_INIT_BOARD
-#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_MAX_HOPS 1
@@ -224,8 +207,6 @@
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
#define CONFIG_LS102XA_STREAM_ID
#define CONFIG_SYS_INIT_SP_OFFSET \
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 51a01d8..bf876df 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -177,21 +177,14 @@
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_DDR_CLK_FREQ 66666666
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x54
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_I2C_EEPROM_ADDR CONFIG_SYS_IVM_EEPROM_ADR
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-
/******************************************************************************
* (PRAM usage)
* ... -------------------------------------------------------
@@ -366,8 +359,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_LEN 0xc0000 /* 768k */
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-
/*
* Serial Port - controlled on board with jumper J8
* open - index 2
diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index cdfb280..60fe4ae 100644
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -27,7 +27,6 @@
/*
* System Clock Setup
*/
-#define CONFIG_83XX_CLKIN 66000000
#define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000
diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index bfb4e67..438a189 100644
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -16,8 +16,6 @@
#endif
/* DDR */
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define CONFIG_VERY_BIG_RAM
@@ -42,9 +40,6 @@
/* generic timer */
#define COUNTER_FREQUENCY 25000000
-/* size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
-
/* early heap for SPL DM */
#define CONFIG_MALLOC_F_ADDR CONFIG_SYS_FSL_OCRAM_BASE
@@ -53,7 +48,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
/* ethernet */
@@ -71,7 +65,6 @@
/* environment */
/* see include/configs/ti_armv7_common.h */
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
#define ENV_MEM_LAYOUT_SETTINGS \
"loadaddr=0x82000000\0" \
"kernel_addr_r=0x82000000\0" \
diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h
index c948828..c1db6ea 100644
--- a/include/configs/kp_imx53.h
+++ b/include/configs/kp_imx53.h
@@ -12,20 +12,11 @@
#define CONFIG_SYS_FSL_CLK
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-
/* USB Configs */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_EEPROM_BUS_NUM 1
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-
/* Command definition */
-#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=ttymxc1,115200\0" \
@@ -77,7 +68,6 @@
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Physical Memory Map */
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h
index 749e880..8471dff 100644
--- a/include/configs/kp_imx6q_tpc.h
+++ b/include/configs/kp_imx6q_tpc.h
@@ -16,13 +16,6 @@
#include "imx6_spl.h" /* common IMX6 SPL configuration */
/* Miscellaneous configurable options */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
/* FEC ethernet */
#define CONFIG_ARP_TIMEOUT 200UL
@@ -37,11 +30,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
#endif
-/* Watchdog */
-
-#define CONFIG_LOADADDR 0x12000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
#ifndef CONFIG_SPL_BUILD
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200\0" \
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 059c54e..c3f690c 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -8,14 +8,9 @@
#define __KZM9G_H
#define CONFIG_SH73A0
-#define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
#include <asm/arch/rmobile.h>
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
/* MEMORY */
#define KZM_SDRAM_BASE (0x40000000)
#define PHYS_SDRAM KZM_SDRAM_BASE
@@ -46,10 +41,8 @@
#define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
#define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
#define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE)
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
#define CONFIG_STANDALONE_LOAD_ADDR 0x41000000
@@ -82,23 +75,4 @@
#define CONFIG_NFS_TIMEOUT 10000UL
-/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_SH
-#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
-#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
-#define CONFIG_SYS_I2C_SH_SPEED0 100000
-#define CONFIG_SYS_I2C_SH_BASE1 0xE6822000
-#define CONFIG_SYS_I2C_SH_SPEED1 100000
-#define CONFIG_SYS_I2C_SH_BASE2 0xE6824000
-#define CONFIG_SYS_I2C_SH_SPEED2 100000
-#define CONFIG_SYS_I2C_SH_BASE3 0xE6826000
-#define CONFIG_SYS_I2C_SH_SPEED3 100000
-#define CONFIG_SYS_I2C_SH_BASE4 0xE6828000
-#define CONFIG_SYS_I2C_SH_SPEED4 100000
-#define CONFIG_SH_I2C_8BIT
-#define CONFIG_SH_I2C_DATA_HIGH 4
-#define CONFIG_SH_I2C_DATA_LOW 5
-#define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */
-
#endif /* __KZM9G_H */
diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index 88f784f..146d8ad 100644
--- a/include/configs/lacie_kw.h
+++ b/include/configs/lacie_kw.h
@@ -7,27 +7,6 @@
#define _CONFIG_LACIE_KW_H
/*
- * Machine number definition
- */
-#if defined(CONFIG_INETSPACE_V2)
-#define CONFIG_MACH_TYPE MACH_TYPE_INETSPACE_V2
-#elif defined(CONFIG_NETSPACE_V2)
-#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_V2
-#elif defined(CONFIG_NETSPACE_LITE_V2)
-#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_LITE_V2
-#elif defined(CONFIG_NETSPACE_MINI_V2)
-#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MINI_V2
-#elif defined(CONFIG_NETSPACE_MAX_V2)
-#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MAX_V2
-#elif defined(CONFIG_D2NET_V2)
-#define CONFIG_MACH_TYPE MACH_TYPE_D2NET_V2
-#elif defined(CONFIG_NET2BIG_V2)
-#define CONFIG_MACH_TYPE MACH_TYPE_NET2BIG_V2
-#else
-#error "Unknown board"
-#endif
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
@@ -37,7 +16,6 @@
#else
#define CONFIG_KW88F6281
#endif
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
/*
* SDRAM configuration
@@ -99,9 +77,6 @@
*/
#ifdef CONFIG_CMD_I2C
/* I2C EEPROM HT24LC04 (512B - 32 pages of 16 Bytes) */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit device address */
#if defined(CONFIG_NET2BIG_V2)
#define CONFIG_SYS_I2C_G762_ADDR 0x3e
#endif
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index 8c2c8e1..6928179 100644
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -22,12 +22,10 @@
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SKIP_LOWLEVEL_INIT
/*
* Memory Info
*/
-#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
@@ -47,7 +45,6 @@
/*
* I2C Configuration
*/
-#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
@@ -57,15 +54,12 @@
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
/*
* Linux Information
*/
#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
#define CONFIG_HWCONFIG /* enable hwconfig */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_SETUP_INITRD_TAG
#define CONFIG_BOOTCOMMAND \
"if mmc rescan; then " \
diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h
index e7a7ae3..aa2542f 100644
--- a/include/configs/linkit-smart-7688.h
+++ b/include/configs/linkit-smart-7688.h
@@ -12,14 +12,9 @@
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
-
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
/* SPL */
-#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SPL_BSS_START_ADDR 0x80010000
@@ -31,7 +26,7 @@
#define CONFIG_SYS_UBOOT_BASE 0
/* Serial SPL */
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_CLK 40000000
#define CONFIG_SYS_NS16550_REG_SIZE -4
@@ -47,7 +42,6 @@
/* Memory usage */
#define CONFIG_SYS_MAXARGS 64
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
#define CONFIG_SYS_CBSIZE 512
diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h
index 5adbe1c..dc6f15a 100644
--- a/include/configs/liteboard.h
+++ b/include/configs/liteboard.h
@@ -16,9 +16,6 @@
/* SPL options */
#include "imx6_spl.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
@@ -104,8 +101,6 @@
"else run netboot; fi"
/* Miscellaneous configurable options */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 670b55d..1edea0a 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -6,22 +6,17 @@
#ifndef __LS1012A_COMMON_H
#define __LS1012A_COMMON_H
-#define CONFIG_GICV2
-
#include <asm/arch/config.h>
#include <asm/arch/stream_id_lsch2.h>
#include <linux/sizes.h>
#define CONFIG_SYS_CLK_FREQ 125000000
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#ifdef CONFIG_TFABOOT
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#else
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
#endif
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
@@ -34,9 +29,6 @@
/* CSU */
#define CONFIG_LAYERSCAPE_NS_ACCESS
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (5 * SZ_1M)
-
/* PFE */
#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x300000
@@ -55,12 +47,6 @@
CONFIG_SYS_SCSI_MAX_LUN)
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
/* GPIO */
#ifdef CONFIG_DM_GPIO
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index 3e5fdad..a5900f2 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -54,13 +54,8 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Voltage monitor on channel 2*/
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 4c448c6..7a7640a 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -11,16 +11,10 @@
#define CONFIG_SYS_FSL_CLK
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024 * 1024)
-
#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
/*
* DDR: 800 MHz ( 1600 MT/s data rate )
@@ -53,21 +47,13 @@
#define SDRAM_CFG2_FRC_SR 0x80000000
#define SDRAM_CFG_BI 0x00000001
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI \
- board/freescale/ls1021aiot/ls102xa_pbi.cfg
-#endif
-
#ifdef CONFIG_SD_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_I2C
#define CONFIG_SPL_WATCHDOG
-#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8
#define CONFIG_SPL_MAX_SIZE 0x1a000
@@ -98,23 +84,9 @@
* I2C
*/
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* MMC
@@ -175,8 +147,6 @@
#define CONFIG_PCI_SCAN_SHOW
#endif
-#define CONFIG_CMDLINE_TAG
-
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
@@ -196,8 +166,6 @@
*/
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
#define CONFIG_LS102XA_STREAM_ID
#define CONFIG_SYS_INIT_SP_OFFSET \
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 598f6c6..a164796 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -11,45 +11,23 @@
#define CONFIG_SYS_FSL_CLK
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_DEEP_SLEEP
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024 * 1024)
-
#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_QIXIS_I2C_ACCESS
#else
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#endif
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1021aqds/ls102xa_pbi.cfg
-#endif
-
#ifdef CONFIG_SD_BOOT
-#ifdef CONFIG_SD_BOOT_QSPI
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg
-#else
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg
-#endif
-
#define CONFIG_SPL_MAX_SIZE 0x1a000
#define CONFIG_SPL_STACK 0x1001d000
#define CONFIG_SPL_PAD_TO 0x1c000
@@ -63,8 +41,6 @@
#endif
#ifdef CONFIG_NAND_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
-
#define CONFIG_SPL_MAX_SIZE 0x1a000
#define CONFIG_SPL_STACK 0x1001d000
#define CONFIG_SPL_PAD_TO 0x1c000
@@ -82,7 +58,6 @@
#define CONFIG_SYS_MONITOR_LEN 0x80000
#endif
-#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
@@ -95,9 +70,7 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -330,16 +303,6 @@
/*
* I2C
*/
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* GPIO */
#ifdef CONFIG_DM_GPIO
@@ -349,13 +312,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/*
* I2C bus multiplexer
@@ -429,8 +387,6 @@
#define CONFIG_PCI_SCAN_SHOW
#endif
-#define CONFIG_CMDLINE_TAG
-
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
@@ -461,8 +417,6 @@
*/
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
#define CONFIG_LS102XA_STREAM_ID
#define CONFIG_SYS_INIT_SP_OFFSET \
diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h
index 0dd891b..f70b6e9 100644
--- a/include/configs/ls1021atsn.h
+++ b/include/configs/ls1021atsn.h
@@ -12,9 +12,6 @@
#define CONFIG_DEEP_SLEEP
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024 * 1024)
-
#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
@@ -22,7 +19,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define DDR_SDRAM_CFG 0x470c0008
#define DDR_CS0_BNDS 0x008000bf
@@ -51,15 +47,7 @@
#define SDRAM_CFG2_FRC_SR 0x80000000
#define SDRAM_CFG_BI 0x00000001
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI \
- "board/freescale/ls1021atsn/ls102xa_pbi.cfg"
-#endif
-
#ifdef CONFIG_SD_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW \
- "board/freescale/ls1021atsn/ls102xa_rcw_sd.cfg"
-
#ifdef CONFIG_NXP_ESBC
#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
#endif /* ifdef CONFIG_NXP_ESBC */
@@ -104,23 +92,10 @@
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* QSPI */
#define FSL_QSPI_FLASH_SIZE (1 << 24)
@@ -220,8 +195,6 @@
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
#define CONFIG_LS102XA_STREAM_ID
#define CONFIG_SYS_INIT_SP_OFFSET \
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index ba308c5..067d4f7 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -11,19 +11,12 @@
#define CONFIG_SYS_FSL_CLK
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_DEEP_SLEEP
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024 * 1024)
-
#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define DDR_SDRAM_CFG 0x470c0008
#define DDR_CS0_BNDS 0x008000bf
@@ -52,19 +45,7 @@
#define SDRAM_CFG2_FRC_SR 0x80000000
#define SDRAM_CFG_BI 0x00000001
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1021atwr/ls102xa_pbi.cfg
-#endif
-
#ifdef CONFIG_SD_BOOT
-#ifdef CONFIG_SD_BOOT_QSPI
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg
-#else
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg
-#endif
-
#ifdef CONFIG_NXP_ESBC
/*
* HDR would be appended at end of image and copied to DDR along
@@ -208,16 +189,6 @@
/*
* I2C
*/
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* GPIO */
#ifdef CONFIG_DM_GPIO
@@ -227,13 +198,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 1
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/*
* MMC
@@ -267,8 +233,6 @@
#define CONFIG_PCI_SCAN_SHOW
#endif
-#define CONFIG_CMDLINE_TAG
-
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
@@ -431,8 +395,6 @@
*/
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
#define CONFIG_LS102XA_STREAM_ID
#define CONFIG_SYS_INIT_SP_OFFSET \
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index cbcf30e..50edefb 100644
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -16,8 +16,6 @@
/* Link Definitions */
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
@@ -33,9 +31,6 @@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
-
/* GPIO */
#ifdef CONFIG_DM_GPIO
#ifndef CONFIG_MPC8XXX_GPIO
@@ -44,9 +39,6 @@
#endif
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#endif
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
@@ -56,7 +48,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
@@ -103,13 +94,8 @@
#define I2C_MUX_CH_DEFAULT 0x8
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* DisplayPort */
#define DP_PWD_EN_DEFAULT_MASK 0x8
diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h
index 9ae37b9..fe20363 100644
--- a/include/configs/ls1028aqds.h
+++ b/include/configs/ls1028aqds.h
@@ -9,7 +9,6 @@
#include "ls1028a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
/* DDR */
diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h
index 1a80cb9..348db1e 100644
--- a/include/configs/ls1028ardb.h
+++ b/include/configs/ls1028ardb.h
@@ -9,7 +9,6 @@
#include "ls1028a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
#define CONFIG_SYS_RTC_BUS_NUM 0
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 834c3e6..f6909d0 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -27,7 +27,6 @@
#endif
#define CONFIG_REMAKE_ELF
-#define CONFIG_GICV2
#include <asm/arch/stream_id_lsch2.h>
#include <asm/arch/config.h>
@@ -39,8 +38,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
#endif
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
@@ -52,9 +49,6 @@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
-
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
@@ -149,16 +143,6 @@
#endif
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
/* PCIe */
#ifndef SPL_NO_PCIE
@@ -217,7 +201,6 @@
#endif
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 1636f0b..4ef4cac 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -10,13 +10,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_LAYERSCAPE_NS_ACCESS
@@ -24,13 +20,10 @@
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -53,23 +46,6 @@
#define QSGMII_CARD_PORT4_PHY_ADDR_S2 0xB
#endif
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1043aqds/ls1043aqds_pbi.cfg
-#endif
-
-#ifdef CONFIG_NAND_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_nand.cfg
-#endif
-
-#ifdef CONFIG_SD_BOOT
-#ifdef CONFIG_SD_BOOT_QSPI
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg
-#else
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg
-#endif
-#endif
-
/* LPUART */
#ifdef CONFIG_LPUART
#define CONFIG_LPUART_32B_REG
@@ -79,13 +55,8 @@
#define CONFIG_SCSI_AHCI_PLAT
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
@@ -191,7 +162,6 @@
#if defined(CONFIG_TFABOOT) || \
defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_QIXIS_I2C_ACCESS
-#define CONFIG_SYS_I2C_EARLY_INIT
#endif
/*
@@ -395,8 +365,6 @@
* Environment
*/
-#define CONFIG_CMDLINE_TAG
-
#include <asm/fsl_secure_boot.h>
#endif /* __LS1043AQDS_H__ */
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 84b83e6..906cd09 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -9,7 +9,6 @@
#include "ls1043a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_LAYERSCAPE_NS_ACCESS
@@ -21,20 +20,10 @@
#ifndef CONFIG_SPL
#define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1043ardb/ls1043ardb_pbi.cfg
-#endif
-
-#ifdef CONFIG_NAND_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg
-#endif
-
#ifdef CONFIG_SD_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg
#define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x10000
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x500
@@ -228,13 +217,8 @@
/* EEPROM */
#ifndef SPL_NO_EEPROM
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#endif
/*
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 289acc0..1d8adf9 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -27,7 +27,6 @@
#endif
#define CONFIG_REMAKE_ELF
-#define CONFIG_GICV2
#include <asm/arch/config.h>
#include <asm/arch/stream_id_lsch2.h>
@@ -39,8 +38,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
#endif
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
@@ -52,9 +49,6 @@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
-
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
@@ -108,7 +102,6 @@
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_I2C
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_DRIVERS_MISC
@@ -133,16 +126,6 @@
#endif
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
/* PCIe */
#define CONFIG_PCIE1 /* PCIE controller 1 */
@@ -195,7 +178,6 @@
#endif
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h
index fade815..7da0860 100644
--- a/include/configs/ls1046afrwy.h
+++ b/include/configs/ls1046afrwy.h
@@ -9,7 +9,6 @@
#include "ls1046a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_LAYERSCAPE_NS_ACCESS
@@ -74,13 +73,8 @@
#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define I2C_RETIMER_ADDR 0x18
/* I2C bus multiplexer */
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 9102c81..b6bbc01 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -10,13 +10,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_LAYERSCAPE_NS_ACCESS
@@ -24,13 +20,10 @@
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -55,26 +48,6 @@
#define QSGMII_CARD_PORT4_PHY_ADDR_S2 0xB
#endif
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI \
- board/freescale/ls1046aqds/ls1046aqds_pbi.cfg
-#endif
-
-#ifdef CONFIG_NAND_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg
-#endif
-
-#ifdef CONFIG_SD_BOOT
-#ifdef CONFIG_SD_BOOT_QSPI
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg
-#else
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg
-#endif
-#endif
-
/* IFC */
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_FSL_IFC
@@ -103,13 +76,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/*
* IFC Definitions
@@ -209,7 +177,6 @@
#if defined(CONFIG_TFABOOT) || \
defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_QIXIS_I2C_ACCESS
-#define CONFIG_SYS_I2C_EARLY_INIT
#endif
/*
@@ -410,8 +377,6 @@
* Environment
*/
-#define CONFIG_CMDLINE_TAG
-
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index dddaa25..d3f5d8c 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -10,7 +10,6 @@
#include "ls1046a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_LAYERSCAPE_NS_ACCESS
@@ -18,27 +17,12 @@
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
-#ifdef CONFIG_SD_BOOT
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg
-#ifdef CONFIG_EMMC_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg
-#else
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg
-#endif
-#elif defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg
-#define CONFIG_SYS_FSL_PBL_PBI \
- board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg
+#if defined(CONFIG_QSPI_BOOT)
#define CONFIG_SYS_UBOOT_BASE 0x40100000
#define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000
#endif
@@ -135,20 +119,11 @@
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define I2C_RETIMER_ADDR 0x18
/* PMIC */
-#define CONFIG_POWER
-#ifdef CONFIG_POWER
-#define CONFIG_POWER_I2C
-#endif
/*
* Environment
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index 3f0679c..f39f031 100644
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -37,8 +37,6 @@
/* Link Definitions */
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
@@ -50,9 +48,6 @@
*/
#define CPU_RELEASE_ADDR secondary_boot_addr
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
-
/* GPIO */
#ifdef CONFIG_DM_GPIO
#ifndef CONFIG_MPC8XXX_GPIO
@@ -61,9 +56,6 @@
#endif
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#endif
/* Serial Port */
@@ -147,7 +139,6 @@
#endif
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
/* SATA */
#ifdef CONFIG_SCSI
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 78ccc2d..a7d8cb5 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -11,7 +11,6 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#ifdef CONFIG_TFABOOT
@@ -23,14 +22,9 @@
#define SYS_NO_FLASH
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#else
#define CONFIG_QIXIS_I2C_ACCESS
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_EARLY_INIT
-#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#endif
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
@@ -38,9 +32,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
@@ -335,13 +326,8 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#ifdef CONFIG_FSL_DSPI
#define CONFIG_SPI_FLASH_STMICRO
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index ad3043b..4a61345 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -17,18 +17,12 @@
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
-#define CONFIG_DDR_SPD
#ifdef CONFIG_EMU
#define CONFIG_SYS_FSL_DDR_EMU
-#define CONFIG_SYS_MXC_I2C1_SPEED 40000000
-#define CONFIG_SYS_MXC_I2C2_SPEED 40000000
#else
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#define SPD_EEPROM_ADDRESS 0x51
@@ -241,13 +235,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 4527336..770f2aa 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -8,7 +8,6 @@
#define __LS2_COMMON_H
#define CONFIG_REMAKE_ELF
-#define CONFIG_GICV3
#include <asm/arch/stream_id_lsch3.h>
#include <asm/arch/config.h>
@@ -24,8 +23,6 @@
/* Link Definitions */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#ifndef CONFIG_SYS_FSL_DDR4
#define CONFIG_SYS_DDR_RAW_TIMING
#endif
@@ -63,9 +60,6 @@
*/
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
-
/* GPIO */
#ifdef CONFIG_DM_GPIO
#ifndef CONFIG_MPC8XXX_GPIO
@@ -74,9 +68,6 @@
#endif
/* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#endif
/* Serial Port */
#define CONFIG_SYS_NS16550_SERIAL
@@ -157,7 +148,6 @@
#endif
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
/* Physical Memory Map */
/* fixme: these need to be checked against the board */
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 8bfe4b9..e831d37 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -11,25 +11,17 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#ifdef CONFIG_FSL_QSPI
#define CONFIG_QIXIS_I2C_ACCESS
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_EARLY_INIT
-#endif
#define CONFIG_SYS_I2C_IFDR_DIV 0x7e
#endif
#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52
@@ -304,13 +296,8 @@
#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_FSL_MEMAC
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index bfbde1d..5568a48 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -13,9 +13,6 @@
#ifdef CONFIG_TARGET_LS2081ARDB
#define CONFIG_QIXIS_I2C_ACCESS
#endif
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_EARLY_INIT
-#endif
#endif
#define I2C_MUX_CH_VOL_MONITOR 0xa
@@ -39,12 +36,8 @@
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ 133333333
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52
@@ -286,13 +279,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_FSL_MEMAC
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index a4a4739..7294a3c 100644
--- a/include/configs/lsxl.h
+++ b/include/configs/lsxl.h
@@ -12,10 +12,8 @@
*/
#if defined(CONFIG_LSCHLV2)
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
-#define CONFIG_MACH_TYPE 3006
#elif defined(CONFIG_LSXHL)
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
-#define CONFIG_MACH_TYPE 2663
#else
#error "unknown board"
#endif
@@ -26,8 +24,6 @@
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
#define CONFIG_KW88F6281 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-
#define CONFIG_KIRKWOOD_GPIO
#include "mv-common.h"
@@ -45,7 +41,6 @@
/*
* Default environment variables
*/
-#define CONFIG_LOADADDR 0x00800000
#if defined(CONFIG_LSXHL)
#define CONFIG_FDTFILE "kirkwood-lsxhl.dtb"
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 1ae7d37..4db19e2 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -12,15 +12,12 @@
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
-#define CONFIG_GICV3
#define CONFIG_FSL_TZPC_BP147
#define CONFIG_FSL_MEMAC
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_FLASH_BASE 0x20000000
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/* DDR */
#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */
#define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */
@@ -30,9 +27,6 @@
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51
@@ -49,7 +43,6 @@
#define CONFIG_SYS_MONITOR_LEN (936 * 1024)
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
/* SMP Definitinos */
#define CPU_RELEASE_ADDR secondary_boot_addr
@@ -62,9 +55,6 @@
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
-
/* Serial Port */
#define CONFIG_PL01X_SERIAL
#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4)
@@ -110,13 +100,8 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Qixis */
#define CONFIG_FSL_QIXIS
@@ -157,11 +142,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
#define CONFIG_HWCONFIG
diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h
index ea1b163..30b044b 100644
--- a/include/configs/lx2160aqds.h
+++ b/include/configs/lx2160aqds.h
@@ -34,13 +34,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h
index 097f122..ebe5004 100644
--- a/include/configs/lx2160ardb.h
+++ b/include/configs/lx2160ardb.h
@@ -30,13 +30,8 @@
#define I2C_EMC2305_PWM 0x80
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h
index 847534c..7fa3c25 100644
--- a/include/configs/lx2162aqds.h
+++ b/include/configs/lx2162aqds.h
@@ -38,13 +38,8 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h
index bd117da..813d326 100644
--- a/include/configs/m53menlo.h
+++ b/include/configs/m53menlo.h
@@ -11,7 +11,6 @@
#include <asm/arch/imx-regs.h>
-#define CONFIG_REVISION_TAG
#define CONFIG_SYS_FSL_CLK
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
@@ -24,7 +23,6 @@
#define PHYS_SDRAM_2 CSD1_BASE_ADDR
#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
#define PHYS_SDRAM_SIZE (gd->ram_size)
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
@@ -84,17 +82,7 @@
#define CONFIG_ETHPRIME "FEC0"
#endif
-/*
- * I2C
- */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
-#endif
/*
* RTC
@@ -141,14 +129,8 @@
/*
* Boot Linux
*/
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "boot/fitImage"
-#define CONFIG_LOADADDR 0x70800000
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/*
* NAND SPL
diff --git a/include/configs/malta.h b/include/configs/malta.h
index 9602773..8ace0cc 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -38,9 +38,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
-
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index fc23932..53ba649 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -6,6 +6,8 @@
#ifndef _CONFIG_DB_MV7846MP_GP_H
#define _CONFIG_DB_MV7846MP_GP_H
+#include <linux/sizes.h>
+
/*
* High Level Configuration Options (easy to change)
*/
@@ -17,11 +19,7 @@
*/
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
/* SPI NOR flash default params, used by sf commands */
@@ -65,7 +63,7 @@
/* SPL related SPI defines */
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
+#define CONFIG_SYS_SDRAM_SIZE SZ_1G
#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
#endif /* _CONFIG_DB_MV7846MP_GP_H */
diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h
index 0c383e9..a080322 100644
--- a/include/configs/mccmon6.h
+++ b/include/configs/mccmon6.h
@@ -25,9 +25,6 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (0x1000)
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "fitImage"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configuration */
diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h
index f43a841..ac9a75b 100644
--- a/include/configs/meerkat96.h
+++ b/include/configs/meerkat96.h
@@ -14,10 +14,6 @@
#define PHYS_SDRAM_SIZE SZ_512M
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index bd4bac7..3457c59 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -32,12 +32,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
/* Misc CPU related */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SERIAL_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
/*
* Hardware drivers
@@ -58,8 +52,6 @@
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
-
/*
* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
* leaving the correct space for initial global data structure above
@@ -100,10 +92,4 @@
#define CONFIG_SYS_CBSIZE 512
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
- 128*1024, 0x1000)
-
#endif
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
index f9bb024..b779363 100644
--- a/include/configs/meson64.h
+++ b/include/configs/meson64.h
@@ -32,14 +32,10 @@
#define CONFIG_CPU_ARMV8
#define CONFIG_REMAKE_ELF
#define CONFIG_SYS_MAXARGS 32
-#ifndef CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SYS_MALLOC_LEN (32 << 20)
-#endif
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_SDRAM_BASE 0
#define CONFIG_SYS_INIT_SP_ADDR 0x20000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */
/* ROM USB boot support, auto-execute boot.scr at scriptaddr */
diff --git a/include/configs/meson64_android.h b/include/configs/meson64_android.h
index 358e0a5..fb3ccc3 100644
--- a/include/configs/meson64_android.h
+++ b/include/configs/meson64_android.h
@@ -11,8 +11,6 @@
#include <linux/sizes.h>
-#define CONFIG_SYS_MALLOC_LEN SZ_128M
-
#ifndef BOOT_PARTITION
#define BOOT_PARTITION "boot"
#endif
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 59b20cf..e7882fb 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -24,8 +24,6 @@
/* setting reset address */
/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
-#define CONFIG_SYS_MALLOC_LEN 0xC0000
-
/* Stack location before relocation */
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_F_LEN)
@@ -55,8 +53,6 @@
#define CONFIG_SYS_CBSIZE 512
/* max number of command args */
#define CONFIG_SYS_MAXARGS 15
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR 0
#define CONFIG_HOSTNAME "microblaze-generic"
diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h
index 2499037..655c8d6 100644
--- a/include/configs/microchip_mpfs_icicle.h
+++ b/include/configs/microchip_mpfs_icicle.h
@@ -12,10 +12,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-
-#define CONFIG_SYS_MALLOC_LEN SZ_8M
-
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h
index 4d074a3..b05ac0a 100644
--- a/include/configs/mt7620.h
+++ b/include/configs/mt7620.h
@@ -13,11 +13,9 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN 0x100000
#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_LOAD_ADDR 0x80010000
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
@@ -30,9 +28,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* SPL */
-#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SPL_BSS_START_ADDR 0x80010000
diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h
index f015d10..97fcf2f 100644
--- a/include/configs/mt7622.h
+++ b/include/configs/mt7622.h
@@ -16,8 +16,6 @@
#define CONFIG_SYS_CBSIZE SZ_1K
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_4M
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Uboot definition */
@@ -27,10 +25,6 @@
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
GENERATED_GBL_DATA_SIZE)
-/* UBoot -> Kernel */
-#define CONFIG_LOADADDR 0x4007ff28
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* DRAM */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h
index 9895279..6023f81 100644
--- a/include/configs/mt7623.h
+++ b/include/configs/mt7623.h
@@ -12,9 +12,6 @@
#include <linux/sizes.h>
/* Miscellaneous configurable options */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_TAG
#define CONFIG_SYS_MAXARGS 8
#define CONFIG_SYS_BOOTM_LEN SZ_64M
@@ -22,8 +19,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_4M
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Environment */
@@ -32,10 +27,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
GENERATED_GBL_DATA_SIZE)
-/* UBoot -> Kernel */
-#define CONFIG_LOADADDR 0x84000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* MMC */
#define MMC_SUPPORTS_TUNING
diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h
index c6752f4..e53e6a0 100644
--- a/include/configs/mt7628.h
+++ b/include/configs/mt7628.h
@@ -13,11 +13,9 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN 0x100000
#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_LOAD_ADDR 0x80010000
#define CONFIG_SYS_INIT_SP_OFFSET 0x80000
@@ -27,7 +25,7 @@
#define CONFIG_SYS_CBSIZE 1024
/* Serial SPL */
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_CLK 40000000
#define CONFIG_SYS_NS16550_REG_SIZE -4
@@ -39,9 +37,6 @@
230400, 460800, 921600 }
/* SPL */
-#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SPL_BSS_START_ADDR 0x80010000
diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h
index 08a4d01..c58545b 100644
--- a/include/configs/mt7629.h
+++ b/include/configs/mt7629.h
@@ -12,9 +12,6 @@
#include <linux/sizes.h>
/* Miscellaneous configurable options */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_TAG
#define CONFIG_SYS_MAXARGS 8
#define CONFIG_SYS_BOOTM_LEN SZ_64M
@@ -22,8 +19,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_4M
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Environment */
@@ -43,8 +38,6 @@
/* UBoot -> Kernel */
#define CONFIG_SYS_SPL_ARGS_ADDR 0x40000000
-#define CONFIG_LOADADDR 0x42007f1c
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* DRAM */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h
index 8e7afbb..ebd2b32 100644
--- a/include/configs/mt8183.h
+++ b/include/configs/mt8183.h
@@ -11,9 +11,6 @@
#include <linux/sizes.h>
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN SZ_4M
-
#define CONFIG_CPU_ARMV8
#define COUNTER_FREQUENCY 13000000
diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h
index 7cd388f..8882a5a 100644
--- a/include/configs/mt8512.h
+++ b/include/configs/mt8512.h
@@ -17,10 +17,6 @@
#define COUNTER_FREQUENCY 13000000
-#define CONFIG_SYS_LOAD_ADDR 0x41000000
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
-
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* Uboot definition */
diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h
index a1c5d81..12840b8 100644
--- a/include/configs/mt8516.h
+++ b/include/configs/mt8516.h
@@ -11,9 +11,6 @@
#include <linux/sizes.h>
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN SZ_4M
-
#define CONFIG_CPU_ARMV8
#define COUNTER_FREQUENCY 13000000
diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h
index 4e32442..593c6a1 100644
--- a/include/configs/mt8518.h
+++ b/include/configs/mt8518.h
@@ -21,10 +21,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
-#define CONFIG_SYS_LOAD_ADDR 0x41000000
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
-
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* Uboot definition */
diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h
index 6036bf4..e460f69 100644
--- a/include/configs/mv-common.h
+++ b/include/configs/mv-common.h
@@ -50,26 +50,11 @@
/* auto boot */
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
-#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
-
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 4) /* 4MiB for malloc() */
-
-/*
* Other required minimal configurations
*/
-#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
diff --git a/include/configs/mv-plug-common.h b/include/configs/mv-plug-common.h
index 486650f..d38d987 100644
--- a/include/configs/mv-plug-common.h
+++ b/include/configs/mv-plug-common.h
@@ -11,7 +11,6 @@
* High Level Configuration Options (easy to change)
*/
#define CONFIG_KW88F6281 1 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
/*
* mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h
index c8c34d7..755f59e 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -25,26 +25,11 @@
4000000, 4500000, 5000000, 5500000, \
6000000 }
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_INITRD_TAG /* enable INITRD tag */
-#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
-
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
-
-/*
* Other required minimal configurations
*/
-#define CONFIG_SYS_LOAD_ADDR 0x06000000 /* default load adr */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
@@ -55,7 +40,6 @@
* I2C
*/
#define CONFIG_I2C_MV
-#define CONFIG_SYS_I2C_SLAVE 0x0
/*
* Environment
diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
index 493e3de..beecf18 100644
--- a/include/configs/mvebu_armada-8k.h
+++ b/include/configs/mvebu_armada-8k.h
@@ -19,26 +19,11 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
115200, 230400, 460800, 921600 }
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_INITRD_TAG /* enable INITRD tag */
-#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
-
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
-
-/*
* Other required minimal configurations
*/
-#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
index 2ee41ae..b0c78d3 100644
--- a/include/configs/mx23_olinuxino.h
+++ b/include/configs/mx23_olinuxino.h
@@ -5,9 +5,6 @@
#ifndef __CONFIGS_MX23_OLINUXINO_H__
#define __CONFIGS_MX23_OLINUXINO_H__
-/* System configurations */
-#define CONFIG_MACH_TYPE 4105
-
/* U-Boot Commands */
/* Memory configuration */
@@ -27,8 +24,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR 0x42000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h
index 3f13e60..1f40d98 100644
--- a/include/configs/mx23evk.h
+++ b/include/configs/mx23evk.h
@@ -8,9 +8,6 @@
#ifndef __CONFIGS_MX23EVK_H__
#define __CONFIGS_MX23EVK_H__
-/* System configurations */
-#define CONFIG_MACH_TYPE MACH_TYPE_MX23EVK
-
/* U-Boot Commands */
/* Memory configuration */
@@ -36,8 +33,6 @@
/* Boot Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR 0x42000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Extra Environments */
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 21f3277..10292c8 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -10,9 +10,6 @@
#ifndef __CONFIGS_MX28EVK_H__
#define __CONFIGS_MX28EVK_H__
-/* System configurations */
-#define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
-
/* Memory configuration */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
@@ -50,8 +47,6 @@
/* Boot Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR 0x42000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 3574d65..9cc297d 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -16,17 +16,6 @@
#include <asm/arch/imx-regs.h>
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-#define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-
/*
* Hardware drivers
*/
@@ -35,7 +24,6 @@
#define CONFIG_MXC_UART_BASE UART1_BASE
/* PMIC Controller */
-#define CONFIG_POWER
#define CONFIG_POWER_SPI
#define CONFIG_POWER_FSL
#define CONFIG_FSL_PMIC_BUS 0
@@ -61,8 +49,6 @@
#define CONFIG_ETHPRIME "FEC0"
-#define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
@@ -140,8 +126,6 @@
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h
index 93158fb..f03e425 100644
--- a/include/configs/mx53cx9020.h
+++ b/include/configs/mx53cx9020.h
@@ -14,17 +14,8 @@
#include <asm/arch/imx-regs.h>
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
#define CONFIG_SYS_FSL_CLK
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
-
-#define CONFIG_REVISION_TAG
-
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_FPGA_COUNT 1
@@ -43,8 +34,6 @@
/* Command definition */
-#define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
@@ -72,8 +61,6 @@
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Physical Memory Map */
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index e69130d..b026c6f 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -9,21 +9,10 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO
-
#include <asm/arch/imx-regs.h>
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
#define CONFIG_SYS_FSL_CLK
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-
-#define CONFIG_REVISION_TAG
-
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
@@ -35,16 +24,7 @@
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
-/* I2C Configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-
/* PMIC Controller */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_DIALOG_POWER
#define CONFIG_POWER_FSL
#define CONFIG_POWER_FSL_MC13892
@@ -56,8 +36,6 @@
#define CONFIG_ETHPRIME "FEC0"
-#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
@@ -132,8 +110,6 @@
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Physical Memory Map */
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index b1e6a56..b623242 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -11,17 +11,8 @@
#include <asm/arch/imx-regs.h>
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
#define CONFIG_SYS_FSL_CLK
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-
-#define CONFIG_REVISION_TAG
-
/* USB Configs */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
@@ -33,8 +24,6 @@
/* Command definition */
-#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
-
#define PPD_CONFIG_NFS \
"nfsserver=192.168.252.95\0" \
"gatewayip=192.168.252.95\0" \
@@ -102,11 +91,11 @@
"video-mode=" \
"lcd:800x480-24@60,monitor=lcd\0" \
-#define CONFIG_MMCBOOTCOMMAND \
+#define MMCBOOTCOMMAND \
"run doquiet; " \
"run tryboot; " \
-#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND MMCBOOTCOMMAND
#define CONFIG_ARP_TIMEOUT 200UL
@@ -116,8 +105,6 @@
#define CONFIG_SYS_MAXARGS 48 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
/* Physical Memory Map */
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index a4504ee..5c0b729 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -33,22 +33,6 @@
#define CONFIG_SYS_FSL_CLK
-/* ATAGs */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-/* Boot options */
-#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
- defined(CONFIG_MX6SX) || \
- defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
-#define CONFIG_LOADADDR 0x82000000
-#else
-#define CONFIG_LOADADDR 0x12000000
-#endif
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 32
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 9e5083b..da25336 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -13,8 +13,6 @@
#include "imx6_spl.h"
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
@@ -46,9 +44,9 @@
"fdtfile=undefined\0" \
"fdt_addr_r=0x18000000\0" \
"fdt_addr=0x18000000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x13000000\0" \
"ramdiskaddr=0x13000000\0" \
"initrd_high=0xffffffff\0" \
diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h
index 120297d..42d5e24 100644
--- a/include/configs/mx6memcal.h
+++ b/include/configs/mx6memcal.h
@@ -13,8 +13,6 @@
#include "mx6_common.h"
#include "imx6_spl.h"
-#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
-
#ifdef CONFIG_SERIAL_CONSOLE_UART1
#if defined(CONFIG_MX6SL)
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index ac579f3..51f6b3a 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -12,9 +12,6 @@
#include "mx6_common.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
@@ -52,7 +49,7 @@
"dfu_alt_info=spl raw 0x400\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
"mmcpart=1\0" \
"finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h
index 626dbd5..5cd51a4 100644
--- a/include/configs/mx6sabreauto.h
+++ b/include/configs/mx6sabreauto.h
@@ -12,7 +12,6 @@
#include "imx6_spl.h"
#endif
-#define CONFIG_MACH_TYPE 3529
#define CONFIG_MXC_UART_BASE UART4_BASE
#define CONSOLE_DEV "ttymxc3"
@@ -50,14 +49,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
-/* I2C Configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
@@ -67,8 +58,6 @@
/* DMA stuff, needed for GPMI/MXS NAND support */
/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 9546887..9a9f588 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -12,7 +12,6 @@
#include "imx6_spl.h"
#endif
-#define CONFIG_MACH_TYPE 3980
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONSOLE_DEV "ttymxc0"
@@ -37,17 +36,7 @@
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif
-/* I2C Configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index ab32f4e..e8fd212 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -14,23 +14,11 @@
#include "imx6_spl.h"
#endif
-#define CONFIG_MACH_TYPE MACH_TYPE_MX6SL_EVK
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
-/* I2C Configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h
index a38ce4d..f2bddd1 100644
--- a/include/configs/mx6sllevk.h
+++ b/include/configs/mx6sllevk.h
@@ -10,20 +10,8 @@
#include "mx6_common.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
-/* I2C Configs */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-#endif
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"epdc_waveform=epdc_splash.bin\0" \
"script=boot.scr\0" \
diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h
index 58cc3f0..62b8de3 100644
--- a/include/configs/mx6sxsabreauto.h
+++ b/include/configs/mx6sxsabreauto.h
@@ -10,9 +10,6 @@
#include "mx6_common.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -106,13 +103,6 @@
/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
-/* I2C Configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 036881f..1237dde 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -16,9 +16,6 @@
#include "imx6_spl.h"
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
#ifdef CONFIG_IMX_BOOTAUX
@@ -140,13 +137,6 @@
/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
-/* I2C Configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* Network */
#define CONFIG_FEC_MXC
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index 7d36c1e..ff2ad09 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -18,9 +18,6 @@
/* SPL options */
#include "imx6_spl.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
@@ -34,14 +31,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
#endif
-#endif
-
-/* I2C configs */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_SPEED 100000
#endif
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
@@ -56,7 +45,7 @@
"fdt_addr=0x83000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
@@ -135,7 +124,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h
index 23f6de9..247d5e1 100644
--- a/include/configs/mx6ullevk.h
+++ b/include/configs/mx6ullevk.h
@@ -16,9 +16,6 @@
#define PHYS_SDRAM_SIZE SZ_512M
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
@@ -33,14 +30,6 @@
#endif
#endif
-/* I2C configs */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_SPEED 100000
-#endif
-
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -132,7 +121,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index 3d87690..eeb535e 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -28,8 +28,6 @@
/* Enable iomux-lpsr support */
#define CONFIG_IOMUX_LPSR
-#define CONFIG_LOADADDR 0x80800000
-
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 32
@@ -49,10 +47,5 @@
* launched by OPTEE, because of that we shall skip all the low level
* initialization since it was already done by ATF or OPTEE
*/
-#if (CONFIG_OPTEE_TZDRAM_SIZE != 0)
-#ifndef CONFIG_OPTEE
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-#endif
#endif
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 5801da0..42b729b 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -14,16 +14,9 @@
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-
/* MMC Config*/
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-/* I2C configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_SPEED 100000
-
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#ifdef CONFIG_IMX_BOOTAUX
@@ -79,11 +72,11 @@
"fdtfile=imx7d-sdb.dtb\0" \
"fdt_addr=0x83000000\0" \
"fdt_addr_r=0x83000000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x83100000\0" \
"ramdiskaddr=0x83100000\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
BOOTENV
@@ -94,7 +87,6 @@
#include <config_distro_bootcmd.h>
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h
index 28672c4..48172de 100644
--- a/include/configs/mx7ulp_com.h
+++ b/include/configs/mx7ulp_com.h
@@ -32,13 +32,6 @@
#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1MHz from TSTMR */
-#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
-
/* UART */
#define LPUART_BASE LPUART4_RBASE
@@ -47,8 +40,6 @@
#define PHYS_SDRAM 0x60000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_LOADADDR 0x60800000
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"image=zImage\0" \
"console=ttyLP0\0" \
@@ -74,8 +65,6 @@
"run mmcboot; " \
"fi; " \
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h
index 0c31030..567a037 100644
--- a/include/configs/mx7ulp_evk.h
+++ b/include/configs/mx7ulp_evk.h
@@ -22,19 +22,9 @@
#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */
-#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-/*#define CONFIG_REVISION_TAG*/
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
-
/* UART */
#define LPUART_BASE LPUART4_RBASE
-#define CONFIG_SYS_CACHELINE_SIZE 64
-
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 512
@@ -47,8 +37,6 @@
#define PHYS_SDRAM_SIZE SZ_1G
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_LOADADDR 0x60800000
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
@@ -125,7 +113,6 @@
"fi"
#define CONFIG_SYS_HZ 1000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 325c3ee..64f017a 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -50,7 +50,6 @@
#endif
/* Memory sizes */
-#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
/* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
@@ -85,10 +84,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
-/* Booting Linux */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-
/*
* Drivers
*/
diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h
index 5ef16fb..04c9879 100644
--- a/include/configs/mys_6ulx.h
+++ b/include/configs/mys_6ulx.h
@@ -15,16 +15,12 @@
#define CONFIG_SYS_FSL_USDHC_NUM 1
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
/* Console configs */
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/nas220.h b/include/configs/nas220.h
index 1fd5471..be02220 100644
--- a/include/configs/nas220.h
+++ b/include/configs/nas220.h
@@ -12,16 +12,10 @@
#define _CONFIG_NAS220_H
/*
- * Machine type ID
- */
-#define CONFIG_MACH_TYPE MACH_TYPE_RD88F6192_NAS
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 /* #define CPU Core subversion */
#define CONFIG_KW88F6192 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
/* power-on led, regulator, sata0, sata1 */
#define NAS220_GE_OE_VAL_LOW ((1 << 12)|(1 << 14)|(1 << 24)|(1 << 28))
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index 0c40750..cd53c49 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -11,22 +11,11 @@
#include "mx6_common.h"
-#define CONFIG_MACH_TYPE 3769
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-
#define CONFIG_USBD_HS
#define CONFIG_MXC_UART_BASE UART2_BASE
/* I2C Configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_EDID
/* MMC Configs */
@@ -90,14 +79,6 @@
#define DISTRO_BOOT_DEV_DHCP(func)
#endif
-
-#if defined(CONFIG_SABRELITE)
-#define FDTFILE "fdtfile=imx6q-sabrelite.dtb\0"
-#else
-/* FIXME: nitrogen6x covers multiple configs. Define fdtfile for each supported config. */
-#define FDTFILE
-#endif
-
#define BOOT_TARGET_DEVICES(func) \
DISTRO_BOOT_DEV_MMC(func) \
DISTRO_BOOT_DEV_SATA(func) \
@@ -113,10 +94,10 @@
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"fdt_addr_r=0x18000000\0" \
- FDTFILE \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "fdtfile=" __stringify(CONFIG_DEFAULT_DEVICE_TREE) ".dtb\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x13000000\0" \
"ramdiskaddr=0x13000000\0" \
"ip_dyn=yes\0" \
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index 7ef25ea..b37e054 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -23,8 +23,6 @@
*/
#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
-#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
-
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap.h>
#include <asm/arch/mem.h>
@@ -34,19 +32,7 @@
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
-#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
-
-#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
-#define CONFIG_INITRD_TAG /* enable passing initrd */
-#define CONFIG_REVISION_TAG /* enable passing revision tag*/
-#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
-
-/*
- * Size of malloc() pool
- */
#define CONFIG_UBI_SIZE (512 << 10)
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
- (128 << 10))
/*
* Hardware drivers
@@ -188,9 +174,6 @@
"run attachboot;" \
"echo"
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
-
/*
* OMAP3 has 12 GP timers, they can be driven by the system clock
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 3876412..46c5301 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -41,8 +41,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
-
/* SPL */
#include "imx6_spl.h" /* common IMX6 SPL configuration */
@@ -52,20 +50,10 @@
#endif
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_SPD_BUS_NUM 0
/* I2C EEPROM */
-#ifdef CONFIG_CMD_EEPROM
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#define CONFIG_SYS_I2C_EEPROM_BUS 2
-#endif
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
@@ -80,8 +68,6 @@
#endif
/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
@@ -115,9 +101,9 @@
"bootdev=/dev/mmcblk0p1\0" \
"rootdev=/dev/mmcblk0p2\0" \
"netdev=eth0\0" \
- "kernel_addr_r="__stringify(CONFIG_LOADADDR)"\0" \
- "pxefile_addr_r="__stringify(CONFIG_LOADADDR)"\0" \
- "scriptaddr="__stringify(CONFIG_LOADADDR)"\0" \
+ "kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \
+ "pxefile_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \
+ "scriptaddr="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \
"ramdisk_addr_r=0x28000000\0" \
"fdt_addr_r=0x18000000\0" \
"fdtfile=imx6q-novena.dtb\0" \
diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h
index 3be9b8f..70e2898 100644
--- a/include/configs/npi_imx6ull.h
+++ b/include/configs/npi_imx6ull.h
@@ -15,9 +15,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 1
-/* Size of malloc() poll */
-#define CONFIG_SYS_MALLOC_LEN SZ_2M
-
/* Console configs */
#define CONFIG_MXC_UART_BASE UART1_BASE
@@ -26,7 +23,6 @@
#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h
index 23cf94e..950549c 100644
--- a/include/configs/nsa310s.h
+++ b/include/configs/nsa310s.h
@@ -13,7 +13,6 @@
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6192 1 /* SOC Name */
#define CONFIG_KW88F6702 1 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#include "mv-common.h"
diff --git a/include/configs/nsim.h b/include/configs/nsim.h
index 61217bb..62169af 100644
--- a/include/configs/nsim.h
+++ b/include/configs/nsim.h
@@ -20,15 +20,12 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN SZ_2M
#define CONFIG_SYS_BOOTM_LEN SZ_32M
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
/*
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
* Console configuration
diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h
index 394fb15..3584d9a 100644
--- a/include/configs/nyan-big.h
+++ b/include/configs/nyan-big.h
@@ -26,9 +26,6 @@
/* SPI */
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
-#undef CONFIG_LOADADDR
-#define CONFIG_LOADADDR 0x82408000
-
#include "tegra-common-usb-gadget.h"
#include "tegra-common-post.h"
diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h
index b9746b9..72515a3 100644
--- a/include/configs/o4-imx6ull-nano.h
+++ b/include/configs/o4-imx6ull-nano.h
@@ -6,7 +6,6 @@
#include "mx6_common.h"
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
diff --git a/include/configs/octeon_common.h b/include/configs/octeon_common.h
index 109ef40..23bb4f6 100644
--- a/include/configs/octeon_common.h
+++ b/include/configs/octeon_common.h
@@ -8,19 +8,15 @@
#define __OCTEON_COMMON_H__
#if defined(CONFIG_RAM_OCTEON)
-#define CONFIG_SYS_MALLOC_LEN (16 << 20)
#define CONFIG_SYS_INIT_SP_OFFSET 0x20100000
#else
/* No DDR init -> run in L2 cache with limited resources */
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET 0x00180000
#endif
#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + (1 << 20))
-
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#endif /* __OCTEON_COMMON_H__ */
diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h
index 2800896..5e1c007 100644
--- a/include/configs/octeontx2_common.h
+++ b/include/configs/octeontx2_common.h
@@ -18,11 +18,6 @@
/** Stack starting address */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xffff0)
-/** Heap size for U-Boot */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 64 * 1024 * 1024)
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
-
#define CONFIG_LAST_STAGE_INIT
/* Allow environment variable to be overwritten */
diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h
index 0e4a176..3ceedef 100644
--- a/include/configs/octeontx_common.h
+++ b/include/configs/octeontx_common.h
@@ -44,9 +44,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xffff0)
/** Heap size for U-Boot */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 64 * 1024 * 1024)
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
/* Allow environment variable to be overwritten */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 1367d13..281922a 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -19,8 +19,6 @@
#define CONFIG_SYS_PL310_BASE 0x10502000
#endif
-#define CONFIG_MACH_TYPE 4289
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
@@ -28,9 +26,6 @@
#define CONFIG_SYS_MEM_TOP_HIDE (1UL << 20UL)
#define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE
-/* memtest works on */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-
#include <linux/sizes.h>
#define CONFIG_BOOTCOMMAND "run distro_bootcmd ; run autoboot"
@@ -174,6 +169,4 @@
*/
#define CONFIG_MISC_COMMON
-#undef CONFIG_REVISION_TAG
-
#endif /* __CONFIG_H */
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index fc70dc6..70481b5 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -75,7 +75,6 @@
/* Set soc_rev, soc_id, board_rev, board_name, fdtfile */
#define CONFIG_ODROID_REV_AIN 9
-#define CONFIG_REVISION_TAG
/*
* Need to override existing one (smdk5420) with odroid so set_board_info will
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 6563335..265b1e2 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -18,11 +18,6 @@
* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
*/
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
/* NAND */
#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FLASH_BASE NAND_BASE
@@ -46,9 +41,6 @@
#endif /* CONFIG_SPL_OS_BOOT */
#endif /* CONFIG_MTD_RAW_NAND */
-/* USB EHCI */
-#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
-
/* Enable Multi Bus support for I2C */
#define CONFIG_I2C_MULTI_BUS
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 2ce3c86..b12e3a4 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -23,11 +23,6 @@
* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
*/
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
/* NAND */
#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FLASH_BASE NAND_BASE
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 8dc30be..0fee2ed 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -16,8 +16,6 @@
* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
*/
-#define CONFIG_REVISION_TAG 1
-
/* TPS65950 */
#define PBIASLITEVMODE1 (1 << 8)
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index dd0ea2d..cac35ef 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -14,29 +14,6 @@
#include <configs/ti_omap3_common.h>
-/*
- * We are only ever GP parts and will utilize all of the "downloaded image"
- * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
- * order to allow for BCH8 to fit in.
- */
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-/* Hardware drivers */
-
-/* I2C */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
-
-#ifdef CONFIG_SPL_BUILD
-#undef CONFIG_USB_EHCI_OMAP
-#endif
-#ifdef CONFIG_USB_EHCI_OMAP
-#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 4
-#endif
-
/* Board NAND Info. */
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index 14eb363..69749ab 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -11,22 +11,6 @@
#ifndef __CONFIG_PANDA_H
#define __CONFIG_PANDA_H
-/*
- * High Level Configuration Options
- */
-
-/* USB UHH support options */
-#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
-#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
-
-/* USB Networking options */
-
-#define CONFIG_UBOOT_ENABLE_PADS_ALL
-
#include <configs/ti_omap4_common.h>
-/* GPIO */
-
-/* ENV related config options */
-
#endif /* __CONFIG_PANDA_H */
diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h
index 462aa4a..fb210ce 100644
--- a/include/configs/omap4_sdp4430.h
+++ b/include/configs/omap4_sdp4430.h
@@ -15,7 +15,6 @@
/*
* High Level Configuration Options
*/
-#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_4430SDP
#include <configs/ti_omap4_common.h>
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index a1f1daf..188ab0b 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -43,9 +43,6 @@
/* USB UHH support options */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
-#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 79
-
/* Enabled commands */
/* USB Networking options */
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index a37359e..d20c9e2 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -17,18 +17,15 @@
/*
* SoC Configuration
*/
-#define CONFIG_MACH_OMAPL138_LCDK
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
#define CONFIG_SYS_HZ 1000
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
/*
* Memory Info
*/
-#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
@@ -161,7 +158,6 @@
#define CONFIG_BOOTFILE "zImage" /* Boot file name */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
/*
* USB Configs
@@ -173,9 +169,6 @@
* Linux Information
*/
#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTCOMMAND \
"run envboot; " \
"run mmcboot; "
diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h
index 42c64f3..a24b134 100644
--- a/include/configs/openpiton-riscv64.h
+++ b/include/configs/openpiton-riscv64.h
@@ -16,8 +16,6 @@
/* Environment options */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32M)
-#define CONFIG_SYS_LOAD_ADDR 0x87000000
-#define CONFIG_SYS_MALLOC_LEN SZ_256M
#define CONFIG_SYS_BOOTM_LEN SZ_256M
#ifdef CONFIG_SPL
diff --git a/include/configs/openrd.h b/include/configs/openrd.h
index 03b9393..56bfe87 100644
--- a/include/configs/openrd.h
+++ b/include/configs/openrd.h
@@ -18,7 +18,6 @@
*/
#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#include "mv-common.h"
diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h
index 2fb1634..33bc30e 100644
--- a/include/configs/opos6uldev.h
+++ b/include/configs/opos6uldev.h
@@ -18,9 +18,6 @@
#endif
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 << 20)
-
/* Miscellaneous configurable options */
#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
@@ -78,7 +75,7 @@
"mmcrootfstype=ext4 rootwait\0" \
"kernelimg=" __stringify(CONFIG_BOARD_NAME) "-linux.bin\0" \
"splashpos=0,0\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"videomode=video=ctfb:x:800,y:480,depth:18,pclk:33033,le:96,ri:96,up:20,lo:21,hs:64,vs:4,sync:0,vmode:0\0" \
"check_env=if test -n ${flash_env_version}; " \
"then env default env_version; " \
diff --git a/include/configs/origen.h b/include/configs/origen.h
index 8a0e145..881df2d 100644
--- a/include/configs/origen.h
+++ b/include/configs/origen.h
@@ -19,11 +19,6 @@
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
-/* memtest works on */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-
-#define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
-
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
#define CONFIG_SYS_MONITOR_BASE 0x00000000
diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h
index 4ef9e8e..9645321 100644
--- a/include/configs/owl-common.h
+++ b/include/configs/owl-common.h
@@ -16,10 +16,7 @@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY (24000000) /* 24MHz */
-#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
-
/* Some commands use this as the default load address */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7ffc0)
/*
* This is the initial SP which is used only briefly for relocating the u-boot
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 54c82b4..49dbbf0 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -157,7 +157,6 @@
#else
#define CONFIG_SYS_CLK_FREQ 66666666
#endif
-#define CONFIG_DDR_CLK_FREQ 66666666
#define CONFIG_HWCONFIG
/*
@@ -179,7 +178,6 @@
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS 0x52
@@ -346,7 +344,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)/* Reserved for malloc */
#define CONFIG_SYS_CPLD_BASE 0xffa00000
#ifdef CONFIG_PHYS_64BIT
@@ -464,36 +461,20 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
#endif
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
#define CONFIG_SYS_SPD_BUS_NUM 1 /* For rom_loc and flash bank */
/*
* I2C2 EEPROM
*/
-#undef CONFIG_ID_EEPROM
#define CONFIG_RTC_PT7C4338
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#define CONFIG_SYS_I2C_PCA9557_ADDR 0x18
/* enable read and write access to EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#if defined(CONFIG_PCI)
/*
@@ -607,7 +588,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -629,9 +609,6 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
-
#ifdef __SW_BOOT_NOR
#define __NOR_RST_CMD \
norboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NOR 1; \
@@ -691,7 +668,7 @@
__stringify(__NAND_RST_CMD)"\0" \
__stringify(__PCIE_RST_CMD)"\0"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -700,7 +677,7 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
-#define CONFIG_HDBOOT \
+#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw rootdelay=30 " \
"console=$consoledev,$baudrate $othbootargs;" \
"usb start;" \
@@ -733,7 +710,7 @@
"console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;" \
"bootm $norbootaddr - $norfdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs " \
"ramdisk_size=$ramdisk_size;" \
@@ -742,6 +719,6 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_HDBOOT
+#define CONFIG_BOOTCOMMAND HDBOOT
#endif /* __CONFIG_H */
diff --git a/include/configs/paz00.h b/include/configs/paz00.h
index 7a09ac0..c12f4d0 100644
--- a/include/configs/paz00.h
+++ b/include/configs/paz00.h
@@ -19,8 +19,6 @@
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_PAZ00
-
/* Environment in eMMC, at the end of 2nd "boot sector" */
#include "tegra-common-post.h"
diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h
index 4f4d501..f29f6dc 100644
--- a/include/configs/pcl063.h
+++ b/include/configs/pcl063.h
@@ -24,9 +24,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 1
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
/* Console configs */
#define CONFIG_MXC_UART_BASE UART1_BASE
@@ -36,7 +33,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h
index 6009521..c1da1a0 100644
--- a/include/configs/pcl063_ull.h
+++ b/include/configs/pcl063_ull.h
@@ -18,9 +18,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
/* Environment settings */
/* Environment in SD */
@@ -36,14 +33,9 @@
#define CONFIG_SUPPORT_EMMC_BOOT
/* I2C configs */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_SPEED 100000
-#endif
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 960ff98..5b2e084 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -12,21 +12,11 @@
#include <linux/sizes.h>
#include <linux/stringify.h>
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
-/* Enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M)
-
/* NAND support */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_LOADADDR 0x82000000
-
/* We boot from the gfxRAM area of the OCRAM. */
#define CONFIG_BOARD_SIZE_LIMIT 520192
@@ -139,8 +129,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Physical memory map */
#define PHYS_SDRAM (0x80000000)
#define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * SZ_1M)
diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h
index bc48e80..3ca0377 100644
--- a/include/configs/pcm058.h
+++ b/include/configs/pcm058.h
@@ -14,9 +14,6 @@
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
-
/* Enable NAND support */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_ONFI_DETECTION
diff --git a/include/configs/pdu001.h b/include/configs/pdu001.h
index 53342ce..3d18747 100644
--- a/include/configs/pdu001.h
+++ b/include/configs/pdu001.h
@@ -14,9 +14,6 @@
/* Using 32K of volatile storage for environment */
-#define MACH_TYPE_PDU001 5075
-#define CONFIG_MACH_TYPE MACH_TYPE_PDU001
-
/* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h
index 4a347fe..4925fcc 100644
--- a/include/configs/phycore_am335x_r2.h
+++ b/include/configs/phycore_am335x_r2.h
@@ -14,8 +14,6 @@
#include <configs/ti_am335x_common.h>
-#define CONFIG_MACH_TYPE MACH_TYPE_SBC_PHYCORE_AM335X
-
#ifdef CONFIG_MTD_RAW_NAND
#define NANDARGS \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h
index fd69dc4..8d1fd15 100644
--- a/include/configs/phycore_imx8mm.h
+++ b/include/configs/phycore_imx8mm.h
@@ -82,8 +82,6 @@
"fi;"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
@@ -94,8 +92,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM SZ_1G
@@ -117,9 +113,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-/* I2C */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* ENET1 */
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index 58ead45..874c94e 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -29,12 +29,8 @@
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PCA9450
-#define CONFIG_SYS_I2C_LEGACY
-
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -84,8 +80,6 @@
"fi;"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
@@ -96,8 +90,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
@@ -117,7 +109,4 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-/* I2C */
-#define CONFIG_SYS_I2C_SPEED 100000
-
#endif /* __PHYCORE_IMX8MP_H */
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index d50edc7..a83e49f 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -28,13 +28,11 @@
/* SDRAM Configuration (for final code, data, stack, heap) */
#define CONFIG_SYS_SDRAM_BASE 0x88000000
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN (4 << 10)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
-#define CONFIG_SYS_LOAD_ADDR 0x88500000 /* default load address */
#define CONFIG_SYS_ENV_ADDR 0x88300000
#define CONFIG_SYS_FDT_ADDR 0x89d00000
diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h
index 6199f0d..4e72caa 100644
--- a/include/configs/pico-imx6.h
+++ b/include/configs/pico-imx6.h
@@ -24,9 +24,6 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */
-
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configuration */
@@ -94,11 +91,11 @@
"run base_boot;" \
"fi; \0" \
"base_boot=run findfdt; run finduuid; run distro_bootcmd\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x13000000\0" \
"ramdiskaddr=0x13000000\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
BOOTENV
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index 04a2531..7e36cee 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -33,9 +33,6 @@
#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_FEC_XCV_TYPE RMII
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */
-
#define CONFIG_MXC_UART_BASE UART6_BASE_ADDR
/* MMC Configs */
@@ -82,11 +79,11 @@
BOOTMENU_ENV \
"fdt_addr=0x83000000\0" \
"fdt_addr_r=0x83000000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x83000000\0" \
"ramdiskaddr=0x83000000\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"mmcautodetect=yes\0" \
CONFIG_DFU_ENV_SETTINGS \
"findfdt=" \
@@ -111,7 +108,6 @@
#include <config_distro_bootcmd.h>
#include <linux/stringify.h>
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
@@ -126,10 +122,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/* I2C configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* environment organization */
/* Environment starts at 768k = 768 * 1024 = 786432 */
/*
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index f5d2c23..36c5792 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -24,9 +24,6 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR
/* MMC Config */
@@ -74,7 +71,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"image=zImage\0" \
"splashpos=m,m\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"console=ttymxc4\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
@@ -82,11 +79,11 @@
"videomode=video=ctfb:x:800,y:480,depth:24,mode:0,pclk:30000,le:46,ri:210,up:22,lo:23,hs:20,vs:10,sync:0,vmode:0\0" \
"fdt_addr=0x83000000\0" \
"fdt_addr_r=0x83000000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x83000000\0" \
"ramdiskaddr=0x83000000\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
CONFIG_DFU_ENV_SETTINGS \
"findfdt=" \
"if test $fdtfile = ask ; then " \
@@ -110,7 +107,6 @@
#include <config_distro_bootcmd.h>
#include <linux/stringify.h>
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
@@ -125,18 +121,7 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/* I2C configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-#define CONFIG_SYS_I2C_MXC_I2C4
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE3000
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h
index 89b3d27..d858a7e 100644
--- a/include/configs/pico-imx8mq.h
+++ b/include/configs/pico-imx8mq.h
@@ -25,7 +25,7 @@
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO
-#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC
#define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
@@ -38,17 +38,6 @@
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#undef CONFIG_DM_MMC
-#undef CONFIG_DM_PMIC
-
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#endif
#define CONFIG_REMAKE_ELF
@@ -121,9 +110,6 @@
"else booti ${loadaddr} - ${fdt_addr}; fi"
/* Link Definitions */
-#define CONFIG_LOADADDR 0x40480000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
@@ -134,9 +120,6 @@
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */
@@ -163,15 +146,8 @@
#define CONFIG_MXC_GPIO
-/* I2C Configs */
-#define CONFIG_SYS_I2C_SPEED 100000
-
#define CONFIG_OF_SYSTEM_SETUP
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_DM_PMIC
-#endif
-
#define CONFIG_SYS_BOOTM_LEN SZ_128M
#endif
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 382d19a..d530107 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -25,10 +25,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
-#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261"
-
-#define CONFIG_MACH_TYPE MACH_TYPE_PM9261
-
/* clocks */
/* CKGR_MOR - enable main osc. */
#define CONFIG_SYS_MOR_VAL \
@@ -128,12 +124,6 @@
AT91_WDT_MR_WDDIS | \
AT91_WDT_MR_WDD(0xfff))
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-#undef CONFIG_SKIP_LOWLEVEL_INIT
-
/*
* Hardware drivers
*/
@@ -182,8 +172,6 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_SYS_LOAD_ADDR 0x22000000
-
#undef CONFIG_SYS_USE_DATAFLASH_CS0
#undef CONFIG_SYS_USE_NANDFLASH
#define CONFIG_SYS_USE_FLASH 1
@@ -233,12 +221,6 @@
#error "Undefined memory device"
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN \
- ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
-
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \
GENERATED_GBL_DATA_SIZE)
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index e825270..c13f8de 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -25,10 +25,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
-#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9263"
-
-#define CONFIG_MACH_TYPE MACH_TYPE_PM9263
-
/* clocks */
#define CONFIG_SYS_MOR_VAL \
(AT91_PMC_MOR_MOSCEN | \
@@ -140,11 +136,6 @@
AT91_WDT_MR_WDDIS | \
AT91_WDT_MR_WDD(0xfff))
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-#undef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_USER_LOWLEVEL_INIT 1
/*
@@ -213,8 +204,6 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#define CONFIG_SYS_USE_FLASH 1
#undef CONFIG_SYS_USE_DATAFLASH
#undef CONFIG_SYS_USE_NANDFLASH
@@ -266,11 +255,6 @@
#error "Undefined memory device"
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
-
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \
GENERATED_GBL_DATA_SIZE)
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index 452fbda..c22f698 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -19,11 +19,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
@@ -57,8 +52,6 @@
#define CONFIG_RESET_PHY_R
#define CONFIG_AT91_WANTS_COMMON_PHY
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#ifdef CONFIG_NAND_BOOT
/* bootstrap + u-boot + env in nandflash */
@@ -73,12 +66,6 @@
"bootz 0x72000000 - 0x71000000"
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
- 128 * 1024, 0x1000)
-
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE 0x010000
#define CONFIG_SPL_STACK 0x310000
diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h
index cbe5022..f49bcfb 100644
--- a/include/configs/pogo_e02.h
+++ b/include/configs/pogo_e02.h
@@ -13,16 +13,10 @@
#define _CONFIG_POGO_E02_H
/*
- * Machine type definition and ID
- */
-#define CONFIG_MACH_TYPE MACH_TYPE_POGO_E02
-
-/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
#define CONFIG_KW88F6281 /* SOC Name */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#include "mv-common.h"
diff --git a/include/configs/poplar.h b/include/configs/poplar.h
index 9763218..222a14b 100644
--- a/include/configs/poplar.h
+++ b/include/configs/poplar.h
@@ -18,8 +18,6 @@
/* SYS */
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_SYS_INIT_SP_ADDR 0x200000
-#define CONFIG_SYS_LOAD_ADDR 0x800000
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
/* ATF bl33.bin load address (must match) */
diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h
index 3f92621..8606eb1 100644
--- a/include/configs/presidio_asic.h
+++ b/include/configs/presidio_asic.h
@@ -23,13 +23,9 @@
/* note: arch/arm/cpu/armv8/start.S which references GICD_BASE/GICC_BASE
* does not yet support DT. Thus define it here.
*/
-#define CONFIG_GICV2
#define GICD_BASE 0xf7011000
#define GICC_BASE 0xf7012000
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
-
#define CONFIG_SYS_TIMER_BASE 0xf4321000
/* Use external clock source */
@@ -48,7 +44,6 @@
#define CONFIG_BOOTP_BOOTFILESIZE
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (DDR_BASE + 0x10000000)
#define CONFIG_LAST_STAGE_INIT
/* SDRAM Bank #1 */
diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index f52ea01..23de326 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -10,6 +10,4 @@
#define SDRAM_BANK_SIZE (2UL << 30)
-#define CONFIG_SERIAL_TAG
-
#endif
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 76d6ab1..0992387 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -9,7 +9,6 @@
#include "rockchip-common.h"
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_NS16550_MEM32
@@ -20,7 +19,6 @@
#define CONFIG_IRAM_BASE 0xff020000
#define CONFIG_SYS_INIT_SP_ADDR 0x00400000
-#define CONFIG_SYS_LOAD_ADDR 0x00800800
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SPL_MAX_SIZE 0x20000
#define CONFIG_SPL_BSS_START_ADDR 0x4000000
diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h
index 4673390..a333326 100644
--- a/include/configs/pxm2.h
+++ b/include/configs/pxm2.h
@@ -13,8 +13,6 @@
#ifndef __CONFIG_PXM2_H
#define __CONFIG_PXM2_H
-#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_PXM2
-
#include "siemens-am33x-common.h"
#define DDR_IOCTRL_VAL 0x18b
@@ -32,10 +30,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 1GB */
-/* I2C Configuration */
-#define CONFIG_SYS_I2C_SPEED 400000
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-
#define CONFIG_FACTORYSET
#ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h
index 273fa1a..bb4240a 100644
--- a/include/configs/qemu-arm.h
+++ b/include/configs/qemu-arm.h
@@ -14,8 +14,6 @@
/* The DTB generated by QEMU is placed at start of RAM, stay away from there */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-#define CONFIG_SYS_MALLOC_LEN SZ_16M
#define CONFIG_SYS_BOOTM_LEN SZ_64M
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index b2e1204..f79e0fe 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -69,7 +69,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
#define CONFIG_LBA48
@@ -85,7 +84,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -102,9 +100,6 @@
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
-
#define CONFIG_BOOTCOMMAND \
"test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdtcontroladdr\0"
diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
index bbeea96..ae57f68 100644
--- a/include/configs/qemu-riscv.h
+++ b/include/configs/qemu-riscv.h
@@ -21,10 +21,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-
-#define CONFIG_SYS_MALLOC_LEN SZ_8M
-
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 61b6fb4..36930fa 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -15,12 +15,9 @@
#define CONFIG_SYS_PBSIZE 256
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
/* Address of u-boot image in Flash */
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
-/* Size of DRAM reserved for malloc() use */
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
/*
diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h
index 7f12844..de8ea8b 100644
--- a/include/configs/rastaban.h
+++ b/include/configs/rastaban.h
@@ -34,10 +34,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
-/* I2C Configuration */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define EEPROM_ADDR_DDR3 0x90
#define EEPROM_ADDR_CHIP 0x120
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index f94e9d8..595482c 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -10,10 +10,6 @@
#include <asm/arch/rmobile.h>
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
#ifdef CONFIG_SPL
#define CONFIG_SPL_TARGET "spl/u-boot-spl.srec"
#endif
@@ -28,12 +24,9 @@
#define CONFIG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE)
-#define CONFIG_SYS_LOAD_ADDR 0x50000000
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_SYS_MONITOR_BASE 0x00000000
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
/* ENV setting */
diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h
index 99ef27b..2b3e1bb 100644
--- a/include/configs/rcar-gen3-common.h
+++ b/include/configs/rcar-gen3-common.h
@@ -21,12 +21,7 @@
/* boot option */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
/* Generic Interrupt Controller Definitions */
-#define CONFIG_GICV2
#define GICD_BASE 0xF1010000
#define GICC_BASE 0xF1020000
@@ -45,14 +40,11 @@
#define DRAM_RSV_SIZE 0x08000000
#define CONFIG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE)
#define CONFIG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE)
-#define CONFIG_SYS_LOAD_ADDR 0x58000000
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_VERY_BIG_RAM
#define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE)
#define CONFIG_SYS_MONITOR_BASE 0x00000000
#define CONFIG_SYS_MONITOR_LEN (1 * 1024 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* The HF/QSPI layout permits up to 1 MiB large bootloader blob */
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 7f148ef..b133d8e 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -9,7 +9,6 @@
#include "rockchip-common.h"
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0
#define COUNTER_FREQUENCY 24000000
@@ -17,7 +16,6 @@
#define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
-#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_SPL_STACK 0x10081fff
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 7c064a0..8b7a0bb 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -10,7 +10,6 @@
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0
#define COUNTER_FREQUENCY 24000000
@@ -20,7 +19,6 @@
#define CONFIG_IRAM_BASE 0x10080000
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
-#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 3bcc048..e7c0964 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -6,19 +6,15 @@
#ifndef __CONFIG_RK3188_COMMON_H
#define __CONFIG_RK3188_COMMON_H
-#define CONFIG_SYS_CACHELINE_SIZE 64
-
#include <asm/arch-rockchip/hardware.h>
#include "rockchip-common.h"
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#define CONFIG_SYS_CBSIZE 1024
#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
#endif
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
-#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800)
#define CONFIG_ROCKCHIP_CHIP_TAG "RK31"
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 7e0c831..a46b1ff 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -8,7 +8,6 @@
#include <asm/arch-rockchip/hardware.h>
#include "rockchip-common.h"
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
@@ -18,7 +17,6 @@
#define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_SYS_INIT_SP_ADDR 0x61100000
-#define CONFIG_SYS_LOAD_ADDR 0x61800800
#define CONFIG_SPL_MAX_SIZE 0x100000
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10)
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index addad7a..abbb273 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -11,7 +11,6 @@
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64MB */
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020
@@ -23,7 +22,6 @@
/* Bootrom will load u-boot binary to 0x0 once return from SPL */
#endif
#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
-#define CONFIG_SYS_LOAD_ADDR 0x00800800
#define CONFIG_SPL_STACK 0xff718000
#define CONFIG_IRAM_BASE 0xff700000
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index bd9ac82..edaf78a 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -9,7 +9,6 @@
#include "rockchip-common.h"
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
@@ -25,7 +24,6 @@
#define CONFIG_ROCKCHIP_STIMER_BASE 0xff1b00a0
#define CONFIG_IRAM_BASE 0xfff80000
#define CONFIG_SYS_INIT_SP_ADDR 0x00800000
-#define CONFIG_SYS_LOAD_ADDR 0x00C00800
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 0538da7..c1e26a0 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -14,10 +14,8 @@
#define COUNTER_FREQUENCY 24000000
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
-#define CONFIG_SYS_LOAD_ADDR 0x00800800
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SPL_MAX_SIZE 0x40000
#define CONFIG_SPL_BSS_START_ADDR 0x2000000
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index fbbb8cf..8b239ca 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -8,15 +8,12 @@
#include "rockchip-common.h"
-#define CONFIG_SYS_CACHELINE_SIZE 64
-
#include <asm/arch-rockchip/hardware.h>
#include <linux/sizes.h>
#define CONFIG_SYS_SDRAM_BASE 0
#define SDRAM_MAX_SIZE 0xff000000
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020
#define COUNTER_FREQUENCY 24000000
@@ -24,7 +21,6 @@
#define CONFIG_IRAM_BASE 0xff8c0000
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
-#define CONFIG_SYS_LOAD_ADDR 0x00800800
#define CONFIG_SPL_MAX_SIZE 0x40000
#define CONFIG_SPL_BSS_START_ADDR 0x400000
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 6d710da..ed72c8b 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -9,7 +9,6 @@
#include "rockchip-common.h"
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define COUNTER_FREQUENCY 24000000
#define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0
@@ -17,7 +16,6 @@
#define CONFIG_IRAM_BASE 0xff8c0000
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
-#define CONFIG_SYS_LOAD_ADDR 0x00800800
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
#define CONFIG_SPL_STACK 0x00400000
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index b656891..afe5050 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -9,7 +9,6 @@
#include "rockchip-common.h"
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define COUNTER_FREQUENCY 24000000
#define CONFIG_ROCKCHIP_STIMER_BASE 0xfdd1c020
@@ -17,7 +16,6 @@
#define CONFIG_IRAM_BASE 0xfdcc0000
#define CONFIG_SYS_INIT_SP_ADDR 0x00c00000
-#define CONFIG_SYS_LOAD_ADDR 0x00c00800
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#define CONFIG_SYS_SDRAM_BASE 0
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 522b41c..55768a4 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -13,10 +13,6 @@
#include <asm/arch/base.h>
#endif
-#if defined(CONFIG_TARGET_RPI_2) || defined(CONFIG_TARGET_RPI_3_32B)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
/* Architecture, CPU, etc.*/
/* Use SoC timer for AArch32, but architected timer for AArch64 */
@@ -26,21 +22,6 @@
(&((struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR)->clo)
#endif
-/*
- * 2835 is a SKU in a series for which the 2708 is the first or primary SoC,
- * so 2708 has historically been used rather than a dedicated 2835 ID.
- *
- * We don't define a machine type for bcm2709/bcm2836 since the RPi Foundation
- * chose to use someone else's previously registered machine ID (3139, MX51_GGC)
- * rather than obtaining a valid ID:-/
- *
- * For the bcm2837, hopefully a machine type is not needed, since everything
- * is DT.
- */
-#ifdef CONFIG_BCM2835
-#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708
-#endif
-
/* Memory layout */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
@@ -54,8 +35,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
CONFIG_SYS_SDRAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN SZ_4M
-#define CONFIG_LOADADDR 0x00200000
#ifdef CONFIG_ARM64
#define CONFIG_SYS_BOOTM_LEN SZ_64M
@@ -88,15 +67,9 @@
#define CONFIG_SYS_CBSIZE 1024
/* Environment */
-#define CONFIG_SYS_LOAD_ADDR 0x1000000
/* Shell */
-/* ATAGs support for bootm/bootz */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-
/* Environment */
#define ENV_DEVICE_SETTINGS \
"stdin=serial,usbkbd\0" \
diff --git a/include/configs/rut.h b/include/configs/rut.h
index 6694003..68d68d0 100644
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -13,8 +13,6 @@
#ifndef __CONFIG_RUT_H
#define __CONFIG_RUT_H
-#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_RUT
-
#include "siemens-am33x-common.h"
#define RUT_IOCTRL_VAL 0x18b
@@ -23,14 +21,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */
-/* I2C Configuration */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */
-
#define CONFIG_FACTORYSET
/* Watchdog */
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 758e85e..d0f70b0 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -11,7 +11,6 @@
#define CONFIG_IRAM_BASE 0x10080000
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
/* TIMER1,initialized by ddr initialize code */
@@ -20,7 +19,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x60000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000)
/* rockchip ohci host driver */
#define CONFIG_USB_OHCI_NEW
diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h
index 1e2180b..c482de1 100644
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -60,12 +60,9 @@
*/
#define CONFIG_SYS_SDRAM_SIZE (0xb0000000 - CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
-
#define BMP_LOAD_ADDR 0x78000000
/* kernel load address */
-#define CONFIG_SYS_LOAD_ADDR 0x71080000
#define INITRD_START 0x79000000
#define KERNEL_DTB_ADDR 0x7A000000
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 6af6009..b4a3cc0 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -26,14 +26,6 @@
/* Text Base */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_INITRD_TAG
-
-/* Size of malloc() pool before and after relocation */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
-
/* MMC */
#define SDHCI_MAX_HOSTS 4
@@ -138,8 +130,6 @@
"dfu_alt_info=" CONFIG_DFU_ALT "\0"
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
-/* memtest works on */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000)
/* Goni has 3 banks of DRAM, but swap the bank */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 0b679f4..ff29de0 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -31,9 +31,6 @@
#define CONFIG_SYS_MONITOR_BASE 0x00000000
-/* memtest works on */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
-
/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
#define NORMAL_MTDPARTS_DEFAULT CONFIG_MTDPARTS_DEFAULT
@@ -44,16 +41,6 @@
",100M(swap)"\
",-(UMS)\0"
-#define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7"
-#define CONFIG_BOOTBLOCK "10"
-#define CONFIG_UBIBLOCK "9"
-
-#define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc "
-#define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \
- "${mtdparts}"
-
-#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"updateb=" \
"onenand erase 0x0 0x100000;" \
@@ -71,18 +58,20 @@
"lpj=lpj=3981312\0" \
"ubifsboot=" \
"set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \
- CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
- CONFIG_ENV_COMMON_BOOT "; run bootk\0" \
+ "ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7 " \
+ "rootflags=bulk_read,no_chk_data_crc ${mtdparts} ${opts} " \
+ "${lcdinfo} ${console} ${meminfo}; run bootk\0" \
"tftpboot=" \
"set bootargs root=ubi0!rootfs rootfstype=ubifs " \
- CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
- CONFIG_ENV_COMMON_BOOT \
+ "ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7 " \
+ "rootflags=bulk_read,no_chk_data_crc ${mtdparts} ${opts} " \
+ "${lcdinfo} ${console} ${meminfo}" \
"; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \
"nfsboot=" \
"set bootargs root=/dev/nfs rw " \
"nfsroot=${nfsroot},nolock,tcp " \
"ip=${ipaddr}:${serverip}:${gatewayip}:" \
- "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
+ "${netmask}:generic:usb0:off ${console} ${meminfo}" \
"; run bootk\0" \
"ramfsboot=" \
"set bootargs root=/dev/ram0 rw rootfstype=ext2 " \
@@ -102,8 +91,8 @@
"mbrparts=" MBRPARTS_DEFAULT \
"meminfo=crashkernel=32M@0x50000000\0" \
"nfsroot=/nfsroot/arm\0" \
- "bootblock=" CONFIG_BOOTBLOCK "\0" \
- "ubiblock=" CONFIG_UBIBLOCK" \0" \
+ "bootblock=10\0" \
+ "ubiblock=9\0" \
"ubi=enabled\0" \
"loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
"mmcdev=0\0" \
diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h
index 6a6f1de..774ecb4 100644
--- a/include/configs/sam9x60ek.h
+++ b/include/configs/sam9x60ek.h
@@ -14,11 +14,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_ID 0 /* ignored in arm */
@@ -54,8 +49,6 @@
#define CONFIG_SYS_NAND_ONFI_DETECTION
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#ifdef CONFIG_SD_BOOT
/* bootstrap + u-boot + env + linux in sd card */
#define CONFIG_BOOTCOMMAND \
@@ -78,9 +71,4 @@
"bootz 0x22000000 - 0x21000000"
#endif
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
-
#endif
diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h
index 8942d15..1c30e44 100644
--- a/include/configs/sama5d27_som1_ek.h
+++ b/include/configs/sama5d27_som1_ek.h
@@ -14,26 +14,20 @@
#undef CONFIG_SYS_AT91_MAIN_CLOCK
#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */
-/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE 0x20000000
-#define CONFIG_SYS_SDRAM_SIZE 0x8000000
-
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_INIT_SP_ADDR 0x218000
#else
#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+ (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_SD_BOOT
/* bootstrap + u-boot + env in sd card */
-#define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x21000000 " \
+#define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 " \
CONFIG_DEFAULT_DEVICE_TREE ".dtb; " \
- "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 zImage; " \
- "bootz 0x22000000 - 0x21000000"
+ "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x23000000 zImage; " \
+ "bootz 0x23000000 - 0x22000000"
#endif
/* SPL */
diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h
index 8bea764..09ebf48 100644
--- a/include/configs/sama5d27_wlsom1_ek.h
+++ b/include/configs/sama5d27_wlsom1_ek.h
@@ -26,8 +26,6 @@
(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* SPL */
#define CONFIG_SPL_TEXT_BASE 0x200000
#define CONFIG_SPL_MAX_SIZE 0x10000
diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h
index 9be6d4f..e7ccfea 100644
--- a/include/configs/sama5d2_icp.h
+++ b/include/configs/sama5d2_icp.h
@@ -27,8 +27,6 @@
(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* NAND flash */
/* SPI flash */
diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h
index f42e26a..1001bbc 100644
--- a/include/configs/sama5d2_ptc_ek.h
+++ b/include/configs/sama5d2_ptc_ek.h
@@ -22,8 +22,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* NAND Flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
index 4f5ceca..da573bc 100644
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -11,19 +11,13 @@
#include "at91-sama5_common.h"
-/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE 0x20000000
-#define CONFIG_SYS_SDRAM_SIZE 0x20000000
-
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_INIT_SP_ADDR 0x218000
#else
#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+ (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* SerialFlash */
#ifdef CONFIG_SD_BOOT
@@ -31,18 +25,18 @@
/* bootstrap + u-boot + env in sd card */
#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x21000000 at91-sama5d2_xplained.dtb; " \
- "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 zImage; " \
- "bootz 0x22000000 - 0x21000000"
+#define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 at91-sama5d2_xplained.dtb; " \
+ "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x23000000 zImage; " \
+ "bootz 0x23000000 - 0x22000000"
#elif CONFIG_SPI_BOOT
/* bootstrap + u-boot + env in sd card, but kernel + dtb in eMMC */
#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND "ext4load mmc 0:1 0x21000000 /boot/at91-sama5d2_xplained.dtb; " \
- "ext4load mmc 0:1 0x22000000 /boot/zImage; " \
- "bootz 0x22000000 - 0x21000000"
+#define CONFIG_BOOTCOMMAND "ext4load mmc 0:1 0x22000000 /boot/at91-sama5d2_xplained.dtb; " \
+ "ext4load mmc 0:1 0x23000000 /boot/zImage; " \
+ "bootz 0x23000000 - 0x22000000"
#endif
@@ -51,9 +45,9 @@
#undef CONFIG_BOOTCOMMAND
#define CONFIG_ENV_SPI_BUS 1
#define CONFIG_BOOTCOMMAND "sf probe 1:0; " \
- "sf read 0x21000000 0x180000 0x80000; " \
- "sf read 0x22000000 0x200000 0x600000; "\
- "bootz 0x22000000 - 0x21000000"
+ "sf read 0x22000000 0x180000 0x80000; " \
+ "sf read 0x23000000 0x200000 0x600000; "\
+ "bootz 0x23000000 - 0x22000000"
#endif
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index 4c25964..20d1d34 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -56,8 +56,6 @@
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* SPL */
#define CONFIG_SPL_MAX_SIZE 0x18000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 44c1952..ac52e27 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -69,8 +69,6 @@
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* SPL */
#define CONFIG_SPL_MAX_SIZE 0x18000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h
index 80809df..3032297 100644
--- a/include/configs/sama5d4_xplained.h
+++ b/include/configs/sama5d4_xplained.h
@@ -22,8 +22,6 @@
(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h
index 2fb4764..4e8fe86 100644
--- a/include/configs/sama5d4ek.h
+++ b/include/configs/sama5d4ek.h
@@ -22,8 +22,6 @@
(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h
index 96db82e..9b7cc2c 100644
--- a/include/configs/sama7g5ek.h
+++ b/include/configs/sama7g5ek.h
@@ -24,9 +24,7 @@
GENERATED_GBL_DATA_SIZE)
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x62000000 /* load address */
-
-#undef CONFIG_BOOTCOMMAND
+#ifndef CONFIG_BOOTCOMMAND
#ifdef CONFIG_SD_BOOT
/* u-boot env in sd/mmc card */
@@ -34,10 +32,11 @@
#define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x61000000 at91-sama7g5ek.dtb; " \
"fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x62000000 zImage; " \
"bootz 0x62000000 - 0x61000000"
+#else
+#define CONFIG_BOOTCOMMAND "Place your bootcommand here"
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
+#endif
#define CONFIG_ARP_TIMEOUT 200
#define CONFIG_NET_RETRY_COUNT 50
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 8eeccdd..24c9a84 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -24,11 +24,7 @@
#define CONFIG_HOST_MAX_DEVICES 4
-/*
- * Size of malloc() pool, before and after relocation
- */
#define CONFIG_MALLOC_F_ADDR 0x0010000
-#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
@@ -38,8 +34,6 @@
#define CONFIG_I2C_EDID
-/* Memory things - we don't really want a memory test */
-#define CONFIG_SYS_LOAD_ADDR 0x00000000
#define CONFIG_SYS_FDT_LOAD_ADDR 0x100
#define CONFIG_PHYSMEM
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 5b5aa1b..c51517a 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -24,8 +24,6 @@
#define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
-
/* Environment in eMMC, at the end of 2nd "boot sector" */
/* NAND support */
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index a4b4c48..6ccba95 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -18,15 +18,6 @@
#define CONFIG_DMA_COHERENT
#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
-#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
-#ifdef CONFIG_SIEMENS_MACH_TYPE
-#define CONFIG_MACH_TYPE CONFIG_SIEMENS_MACH_TYPE
-#endif
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
/* commands to include */
#ifndef CONFIG_SPL_BUILD
@@ -53,8 +44,6 @@
* start addr of ram disk
*/
-#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
-
/* Physical Memory Map */
#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
@@ -73,7 +62,6 @@
/* I2C Configuration */
-#define CONFIG_SYS_I2C_LEGACY
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
@@ -125,9 +113,6 @@
* Since SPL did pll and ddr initialization for us,
* we don't need to do it twice.
*/
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
#ifndef CONFIG_SPL_BUILD
/*
diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h
index b6c29f8..8535678 100644
--- a/include/configs/sifive-unleashed.h
+++ b/include/configs/sifive-unleashed.h
@@ -28,10 +28,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-
-#define CONFIG_SYS_MALLOC_LEN SZ_8M
-
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h
index bea0eeb..f68d7d7 100644
--- a/include/configs/sifive-unmatched.h
+++ b/include/configs/sifive-unmatched.h
@@ -28,18 +28,12 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-
-#define CONFIG_SYS_MALLOC_LEN SZ_8M
-
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit resources */
-#define CONFIG_SYS_CACHELINE_SIZE 64
-
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
/* Environment options */
@@ -85,9 +79,5 @@
#endif /* CONFIG_SPL_BUILD */
#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 0x1
-
-#define CONFIG_ID_EEPROM
#endif /* __SIFIVE_UNMATCHED_H */
diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h
index 0fbe8a5..1f74702 100644
--- a/include/configs/sipeed-maix.h
+++ b/include/configs/sipeed-maix.h
@@ -8,11 +8,8 @@
#include <linux/sizes.h>
-#define CONFIG_SYS_LOAD_ADDR 0x80000000
/* Start just below the second bank so we don't clobber it during reloc */
#define CONFIG_SYS_INIT_SP_ADDR 0x803FFFFF
-#define CONFIG_SYS_MALLOC_LEN SZ_128K
-#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_SDRAM_SIZE SZ_8M
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 5e8637e..5bcc3a6 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -40,16 +40,11 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
/* misc settings */
-#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
-#define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
-#define CONFIG_INITRD_TAG /* pass initrd param to kernel */
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */
/* We set the max number of command args high to avoid HUSH bugs. */
#define CONFIG_SYS_MAXARGS 32
/* setting board specific options */
-#define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB
#define CONFIG_SYS_AUTOLOAD "yes"
#define CONFIG_RESET_TO_RETRY
@@ -69,10 +64,6 @@
* till the beginning of the U-Boot position in RAM.
*/
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN \
- ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
-
/* NAND flash settings */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
@@ -101,7 +92,7 @@
/* BOOTP and DHCP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv autoload yes; setenv autoboot yes; " \
"setenv bootargs ${basicargs} ${mtdparts} " \
"root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
@@ -130,12 +121,6 @@
#define CONFIG_SYS_CBSIZE 512
/*
- * RAM Memory address where to put the
- * Linux Kernel befor starting.
- */
-#define CONFIG_SYS_LOAD_ADDR 0x22000000
-
-/*
* The NAND Flash partitions:
*/
#define CONFIG_ENV_RANGE (SZ_512K)
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index 77773cd..a5edf04 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -29,16 +29,6 @@
/* Text Base */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-
-/*
- * Size of malloc() pool
- * 1MB = 0x100000, 0x100000 = 1024 * 1024
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
-
/*
* select serial console configuration
*/
@@ -105,8 +95,6 @@
* Miscellaneous configurable options
*/
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
-/* memtest works on */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
/* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index fc2f6ec..4a6b625 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -12,14 +12,10 @@
#undef CONFIG_BOARD_COMMON
#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
-#undef CONFIG_REVISION_TAG
/* High Level Configuration Options */
#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
-/* Mach Type */
-#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* Handling Sleep Mode*/
@@ -28,14 +24,10 @@
#define S5P_CHECK_LPA 0xABAD0000
/* MMC SPL */
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define COPY_BL2_FNPTR_ADDR 0x00002488
#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
-/* memtest works on */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-
/* SMDKV310 has 4 bank of DRAM */
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h
index 6f7b46e..cf80801 100644
--- a/include/configs/smegw01.h
+++ b/include/configs/smegw01.h
@@ -14,9 +14,6 @@
#define PHYS_SDRAM_SIZE SZ_512M
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M)
-
/* MMC Config*/
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
@@ -45,7 +42,6 @@
"run mmcboot; " \
"fi; " \
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h
index 529976e..32abeb0 100644
--- a/include/configs/snapper9260.h
+++ b/include/configs/snapper9260.h
@@ -20,11 +20,6 @@
/* CPU */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */
@@ -73,10 +68,6 @@
#endif
/* I2C - Bit-bashed */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SOFT_SPEED 100000
-#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
#define CONFIG_SOFT_I2C_READ_REPEATED_START
#define I2C_INIT do { \
at91_set_gpio_output(AT91_PIN_PA23, 1); \
@@ -100,7 +91,6 @@
#define I2C_DELAY udelay(2)
/* Boot options */
-#define CONFIG_SYS_LOAD_ADDR 0x23000000
#define CONFIG_BOOTP_BOOTFILESIZE
@@ -108,7 +98,4 @@
/* Console settings */
-/* U-Boot memory settings */
-#define CONFIG_SYS_MALLOC_LEN (1 << 20)
-
#endif /* __CONFIG_H */
diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index 077e9d6..b13584d 100644
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -19,10 +19,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
/* CPU */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
@@ -64,7 +60,6 @@
/* UARTs/Serial console */
/* Boot options */
-#define CONFIG_SYS_LOAD_ADDR 0x23000000
#define CONFIG_BOOTP_BOOTFILESIZE
@@ -92,7 +87,4 @@
/* Console settings */
-/* U-Boot memory settings */
-#define CONFIG_SYS_MALLOC_LEN (1 << 20)
-
#endif /* __CONFIG_H */
diff --git a/include/configs/sniper.h b/include/configs/sniper.h
index 6ef96df..7c563b7 100644
--- a/include/configs/sniper.h
+++ b/include/configs/sniper.h
@@ -12,16 +12,6 @@
#include <asm/arch/omap.h>
/*
- * CPU
- */
-
-#define CONFIG_ARM_ARCH_CP15_ERRATA
-
-/*
- * Board
- */
-
-/*
* Clocks
*/
@@ -47,13 +37,10 @@
#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
-
/*
* I2C
*/
-#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_I2C_MULTI_BUS
/*
@@ -112,21 +99,9 @@
"bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
/*
- * ATAGs
- */
-
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_SERIAL_TAG
-
-/*
* Boot
*/
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
#define CONFIG_BOOTCOMMAND \
"setenv boot_mmc_part ${kernel_mmc_part}; " \
"if test reboot-${reboot-mode} = reboot-r; then " \
diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h
index 645e66e..ebb3e8c 100644
--- a/include/configs/socfpga_arria10_socdk.h
+++ b/include/configs/socfpga_arria10_socdk.h
@@ -8,10 +8,6 @@
#include <asm/arch/base_addr_a10.h>
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/*
* U-Boot general configurations
*/
diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h
index c25d6bd..0b37efe 100644
--- a/include/configs/socfpga_arria5_secu1.h
+++ b/include/configs/socfpga_arria5_secu1.h
@@ -43,7 +43,6 @@
"setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && " \
"saveenv && saveenv && boot;"
-#define CONFIG_CMDLINE_TAG
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* Environment settings */
@@ -57,9 +56,6 @@
#define CONFIG_BOOT_RETRY_TIME 45
#define CONFIG_RESET_TO_RETRY
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_KM_KERNEL_ADDR
-
/*
* FPGA Remote Update related environment
*
diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h
index af6137a..ca2d782 100644
--- a/include/configs/socfpga_arria5_socdk.h
+++ b/include/configs/socfpga_arria5_socdk.h
@@ -10,10 +10,6 @@
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index c5e4292..ed3aac7 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -18,7 +18,6 @@
* Memory configurations
*/
#define PHYS_SDRAM_1 0x0
-#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE
@@ -186,7 +185,7 @@
#endif
/* SPL SDMMC boot support */
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#endif
diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h
index 028db2a..c23ba23 100644
--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@@ -10,10 +10,6 @@
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_dbm_soc1.h b/include/configs/socfpga_dbm_soc1.h
index bffedcb..137da2f 100644
--- a/include/configs/socfpga_dbm_soc1.h
+++ b/include/configs/socfpga_dbm_soc1.h
@@ -13,8 +13,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "fitImage"
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Environment is in MMC */
diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h
index 21108e3..a5e6511 100644
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -10,10 +10,6 @@
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_de10_nano.h b/include/configs/socfpga_de10_nano.h
index d85f98f..dfc22cf 100644
--- a/include/configs/socfpga_de10_nano.h
+++ b/include/configs/socfpga_de10_nano.h
@@ -10,10 +10,6 @@
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_de1_soc.h b/include/configs/socfpga_de1_soc.h
index 9919d29..4b58bc4 100644
--- a/include/configs/socfpga_de1_soc.h
+++ b/include/configs/socfpga_de1_soc.h
@@ -10,10 +10,6 @@
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h
index c4da594..06337d4 100644
--- a/include/configs/socfpga_is1.h
+++ b/include/configs/socfpga_is1.h
@@ -13,8 +13,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "zImage"
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Ethernet on SoC (EMAC) */
#if defined(CONFIG_CMD_NET)
diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h
index 50c5961..1456214 100644
--- a/include/configs/socfpga_mcvevk.h
+++ b/include/configs/socfpga_mcvevk.h
@@ -13,8 +13,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "fitImage"
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Environment is in MMC */
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index a0453e5..4a0235d 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -15,8 +15,6 @@
* U-Boot general configurations
*/
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_LOADADDR 0x2000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_REMAKE_ELF
/* sysmgr.boot_scratch_cold4 & 5 (64bit) will be used for PSCI_CPU_ON call */
#define CPU_RELEASE_ADDR 0xFFD12210
@@ -47,7 +45,6 @@
+ 0x100000)
#endif
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_SP_ADDR)
-#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
/*
* U-Boot environment configurations
@@ -116,11 +113,6 @@
"socfpga_legacy_reset_compat=1\0"
/*
- * Generic Interrupt Controller Definitions
- */
-#define CONFIG_GICV2
-
-/*
* External memory configurations
*/
#define PHYS_SDRAM_1 0x0
diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h
index 9729999..a4aece9 100644
--- a/include/configs/socfpga_sockit.h
+++ b/include/configs/socfpga_sockit.h
@@ -10,10 +10,6 @@
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h
index 7faea15..f482005 100644
--- a/include/configs/socfpga_socrates.h
+++ b/include/configs/socfpga_socrates.h
@@ -10,10 +10,6 @@
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCrates */
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index ccaa050..62c1bc7 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -10,10 +10,6 @@
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Ethernet on SoC (EMAC) */
#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
/* The PHY is autodetected, so no MII PHY address is needed here */
diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h
index 38a7753..d9d0a4a 100644
--- a/include/configs/socfpga_vining_fpga.h
+++ b/include/configs/socfpga_vining_fpga.h
@@ -14,8 +14,6 @@
#define CONFIG_BOOTFILE "fitImage"
#define CONFIG_BOOTCOMMAND "run selboot"
#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Extra Environment */
#define CONFIG_HOSTNAME "socfpga_vining_fpga"
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index da60546..400cea4 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -57,9 +57,7 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
-#define CONFIG_DDR_SPD
-#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
@@ -72,7 +70,6 @@
/* I2C addresses of SPD EEPROMs */
#define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */
-#define CONFIG_DDR_DEFAULT_CL 30 /* CAS latency 3 */
/* Hardcoded values, to use instead of SPD */
#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f
@@ -126,7 +123,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384KiB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4 MB for malloc */
/* FPGA and NAND */
#define CONFIG_SYS_FPGA_BASE 0xc0000000
@@ -146,8 +142,6 @@
#define CONFIG_SYS_SPD_BUS_NUM 0
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
-
/*
* General PCI
* Memory space is mapped 1-1.
@@ -201,7 +195,6 @@
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
/*
* For booting Linux, the board info and command line data
@@ -214,7 +207,6 @@
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/
#endif
-#define CONFIG_LOADADDR 200000 /* default addr for tftp & bootm*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h
index 945d0ec..6af908a 100644
--- a/include/configs/somlabs_visionsom_6ull.h
+++ b/include/configs/somlabs_visionsom_6ull.h
@@ -16,9 +16,6 @@
/* SPL options */
#include "imx6_spl.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
@@ -71,7 +68,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h
index b94ef91..e5571b2 100644
--- a/include/configs/stemmy.h
+++ b/include/configs/stemmy.h
@@ -13,17 +13,37 @@
* low-level initialization and rely on configuration provided by the Samsung
* bootloader. New images are loaded at the same address for compatibility.
*/
-#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_SYS_MALLOC_LEN SZ_2M
/* FIXME: This should be loaded from device tree... */
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE 0xa0412000
+/* Linux does not boot if FDT / initrd is loaded to end of RAM */
+#define BOOT_ENV \
+ "fdt_high=0x6000000\0" \
+ "initrd_high=0x6000000\0"
+
+#define CONSOLE_ENV \
+ "stdin=serial\0" \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
+#define FASTBOOT_ENV \
+ "fastboot_partition_alias_boot=Kernel\0" \
+ "fastboot_partition_alias_recovery=Kernel2\0" \
+ "fastboot_partition_alias_system=SYSTEM\0" \
+ "fastboot_partition_alias_cache=CACHEFS\0" \
+ "fastboot_partition_alias_hidden=HIDDEN\0" \
+ "fastboot_partition_alias_userdata=DATAFS\0"
+
+#define BOOTCMD_ENV \
+ "fastbootcmd=echo '*** FASTBOOT MODE ***'; fastboot usb 0\0"
+
-/* Generate initrd atag for downstream kernel (others are copied in stemmy.c) */
-#define CONFIG_INITRD_TAG
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ BOOT_ENV \
+ CONSOLE_ENV \
+ FASTBOOT_ENV \
+ BOOTCMD_ENV
#endif
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index 33b34ee..b1917c9 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -13,7 +13,6 @@
#define PHYS_SDRAM_1 0x40000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define PHYS_SDRAM_1_SIZE 0x3E000000
-#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 /* default load addr */
#define CONFIG_SYS_HZ_CLOCK 1000000000 /* 1 GHz */
@@ -25,7 +24,6 @@
*/
#define CONFIG_SYS_BOOTMAPSZ SZ_256M
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_SYS_BOOTM_LEN SZ_16M
#define BOOT_TARGET_DEVICES(func) \
@@ -45,10 +43,6 @@
/* Extra Commands */
-#define CONFIG_SETUP_MEMORY_TAGS
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN 0x1800000
#define CONFIG_SYS_GBL_DATA_SIZE 1024 /* Global data structures */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN - \
@@ -59,8 +53,6 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/* USB Configs */
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h
index 9d029fb..525a527 100644
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -14,8 +14,6 @@
/*
* Configuration of the external SDRAM memory
*/
-#define CONFIG_SYS_LOAD_ADDR 0x90400000
-#define CONFIG_LOADADDR 0x90400000
#define CONFIG_SYS_MAX_FLASH_SECT 12
#define CONFIG_SYS_MAX_FLASH_BANKS 2
@@ -27,15 +25,8 @@
#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SYS_MALLOC_LEN (2 << 20)
-
#define CONFIG_BOOTCOMMAND \
"run bootcmd_romfs"
diff --git a/include/configs/stm32f429-evaluation.h b/include/configs/stm32f429-evaluation.h
index fefdb2d..609b4c2 100644
--- a/include/configs/stm32f429-evaluation.h
+++ b/include/configs/stm32f429-evaluation.h
@@ -19,8 +19,6 @@
/*
* Configuration of the external SDRAM memory
*/
-#define CONFIG_SYS_LOAD_ADDR 0x00400000
-#define CONFIG_LOADADDR 0x00400000
#define CONFIG_SYS_MAX_FLASH_SECT 12
#define CONFIG_SYS_MAX_FLASH_BANKS 2
@@ -29,15 +27,8 @@
#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0)
diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h
index ba9f05a..a8f6fbf 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -19,8 +19,6 @@
/*
* Configuration of the external SDRAM memory
*/
-#define CONFIG_SYS_LOAD_ADDR 0x00400000
-#define CONFIG_LOADADDR 0x00400000
#define CONFIG_SYS_MAX_FLASH_SECT 12
#define CONFIG_SYS_MAX_FLASH_BANKS 2
@@ -29,15 +27,8 @@
#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0)
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index 08d050a..c76d290 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -15,13 +15,6 @@
#define CONFIG_SYS_FLASH_BASE 0x08000000
#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
-#ifdef CONFIG_SUPPORT_SPL
-#define CONFIG_SYS_LOAD_ADDR 0x08008000
-#else
-#define CONFIG_SYS_LOAD_ADDR 0xC0400000
-#define CONFIG_LOADADDR 0xC0400000
-#endif
-
/*
* Configuration of the external SDRAM memory
*/
@@ -36,15 +29,8 @@
#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
#define CONFIG_SYS_CBSIZE 1024
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0)
diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h
index 6e10dbd..c43b0d8 100644
--- a/include/configs/stm32h743-disco.h
+++ b/include/configs/stm32h743-disco.h
@@ -16,21 +16,9 @@
#define CONFIG_SYS_FLASH_BASE 0x08000000
#define CONFIG_SYS_INIT_SP_ADDR 0x24040000
-/*
- * Configuration of the external SDRAM memory
- */
-#define CONFIG_SYS_LOAD_ADDR 0xD0400000
-#define CONFIG_LOADADDR 0xD0400000
-
#define CONFIG_SYS_HZ_CLOCK 1000000
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0)
diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h
index 268d39c..d838449 100644
--- a/include/configs/stm32h743-eval.h
+++ b/include/configs/stm32h743-eval.h
@@ -16,21 +16,9 @@
#define CONFIG_SYS_FLASH_BASE 0x08000000
#define CONFIG_SYS_INIT_SP_ADDR 0x24040000
-/*
- * Configuration of the external SDRAM memory
- */
-#define CONFIG_SYS_LOAD_ADDR 0xD0400000
-#define CONFIG_LOADADDR 0xD0400000
-
#define CONFIG_SYS_HZ_CLOCK 1000000
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0)
diff --git a/include/configs/stm32h750-art-pi.h b/include/configs/stm32h750-art-pi.h
index 3fd5461..db17939 100644
--- a/include/configs/stm32h750-art-pi.h
+++ b/include/configs/stm32h750-art-pi.h
@@ -16,21 +16,9 @@
#define CONFIG_SYS_FLASH_BASE 0x90000000
#define CONFIG_SYS_INIT_SP_ADDR 0x24040000
-/*
- * Configuration of the external SDRAM memory
- */
-#define CONFIG_SYS_LOAD_ADDR 0xC1800000
-#define CONFIG_LOADADDR 0xC1800000
-
#define CONFIG_SYS_HZ_CLOCK 1000000
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0)
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h
index b372838..4ccaab5 100644
--- a/include/configs/stm32mp1.h
+++ b/include/configs/stm32mp1.h
@@ -28,17 +28,6 @@
#define CONFIG_SYS_CBSIZE SZ_1K
/*
- * default load address used for command tftp, bootm , loadb, ...
- */
-#define CONFIG_LOADADDR 0xc2000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
-/* ATAGs */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/*
* For booting Linux, use the first 256 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index da162cb..5516ecf 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -73,7 +73,6 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
#define CONFIG_SYS_MBAR 0xFC000000
/*
@@ -111,8 +110,6 @@
#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
/* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
-/* Reserve 256 kB for malloc() */
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
/*
* For booting Linux, the board info and command line data
@@ -132,7 +129,6 @@
#endif
/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index 0058dcd..d380884 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -13,13 +13,10 @@
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define PHYS_SDRAM_1_SIZE 0x00198000
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024)
-
/* user interface */
#define CONFIG_SYS_CBSIZE 1024
/* MISC */
-#define CONFIG_SYS_LOAD_ADDR 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
#define CONFIG_SYS_INIT_RAM_ADDR 0x00190000
#define CONFIG_SYS_INIT_SP_OFFSET \
diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h
index 6033760..0e1baa9 100644
--- a/include/configs/sun4i.h
+++ b/include/configs/sun4i.h
@@ -16,6 +16,4 @@
*/
#include <configs/sunxi-common.h>
-#define CONFIG_MACH_TYPE (4104 | ((CONFIG_MACH_TYPE_COMPAT_REV) << 28))
-
#endif /* __CONFIG_H */
diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h
index ee42af8..ada18de 100644
--- a/include/configs/sun5i.h
+++ b/include/configs/sun5i.h
@@ -16,6 +16,4 @@
*/
#include <configs/sunxi-common.h>
-#define CONFIG_MACH_TYPE (4138 | ((CONFIG_MACH_TYPE_COMPAT_REV) << 28))
-
#endif /* __CONFIG_H */
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index d2fd586..803a751 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -20,6 +20,4 @@
*/
#include <configs/sunxi-common.h>
-#define CONFIG_MACH_TYPE (4283 | ((CONFIG_MACH_TYPE_COMPAT_REV) << 28))
-
#endif /* __CONFIG_H */
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 958b850..f7d0a7e 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -15,22 +15,6 @@
#include <asm/arch/cpu.h>
#include <linux/stringify.h>
-#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
-/*
- * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
- * expense of restricting some features, so the regular machine id values can
- * be used.
- */
-# define CONFIG_MACH_TYPE_COMPAT_REV 0
-#else
-/*
- * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
- * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
- * beyond the machine id check.
- */
-# define CONFIG_MACH_TYPE_COMPAT_REV 1
-#endif
-
#ifdef CONFIG_ARM64
#define CONFIG_SYS_BOOTM_LEN (32 << 20)
#endif
@@ -61,7 +45,6 @@
#ifdef CONFIG_MACH_SUN9I
#define SDRAM_OFFSET(x) 0x2##x
#define CONFIG_SYS_SDRAM_BASE 0x20000000
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
* since it needs to fit in with the other values. By also #defining it
* we get warnings if the Kconfig value mismatches. */
@@ -70,7 +53,6 @@
#else
#define SDRAM_OFFSET(x) 0x4##x
#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
/* V3s do not have enough memory to place code at 0x4a000000 */
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
* since it needs to fit in with the other values. By also #defining it
@@ -107,11 +89,6 @@
#define CONFIG_SYS_64BIT_LBA
#endif
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-#define CONFIG_SERIAL_TAG
-
#ifdef CONFIG_NAND_SUNXI
#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
#define CONFIG_SYS_NAND_ONFI_DETECTION
@@ -137,14 +114,6 @@
#define CONFIG_SYS_MMC_MAX_DEVICE 4
#endif
-#ifndef CONFIG_MACH_SUN8I_V3S
-/* 64MB of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
-#else
-/* 2MB of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
-#endif
-
/*
* Miscellaneous configurable options
*/
@@ -194,21 +163,7 @@
/* I2C */
-#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
- defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
- defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
-#define CONFIG_SYS_I2C_MVTWSI
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_SPEED 400000
-#define CONFIG_SYS_I2C_SLAVE 0x7f
-#endif
-#endif
-
-#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
-#define CONFIG_SYS_I2C_SOFT
-#define CONFIG_SYS_I2C_SOFT_SPEED 50000
-#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
+#if defined(CONFIG_VIDEO_LCD_PANEL_I2C)
/* We use pin names in Kconfig and sunxi_name_to_gpio() */
#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h
index 4503cf3..225d017 100644
--- a/include/configs/synquacer.h
+++ b/include/configs/synquacer.h
@@ -24,8 +24,6 @@
* Boot info
*/
#define CONFIG_SYS_INIT_SP_ADDR (0xe0000000) /* stack of init proccess */
-#define CONFIG_SYS_MALLOC_LEN (0x01000000) /* 16Mbyte size of malloc() */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default kernel load address */
/*
* Hardware drivers support
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 41efb64..adbc2ae 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -20,16 +20,6 @@
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
- 2 * 1024 * 1024)
/*
* DDR related
*/
@@ -53,12 +43,7 @@
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200}
-/* EHCI */
-#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
/*
@@ -78,10 +63,6 @@
#define CONFIG_SYS_MAXARGS 32 /* max number of command */
/* args */
-/* memtest works on */
-
-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
- /* address */
/*
* AM3517 has 12 GP timers, they can be driven by the system clock
@@ -249,7 +230,7 @@
#define TAM3517_READ_EEPROM(info, ret) \
do { \
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
(void *)info, sizeof(*info))) \
ret = 1; \
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 6e86946..23f1e378 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -33,11 +33,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
/* Misc CPU related */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
@@ -102,9 +97,6 @@
/* SPL related */
#endif
-/* load address */
-#define CONFIG_SYS_LOAD_ADDR 0x22000000
-
/* bootstrap in spi flash , u-boot + env + linux in nandflash */
#ifndef CONFIG_SPL_BUILD
@@ -157,11 +149,6 @@
"upgrade_available=0\0"
#endif
#endif /* #ifndef CONFIG_SPL_BUILD */
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN \
- ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index f42b0df..6e31bd5 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -20,9 +20,7 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_MALLOC_LEN SZ_128K
#define CONFIG_SYS_BOOTM_LEN SZ_32M
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
/*
* UART configuration
@@ -51,7 +49,6 @@
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
* Console configuration
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index a2e59ce..0438b5a 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -12,8 +12,6 @@
/* General configuration */
-#define CONFIG_MACH_TYPE 3980
-
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
@@ -26,8 +24,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
-
#define CONFIG_SYS_BOOTMAPSZ 0x10000000
/* Serial console */
diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h
index 2bc531c..f8e741a 100644
--- a/include/configs/tec-ng.h
+++ b/include/configs/tec-ng.h
@@ -22,11 +22,6 @@
#define CONFIG_TEGRA_SLINK_CTRLS 6
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
-/* Tag support */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h
index dd7a75a..7cb8d64 100644
--- a/include/configs/tegra-common-post.h
+++ b/include/configs/tegra-common-post.h
@@ -7,17 +7,6 @@
#ifndef __TEGRA_COMMON_POST_H
#define __TEGRA_COMMON_POST_H
-/*
- * Size of malloc() pool
- */
-#ifdef CONFIG_DFU_OVER_USB
-#define CONFIG_SYS_MALLOC_LEN (SZ_4M + \
- CONFIG_SYS_DFU_DATA_BUF_SIZE + \
- CONFIG_SYS_DFU_MAX_FILE_SIZE)
-#else
-#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
-#endif
-
#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
#ifndef CONFIG_SPL_BUILD
@@ -81,8 +70,6 @@
#define BOARD_EXTRA_ENV_SETTINGS
#endif
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
#ifndef CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
#define CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
#endif
@@ -111,13 +98,6 @@
/* overrides for SPL build here */
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-
-/* remove I2C support */
-#ifdef CONFIG_SYS_I2C_TEGRA
-#undef CONFIG_SYS_I2C_TEGRA
-#endif
-
/* remove USB */
#ifdef CONFIG_USB_EHCI_TEGRA
#undef CONFIG_USB_EHCI_TEGRA
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 432ecea..673056c 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -22,8 +22,6 @@
#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
#endif
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-
/* Environment */
/*
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
index 9d751b6..f714c52 100644
--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
@@ -45,11 +45,10 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
-#define CONFIG_LOADADDR 0x81000000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"fdtfile=" FDTFILE "\0" \
"fdt_addr_r=0x83000000\0" \
"ramdisk_addr_r=0x83100000\0"
diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
index 0eb8f92..4a92954 100644
--- a/include/configs/tegra124-common.h
+++ b/include/configs/tegra124-common.h
@@ -47,11 +47,10 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
-#define CONFIG_LOADADDR 0x81000000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"fdtfile=" FDTFILE "\0" \
"fdt_addr_r=0x83000000\0" \
"ramdisk_addr_r=0x83100000\0"
diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h
index d5f21e0..9685016 100644
--- a/include/configs/tegra186-common.h
+++ b/include/configs/tegra186-common.h
@@ -17,9 +17,6 @@
* Physical Memory Map
*/
-/* Generic Interrupt Controller */
-#define CONFIG_GICV2
-
#undef FDTFILE
#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \
"if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \
@@ -50,11 +47,10 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
-#define CONFIG_LOADADDR 0x80080000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"fdt_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x82100000\0"
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index fdd8996..e99e65f 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -46,11 +46,10 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
-#define CONFIG_LOADADDR 0x01000000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x10000000\0" \
"pxefile_addr_r=0x10100000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"fdtfile=" FDTFILE "\0" \
"fdt_addr_r=0x03000000\0" \
"ramdisk_addr_r=0x03100000\0"
diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
index 2226eff..b9e0414 100644
--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
@@ -14,9 +14,6 @@
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
-/* Generic Interrupt Controller */
-#define CONFIG_GICV2
-
/*
* Memory layout for where various images get loaded by boot scripts:
*
@@ -41,11 +38,10 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
-#define CONFIG_LOADADDR 0x80080000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"fdtfile=" FDTFILE "\0" \
"fdt_addr_r=0x83000000\0" \
"ramdisk_addr_r=0x83200000\0"
diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index 6c5dc24..0ee13a2 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -42,11 +42,10 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
-#define CONFIG_LOADADDR 0x81000000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"fdtfile=" FDTFILE "\0" \
"fdt_addr_r=0x83000000\0" \
"ramdisk_addr_r=0x83100000\0"
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 760713d..64b7f25 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -6,6 +6,8 @@
#ifndef _CONFIG_THEADORABLE_H
#define _CONFIG_THEADORABLE_H
+#include <linux/sizes.h>
+
/*
* High Level Configuration Options (easy to change)
*/
@@ -23,12 +25,8 @@
*/
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE
-#define CONFIG_SYS_I2C_SLAVE 0x0
-#define CONFIG_SYS_I2C_SPEED 100000
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
@@ -93,6 +91,6 @@
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
+#define CONFIG_SYS_SDRAM_SIZE SZ_2G
#endif /* _CONFIG_THEADORABLE_H */
diff --git a/include/configs/thuban.h b/include/configs/thuban.h
index 15a8469..d45ff7d 100644
--- a/include/configs/thuban.h
+++ b/include/configs/thuban.h
@@ -27,10 +27,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
-/* I2C Configuration */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define EEPROM_ADDR_DDR3 0x90
#define EEPROM_ADDR_CHIP 0x120
diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h
index 4d3c58d..1ce0347 100644
--- a/include/configs/thunderx_88xx.h
+++ b/include/configs/thunderx_88xx.h
@@ -25,9 +25,6 @@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
-
/* PL011 Serial Configuration */
#define CONFIG_PL011_CLOCK 24000000
@@ -42,7 +39,6 @@
#define CONFIG_BOOTP_BOOTFILESIZE
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
/* Physical Memory Map */
#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index 67bcc0c..ee63ce3 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -18,13 +18,6 @@
#include <asm/arch/omap.h>
-#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
-#define CONFIG_MACH_TYPE MACH_TYPE_TI8148EVM
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG /* for ramdisk support */
-
/* commands to include */
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -87,8 +80,6 @@
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 512
-#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default */
-
/**
* Physical Memory Map
*/
@@ -137,9 +128,6 @@
* Since SPL did pll and ddr initialization for us,
* we don't need to do it twice.
*/
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
/* Ethernet */
#define CONFIG_NET_RETRY_COUNT 10
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index 44fdc4c..cffa794 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -12,8 +12,6 @@
#include <configs/ti_armv7_omap.h>
#include <asm/arch/omap.h>
-#define CONFIG_MACH_TYPE MACH_TYPE_TI8168EVM
-
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
@@ -92,9 +90,6 @@
/* Since SPL did pll and ddr initialization for us,
* we don't need to do it twice.
*/
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
/*
* Disable MMC DM for SPL build and can be re-enabled after adding
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index c57b20a..10da123 100644
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -46,9 +46,6 @@
* Since SPL did pll and ddr initialization for us,
* we don't need to do it twice.
*/
-#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
/*
* When building U-Boot such that there is no previous loader
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index 4fcf741..fa48cd2 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -16,19 +16,6 @@
#ifndef __CONFIG_TI_ARMV7_COMMON_H__
#define __CONFIG_TI_ARMV7_COMMON_H__
-/* Support both device trees and ATAGs. */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/*
- * Our DDR memory always starts at 0x80000000 and U-Boot shall have
- * relocated itself to higher in memory by the time this value is used.
- * However, set this to a 32MB offset to allow for easier Linux kernel
- * booting as the default is often used as the kernel load address.
- */
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
/*
* We setup defaults based on constraints from the Linux kernel, which should
* also be safe elsewhere. We have the default load at 32MB into DDR (for
@@ -87,9 +74,6 @@
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
/* If DM_I2C, enable non-DM I2C support */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#endif
/*
* The following are general good-enough settings for U-Boot. We set a
@@ -100,7 +84,6 @@
* we are on so we do not need to rely on the command prompt. We set a
* console baudrate of 115200 and use the default baud rate table.
*/
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
/* As stated above, the following choices are optional. */
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index cfc2be7..a6d7b8a 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -9,10 +9,7 @@
#ifndef __CONFIG_KS2_EVM_H
#define __CONFIG_KS2_EVM_H
-#define CONFIG_SOC_KEYSTONE
-
/* U-Boot Build Configuration */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
/* SoC Configuration */
#define CONFIG_SPL_TARGET "u-boot-spi.gph"
@@ -71,37 +68,6 @@
#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
#define CONFIG_SYS_SGMII_RATESCALE 2
-/* Keyston Navigator Configuration */
-#define CONFIG_TI_KSNAV
-#define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS
-#define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE
-#define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE
-#define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE
-#define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE
-#define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE
-#define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE
-#define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE
-#define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE
-#define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE
-#define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE
-#define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE
-#define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM
-#define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM
-
-/* NETCP pktdma */
-#define CONFIG_KSNAV_PKTDMA_NETCP
-#define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE
-#define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE
-#define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM
-#define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE
-#define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM
-#define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE
-#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE
-#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM
-#define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE
-#define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE
-#define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE
-
/* Keystone net */
#define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR
#define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE
@@ -109,8 +75,6 @@
#define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
#define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
-#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
-
/* I2C Configuration */
#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
@@ -120,15 +84,8 @@
#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
/* EEPROM definitions */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
/* NAND Configuration */
-#define CONFIG_KEYSTONE_RBL_NAND
-#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET
#define CONFIG_SYS_NAND_MASK_CLE 0x4000
#define CONFIG_SYS_NAND_MASK_ALE 0x2000
#define CONFIG_SYS_NAND_CS 2
@@ -155,7 +112,6 @@
#define CONFIG_TIMESTAMP
/* EDMA3 */
-#define CONFIG_TI_EDMA3
#define KERNEL_MTD_PARTS \
"mtdparts=" \
@@ -187,7 +143,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
- CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
+ ENV_KS2_BOARD_SETTINGS \
DFUARGS \
"bootdir=/boot\0" \
"tftp_root=/\0" \
diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 1e6f038..b5ccfdc 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -118,7 +118,6 @@
#ifdef CONFIG_SPL_BUILD
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
-#undef CONFIG_SYS_I2C_LEGACY
#endif
#endif /* __CONFIG_TI_OMAP4_COMMON_H */
diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h
index cc93f19..bbeedaf 100644
--- a/include/configs/total_compute.h
+++ b/include/configs/total_compute.h
@@ -18,14 +18,10 @@
#define UART0_BASE 0x7ff80000
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
-
/* PL011 Serial Configuration */
#define CONFIG_PL011_CLOCK 7372800
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR 0x90000000
/* Physical Memory Map */
#define PHYS_SDRAM_1 0x80000000
@@ -34,9 +30,7 @@
#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_ARM_PL180_MMCI_BASE 0x001c050000
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 127
-#define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 12000000
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootm_size=0x20000000\0" \
diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h
index f25f6dc..32689e1 100644
--- a/include/configs/tplink_wdr4300.h
+++ b/include/configs/tplink_wdr4300.h
@@ -12,12 +12,9 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN 0x40000
#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000
#define CONFIG_SYS_SDRAM_BASE 0xa0000000
-#define CONFIG_SYS_LOAD_ADDR 0xa1000000
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index b58c475..1efe9d5 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -36,17 +36,12 @@
/* I2C Configs */
#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_I2C_SPEED 100000
/* I2C EEPROM (M24C64) */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS 5 /* 32 Bytes */
#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS 20
#if !defined(CONFIG_DM_PMIC)
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#define TQMA6_PFUZE100_I2C_BUS 2
@@ -65,9 +60,6 @@
#define CONFIG_ARP_TIMEOUT 200UL
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M)
-
#if defined(CONFIG_TQMA6X_MMC_BOOT)
#define TQMA6_UBOOT_OFFSET SZ_1K
diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h
index aa98a51..e68e96d 100644
--- a/include/configs/tqma6_wru4.h
+++ b/include/configs/tqma6_wru4.h
@@ -30,6 +30,5 @@
#define CONFIG_SYS_BOOTCOUNT_BE
/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
#endif /* __CONFIG_TQMA6_WRU4_H */
diff --git a/include/configs/trats.h b/include/configs/trats.h
index a44792d..396e9f2 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -26,11 +26,6 @@
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
-/* memtest works on */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
-
-#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
-
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
@@ -40,9 +35,6 @@
#define CONFIG_SYS_MONITOR_BASE 0x00000000
-#define CONFIG_BOOTBLOCK "10"
-#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
-
/* Tizen - partitions definitions */
#define PARTS_CSA "csa-mmc"
#define PARTS_BOOT "boot"
@@ -94,7 +86,7 @@
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=${nfsroot},nolock,tcp " \
"ip=${ipaddr}:${serverip}:${gatewayip}:" \
- "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
+ "${netmask}:generic:usb0:off ${console} ${meminfo}" \
"; run bootk\0" \
"ramfsboot=" \
"setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
@@ -112,7 +104,7 @@
"console=console=ttySAC2,115200n8\0" \
"meminfo=crashkernel=32M@0x50000000\0" \
"nfsroot=/nfsroot/arm\0" \
- "bootblock=" CONFIG_BOOTBLOCK "\0" \
+ "bootblock=10\0" \
"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
"loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
"${fdtfile}\0" \
@@ -141,7 +133,7 @@
"setenv spl_imgsize;" \
"setenv spl_imgaddr;" \
"setenv spl_addr_tmp;\0" \
- CONFIG_EXTRA_ENV_ITB \
+ ENV_ITB \
"fdtaddr=40800000\0" \
/* Falcon mode definitions */
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 4b1eff0..114dd8e 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -24,8 +24,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
-/* memtest works on */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
#define CONFIG_BOOTCOMMAND "run autoboot"
@@ -125,7 +123,7 @@
"setenv spl_imgsize;" \
"setenv spl_imgaddr;" \
"setenv spl_addr_tmp;\0" \
- CONFIG_EXTRA_ENV_ITB \
+ ENV_ITB \
"fdtaddr=40800000\0" \
/* GPT */
diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h
index b914e44..b562d44 100644
--- a/include/configs/trimslice.h
+++ b/include/configs/trimslice.h
@@ -18,8 +18,6 @@
#define CONFIG_TEGRA_UARTA_GPU
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_TRIMSLICE
-
/* SPI */
/* Environment in SPI */
diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h
index 6712839..0bbc984 100644
--- a/include/configs/turris_mox.h
+++ b/include/configs/turris_mox.h
@@ -30,26 +30,11 @@
4000000, 4500000, 5000000, 5500000, \
6000000 }
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_INITRD_TAG /* enable INITRD tag */
-#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
-
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
-
-/*
* Other required minimal configurations
*/
-#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
@@ -60,7 +45,6 @@
* I2C
*/
#define CONFIG_I2C_MV
-#define CONFIG_SYS_I2C_SLAVE 0x0
/* Environment in SPI NOR flash */
diff --git a/include/configs/udoo.h b/include/configs/udoo.h
index 2983693..fe6ea68 100644
--- a/include/configs/udoo.h
+++ b/include/configs/udoo.h
@@ -12,12 +12,6 @@
#include "imx6_spl.h"
-/* Provide the MACH_TYPE value that the vendor kernel requires. */
-#define CONFIG_MACH_TYPE 4800
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART2_BASE
/* SATA Configs */
@@ -43,10 +37,10 @@
"setenv fdtfile imx6dl-udoo.dtb; fi; " \
"if test ${fdtfile} = undefined; then " \
"echo WARNING: Could not determine dtb to use; fi\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x13000000\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
BOOTENV
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
index 813e743..b06abc9 100644
--- a/include/configs/udoo_neo.h
+++ b/include/configs/udoo_neo.h
@@ -14,9 +14,6 @@
#include "imx6_spl.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-
/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
@@ -45,10 +42,10 @@
"setenv fdtfile imx6sx-udoo-neo-extended.dtb; fi; " \
"if test $fdtfile = UNDEFINED; then " \
"echo WARNING: Could not determine dtb to use; fi\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x84000000\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
BOOTENV
#define BOOT_TARGET_DEVICES(func) \
@@ -70,15 +67,7 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/* I2C configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE3000
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
#define PFUZE3000_I2C_BUS 0
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 12028e5..d419db1 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -39,8 +39,6 @@
#define BOOTENV
#endif
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-
#define CONFIG_TIMESTAMP
#define CONFIG_SYS_MONITOR_BASE 0
@@ -69,7 +67,6 @@
#define CONFIG_GATEWAYIP 192.168.11.1
#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_SYS_LOAD_ADDR 0x85000000
#define CONFIG_SYS_BOOTM_LEN (32 << 20)
#if defined(CONFIG_ARM64)
@@ -84,7 +81,7 @@
#endif
#define CONFIG_ROOTPATH "/nfs/root/path"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs $bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h
index 73bf2d1..c12e536 100644
--- a/include/configs/usb_a9263.h
+++ b/include/configs/usb_a9263.h
@@ -20,14 +20,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
-#define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
/*
* Hardware drivers
*/
@@ -71,16 +63,9 @@
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#endif
-#define CONFIG_SYS_LOAD_ADDR 0x22000000
-
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_BOOTCOMMAND "nboot 21000000 0"
#define CONFIG_EXTRA_ENV_SETTINGS \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
-
#endif
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index 648232b..6f5a1c8 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -31,19 +31,9 @@
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
-/* I2C */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-
/* Fuse */
#define CONFIG_FSL_IIM
-/* U-Boot memory offsets */
-#define CONFIG_LOADADDR 0x72000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Linux boot */
#define CONFIG_HOSTNAME "usbarmory"
#define CONFIG_BOOTCOMMAND \
@@ -89,6 +79,4 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-
#endif /* __CONFIG_H */
diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h
index 82a8fa7..3b86309 100644
--- a/include/configs/vcoreiii.h
+++ b/include/configs/vcoreiii.h
@@ -10,8 +10,6 @@
/* Onboard devices */
-#define CONFIG_SYS_MALLOC_LEN 0x1F0000
-#define CONFIG_SYS_LOAD_ADDR 0x00100000
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
diff --git a/include/configs/ventana.h b/include/configs/ventana.h
index 21f90f3..0bd5a1e 100644
--- a/include/configs/ventana.h
+++ b/include/configs/ventana.h
@@ -17,8 +17,6 @@
#define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
-#define CONFIG_MACH_TYPE MACH_TYPE_VENTANA
-
/* Environment in eMMC, at the end of 2nd "boot sector" */
#include "tegra-common-post.h"
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 7be5e5d..0f9ec66 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -37,9 +37,6 @@
"ramdisk_addr_r=0x46400000\0" \
"scriptaddr=0x46000000\0"
-#define CONFIG_LOADADDR 0x40480000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Enable Distro Boot */
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
@@ -88,8 +85,6 @@
/* Environment in eMMC, before config block at the end of 1st "boot sector" */
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN SZ_32M
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* SDRAM configuration */
@@ -110,7 +105,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-#define CONFIG_SYS_I2C_SPEED 100000
/* ENET */
#define CONFIG_ETHPRIME "FEC"
diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index 54b5967..df22584 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -85,9 +85,6 @@
#endif
#endif /* !CONFIG_GICV3 */
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
-
#ifndef CONFIG_TARGET_VEXPRESS64_JUNO
/* The Vexpress64 simulators use SMSC91C111 */
#define CONFIG_SMC91111 1
@@ -105,7 +102,6 @@
#define CONFIG_BOOTP_BOOTFILESIZE
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
/* Physical Memory Map */
#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
diff --git a/include/configs/vexpress_ca9x4.h b/include/configs/vexpress_ca9x4.h
new file mode 100644
index 0000000..ba3f979
--- /dev/null
+++ b/include/configs/vexpress_ca9x4.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2011 Linaro
+ * Ryan Harkin, <ryan.harkin@linaro.org>
+ *
+ * Configuration for Versatile Express. Parts were derived from other ARM
+ * configurations.
+ */
+
+#ifndef __VEXPRESS_CA9X4_H
+#define __VEXPRESS_CA9X4_H
+
+#define VEXPRESS_ORIGINAL_MEMORY_MAP
+#include "vexpress_common.h"
+
+#endif /* VEXPRESS_CA9X4_H */
diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index b131480..02fd963 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -15,7 +15,7 @@
* Definitions copied from linux kernel:
* arch/arm/mach-vexpress/include/mach/motherboard.h
*/
-#ifdef CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
+#ifdef VEXPRESS_ORIGINAL_MEMORY_MAP
/* CS register bases for the original memory map. */
#define V2M_PA_CS0 0x40000000
#define V2M_PA_CS1 0x44000000
@@ -56,7 +56,6 @@
/* Common peripherals relative to CS7. */
#define V2M_AACI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(4))
-#define V2M_MMCI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(5))
#define V2M_KMI0 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(6))
#define V2M_KMI1 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(7))
@@ -109,15 +108,8 @@
/* Board info register */
#define SYS_ID V2M_SYSREGS
-#define CONFIG_REVISION_TAG 1
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_SYS_L2CACHE_OFF 1
-#define CONFIG_INITRD_TAG 1
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024) /* >= 512 KiB */
#define SCTL_BASE V2M_SYSCTL
#define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0)
@@ -135,15 +127,12 @@
#define CONFIG_SYS_SERIAL0 V2M_UART0
#define CONFIG_SYS_SERIAL1 V2M_UART1
-#define CONFIG_ARM_PL180_MMCI_BASE V2M_MMCI
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 127
-#define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x8000)
#define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000)
/* Physical Memory Map */
@@ -169,29 +158,10 @@
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
-#ifdef CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
-#define CONFIG_PLATFORM_ENV_SETTINGS \
- "loadaddr=0x80008000\0" \
- "ramdisk_addr_r=0x61000000\0" \
- "kernel_addr=0x44100000\0" \
- "ramdisk_addr=0x44800000\0" \
- "maxramdisk=0x1800000\0" \
- "pxefile_addr_r=0x88000000\0" \
- "scriptaddr=0x88000000\0" \
- "kernel_addr_r=0x80008000\0"
-#elif defined(CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP)
-#define CONFIG_PLATFORM_ENV_SETTINGS \
- "loadaddr=0xa0008000\0" \
- "ramdisk_addr_r=0x81000000\0" \
- "kernel_addr=0x0c100000\0" \
- "ramdisk_addr=0x0c800000\0" \
- "maxramdisk=0x1800000\0" \
- "pxefile_addr_r=0xa8000000\0" \
- "scriptaddr=0xa8000000\0" \
- "kernel_addr_r=0xa0008000\0"
-#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
- CONFIG_PLATFORM_ENV_SETTINGS \
+ "kernel_addr_r=0x60100000\0" \
+ "fdt_addr_r=0x60000000\0" \
+ "bootargs=console=tty0 console=ttyAMA0,38400n8\0" \
BOOTENV \
"console=ttyAMA0,38400n8\0" \
"dram=1024M\0" \
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 4f11018..49053ce 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -13,16 +13,6 @@
#define CONFIG_SYS_FSL_CLK
-#define CONFIG_MACH_TYPE 4146
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
-/* Enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
-
/* NAND support */
#define CONFIG_SYS_NAND_ONFI_DETECTION
@@ -42,15 +32,8 @@
#define CONFIG_FEC_MXC_PHYADDR 0
/* I2C Configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_SPD_BUS_NUM 0
-
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
/* We boot from the gfxRAM area of the OCRAM. */
#define CONFIG_BOARD_SIZE_LIMIT 520192
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 496c228..7397d3e 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -30,8 +30,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
/* SerialFlash */
#ifdef CONFIG_CMD_SF
diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h
index e90eaf3..dcdaffc 100644
--- a/include/configs/vining_2000.h
+++ b/include/configs/vining_2000.h
@@ -14,9 +14,6 @@
#include "imx6_spl.h"
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
@@ -42,16 +39,7 @@
/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
-/* I2C Configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
index dfdb8fc..58888d4 100644
--- a/include/configs/vocore2.h
+++ b/include/configs/vocore2.h
@@ -12,14 +12,9 @@
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
-
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
/* SPL */
-#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SPL_BSS_START_ADDR 0x80010000
@@ -41,7 +36,6 @@
/* Memory usage */
#define CONFIG_SYS_MAXARGS 64
-#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
#define CONFIG_SYS_CBSIZE 512
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index bd64893..ece762e 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -12,11 +12,6 @@
#include "imx6_spl.h"
-#define CONFIG_MACH_TYPE MACH_TYPE_WANDBOARD_IMX6
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
#define CONFIG_MXC_UART_BASE UART1_BASE
/* SATA Configs */
@@ -45,7 +40,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=ttymxc0\0" \
"splashpos=m,m\0" \
- "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"fdtfile=undefined\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
@@ -85,11 +80,11 @@
"setenv fdtfile imx6dl-wandboard-revb1.dtb; fi; " \
"if test $fdtfile = undefined; then " \
"echo WARNING: Could not determine dtb to use; fi; \0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x13000000\0" \
"ramdiskaddr=0x13000000\0" \
- "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
BOOTENV
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/warp.h b/include/configs/warp.h
index e3beee0..11a9b31 100644
--- a/include/configs/warp.h
+++ b/include/configs/warp.h
@@ -14,9 +14,6 @@
#include "mx6_common.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */
-
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* MMC Configs */
@@ -53,15 +50,8 @@
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* I2C Configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index a5d52e3..0822eaf 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -13,17 +13,11 @@
#define PHYS_SDRAM_SIZE SZ_512M
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M)
-
/* MMC Config*/
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
-/* Switch on SERIAL_TAG */
-#define CONFIG_SERIAL_TAG
-
#define CONFIG_DFU_ENV_SETTINGS \
"dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \
@@ -107,7 +101,6 @@
"fi; " \
"fi"
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
@@ -135,10 +128,6 @@
*/
#define CONFIG_BOARD_SIZE_LIMIT 785408
-/* I2C configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* environment organization */
#define CONFIG_SYS_FSL_USDHC_NUM 1
diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index f96178b..83b24a7 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -14,24 +14,11 @@
#include <asm/arch/cpu.h>
/*
- * Define work_92105 machine type by hand -- done only for compatibility
- * with original board code
- */
-#define CONFIG_MACH_TYPE 736
-
-#if !defined(CONFIG_SPL_BUILD)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
-/*
* Memory configurations
*/
-#define CONFIG_SYS_MALLOC_LEN SZ_1M
#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K)
-
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \
- GENERATED_GBL_DATA_SIZE)
@@ -43,24 +30,6 @@
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
-/*
- * I2C driver
- */
-
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_SPEED 350000
-
-/*
- * I2C EEPROM
- */
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-
-/*
- * I2C RTC
- */
-
#define CONFIG_RTC_DS1374
/*
@@ -105,12 +74,8 @@
/*
* Boot Linux
*/
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_LOADADDR 0x80008000
/*
* SPL
diff --git a/include/configs/x530.h b/include/configs/x530.h
index 64d6827..1e5d738 100644
--- a/include/configs/x530.h
+++ b/include/configs/x530.h
@@ -61,8 +61,6 @@
/* NAND */
#define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_SYS_MALLOC_LEN (4 << 20)
-
#include <asm/arch/config.h>
/*
@@ -75,7 +73,6 @@
"fdt_high=0x10000000\0" \
"initrd_high=0x10000000\0"
-#define CONFIG_SYS_LOAD_ADDR 0x1000000
#define CONFIG_UBI_PART user
#define CONFIG_UBIFS_VOLUME user
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index ab39b0b..4b39faa 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -53,15 +53,12 @@
*/
#define CONFIG_SYS_CBSIZE 512
-#define CONFIG_SYS_LOAD_ADDR 0x20000000
-
/*-----------------------------------------------------------------------
* CPU Features
*/
#define CONFIG_SYS_STACK_SIZE (32 * 1024)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN 0x200000
/*-----------------------------------------------------------------------
* Environment configuration
@@ -82,7 +79,6 @@
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_HOSTNAME "x86"
#define CONFIG_BOOTFILE "bzImage"
-#define CONFIG_LOADADDR 0x1000000
#define CONFIG_RAMDISK_ADDR 0x4000000
#if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB)
#define CONFIG_OTHBOOTARGS "othbootargs=\0"
@@ -109,7 +105,7 @@
"ramdiskfile=initramfs.gz\0"
-#define CONFIG_RAMBOOTCOMMAND \
+#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
@@ -117,7 +113,7 @@
"tftpboot $ramdisk_addr_r $ramdiskfile;" \
"zboot $kernel_addr_r 0 $ramdisk_addr_r $filesize"
-#define CONFIG_NFSBOOTCOMMAND \
+#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
diff --git a/include/configs/xea.h b/include/configs/xea.h
index 1207f75..5081cc8 100644
--- a/include/configs/xea.h
+++ b/include/configs/xea.h
@@ -43,8 +43,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_BOOTCOMMAND "run ${bootpri} ; run ${bootsec}"
-#define CONFIG_LOADADDR 0x42000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Extra Environment */
#define CONFIG_HOSTNAME "xea"
diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h
index d76ce13..c5e3d16 100644
--- a/include/configs/xenguest_arm64.h
+++ b/include/configs/xenguest_arm64.h
@@ -20,12 +20,8 @@
* This can be any arbitrary address as we are using PIE, but
* please note, that CONFIG_SYS_TEXT_BASE must match the below.
*/
-#define CONFIG_SYS_LOAD_ADDR 0x40000000
#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_SYS_LOAD_ADDR
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
-
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_MAXARGS 64
diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h
index 62680ad..4348645 100644
--- a/include/configs/xilinx_versal.h
+++ b/include/configs/xilinx_versal.h
@@ -36,7 +36,6 @@
#define CONFIG_BOOTP_MAY_FAIL
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR 0x8000000
/* Monitor Command Prompt */
/* Console I/O Buffer Size */
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 42758ba..e10d90c 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -15,7 +15,6 @@
/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */
/* Generic Interrupt Controller Definitions */
-#define CONFIG_GICV2
#define GICD_BASE 0xF9010000
#define GICC_BASE 0xF9020000
@@ -26,9 +25,6 @@
# define COUNTER_FREQUENCY 100000000
#endif
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x4000000)
-
/* Serial setup */
#define CONFIG_CPU_ARMV8
@@ -49,7 +45,6 @@
#endif
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR 0x8000000
#if defined(CONFIG_ZYNQMP_USB)
#define DFU_DEFAULT_POLL_TIMEOUT 300
diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h
index ef9c768..c106443 100644
--- a/include/configs/xilinx_zynqmp_mini.h
+++ b/include/configs/xilinx_zynqmp_mini.h
@@ -17,7 +17,6 @@
/* Undef unneeded configs */
#undef CONFIG_BOOTCOMMAND
#undef CONFIG_EXTRA_ENV_SETTINGS
-#undef CONFIG_SYS_MALLOC_LEN
#undef CONFIG_SYS_INIT_SP_ADDR
/* BOOTP options */
diff --git a/include/configs/xilinx_zynqmp_mini_emmc.h b/include/configs/xilinx_zynqmp_mini_emmc.h
index a7ae30d..57c40d6 100644
--- a/include/configs/xilinx_zynqmp_mini_emmc.h
+++ b/include/configs/xilinx_zynqmp_mini_emmc.h
@@ -13,6 +13,5 @@
#include <configs/xilinx_zynqmp_mini.h>
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MALLOC_LEN 0x800000
#endif /* __CONFIG_ZYNQMP_MINI_EMMC_H */
diff --git a/include/configs/xilinx_zynqmp_mini_nand.h b/include/configs/xilinx_zynqmp_mini_nand.h
index 692f6e5..782e696 100644
--- a/include/configs/xilinx_zynqmp_mini_nand.h
+++ b/include/configs/xilinx_zynqmp_mini_nand.h
@@ -15,6 +15,5 @@
#define CONFIG_SYS_SDRAM_SIZE 0x1000000
#define CONFIG_SYS_SDRAM_BASE 0x0
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000)
-#define CONFIG_SYS_MALLOC_LEN 0x800000
#endif /* __CONFIG_ZYNQMP_MINI_NAND_H */
diff --git a/include/configs/xilinx_zynqmp_mini_qspi.h b/include/configs/xilinx_zynqmp_mini_qspi.h
index 205ddb4..3091bae 100644
--- a/include/configs/xilinx_zynqmp_mini_qspi.h
+++ b/include/configs/xilinx_zynqmp_mini_qspi.h
@@ -13,6 +13,5 @@
#include <configs/xilinx_zynqmp_mini.h>
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000)
-#define CONFIG_SYS_MALLOC_LEN 0x1a00
#endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */
diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h
index c0cd72e..6d5b81e 100644
--- a/include/configs/xilinx_zynqmp_r5.h
+++ b/include/configs/xilinx_zynqmp_r5.h
@@ -17,12 +17,9 @@
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
/* Boot configuration */
-#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
-#define CONFIG_SYS_MALLOC_LEN 0x1400000
-
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
@@ -32,6 +29,4 @@
/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index e4678e3..1e2b6c0 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -13,25 +13,13 @@
/* SPL options */
#include "imx6_spl.h"
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (16 << 20)
-
#define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
-/* I2C configs */
-#define CONFIG_SYS_I2C_LEGACY
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
/* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index 516a608..b69834a 100644
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -65,8 +65,6 @@
# define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256KB */
#endif
-#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* heap 256KB */
-
/* Linux boot param area in RAM (used only when booting linux) */
#define CONFIG_SYS_BOOTPARAMS_LEN (64 << 10)
@@ -98,9 +96,6 @@
#define XTENSA_SYS_TEXT_ADDR \
(MEMADDR(CONFIG_SYS_MEMORY_SIZE) - CONFIG_SYS_MONITOR_LEN)
-/* Used by tftpboot; env var 'loadaddr' */
-#define CONFIG_SYS_LOAD_ADDR MEMADDR(0x02000000)
-
/*==============================*/
/* U-Boot general configuration */
/*==============================*/
diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h
index 8b571da..d7cbb0f 100644
--- a/include/configs/zmx25.h
+++ b/include/configs/zmx25.h
@@ -15,7 +15,6 @@
#define CONFIG_SYS_TIMER_COUNTER \
(&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
-#define CONFIG_MACH_TYPE MACH_TYPE_ZMX25
/*
* Environment settings
*/
@@ -26,10 +25,6 @@
"fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \
"bootm 0x81000000; bootelf 0x81000000\0"
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
/*
* Hardware drivers
*/
@@ -79,13 +74,5 @@
/*
* CFI FLASH driver setup
*/
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
-
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000)
#endif /* __CONFIG_H */
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 7859b77..9b4c54b 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -65,7 +65,6 @@
/* enable preboot to be loaded before CONFIG_BOOTDELAY */
/* Boot configuration */
-#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
#ifdef CONFIG_SPL_BUILD
#define BOOTENV
diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h
index 0491cf5..7eafdfd 100644
--- a/include/configs/zynq_cse.h
+++ b/include/configs/zynq_cse.h
@@ -9,8 +9,6 @@
#ifndef __CONFIG_ZYNQ_CSE_H
#define __CONFIG_ZYNQ_CSE_H
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#include <configs/zynq-common.h>
/* Undef unneeded configs */
diff --git a/include/dm/device.h b/include/dm/device.h
index 0a9718a..fac9961 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -181,7 +181,7 @@
u32 flags_;
#endif
int seq_;
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
ofnode node_;
#endif
#ifdef CONFIG_DEVRES
@@ -242,7 +242,7 @@
*/
static inline ofnode dev_ofnode(const struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
return dev->node_;
#else
return ofnode_null();
@@ -262,7 +262,7 @@
static inline int dev_of_offset(const struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
return ofnode_to_offset(dev_ofnode(dev));
#else
return -1;
@@ -271,7 +271,7 @@
static inline bool dev_has_ofnode(const struct udevice *dev)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
return ofnode_valid(dev_ofnode(dev));
#else
return false;
@@ -280,7 +280,7 @@
static inline void dev_set_ofnode(struct udevice *dev, ofnode node)
{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
dev->node_ = node;
#endif
}
@@ -300,7 +300,7 @@
ulong data;
};
-#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_REAL)
#define of_match_ptr(_ptr) (_ptr)
#else
#define of_match_ptr(_ptr) NULL
@@ -738,7 +738,7 @@
*
* @parent: Parent device to search
* @uclass_id: Uclass to look for
- * @devp: Returns device found, if any
+ * @devp: Returns device found, if any, else NULL
* @return 0 if found, else -ENODEV
*/
int device_find_first_inactive_child(const struct udevice *parent,
@@ -750,7 +750,7 @@
*
* @parent: Parent device to search
* @uclass_id: Uclass to look for
- * @devp: Returns first child device in that uclass, if any
+ * @devp: Returns first child device in that uclass, if any, else NULL
* @return 0 if found, else -ENODEV
*/
int device_find_first_child_by_uclass(const struct udevice *parent,
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 4e1a844..6a714d0 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1117,4 +1117,41 @@
*/
int ofnode_set_enabled(ofnode node, bool value);
+/**
+ * ofnode_conf_read_bool() - Read a boolean value from the U-Boot config
+ *
+ * This reads a property from the /config node of the devicetree.
+ *
+ * See doc/config.txt for bindings
+ *
+ * @prop_name property name to look up
+ * @return true, if it exists, false if not
+ */
+bool ofnode_conf_read_bool(const char *prop_name);
+
+/**
+ * ofnode_conf_read_int() - Read an integer value from the U-Boot config
+ *
+ * This reads a property from the /config node of the devicetree.
+ *
+ * See doc/config.txt for bindings
+ *
+ * @prop_name: property name to look up
+ * @default_val: default value to return if the property is not found
+ * @return integer value, if found, or @default_val if not
+ */
+int ofnode_conf_read_int(const char *prop_name, int default_val);
+
+/**
+ * ofnode_conf_read_str() - Read a string value from the U-Boot config
+ *
+ * This reads a property from the /config node of the devicetree.
+ *
+ * See doc/config.txt for bindings
+ *
+ * @prop_name: property name to look up
+ * @return string value, if found, or NULL if not
+ */
+const char *ofnode_conf_read_str(const char *prop_name);
+
#endif
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index e7edd40..3768432 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -54,6 +54,7 @@
UCLASS_FIRMWARE, /* Firmware */
UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */
UCLASS_GPIO, /* Bank of general-purpose I/O pins */
+ UCLASS_HASH, /* Hash device */
UCLASS_HWSPINLOCK, /* Hardware semaphores */
UCLASS_I2C, /* I2C bus */
UCLASS_I2C_EEPROM, /* I2C EEPROM device */
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index da0c1bf..15e5f9e 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -354,7 +354,7 @@
* The device returned is probed if necessary, and ready for use
*
* @devp: On entry, pointer to device to lookup. On exit, returns pointer
- * to the next device in the uclass if no error occurred, or -ENODEV if
+ * to the next device in the uclass if no error occurred, or NULL if
* there is no next device.
* @return 0 if found, -ENODEV if not found, other -ve on error
*/
diff --git a/include/dt-bindings/mfd/atmel-flexcom.h b/include/dt-bindings/mfd/atmel-flexcom.h
new file mode 100644
index 0000000..4e2fc32
--- /dev/null
+++ b/include/dt-bindings/mfd/atmel-flexcom.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * This header provides macros for Atmel Flexcom DT bindings.
+ *
+ * Copyright (C) 2015 Cyrille Pitchen <cyrille.pitchen@atmel.com>
+ */
+
+#ifndef __DT_BINDINGS_ATMEL_FLEXCOM_H__
+#define __DT_BINDINGS_ATMEL_FLEXCOM_H__
+
+#define ATMEL_FLEXCOM_MODE_USART 1
+#define ATMEL_FLEXCOM_MODE_SPI 2
+#define ATMEL_FLEXCOM_MODE_TWI 3
+
+#endif /* __DT_BINDINGS_ATMEL_FLEXCOM_H__ */
diff --git a/include/dt-structs.h b/include/dt-structs.h
index f9ccaf5..fa1622c 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -10,16 +10,43 @@
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct driver_info;
+/**
+ * struct phandle_0_arg - hold a phandle record with no arguments
+ *
+ * This holds a phandle pointing to another device. See 'Indexes' in the
+ * of-plat-rst documentation.
+ *
+ * @idx: udevice index (or driver_info index if !OF_PLATDATA_INST)
+ * @arg: arguments
+ */
struct phandle_0_arg {
uint idx;
int arg[0];
};
+/**
+ * struct phandle_2_arg - hold a phandle record with up to one argument
+ *
+ * This holds a phandle pointing to another device. See 'Indexes' in the
+ * of-plat-rst documentation.
+ *
+ * @idx: udevice index (or driver_info index if !OF_PLATDATA_INST)
+ * @arg: arguments
+ */
struct phandle_1_arg {
uint idx;
int arg[1];
};
+/**
+ * struct phandle_2_arg - hold a phandle record with up to two arguments
+ *
+ * This holds a phandle pointing to another device. See 'Indexes' in the
+ * of-plat-rst documentation.
+ *
+ * @idx: udevice index (or driver_info index if !OF_PLATDATA_INST)
+ * @arg: arguments
+ */
struct phandle_2_arg {
uint idx;
int arg[2];
diff --git a/include/eeprom.h b/include/eeprom.h
index 6820844..f9c6542 100644
--- a/include/eeprom.h
+++ b/include/eeprom.h
@@ -21,8 +21,4 @@
#define eeprom_write(dev_addr, offset, buffer, cnt) (-ENOSYS)
#endif
-#if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
-# define CONFIG_SYS_DEF_EEPROM_ADDR CONFIG_SYS_I2C_EEPROM_ADDR
-#endif
-
#endif
diff --git a/include/env_default.h b/include/env_default.h
index 1ddd64b..66e203e 100644
--- a/include/env_default.h
+++ b/include/env_default.h
@@ -82,8 +82,8 @@
#ifdef CONFIG_BOOTFILE
"bootfile=" CONFIG_BOOTFILE "\0"
#endif
-#ifdef CONFIG_LOADADDR
- "loadaddr=" __stringify(CONFIG_LOADADDR) "\0"
+#ifdef CONFIG_SYS_LOAD_ADDR
+ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR)"\0"
#endif
#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0)
"pcidelay=" __stringify(CONFIG_PCI_BOOTDELAY)"\0"
diff --git a/include/fdt_support.h b/include/fdt_support.h
index f6f46bb..72a5b90 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -203,8 +203,6 @@
* called at the end of the image_setup_libfdt() is to do that convertion.
*/
void ft_board_setup_ex(void *blob, struct bd_info *bd);
-void ft_cpu_setup(void *blob, struct bd_info *bd);
-void ft_pci_setup(void *blob, struct bd_info *bd);
/**
* Add system-specific data to the FDT before booting the OS.
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 8ac20c9..23efbe7 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -746,39 +746,6 @@
*/
int fdtdec_get_child_count(const void *blob, int node);
-/**
- * Look in the FDT for a config item with the given name and return its value
- * as a 32-bit integer. The property must have at least 4 bytes of data. The
- * value of the first cell is returned.
- *
- * @param blob FDT blob to use
- * @param prop_name Node property name
- * @param default_val default value to return if the property is not found
- * @return integer value, if found, or default_val if not
- */
-int fdtdec_get_config_int(const void *blob, const char *prop_name,
- int default_val);
-
-/**
- * Look in the FDT for a config item with the given name
- * and return whether it exists.
- *
- * @param blob FDT blob
- * @param prop_name property name to look up
- * @return 1, if it exists, or 0 if not
- */
-int fdtdec_get_config_bool(const void *blob, const char *prop_name);
-
-/**
- * Look in the FDT for a config item with the given name and return its value
- * as a string.
- *
- * @param blob FDT blob
- * @param prop_name property name to look up
- * @returns property string, NULL on error.
- */
-char *fdtdec_get_config_string(const void *blob, const char *prop_name);
-
/*
* Look up a property in a node and return its contents in a byte
* array of given length. The property must have at least enough data for
diff --git a/include/i2c.h b/include/i2c.h
index 3d9ecab..a35e99b 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -610,6 +610,10 @@
*/
int acpi_i2c_of_to_plat(struct udevice *dev);
+#ifdef CONFIG_SYS_I2C_EARLY_INIT
+void i2c_early_init_f(void);
+#endif
+
#if !CONFIG_IS_ENABLED(DM_I2C)
/*
@@ -743,26 +747,13 @@
#endif
/*
- * Many boards/controllers/drivers don't support an I2C slave interface so
- * provide a default slave address for them for use in common code. A real
- * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
- * support a slave interface.
- */
-#ifndef CONFIG_SYS_I2C_SLAVE
-#define CONFIG_SYS_I2C_SLAVE 0xfe
-#endif
-
-/*
* Initialization, must be called once on start up, may be called
* repeatedly to change the speed and slave addresses.
*/
-#ifdef CONFIG_SYS_I2C_EARLY_INIT
-void i2c_early_init_f(void);
-#endif
void i2c_init(int speed, int slaveaddr);
void i2c_init_board(void);
-#ifdef CONFIG_SYS_I2C_LEGACY
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
/*
* i2c_get_bus_num:
*
@@ -942,7 +933,7 @@
* only for backwardcompatibility, should go away if we switched
* completely to new multibus support.
*/
-#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
# if !defined(CONFIG_SYS_MAX_I2C_BUS)
# define CONFIG_SYS_MAX_I2C_BUS 2
# endif
diff --git a/include/i8042.h b/include/i8042.h
index 8d69fa1..6876320 100644
--- a/include/i8042.h
+++ b/include/i8042.h
@@ -20,12 +20,12 @@
#define STATUS_IBF (1 << 1)
/* Configuration byte bit defines */
-#define CONFIG_KIRQ_EN (1 << 0)
-#define CONFIG_MIRQ_EN (1 << 1)
-#define CONFIG_SET_BIST (1 << 2)
-#define CONFIG_KCLK_DIS (1 << 4)
-#define CONFIG_MCLK_DIS (1 << 5)
-#define CONFIG_AT_TRANS (1 << 6)
+#define CFG_KIRQ_EN (1 << 0)
+#define CFG_MIRQ_EN (1 << 1)
+#define CFG_SET_BIST (1 << 2)
+#define CFG_KCLK_DIS (1 << 4)
+#define CFG_MCLK_DIS (1 << 5)
+#define CFG_AT_TRANS (1 << 6)
/* i8042 commands */
#define CMD_RD_CONFIG 0x20 /* read configuration byte */
diff --git a/include/irq.h b/include/irq.h
index 8527e4d..a0965e4 100644
--- a/include/irq.h
+++ b/include/irq.h
@@ -200,6 +200,35 @@
*/
int irq_read_and_clear(struct irq *irq);
+struct phandle_2_arg;
+/**
+ * irq_get_by_phandle() - Get an irq by its phandle information (of-platadata)
+ *
+ * This function is used when of-platdata is enabled.
+ *
+ * This looks up an irq using the phandle info. With dtoc, each phandle in the
+ * 'interrupts-extended ' property is transformed into an idx representing the
+ * device. For example:
+ *
+ * interrupts-extended = <&acpi_gpe 0x3c 0>;
+ *
+ * might result in:
+ *
+ * .interrupts_extended = {6, {0x3c, 0}},},
+ *
+ * indicating that the irq is udevice idx 6 in dt-plat.c with a arguments of
+ * 0x3c and 0.This function can return a valid irq given the above
+ * information. In this example it would return an irq containing the
+ * 'acpi_gpe' device and the irq ID 0x3c.
+ *
+ * @dev: Device containing the phandle
+ * @cells: Phandle info
+ * @irq: A pointer to a irq struct to initialise
+ * @return 0 if OK, or a negative error code
+ */
+int irq_get_by_phandle(struct udevice *dev, const struct phandle_2_arg *cells,
+ struct irq *irq);
+
/**
* irq_get_by_index - Get/request an irq by integer index.
*
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 66febc6..2fba9dc 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -891,7 +891,7 @@
void __iomem *IO_ADDR_R;
void __iomem *IO_ADDR_W;
- int flash_node;
+ ofnode flash_node;
uint8_t (*read_byte)(struct mtd_info *mtd);
u16 (*read_word)(struct mtd_info *mtd);
@@ -973,12 +973,12 @@
static inline void nand_set_flash_node(struct nand_chip *chip,
ofnode node)
{
- chip->flash_node = ofnode_to_offset(node);
+ chip->flash_node = node;
}
static inline ofnode nand_get_flash_node(struct nand_chip *chip)
{
- return offset_to_ofnode(chip->flash_node);
+ return chip->flash_node;
}
static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)
diff --git a/include/lmb.h b/include/lmb.h
index 3c4afdf..1984291 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -122,6 +122,7 @@
void board_lmb_reserve(struct lmb *lmb);
void arch_lmb_reserve(struct lmb *lmb);
+void arch_lmb_reserve_generic(struct lmb *lmb, ulong sp, ulong end, ulong align);
/* Low level functions */
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 71cffa1..0275b31 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -1372,7 +1372,7 @@
#endif /* !CONFIG_MPC83XX_SDRAM */
/*
- * CONFIG_ADDRESS - PCI Config Address Register
+ * PCI_CONFIG_ADDRESS - PCI Config Address Register
*/
#define PCI_CONFIG_ADDRESS_EN 0x80000000
#define PCI_CONFIG_ADDRESS_BN_SHIFT 16
diff --git a/include/netdev.h b/include/netdev.h
index 00a0993..fb18f09 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -29,7 +29,6 @@
int cpu_eth_init(struct bd_info *bis);
/* Driver initialization prototypes */
-int at91emac_register(struct bd_info *bis, unsigned long iobase);
int ax88180_initialize(struct bd_info *bis);
int bcm_sf2_eth_register(struct bd_info *bis, u8 dev_num);
int bfin_EMAC_initialize(struct bd_info *bis);
diff --git a/include/os.h b/include/os.h
index 7b20d60..770d76e 100644
--- a/include/os.h
+++ b/include/os.h
@@ -52,6 +52,14 @@
#define OS_SEEK_END 2
/**
+ * os_filesize() - Calculate the size of a file
+ *
+ * @fd: File descriptor as returned by os_open()
+ * Return: file size or negative error code
+ */
+int os_filesize(int fd);
+
+/**
* Access to the OS open() system call
*
* @pathname: Pathname of file to open
@@ -398,6 +406,19 @@
*/
int os_read_file(const char *name, void **bufp, int *sizep);
+/**
+ * os_map_file() - Map a file from the host filesystem into memory
+ *
+ * This can be useful when to provide a backing store for an emulated device
+ *
+ * @pathname: File pathname to map
+ * @os_flags: Flags, like OS_O_RDONLY, OS_O_RDWR
+ * @bufp: Returns buffer containing the file
+ * @sizep: Returns size of data
+ * Return: 0 if OK, -ve on error
+ */
+int os_map_file(const char *pathname, int os_flags, void **bufp, int *sizep);
+
/*
* os_find_text_base() - Find the text section in this running process
*
diff --git a/include/power-domain.h b/include/power-domain.h
index 72ff2ff..62ff199 100644
--- a/include/power-domain.h
+++ b/include/power-domain.h
@@ -162,8 +162,7 @@
*
* @return 0 if OK, or a negative error code.
*/
-#if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) && \
- CONFIG_IS_ENABLED(POWER_DOMAIN)
+#if CONFIG_IS_ENABLED(OF_REAL) && CONFIG_IS_ENABLED(POWER_DOMAIN)
int dev_power_domain_on(struct udevice *dev);
#else
static inline int dev_power_domain_on(struct udevice *dev)
@@ -179,8 +178,7 @@
*
* @return 0 if OK, or a negative error code.
*/
-#if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) && \
- CONFIG_IS_ENABLED(POWER_DOMAIN)
+#if CONFIG_IS_ENABLED(OF_REAL) && CONFIG_IS_ENABLED(POWER_DOMAIN)
int dev_power_domain_off(struct udevice *dev);
#else
static inline int dev_power_domain_off(struct udevice *dev)
diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h
index 82fe350..cf476c8 100644
--- a/include/power/max77686_pmic.h
+++ b/include/power/max77686_pmic.h
@@ -154,7 +154,7 @@
OPMODE_ON,
};
-#ifdef CONFIG_POWER
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV);
int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode);
int max77686_set_buck_voltage(struct pmic *p, int buck, ulong uV);
diff --git a/include/power/pmic.h b/include/power/pmic.h
index be9de6b..97f855c 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -17,7 +17,8 @@
enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};
-#ifdef CONFIG_POWER
+/* TODO: Change to !CONFIG_IS_ENABLED(DM_PMIC) when SPL_DM_PMIC exists */
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
enum { I2C_PMIC, I2C_NUM, };
enum { PMIC_READ, PMIC_WRITE, };
enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
@@ -82,8 +83,9 @@
struct pmic *parent;
struct list_head list;
};
-#endif /* CONFIG_POWER */
+#endif /* CONFIG_IS_ENABLED(POWER_LEGACY) */
+/* TODO: Change to CONFIG_IS_ENABLED(DM_PMIC) when SPL_DM_PMIC exists */
#ifdef CONFIG_DM_PMIC
/**
* U-Boot PMIC Framework
@@ -306,9 +308,12 @@
uint trans_len;
};
-#endif /* CONFIG_DM_PMIC */
+#endif /* DM_PMIC */
-#ifdef CONFIG_POWER
+/* TODO: Change to CONFIG_IS_ENABLED(DM_PMIC) when SPL_DM_PMIC exists */
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
+
+/* Legacy API, do not use */
int pmic_init(unsigned char bus);
int power_init_board(void);
int pmic_dialog_init(unsigned char bus);
@@ -319,7 +324,7 @@
int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on);
-#endif
+#endif /* CONFIG_IS_ENABLED(POWER_LEGACY) */
#define pmic_i2c_addr (p->hw.i2c.addr)
#define pmic_i2c_tx_num (p->hw.i2c.tx_num)
diff --git a/include/radeon.h b/include/radeon.h
deleted file mode 100644
index da6c26b..0000000
--- a/include/radeon.h
+++ /dev/null
@@ -1,1988 +0,0 @@
-#ifndef _RADEON_H
-#define _RADEON_H
-
-
-#define RADEON_REGSIZE 0x4000
-
-
-#define MM_INDEX 0x0000
-#define MM_DATA 0x0004
-#define BUS_CNTL 0x0030
-#define HI_STAT 0x004C
-#define BUS_CNTL1 0x0034
-#define I2C_CNTL_1 0x0094
-#define CONFIG_CNTL 0x00E0
-#define CONFIG_MEMSIZE 0x00F8
-#define CONFIG_APER_0_BASE 0x0100
-#define CONFIG_APER_1_BASE 0x0104
-#define CONFIG_APER_SIZE 0x0108
-#define CONFIG_REG_1_BASE 0x010C
-#define CONFIG_REG_APER_SIZE 0x0110
-#define PAD_AGPINPUT_DELAY 0x0164
-#define PAD_CTLR_STRENGTH 0x0168
-#define PAD_CTLR_UPDATE 0x016C
-#define PAD_CTLR_MISC 0x0aa0
-#define AGP_CNTL 0x0174
-#define BM_STATUS 0x0160
-#define CAP0_TRIG_CNTL 0x0950
-#define CAP1_TRIG_CNTL 0x09c0
-#define VIPH_CONTROL 0x0C40
-#define VENDOR_ID 0x0F00
-#define DEVICE_ID 0x0F02
-#define COMMAND 0x0F04
-#define STATUS 0x0F06
-#define REVISION_ID 0x0F08
-#define REGPROG_INF 0x0F09
-#define SUB_CLASS 0x0F0A
-#define BASE_CODE 0x0F0B
-#define CACHE_LINE 0x0F0C
-#define LATENCY 0x0F0D
-#define HEADER 0x0F0E
-#define BIST 0x0F0F
-#define REG_MEM_BASE 0x0F10
-#define REG_IO_BASE 0x0F14
-#define REG_REG_BASE 0x0F18
-#define ADAPTER_ID 0x0F2C
-#define BIOS_ROM 0x0F30
-#define CAPABILITIES_PTR 0x0F34
-#define INTERRUPT_LINE 0x0F3C
-#define INTERRUPT_PIN 0x0F3D
-#define MIN_GRANT 0x0F3E
-#define MAX_LATENCY 0x0F3F
-#define ADAPTER_ID_W 0x0F4C
-#define PMI_CAP_ID 0x0F50
-#define PMI_NXT_CAP_PTR 0x0F51
-#define PMI_PMC_REG 0x0F52
-#define PM_STATUS 0x0F54
-#define PMI_DATA 0x0F57
-#define AGP_CAP_ID 0x0F58
-#define AGP_STATUS 0x0F5C
-#define AGP_COMMAND 0x0F60
-#define AIC_CTRL 0x01D0
-#define AIC_STAT 0x01D4
-#define AIC_PT_BASE 0x01D8
-#define AIC_LO_ADDR 0x01DC
-#define AIC_HI_ADDR 0x01E0
-#define AIC_TLB_ADDR 0x01E4
-#define AIC_TLB_DATA 0x01E8
-#define DAC_CNTL 0x0058
-#define DAC_CNTL2 0x007c
-#define CRTC_GEN_CNTL 0x0050
-#define MEM_CNTL 0x0140
-#define MC_CNTL 0x0140
-#define EXT_MEM_CNTL 0x0144
-#define MC_TIMING_CNTL 0x0144
-#define MC_AGP_LOCATION 0x014C
-#define MEM_IO_CNTL_A0 0x0178
-#define MEM_REFRESH_CNTL 0x0178
-#define MEM_INIT_LATENCY_TIMER 0x0154
-#define MC_INIT_GFX_LAT_TIMER 0x0154
-#define MEM_SDRAM_MODE_REG 0x0158
-#define AGP_BASE 0x0170
-#define MEM_IO_CNTL_A1 0x017C
-#define MC_READ_CNTL_AB 0x017C
-#define MEM_IO_CNTL_B0 0x0180
-#define MC_INIT_MISC_LAT_TIMER 0x0180
-#define MEM_IO_CNTL_B1 0x0184
-#define MC_IOPAD_CNTL 0x0184
-#define MC_DEBUG 0x0188
-#define MC_STATUS 0x0150
-#define MEM_IO_OE_CNTL 0x018C
-#define MC_CHIP_IO_OE_CNTL_AB 0x018C
-#define MC_FB_LOCATION 0x0148
-/* #define MC_FB_LOCATION 0x0188 */
-#define HOST_PATH_CNTL 0x0130
-#define MEM_VGA_WP_SEL 0x0038
-#define MEM_VGA_RP_SEL 0x003C
-#define HDP_DEBUG 0x0138
-#define SW_SEMAPHORE 0x013C
-#define CRTC2_GEN_CNTL 0x03f8
-#define CRTC2_DISPLAY_BASE_ADDR 0x033c
-#define SURFACE_CNTL 0x0B00
-#define SURFACE0_LOWER_BOUND 0x0B04
-#define SURFACE1_LOWER_BOUND 0x0B14
-#define SURFACE2_LOWER_BOUND 0x0B24
-#define SURFACE3_LOWER_BOUND 0x0B34
-#define SURFACE4_LOWER_BOUND 0x0B44
-#define SURFACE5_LOWER_BOUND 0x0B54
-#define SURFACE6_LOWER_BOUND 0x0B64
-#define SURFACE7_LOWER_BOUND 0x0B74
-#define SURFACE0_UPPER_BOUND 0x0B08
-#define SURFACE1_UPPER_BOUND 0x0B18
-#define SURFACE2_UPPER_BOUND 0x0B28
-#define SURFACE3_UPPER_BOUND 0x0B38
-#define SURFACE4_UPPER_BOUND 0x0B48
-#define SURFACE5_UPPER_BOUND 0x0B58
-#define SURFACE6_UPPER_BOUND 0x0B68
-#define SURFACE7_UPPER_BOUND 0x0B78
-#define SURFACE0_INFO 0x0B0C
-#define SURFACE1_INFO 0x0B1C
-#define SURFACE2_INFO 0x0B2C
-#define SURFACE3_INFO 0x0B3C
-#define SURFACE4_INFO 0x0B4C
-#define SURFACE5_INFO 0x0B5C
-#define SURFACE6_INFO 0x0B6C
-#define SURFACE7_INFO 0x0B7C
-#define SURFACE_ACCESS_FLAGS 0x0BF8
-#define SURFACE_ACCESS_CLR 0x0BFC
-#define GEN_INT_CNTL 0x0040
-#define GEN_INT_STATUS 0x0044
-#define CRTC_EXT_CNTL 0x0054
-#define RB3D_CNTL 0x1C3C
-#define WAIT_UNTIL 0x1720
-#define ISYNC_CNTL 0x1724
-#define RBBM_GUICNTL 0x172C
-#define RBBM_STATUS 0x0E40
-#define RBBM_STATUS_alt_1 0x1740
-#define RBBM_CNTL 0x00EC
-#define RBBM_CNTL_alt_1 0x0E44
-#define RBBM_SOFT_RESET 0x00F0
-#define RBBM_SOFT_RESET_alt_1 0x0E48
-#define NQWAIT_UNTIL 0x0E50
-#define RBBM_DEBUG 0x0E6C
-#define RBBM_CMDFIFO_ADDR 0x0E70
-#define RBBM_CMDFIFO_DATAL 0x0E74
-#define RBBM_CMDFIFO_DATAH 0x0E78
-#define RBBM_CMDFIFO_STAT 0x0E7C
-#define CRTC_STATUS 0x005C
-#define GPIO_VGA_DDC 0x0060
-#define GPIO_DVI_DDC 0x0064
-#define GPIO_MONID 0x0068
-#define GPIO_CRT2_DDC 0x006c
-#define PALETTE_INDEX 0x00B0
-#define PALETTE_DATA 0x00B4
-#define PALETTE_30_DATA 0x00B8
-#define CRTC_H_TOTAL_DISP 0x0200
-#define CRTC_H_SYNC_STRT_WID 0x0204
-#define CRTC_H_SYNC_POL (1 << 23)
-#define CRTC_V_TOTAL_DISP 0x0208
-#define CRTC_V_SYNC_STRT_WID 0x020C
-#define CRTC_V_SYNC_POL (1 << 23)
-#define CRTC_VLINE_CRNT_VLINE 0x0210
-#define CRTC_CRNT_FRAME 0x0214
-#define CRTC_GUI_TRIG_VLINE 0x0218
-#define CRTC_DEBUG 0x021C
-#define CRTC_OFFSET_RIGHT 0x0220
-#define CRTC_OFFSET 0x0224
-#define CRTC_OFFSET_CNTL 0x0228
-#define CRTC_PITCH 0x022C
-#define OVR_CLR 0x0230
-#define OVR_WID_LEFT_RIGHT 0x0234
-#define OVR_WID_TOP_BOTTOM 0x0238
-#define DISPLAY_BASE_ADDR 0x023C
-#define SNAPSHOT_VH_COUNTS 0x0240
-#define SNAPSHOT_F_COUNT 0x0244
-#define N_VIF_COUNT 0x0248
-#define SNAPSHOT_VIF_COUNT 0x024C
-#define FP_CRTC_H_TOTAL_DISP 0x0250
-#define FP_CRTC_V_TOTAL_DISP 0x0254
-#define CRT_CRTC_H_SYNC_STRT_WID 0x0258
-#define CRT_CRTC_V_SYNC_STRT_WID 0x025C
-#define CUR_OFFSET 0x0260
-#define CUR_HORZ_VERT_POSN 0x0264
-#define CUR_HORZ_VERT_OFF 0x0268
-#define CUR_CLR0 0x026C
-#define CUR_CLR1 0x0270
-#define FP_HORZ_VERT_ACTIVE 0x0278
-#define CRTC_MORE_CNTL 0x027C
-#define CRTC_H_CUTOFF_ACTIVE_EN (1<<4)
-#define CRTC_V_CUTOFF_ACTIVE_EN (1<<5)
-#define DAC_EXT_CNTL 0x0280
-#define FP_GEN_CNTL 0x0284
-#define FP_HORZ_STRETCH 0x028C
-#define FP_VERT_STRETCH 0x0290
-#define FP_H_SYNC_STRT_WID 0x02C4
-#define FP_V_SYNC_STRT_WID 0x02C8
-#define AUX_WINDOW_HORZ_CNTL 0x02D8
-#define AUX_WINDOW_VERT_CNTL 0x02DC
-/* #define DDA_CONFIG 0x02e0 */
-/* #define DDA_ON_OFF 0x02e4 */
-#define DVI_I2C_CNTL_1 0x02e4
-#define GRPH_BUFFER_CNTL 0x02F0
-#define GRPH2_BUFFER_CNTL 0x03F0
-#define VGA_BUFFER_CNTL 0x02F4
-#define OV0_Y_X_START 0x0400
-#define OV0_Y_X_END 0x0404
-#define OV0_PIPELINE_CNTL 0x0408
-#define OV0_REG_LOAD_CNTL 0x0410
-#define OV0_SCALE_CNTL 0x0420
-#define OV0_V_INC 0x0424
-#define OV0_P1_V_ACCUM_INIT 0x0428
-#define OV0_P23_V_ACCUM_INIT 0x042C
-#define OV0_P1_BLANK_LINES_AT_TOP 0x0430
-#define OV0_P23_BLANK_LINES_AT_TOP 0x0434
-#define OV0_BASE_ADDR 0x043C
-#define OV0_VID_BUF0_BASE_ADRS 0x0440
-#define OV0_VID_BUF1_BASE_ADRS 0x0444
-#define OV0_VID_BUF2_BASE_ADRS 0x0448
-#define OV0_VID_BUF3_BASE_ADRS 0x044C
-#define OV0_VID_BUF4_BASE_ADRS 0x0450
-#define OV0_VID_BUF5_BASE_ADRS 0x0454
-#define OV0_VID_BUF_PITCH0_VALUE 0x0460
-#define OV0_VID_BUF_PITCH1_VALUE 0x0464
-#define OV0_AUTO_FLIP_CNTRL 0x0470
-#define OV0_DEINTERLACE_PATTERN 0x0474
-#define OV0_SUBMIT_HISTORY 0x0478
-#define OV0_H_INC 0x0480
-#define OV0_STEP_BY 0x0484
-#define OV0_P1_H_ACCUM_INIT 0x0488
-#define OV0_P23_H_ACCUM_INIT 0x048C
-#define OV0_P1_X_START_END 0x0494
-#define OV0_P2_X_START_END 0x0498
-#define OV0_P3_X_START_END 0x049C
-#define OV0_FILTER_CNTL 0x04A0
-#define OV0_FOUR_TAP_COEF_0 0x04B0
-#define OV0_FOUR_TAP_COEF_1 0x04B4
-#define OV0_FOUR_TAP_COEF_2 0x04B8
-#define OV0_FOUR_TAP_COEF_3 0x04BC
-#define OV0_FOUR_TAP_COEF_4 0x04C0
-#define OV0_FLAG_CNTRL 0x04DC
-#define OV0_SLICE_CNTL 0x04E0
-#define OV0_VID_KEY_CLR_LOW 0x04E4
-#define OV0_VID_KEY_CLR_HIGH 0x04E8
-#define OV0_GRPH_KEY_CLR_LOW 0x04EC
-#define OV0_GRPH_KEY_CLR_HIGH 0x04F0
-#define OV0_KEY_CNTL 0x04F4
-#define OV0_TEST 0x04F8
-#define SUBPIC_CNTL 0x0540
-#define SUBPIC_DEFCOLCON 0x0544
-#define SUBPIC_Y_X_START 0x054C
-#define SUBPIC_Y_X_END 0x0550
-#define SUBPIC_V_INC 0x0554
-#define SUBPIC_H_INC 0x0558
-#define SUBPIC_BUF0_OFFSET 0x055C
-#define SUBPIC_BUF1_OFFSET 0x0560
-#define SUBPIC_LC0_OFFSET 0x0564
-#define SUBPIC_LC1_OFFSET 0x0568
-#define SUBPIC_PITCH 0x056C
-#define SUBPIC_BTN_HLI_COLCON 0x0570
-#define SUBPIC_BTN_HLI_Y_X_START 0x0574
-#define SUBPIC_BTN_HLI_Y_X_END 0x0578
-#define SUBPIC_PALETTE_INDEX 0x057C
-#define SUBPIC_PALETTE_DATA 0x0580
-#define SUBPIC_H_ACCUM_INIT 0x0584
-#define SUBPIC_V_ACCUM_INIT 0x0588
-#define DISP_MISC_CNTL 0x0D00
-#define DAC_MACRO_CNTL 0x0D04
-#define DISP_PWR_MAN 0x0D08
-#define DISP_TEST_DEBUG_CNTL 0x0D10
-#define DISP_HW_DEBUG 0x0D14
-#define DAC_CRC_SIG1 0x0D18
-#define DAC_CRC_SIG2 0x0D1C
-#define OV0_LIN_TRANS_A 0x0D20
-#define OV0_LIN_TRANS_B 0x0D24
-#define OV0_LIN_TRANS_C 0x0D28
-#define OV0_LIN_TRANS_D 0x0D2C
-#define OV0_LIN_TRANS_E 0x0D30
-#define OV0_LIN_TRANS_F 0x0D34
-#define OV0_GAMMA_0_F 0x0D40
-#define OV0_GAMMA_10_1F 0x0D44
-#define OV0_GAMMA_20_3F 0x0D48
-#define OV0_GAMMA_40_7F 0x0D4C
-#define OV0_GAMMA_380_3BF 0x0D50
-#define OV0_GAMMA_3C0_3FF 0x0D54
-#define DISP_MERGE_CNTL 0x0D60
-#define DISP_OUTPUT_CNTL 0x0D64
-#define DISP_LIN_TRANS_GRPH_A 0x0D80
-#define DISP_LIN_TRANS_GRPH_B 0x0D84
-#define DISP_LIN_TRANS_GRPH_C 0x0D88
-#define DISP_LIN_TRANS_GRPH_D 0x0D8C
-#define DISP_LIN_TRANS_GRPH_E 0x0D90
-#define DISP_LIN_TRANS_GRPH_F 0x0D94
-#define DISP_LIN_TRANS_VID_A 0x0D98
-#define DISP_LIN_TRANS_VID_B 0x0D9C
-#define DISP_LIN_TRANS_VID_C 0x0DA0
-#define DISP_LIN_TRANS_VID_D 0x0DA4
-#define DISP_LIN_TRANS_VID_E 0x0DA8
-#define DISP_LIN_TRANS_VID_F 0x0DAC
-#define RMX_HORZ_FILTER_0TAP_COEF 0x0DB0
-#define RMX_HORZ_FILTER_1TAP_COEF 0x0DB4
-#define RMX_HORZ_FILTER_2TAP_COEF 0x0DB8
-#define RMX_HORZ_PHASE 0x0DBC
-#define DAC_EMBEDDED_SYNC_CNTL 0x0DC0
-#define DAC_BROAD_PULSE 0x0DC4
-#define DAC_SKEW_CLKS 0x0DC8
-#define DAC_INCR 0x0DCC
-#define DAC_NEG_SYNC_LEVEL 0x0DD0
-#define DAC_POS_SYNC_LEVEL 0x0DD4
-#define DAC_BLANK_LEVEL 0x0DD8
-#define CLOCK_CNTL_INDEX 0x0008
-#define CLOCK_CNTL_DATA 0x000C
-#define CP_RB_CNTL 0x0704
-#define CP_RB_BASE 0x0700
-#define CP_RB_RPTR_ADDR 0x070C
-#define CP_RB_RPTR 0x0710
-#define CP_RB_WPTR 0x0714
-#define CP_RB_WPTR_DELAY 0x0718
-#define CP_IB_BASE 0x0738
-#define CP_IB_BUFSZ 0x073C
-#define SCRATCH_REG0 0x15E0
-#define GUI_SCRATCH_REG0 0x15E0
-#define SCRATCH_REG1 0x15E4
-#define GUI_SCRATCH_REG1 0x15E4
-#define SCRATCH_REG2 0x15E8
-#define GUI_SCRATCH_REG2 0x15E8
-#define SCRATCH_REG3 0x15EC
-#define GUI_SCRATCH_REG3 0x15EC
-#define SCRATCH_REG4 0x15F0
-#define GUI_SCRATCH_REG4 0x15F0
-#define SCRATCH_REG5 0x15F4
-#define GUI_SCRATCH_REG5 0x15F4
-#define SCRATCH_UMSK 0x0770
-#define SCRATCH_ADDR 0x0774
-#define DP_BRUSH_FRGD_CLR 0x147C
-#define DP_BRUSH_BKGD_CLR 0x1478
-#define DST_LINE_START 0x1600
-#define DST_LINE_END 0x1604
-#define SRC_OFFSET 0x15AC
-#define SRC_PITCH 0x15B0
-#define SRC_TILE 0x1704
-#define SRC_PITCH_OFFSET 0x1428
-#define SRC_X 0x1414
-#define SRC_Y 0x1418
-#define SRC_X_Y 0x1590
-#define SRC_Y_X 0x1434
-#define DST_Y_X 0x1438
-#define DST_WIDTH_HEIGHT 0x1598
-#define DST_HEIGHT_WIDTH 0x143c
-#define DST_OFFSET 0x1404
-#define SRC_CLUT_ADDRESS 0x1780
-#define SRC_CLUT_DATA 0x1784
-#define SRC_CLUT_DATA_RD 0x1788
-#define HOST_DATA0 0x17C0
-#define HOST_DATA1 0x17C4
-#define HOST_DATA2 0x17C8
-#define HOST_DATA3 0x17CC
-#define HOST_DATA4 0x17D0
-#define HOST_DATA5 0x17D4
-#define HOST_DATA6 0x17D8
-#define HOST_DATA7 0x17DC
-#define HOST_DATA_LAST 0x17E0
-#define DP_SRC_ENDIAN 0x15D4
-#define DP_SRC_FRGD_CLR 0x15D8
-#define DP_SRC_BKGD_CLR 0x15DC
-#define SC_LEFT 0x1640
-#define SC_RIGHT 0x1644
-#define SC_TOP 0x1648
-#define SC_BOTTOM 0x164C
-#define SRC_SC_RIGHT 0x1654
-#define SRC_SC_BOTTOM 0x165C
-#define DP_CNTL 0x16C0
-#define DP_CNTL_XDIR_YDIR_YMAJOR 0x16D0
-#define DP_DATATYPE 0x16C4
-#define DP_MIX 0x16C8
-#define DP_WRITE_MSK 0x16CC
-#define DP_XOP 0x17F8
-#define CLR_CMP_CLR_SRC 0x15C4
-#define CLR_CMP_CLR_DST 0x15C8
-#define CLR_CMP_CNTL 0x15C0
-#define CLR_CMP_MSK 0x15CC
-#define DSTCACHE_MODE 0x1710
-#define DSTCACHE_CTLSTAT 0x1714
-#define DEFAULT_PITCH_OFFSET 0x16E0
-#define DEFAULT_SC_BOTTOM_RIGHT 0x16E8
-#define DEFAULT_SC_TOP_LEFT 0x16EC
-#define SRC_PITCH_OFFSET 0x1428
-#define DST_PITCH_OFFSET 0x142C
-#define DP_GUI_MASTER_CNTL 0x146C
-#define SC_TOP_LEFT 0x16EC
-#define SC_BOTTOM_RIGHT 0x16F0
-#define SRC_SC_BOTTOM_RIGHT 0x16F4
-#define RB2D_DSTCACHE_MODE 0x3428
-#define RB2D_DSTCACHE_CTLSTAT 0x342C
-#define LVDS_GEN_CNTL 0x02d0
-#define LVDS_PLL_CNTL 0x02d4
-#define FP2_GEN_CNTL 0x0288
-#define TMDS_CNTL 0x0294
-#define TMDS_CRC 0x02a0
-#define TMDS_TRANSMITTER_CNTL 0x02a4
-#define MPP_TB_CONFIG 0x01c0
-#define PAMAC0_DLY_CNTL 0x0a94
-#define PAMAC1_DLY_CNTL 0x0a98
-#define PAMAC2_DLY_CNTL 0x0a9c
-#define FW_CNTL 0x0118
-#define FCP_CNTL 0x0910
-#define VGA_DDA_ON_OFF 0x02ec
-#define TV_MASTER_CNTL 0x0800
-
-/* #define BASE_CODE 0x0f0b */
-#define BIOS_0_SCRATCH 0x0010
-#define BIOS_1_SCRATCH 0x0014
-#define BIOS_2_SCRATCH 0x0018
-#define BIOS_3_SCRATCH 0x001c
-#define BIOS_4_SCRATCH 0x0020
-#define BIOS_5_SCRATCH 0x0024
-#define BIOS_6_SCRATCH 0x0028
-#define BIOS_7_SCRATCH 0x002c
-
-#define HDP_SOFT_RESET (1 << 26)
-
-#define TV_DAC_CNTL 0x088c
-#define GPIOPAD_MASK 0x0198
-#define GPIOPAD_A 0x019c
-#define GPIOPAD_EN 0x01a0
-#define GPIOPAD_Y 0x01a4
-#define ZV_LCDPAD_MASK 0x01a8
-#define ZV_LCDPAD_A 0x01ac
-#define ZV_LCDPAD_EN 0x01b0
-#define ZV_LCDPAD_Y 0x01b4
-
-/* PLL Registers */
-#define CLK_PIN_CNTL 0x0001
-#define PPLL_CNTL 0x0002
-#define PPLL_REF_DIV 0x0003
-#define PPLL_DIV_0 0x0004
-#define PPLL_DIV_1 0x0005
-#define PPLL_DIV_2 0x0006
-#define PPLL_DIV_3 0x0007
-#define VCLK_ECP_CNTL 0x0008
-#define HTOTAL_CNTL 0x0009
-#define M_SPLL_REF_FB_DIV 0x000a
-#define AGP_PLL_CNTL 0x000b
-#define SPLL_CNTL 0x000c
-#define SCLK_CNTL 0x000d
-#define MPLL_CNTL 0x000e
-#define MDLL_CKO 0x000f
-#define MDLL_RDCKA 0x0010
-#define MCLK_CNTL 0x0012
-#define AGP_PLL_CNTL 0x000b
-#define PLL_TEST_CNTL 0x0013
-#define CLK_PWRMGT_CNTL 0x0014
-#define PLL_PWRMGT_CNTL 0x0015
-#define MCLK_MISC 0x001f
-#define P2PLL_CNTL 0x002a
-#define P2PLL_REF_DIV 0x002b
-#define PIXCLKS_CNTL 0x002d
-#define SCLK_MORE_CNTL 0x0035
-
-/* MCLK_CNTL bit constants */
-#define FORCEON_MCLKA (1 << 16)
-#define FORCEON_MCLKB (1 << 17)
-#define FORCEON_YCLKA (1 << 18)
-#define FORCEON_YCLKB (1 << 19)
-#define FORCEON_MC (1 << 20)
-#define FORCEON_AIC (1 << 21)
-
-/* SCLK_CNTL bit constants */
-#define DYN_STOP_LAT_MASK 0x00007ff8
-#define CP_MAX_DYN_STOP_LAT 0x0008
-#define SCLK_FORCEON_MASK 0xffff8000
-
-/* SCLK_MORE_CNTL bit constants */
-#define SCLK_MORE_FORCEON 0x0700
-
-/* BUS_CNTL bit constants */
-#define BUS_DBL_RESYNC 0x00000001
-#define BUS_MSTR_RESET 0x00000002
-#define BUS_FLUSH_BUF 0x00000004
-#define BUS_STOP_REQ_DIS 0x00000008
-#define BUS_ROTATION_DIS 0x00000010
-#define BUS_MASTER_DIS 0x00000040
-#define BUS_ROM_WRT_EN 0x00000080
-#define BUS_DIS_ROM 0x00001000
-#define BUS_PCI_READ_RETRY_EN 0x00002000
-#define BUS_AGP_AD_STEPPING_EN 0x00004000
-#define BUS_PCI_WRT_RETRY_EN 0x00008000
-#define BUS_MSTR_RD_MULT 0x00100000
-#define BUS_MSTR_RD_LINE 0x00200000
-#define BUS_SUSPEND 0x00400000
-#define LAT_16X 0x00800000
-#define BUS_RD_DISCARD_EN 0x01000000
-#define BUS_RD_ABORT_EN 0x02000000
-#define BUS_MSTR_WS 0x04000000
-#define BUS_PARKING_DIS 0x08000000
-#define BUS_MSTR_DISCONNECT_EN 0x10000000
-#define BUS_WRT_BURST 0x20000000
-#define BUS_READ_BURST 0x40000000
-#define BUS_RDY_READ_DLY 0x80000000
-
-/* PIXCLKS_CNTL */
-#define PIX2CLK_SRC_SEL_MASK 0x03
-#define PIX2CLK_SRC_SEL_CPUCLK 0x00
-#define PIX2CLK_SRC_SEL_PSCANCLK 0x01
-#define PIX2CLK_SRC_SEL_BYTECLK 0x02
-#define PIX2CLK_SRC_SEL_P2PLLCLK 0x03
-#define PIX2CLK_ALWAYS_ONb (1<<6)
-#define PIX2CLK_DAC_ALWAYS_ONb (1<<7)
-#define PIXCLK_TV_SRC_SEL (1 << 8)
-#define PIXCLK_LVDS_ALWAYS_ONb (1 << 14)
-#define PIXCLK_TMDS_ALWAYS_ONb (1 << 15)
-
-
-/* CLOCK_CNTL_INDEX bit constants */
-#define PLL_WR_EN 0x00000080
-
-/* CONFIG_CNTL bit constants */
-#define CONFIG_SYS_VGA_RAM_EN 0x00000100
-#define CONFIG_SYS_ATI_REV_ID_MASK (0xf << 16)
-#define CONFIG_SYS_ATI_REV_A11 (0 << 16)
-#define CONFIG_SYS_ATI_REV_A12 (1 << 16)
-#define CONFIG_SYS_ATI_REV_A13 (2 << 16)
-
-/* CRTC_EXT_CNTL bit constants */
-#define VGA_ATI_LINEAR 0x00000008
-#define VGA_128KAP_PAGING 0x00000010
-#define XCRT_CNT_EN (1 << 6)
-#define CRTC_HSYNC_DIS (1 << 8)
-#define CRTC_VSYNC_DIS (1 << 9)
-#define CRTC_DISPLAY_DIS (1 << 10)
-#define CRTC_CRT_ON (1 << 15)
-
-
-/* DSTCACHE_CTLSTAT bit constants */
-#define RB2D_DC_FLUSH (3 << 0)
-#define RB2D_DC_FLUSH_ALL 0xf
-#define RB2D_DC_BUSY (1 << 31)
-
-
-/* CRTC_GEN_CNTL bit constants */
-#define CRTC_DBL_SCAN_EN 0x00000001
-#define CRTC_CUR_EN 0x00010000
-#define CRTC_INTERLACE_EN (1 << 1)
-#define CRTC_BYPASS_LUT_EN (1 << 14)
-#define CRTC_EXT_DISP_EN (1 << 24)
-#define CRTC_EN (1 << 25)
-#define CRTC_DISP_REQ_EN_B (1 << 26)
-
-/* CRTC_STATUS bit constants */
-#define CRTC_VBLANK 0x00000001
-
-/* CRTC2_GEN_CNTL bit constants */
-#define CRT2_ON (1 << 7)
-#define CRTC2_DISPLAY_DIS (1 << 23)
-#define CRTC2_EN (1 << 25)
-#define CRTC2_DISP_REQ_EN_B (1 << 26)
-
-/* CUR_OFFSET, CUR_HORZ_VERT_POSN, CUR_HORZ_VERT_OFF bit constants */
-#define CUR_LOCK 0x80000000
-
-/* GPIO bit constants */
-#define GPIO_A_0 (1 << 0)
-#define GPIO_A_1 (1 << 1)
-#define GPIO_Y_0 (1 << 8)
-#define GPIO_Y_1 (1 << 9)
-#define GPIO_EN_0 (1 << 16)
-#define GPIO_EN_1 (1 << 17)
-#define GPIO_MASK_0 (1 << 24)
-#define GPIO_MASK_1 (1 << 25)
-#define VGA_DDC_DATA_OUTPUT GPIO_A_0
-#define VGA_DDC_CLK_OUTPUT GPIO_A_1
-#define VGA_DDC_DATA_INPUT GPIO_Y_0
-#define VGA_DDC_CLK_INPUT GPIO_Y_1
-#define VGA_DDC_DATA_OUT_EN GPIO_EN_0
-#define VGA_DDC_CLK_OUT_EN GPIO_EN_1
-
-
-/* FP bit constants */
-#define FP_CRTC_H_TOTAL_MASK 000003ff
-#define FP_CRTC_H_DISP_MASK 0x01ff0000
-#define FP_CRTC_V_TOTAL_MASK 0x00000fff
-#define FP_CRTC_V_DISP_MASK 0x0fff0000
-#define FP_H_SYNC_STRT_CHAR_MASK 0x00001ff8
-#define FP_H_SYNC_WID_MASK 0x003f0000
-#define FP_V_SYNC_STRT_MASK 0x00000fff
-#define FP_V_SYNC_WID_MASK 0x001f0000
-#define FP_CRTC_H_TOTAL_SHIFT 0x00000000
-#define FP_CRTC_H_DISP_SHIFT 0x00000010
-#define FP_CRTC_V_TOTAL_SHIFT 0x00000000
-#define FP_CRTC_V_DISP_SHIFT 0x00000010
-#define FP_H_SYNC_STRT_CHAR_SHIFT 0x00000003
-#define FP_H_SYNC_WID_SHIFT 0x00000010
-#define FP_V_SYNC_STRT_SHIFT 0x00000000
-#define FP_V_SYNC_WID_SHIFT 0x00000010
-
-/* FP_GEN_CNTL bit constants */
-#define FP_FPON (1 << 0)
-#define FP_TMDS_EN (1 << 2)
-#define FP_PANEL_FORMAT (1 << 3)
-#define FP_EN_TMDS (1 << 7)
-#define FP_DETECT_SENSE (1 << 8)
-#define R200_FP_SOURCE_SEL_MASK (3 << 10)
-#define R200_FP_SOURCE_SEL_CRTC1 (0 << 10)
-#define R200_FP_SOURCE_SEL_CRTC2 (1 << 10)
-#define R200_FP_SOURCE_SEL_RMX (2 << 10)
-#define R200_FP_SOURCE_SEL_TRANS (3 << 10)
-#define FP_SEL_CRTC1 (0 << 13)
-#define FP_SEL_CRTC2 (1 << 13)
-#define FP_USE_VGA_HSYNC (1 << 14)
-#define FP_CRTC_DONT_SHADOW_HPAR (1 << 15)
-#define FP_CRTC_DONT_SHADOW_VPAR (1 << 16)
-#define FP_CRTC_DONT_SHADOW_HEND (1 << 17)
-#define FP_CRTC_USE_SHADOW_VEND (1 << 18)
-#define FP_RMX_HVSYNC_CONTROL_EN (1 << 20)
-#define FP_DFP_SYNC_SEL (1 << 21)
-#define FP_CRTC_LOCK_8DOT (1 << 22)
-#define FP_CRT_SYNC_SEL (1 << 23)
-#define FP_USE_SHADOW_EN (1 << 24)
-#define FP_CRT_SYNC_ALT (1 << 26)
-
-/* FP2_GEN_CNTL bit constants */
-#define FP2_BLANK_EN (1 << 1)
-#define FP2_ON (1 << 2)
-#define FP2_PANEL_FORMAT (1 << 3)
-#define FP2_SOURCE_SEL_MASK (3 << 10)
-#define FP2_SOURCE_SEL_CRTC2 (1 << 10)
-#define FP2_SRC_SEL_MASK (3 << 13)
-#define FP2_SRC_SEL_CRTC2 (1 << 13)
-#define FP2_FP_POL (1 << 16)
-#define FP2_LP_POL (1 << 17)
-#define FP2_SCK_POL (1 << 18)
-#define FP2_LCD_CNTL_MASK (7 << 19)
-#define FP2_PAD_FLOP_EN (1 << 22)
-#define FP2_CRC_EN (1 << 23)
-#define FP2_CRC_READ_EN (1 << 24)
-#define FP2_DV0_EN (1 << 25)
-#define FP2_DV0_RATE_SEL_SDR (1 << 26)
-
-
-/* LVDS_GEN_CNTL bit constants */
-#define LVDS_ON (1 << 0)
-#define LVDS_DISPLAY_DIS (1 << 1)
-#define LVDS_PANEL_TYPE (1 << 2)
-#define LVDS_PANEL_FORMAT (1 << 3)
-#define LVDS_EN (1 << 7)
-#define LVDS_BL_MOD_LEVEL_MASK 0x0000ff00
-#define LVDS_BL_MOD_LEVEL_SHIFT 8
-#define LVDS_BL_MOD_EN (1 << 16)
-#define LVDS_DIGON (1 << 18)
-#define LVDS_BLON (1 << 19)
-#define LVDS_SEL_CRTC2 (1 << 23)
-#define LVDS_STATE_MASK \
- (LVDS_ON | LVDS_DISPLAY_DIS | LVDS_BL_MOD_LEVEL_MASK | LVDS_BLON)
-
-/* LVDS_PLL_CNTL bit constatns */
-#define HSYNC_DELAY_SHIFT 0x1c
-#define HSYNC_DELAY_MASK (0xf << 0x1c)
-
-/* TMDS_TRANSMITTER_CNTL bit constants */
-#define TMDS_PLL_EN (1 << 0)
-#define TMDS_PLLRST (1 << 1)
-#define TMDS_RAN_PAT_RST (1 << 7)
-#define TMDS_ICHCSEL (1 << 28)
-
-/* FP_HORZ_STRETCH bit constants */
-#define HORZ_STRETCH_RATIO_MASK 0xffff
-#define HORZ_STRETCH_RATIO_MAX 4096
-#define HORZ_PANEL_SIZE (0x1ff << 16)
-#define HORZ_PANEL_SHIFT 16
-#define HORZ_STRETCH_PIXREP (0 << 25)
-#define HORZ_STRETCH_BLEND (1 << 26)
-#define HORZ_STRETCH_ENABLE (1 << 25)
-#define HORZ_AUTO_RATIO (1 << 27)
-#define HORZ_FP_LOOP_STRETCH (0x7 << 28)
-#define HORZ_AUTO_RATIO_INC (1 << 31)
-
-
-/* FP_VERT_STRETCH bit constants */
-#define VERT_STRETCH_RATIO_MASK 0xfff
-#define VERT_STRETCH_RATIO_MAX 4096
-#define VERT_PANEL_SIZE (0xfff << 12)
-#define VERT_PANEL_SHIFT 12
-#define VERT_STRETCH_LINREP (0 << 26)
-#define VERT_STRETCH_BLEND (1 << 26)
-#define VERT_STRETCH_ENABLE (1 << 25)
-#define VERT_AUTO_RATIO_EN (1 << 27)
-#define VERT_FP_LOOP_STRETCH (0x7 << 28)
-#define VERT_STRETCH_RESERVED 0xf1000000
-
-/* DAC_CNTL bit constants */
-#define DAC_8BIT_EN 0x00000100
-#define DAC_4BPP_PIX_ORDER 0x00000200
-#define DAC_CRC_EN 0x00080000
-#define DAC_MASK_ALL (0xff << 24)
-#define DAC_PDWN (1 << 15)
-#define DAC_EXPAND_MODE (1 << 14)
-#define DAC_VGA_ADR_EN (1 << 13)
-#define DAC_RANGE_CNTL (3 << 0)
-#define DAC_RANGE_CNTL_MASK 0x03
-#define DAC_BLANKING (1 << 2)
-#define DAC_CMP_EN (1 << 3)
-#define DAC_CMP_OUTPUT (1 << 7)
-
-/* DAC_CNTL2 bit constants */
-#define DAC2_EXPAND_MODE (1 << 14)
-#define DAC2_CMP_EN (1 << 7)
-#define DAC2_PALETTE_ACCESS_CNTL (1 << 5)
-
-/* DAC_EXT_CNTL bit constants */
-#define DAC_FORCE_BLANK_OFF_EN (1 << 4)
-#define DAC_FORCE_DATA_EN (1 << 5)
-#define DAC_FORCE_DATA_SEL_MASK (3 << 6)
-#define DAC_FORCE_DATA_MASK 0x0003ff00
-#define DAC_FORCE_DATA_SHIFT 8
-
-/* GEN_RESET_CNTL bit constants */
-#define SOFT_RESET_GUI 0x00000001
-#define SOFT_RESET_VCLK 0x00000100
-#define SOFT_RESET_PCLK 0x00000200
-#define SOFT_RESET_ECP 0x00000400
-#define SOFT_RESET_DISPENG_XCLK 0x00000800
-
-/* MEM_CNTL bit constants */
-#define MEM_CTLR_STATUS_IDLE 0x00000000
-#define MEM_CTLR_STATUS_BUSY 0x00100000
-#define MEM_SEQNCR_STATUS_IDLE 0x00000000
-#define MEM_SEQNCR_STATUS_BUSY 0x00200000
-#define MEM_ARBITER_STATUS_IDLE 0x00000000
-#define MEM_ARBITER_STATUS_BUSY 0x00400000
-#define MEM_REQ_UNLOCK 0x00000000
-#define MEM_REQ_LOCK 0x00800000
-#define MEM_NUM_CHANNELS_MASK 0x00000001
-#define MEM_USE_B_CH_ONLY 0x00000002
-#define RV100_MEM_HALF_MODE 0x00000008
-#define R300_MEM_NUM_CHANNELS_MASK 0x00000003
-#define R300_MEM_USE_CD_CH_ONLY 0x00000004
-
-
-/* RBBM_SOFT_RESET bit constants */
-#define SOFT_RESET_CP (1 << 0)
-#define SOFT_RESET_HI (1 << 1)
-#define SOFT_RESET_SE (1 << 2)
-#define SOFT_RESET_RE (1 << 3)
-#define SOFT_RESET_PP (1 << 4)
-#define SOFT_RESET_E2 (1 << 5)
-#define SOFT_RESET_RB (1 << 6)
-#define SOFT_RESET_HDP (1 << 7)
-
-/* SURFACE_CNTL bit consants */
-#define SURF_TRANSLATION_DIS (1 << 8)
-#define NONSURF_AP0_SWP_16BPP (1 << 20)
-#define NONSURF_AP0_SWP_32BPP (1 << 21)
-#define NONSURF_AP1_SWP_16BPP (1 << 22)
-#define NONSURF_AP1_SWP_32BPP (1 << 23)
-
-#define R200_SURF_TILE_COLOR_MACRO (1 << 16)
-
-/* DEFAULT_SC_BOTTOM_RIGHT bit constants */
-#define DEFAULT_SC_RIGHT_MAX (0x1fff << 0)
-#define DEFAULT_SC_BOTTOM_MAX (0x1fff << 16)
-
-/* MM_INDEX bit constants */
-#define MM_APER 0x80000000
-
-/* CLR_CMP_CNTL bit constants */
-#define COMPARE_SRC_FALSE 0x00000000
-#define COMPARE_SRC_TRUE 0x00000001
-#define COMPARE_SRC_NOT_EQUAL 0x00000004
-#define COMPARE_SRC_EQUAL 0x00000005
-#define COMPARE_SRC_EQUAL_FLIP 0x00000007
-#define COMPARE_DST_FALSE 0x00000000
-#define COMPARE_DST_TRUE 0x00000100
-#define COMPARE_DST_NOT_EQUAL 0x00000400
-#define COMPARE_DST_EQUAL 0x00000500
-#define COMPARE_DESTINATION 0x00000000
-#define COMPARE_SOURCE 0x01000000
-#define COMPARE_SRC_AND_DST 0x02000000
-
-
-/* DP_CNTL bit constants */
-#define DST_X_RIGHT_TO_LEFT 0x00000000
-#define DST_X_LEFT_TO_RIGHT 0x00000001
-#define DST_Y_BOTTOM_TO_TOP 0x00000000
-#define DST_Y_TOP_TO_BOTTOM 0x00000002
-#define DST_X_MAJOR 0x00000000
-#define DST_Y_MAJOR 0x00000004
-#define DST_X_TILE 0x00000008
-#define DST_Y_TILE 0x00000010
-#define DST_LAST_PEL 0x00000020
-#define DST_TRAIL_X_RIGHT_TO_LEFT 0x00000000
-#define DST_TRAIL_X_LEFT_TO_RIGHT 0x00000040
-#define DST_TRAP_FILL_RIGHT_TO_LEFT 0x00000000
-#define DST_TRAP_FILL_LEFT_TO_RIGHT 0x00000080
-#define DST_BRES_SIGN 0x00000100
-#define DST_HOST_BIG_ENDIAN_EN 0x00000200
-#define DST_POLYLINE_NONLAST 0x00008000
-#define DST_RASTER_STALL 0x00010000
-#define DST_POLY_EDGE 0x00040000
-
-
-/* DP_CNTL_YDIR_XDIR_YMAJOR bit constants (short version of DP_CNTL) */
-#define DST_X_MAJOR_S 0x00000000
-#define DST_Y_MAJOR_S 0x00000001
-#define DST_Y_BOTTOM_TO_TOP_S 0x00000000
-#define DST_Y_TOP_TO_BOTTOM_S 0x00008000
-#define DST_X_RIGHT_TO_LEFT_S 0x00000000
-#define DST_X_LEFT_TO_RIGHT_S 0x80000000
-
-
-/* DP_DATATYPE bit constants */
-#define DST_8BPP 0x00000002
-#define DST_15BPP 0x00000003
-#define DST_16BPP 0x00000004
-#define DST_24BPP 0x00000005
-#define DST_32BPP 0x00000006
-#define DST_8BPP_RGB332 0x00000007
-#define DST_8BPP_Y8 0x00000008
-#define DST_8BPP_RGB8 0x00000009
-#define DST_16BPP_VYUY422 0x0000000b
-#define DST_16BPP_YVYU422 0x0000000c
-#define DST_32BPP_AYUV444 0x0000000e
-#define DST_16BPP_ARGB4444 0x0000000f
-#define BRUSH_SOLIDCOLOR 0x00000d00
-#define SRC_MONO 0x00000000
-#define SRC_MONO_LBKGD 0x00010000
-#define SRC_DSTCOLOR 0x00030000
-#define BYTE_ORDER_MSB_TO_LSB 0x00000000
-#define BYTE_ORDER_LSB_TO_MSB 0x40000000
-#define DP_CONVERSION_TEMP 0x80000000
-#define HOST_BIG_ENDIAN_EN (1 << 29)
-
-
-/* DP_GUI_MASTER_CNTL bit constants */
-#define GMC_SRC_PITCH_OFFSET_DEFAULT 0x00000000
-#define GMC_SRC_PITCH_OFFSET_LEAVE 0x00000001
-#define GMC_DST_PITCH_OFFSET_DEFAULT 0x00000000
-#define GMC_DST_PITCH_OFFSET_LEAVE 0x00000002
-#define GMC_SRC_CLIP_DEFAULT 0x00000000
-#define GMC_SRC_CLIP_LEAVE 0x00000004
-#define GMC_DST_CLIP_DEFAULT 0x00000000
-#define GMC_DST_CLIP_LEAVE 0x00000008
-#define GMC_BRUSH_8x8MONO 0x00000000
-#define GMC_BRUSH_8x8MONO_LBKGD 0x00000010
-#define GMC_BRUSH_8x1MONO 0x00000020
-#define GMC_BRUSH_8x1MONO_LBKGD 0x00000030
-#define GMC_BRUSH_1x8MONO 0x00000040
-#define GMC_BRUSH_1x8MONO_LBKGD 0x00000050
-#define GMC_BRUSH_32x1MONO 0x00000060
-#define GMC_BRUSH_32x1MONO_LBKGD 0x00000070
-#define GMC_BRUSH_32x32MONO 0x00000080
-#define GMC_BRUSH_32x32MONO_LBKGD 0x00000090
-#define GMC_BRUSH_8x8COLOR 0x000000a0
-#define GMC_BRUSH_8x1COLOR 0x000000b0
-#define GMC_BRUSH_1x8COLOR 0x000000c0
-#define GMC_BRUSH_SOLID_COLOR 0x000000d0
-#define GMC_DST_8BPP 0x00000200
-#define GMC_DST_15BPP 0x00000300
-#define GMC_DST_16BPP 0x00000400
-#define GMC_DST_24BPP 0x00000500
-#define GMC_DST_32BPP 0x00000600
-#define GMC_DST_8BPP_RGB332 0x00000700
-#define GMC_DST_8BPP_Y8 0x00000800
-#define GMC_DST_8BPP_RGB8 0x00000900
-#define GMC_DST_16BPP_VYUY422 0x00000b00
-#define GMC_DST_16BPP_YVYU422 0x00000c00
-#define GMC_DST_32BPP_AYUV444 0x00000e00
-#define GMC_DST_16BPP_ARGB4444 0x00000f00
-#define GMC_SRC_MONO 0x00000000
-#define GMC_SRC_MONO_LBKGD 0x00001000
-#define GMC_SRC_DSTCOLOR 0x00003000
-#define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000
-#define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000
-#define GMC_DP_CONVERSION_TEMP_9300 0x00008000
-#define GMC_DP_CONVERSION_TEMP_6500 0x00000000
-#define GMC_DP_SRC_RECT 0x02000000
-#define GMC_DP_SRC_HOST 0x03000000
-#define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000
-#define GMC_3D_FCN_EN_CLR 0x00000000
-#define GMC_3D_FCN_EN_SET 0x08000000
-#define GMC_DST_CLR_CMP_FCN_LEAVE 0x00000000
-#define GMC_DST_CLR_CMP_FCN_CLEAR 0x10000000
-#define GMC_AUX_CLIP_LEAVE 0x00000000
-#define GMC_AUX_CLIP_CLEAR 0x20000000
-#define GMC_WRITE_MASK_LEAVE 0x00000000
-#define GMC_WRITE_MASK_SET 0x40000000
-#define GMC_CLR_CMP_CNTL_DIS (1 << 28)
-#define GMC_SRC_DATATYPE_COLOR (3 << 12)
-#define ROP3_S 0x00cc0000
-#define ROP3_SRCCOPY 0x00cc0000
-#define ROP3_P 0x00f00000
-#define ROP3_PATCOPY 0x00f00000
-#define DP_SRC_SOURCE_MASK (7 << 24)
-#define GMC_BRUSH_NONE (15 << 4)
-#define DP_SRC_SOURCE_MEMORY (2 << 24)
-#define GMC_BRUSH_SOLIDCOLOR 0x000000d0
-
-/* DP_MIX bit constants */
-#define DP_SRC_RECT 0x00000200
-#define DP_SRC_HOST 0x00000300
-#define DP_SRC_HOST_BYTEALIGN 0x00000400
-
-/* MPLL_CNTL bit constants */
-#define MPLL_RESET 0x00000001
-
-/* MDLL_CKO bit constants */
-#define MCKOA_SLEEP 0x00000001
-#define MCKOA_RESET 0x00000002
-#define MCKOA_REF_SKEW_MASK 0x00000700
-#define MCKOA_FB_SKEW_MASK 0x00007000
-
-/* MDLL_RDCKA bit constants */
-#define MRDCKA0_SLEEP 0x00000001
-#define MRDCKA0_RESET 0x00000002
-#define MRDCKA1_SLEEP 0x00010000
-#define MRDCKA1_RESET 0x00020000
-
-/* VCLK_ECP_CNTL constants */
-#define VCLK_SRC_SEL_MASK 0x03
-#define VCLK_SRC_SEL_CPUCLK 0x00
-#define VCLK_SRC_SEL_PSCANCLK 0x01
-#define VCLK_SRC_SEL_BYTECLK 0x02
-#define VCLK_SRC_SEL_PPLLCLK 0x03
-#define PIXCLK_ALWAYS_ONb 0x00000040
-#define PIXCLK_DAC_ALWAYS_ONb 0x00000080
-
-/* BUS_CNTL1 constants */
-#define BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK 0x0c000000
-#define BUS_CNTL1_MOBILE_PLATFORM_SEL_SHIFT 26
-#define BUS_CNTL1_AGPCLK_VALID 0x80000000
-
-/* PLL_PWRMGT_CNTL constants */
-#define PLL_PWRMGT_CNTL_SPLL_TURNOFF 0x00000002
-#define PLL_PWRMGT_CNTL_PPLL_TURNOFF 0x00000004
-#define PLL_PWRMGT_CNTL_P2PLL_TURNOFF 0x00000008
-#define PLL_PWRMGT_CNTL_TVPLL_TURNOFF 0x00000010
-#define PLL_PWRMGT_CNTL_MOBILE_SU 0x00010000
-#define PLL_PWRMGT_CNTL_SU_SCLK_USE_BCLK 0x00020000
-#define PLL_PWRMGT_CNTL_SU_MCLK_USE_BCLK 0x00040000
-
-/* TV_DAC_CNTL constants */
-#define TV_DAC_CNTL_BGSLEEP 0x00000040
-#define TV_DAC_CNTL_DETECT 0x00000010
-#define TV_DAC_CNTL_BGADJ_MASK 0x000f0000
-#define TV_DAC_CNTL_DACADJ_MASK 0x00f00000
-#define TV_DAC_CNTL_BGADJ__SHIFT 16
-#define TV_DAC_CNTL_DACADJ__SHIFT 20
-#define TV_DAC_CNTL_RDACPD 0x01000000
-#define TV_DAC_CNTL_GDACPD 0x02000000
-#define TV_DAC_CNTL_BDACPD 0x04000000
-
-/* DISP_MISC_CNTL constants */
-#define DISP_MISC_CNTL_SOFT_RESET_GRPH_PP (1 << 0)
-#define DISP_MISC_CNTL_SOFT_RESET_SUBPIC_PP (1 << 1)
-#define DISP_MISC_CNTL_SOFT_RESET_OV0_PP (1 << 2)
-#define DISP_MISC_CNTL_SOFT_RESET_GRPH_SCLK (1 << 4)
-#define DISP_MISC_CNTL_SOFT_RESET_SUBPIC_SCLK (1 << 5)
-#define DISP_MISC_CNTL_SOFT_RESET_OV0_SCLK (1 << 6)
-#define DISP_MISC_CNTL_SOFT_RESET_GRPH2_PP (1 << 12)
-#define DISP_MISC_CNTL_SOFT_RESET_GRPH2_SCLK (1 << 15)
-#define DISP_MISC_CNTL_SOFT_RESET_LVDS (1 << 16)
-#define DISP_MISC_CNTL_SOFT_RESET_TMDS (1 << 17)
-#define DISP_MISC_CNTL_SOFT_RESET_DIG_TMDS (1 << 18)
-#define DISP_MISC_CNTL_SOFT_RESET_TV (1 << 19)
-
-/* DISP_PWR_MAN constants */
-#define DISP_PWR_MAN_DISP_PWR_MAN_D3_CRTC_EN (1 << 0)
-#define DISP_PWR_MAN_DISP2_PWR_MAN_D3_CRTC2_EN (1 << 4)
-#define DISP_PWR_MAN_DISP_D3_RST (1 << 16)
-#define DISP_PWR_MAN_DISP_D3_REG_RST (1 << 17)
-#define DISP_PWR_MAN_DISP_D3_GRPH_RST (1 << 18)
-#define DISP_PWR_MAN_DISP_D3_SUBPIC_RST (1 << 19)
-#define DISP_PWR_MAN_DISP_D3_OV0_RST (1 << 20)
-#define DISP_PWR_MAN_DISP_D1D2_GRPH_RST (1 << 21)
-#define DISP_PWR_MAN_DISP_D1D2_SUBPIC_RST (1 << 22)
-#define DISP_PWR_MAN_DISP_D1D2_OV0_RST (1 << 23)
-#define DISP_PWR_MAN_DIG_TMDS_ENABLE_RST (1 << 24)
-#define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25)
-#define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26)
-
-/* masks */
-
-#define CONFIG_MEMSIZE_MASK 0x1f000000
-#define MEM_CFG_TYPE 0x40000000
-#define DST_OFFSET_MASK 0x003fffff
-#define DST_PITCH_MASK 0x3fc00000
-#define DEFAULT_TILE_MASK 0xc0000000
-#define PPLL_DIV_SEL_MASK 0x00000300
-#define PPLL_RESET 0x00000001
-#define PPLL_SLEEP 0x00000002
-#define PPLL_ATOMIC_UPDATE_EN 0x00010000
-#define PPLL_REF_DIV_MASK 0x000003ff
-#define PPLL_FB3_DIV_MASK 0x000007ff
-#define PPLL_POST3_DIV_MASK 0x00070000
-#define PPLL_ATOMIC_UPDATE_R 0x00008000
-#define PPLL_ATOMIC_UPDATE_W 0x00008000
-#define PPLL_VGA_ATOMIC_UPDATE_EN 0x00020000
-#define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18)
-#define R300_PPLL_REF_DIV_ACC_SHIFT 18
-
-#define GUI_ACTIVE 0x80000000
-
-
-#define MC_IND_INDEX 0x01F8
-#define MC_IND_DATA 0x01FC
-
-/* PAD_CTLR_STRENGTH */
-#define PAD_MANUAL_OVERRIDE 0x80000000
-
-/* pllCLK_PIN_CNTL */
-#define CLK_PIN_CNTL__OSC_EN_MASK 0x00000001L
-#define CLK_PIN_CNTL__OSC_EN 0x00000001L
-#define CLK_PIN_CNTL__XTL_LOW_GAIN_MASK 0x00000004L
-#define CLK_PIN_CNTL__XTL_LOW_GAIN 0x00000004L
-#define CLK_PIN_CNTL__DONT_USE_XTALIN_MASK 0x00000010L
-#define CLK_PIN_CNTL__DONT_USE_XTALIN 0x00000010L
-#define CLK_PIN_CNTL__SLOW_CLOCK_SOURCE_MASK 0x00000020L
-#define CLK_PIN_CNTL__SLOW_CLOCK_SOURCE 0x00000020L
-#define CLK_PIN_CNTL__CG_CLK_TO_OUTPIN_MASK 0x00000800L
-#define CLK_PIN_CNTL__CG_CLK_TO_OUTPIN 0x00000800L
-#define CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN_MASK 0x00001000L
-#define CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN 0x00001000L
-#define CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND_MASK 0x00002000L
-#define CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND 0x00002000L
-#define CLK_PIN_CNTL__CG_SPARE_MASK 0x00004000L
-#define CLK_PIN_CNTL__CG_SPARE 0x00004000L
-#define CLK_PIN_CNTL__SCLK_DYN_START_CNTL_MASK 0x00008000L
-#define CLK_PIN_CNTL__SCLK_DYN_START_CNTL 0x00008000L
-#define CLK_PIN_CNTL__CP_CLK_RUNNING_MASK 0x00010000L
-#define CLK_PIN_CNTL__CP_CLK_RUNNING 0x00010000L
-#define CLK_PIN_CNTL__CG_SPARE_RD_MASK 0x00060000L
-#define CLK_PIN_CNTL__XTALIN_ALWAYS_ONb_MASK 0x00080000L
-#define CLK_PIN_CNTL__XTALIN_ALWAYS_ONb 0x00080000L
-#define CLK_PIN_CNTL__PWRSEQ_DELAY_MASK 0xff000000L
-
-/* pllCLK_PWRMGT_CNTL */
-#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF__SHIFT 0x00000000
-#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF__SHIFT 0x00000001
-#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF__SHIFT 0x00000002
-#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF__SHIFT 0x00000003
-#define CLK_PWRMGT_CNTL__MCLK_TURNOFF__SHIFT 0x00000004
-#define CLK_PWRMGT_CNTL__SCLK_TURNOFF__SHIFT 0x00000005
-#define CLK_PWRMGT_CNTL__PCLK_TURNOFF__SHIFT 0x00000006
-#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF__SHIFT 0x00000007
-#define CLK_PWRMGT_CNTL__MC_CH_MODE__SHIFT 0x00000008
-#define CLK_PWRMGT_CNTL__TEST_MODE__SHIFT 0x00000009
-#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN__SHIFT 0x0000000a
-#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE__SHIFT 0x0000000c
-#define CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT__SHIFT 0x0000000d
-#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT__SHIFT 0x0000000f
-#define CLK_PWRMGT_CNTL__MC_BUSY__SHIFT 0x00000010
-#define CLK_PWRMGT_CNTL__MC_INT_CNTL__SHIFT 0x00000011
-#define CLK_PWRMGT_CNTL__MC_SWITCH__SHIFT 0x00000012
-#define CLK_PWRMGT_CNTL__DLL_READY__SHIFT 0x00000013
-#define CLK_PWRMGT_CNTL__DISP_PM__SHIFT 0x00000014
-#define CLK_PWRMGT_CNTL__DYN_STOP_MODE__SHIFT 0x00000015
-#define CLK_PWRMGT_CNTL__CG_NO1_DEBUG__SHIFT 0x00000018
-#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF__SHIFT 0x0000001e
-#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF__SHIFT 0x0000001f
-
-/* pllP2PLL_CNTL */
-#define P2PLL_CNTL__P2PLL_RESET_MASK 0x00000001L
-#define P2PLL_CNTL__P2PLL_RESET 0x00000001L
-#define P2PLL_CNTL__P2PLL_SLEEP_MASK 0x00000002L
-#define P2PLL_CNTL__P2PLL_SLEEP 0x00000002L
-#define P2PLL_CNTL__P2PLL_TST_EN_MASK 0x00000004L
-#define P2PLL_CNTL__P2PLL_TST_EN 0x00000004L
-#define P2PLL_CNTL__P2PLL_REFCLK_SEL_MASK 0x00000010L
-#define P2PLL_CNTL__P2PLL_REFCLK_SEL 0x00000010L
-#define P2PLL_CNTL__P2PLL_FBCLK_SEL_MASK 0x00000020L
-#define P2PLL_CNTL__P2PLL_FBCLK_SEL 0x00000020L
-#define P2PLL_CNTL__P2PLL_TCPOFF_MASK 0x00000040L
-#define P2PLL_CNTL__P2PLL_TCPOFF 0x00000040L
-#define P2PLL_CNTL__P2PLL_TVCOMAX_MASK 0x00000080L
-#define P2PLL_CNTL__P2PLL_TVCOMAX 0x00000080L
-#define P2PLL_CNTL__P2PLL_PCP_MASK 0x00000700L
-#define P2PLL_CNTL__P2PLL_PVG_MASK 0x00003800L
-#define P2PLL_CNTL__P2PLL_PDC_MASK 0x0000c000L
-#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN_MASK 0x00010000L
-#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN 0x00010000L
-#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC_MASK 0x00040000L
-#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC 0x00040000L
-#define P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET_MASK 0x00080000L
-#define P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET 0x00080000L
-
-/* pllPIXCLKS_CNTL */
-#define PIXCLKS_CNTL__PIX2CLK_SRC_SEL__SHIFT 0x00000000
-#define PIXCLKS_CNTL__PIX2CLK_INVERT__SHIFT 0x00000004
-#define PIXCLKS_CNTL__PIX2CLK_SRC_INVERT__SHIFT 0x00000005
-#define PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb__SHIFT 0x00000006
-#define PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb__SHIFT 0x00000007
-#define PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL__SHIFT 0x00000008
-#define PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb__SHIFT 0x0000000b
-#define PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb__SHIFT 0x0000000c
-#define PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb__SHIFT 0x0000000d
-#define PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb__SHIFT 0x0000000e
-#define PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb__SHIFT 0x0000000f
-
-
-/* pllPIXCLKS_CNTL */
-#define PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK 0x00000003L
-#define PIXCLKS_CNTL__PIX2CLK_INVERT 0x00000010L
-#define PIXCLKS_CNTL__PIX2CLK_SRC_INVERT 0x00000020L
-#define PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb 0x00000040L
-#define PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb 0x00000080L
-#define PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL 0x00000100L
-#define PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb 0x00000800L
-#define PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb 0x00001000L
-#define PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb 0x00002000L
-#define PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb 0x00004000L
-#define PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb 0x00008000L
-#define PIXCLKS_CNTL__DISP_TVOUT_PIXCLK_TV_ALWAYS_ONb (1 << 9)
-#define PIXCLKS_CNTL__R300_DVOCLK_ALWAYS_ONb (1 << 10)
-#define PIXCLKS_CNTL__R300_PIXCLK_DVO_ALWAYS_ONb (1 << 13)
-#define PIXCLKS_CNTL__R300_PIXCLK_TRANS_ALWAYS_ONb (1 << 16)
-#define PIXCLKS_CNTL__R300_PIXCLK_TVO_ALWAYS_ONb (1 << 17)
-#define PIXCLKS_CNTL__R300_P2G2CLK_ALWAYS_ONb (1 << 18)
-#define PIXCLKS_CNTL__R300_P2G2CLK_DAC_ALWAYS_ONb (1 << 19)
-#define PIXCLKS_CNTL__R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF (1 << 23)
-
-
-/* pllP2PLL_DIV_0 */
-#define P2PLL_DIV_0__P2PLL_FB_DIV_MASK 0x000007ffL
-#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W_MASK 0x00008000L
-#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W 0x00008000L
-#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R_MASK 0x00008000L
-#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R 0x00008000L
-#define P2PLL_DIV_0__P2PLL_POST_DIV_MASK 0x00070000L
-
-/* pllSCLK_CNTL */
-#define SCLK_CNTL__SCLK_SRC_SEL_MASK 0x00000007L
-#define SCLK_CNTL__CP_MAX_DYN_STOP_LAT 0x00000008L
-#define SCLK_CNTL__HDP_MAX_DYN_STOP_LAT 0x00000010L
-#define SCLK_CNTL__TV_MAX_DYN_STOP_LAT 0x00000020L
-#define SCLK_CNTL__E2_MAX_DYN_STOP_LAT 0x00000040L
-#define SCLK_CNTL__SE_MAX_DYN_STOP_LAT 0x00000080L
-#define SCLK_CNTL__IDCT_MAX_DYN_STOP_LAT 0x00000100L
-#define SCLK_CNTL__VIP_MAX_DYN_STOP_LAT 0x00000200L
-#define SCLK_CNTL__RE_MAX_DYN_STOP_LAT 0x00000400L
-#define SCLK_CNTL__PB_MAX_DYN_STOP_LAT 0x00000800L
-#define SCLK_CNTL__TAM_MAX_DYN_STOP_LAT 0x00001000L
-#define SCLK_CNTL__TDM_MAX_DYN_STOP_LAT 0x00002000L
-#define SCLK_CNTL__RB_MAX_DYN_STOP_LAT 0x00004000L
-#define SCLK_CNTL__DYN_STOP_LAT_MASK 0x00007ff8
-#define SCLK_CNTL__FORCE_DISP2 0x00008000L
-#define SCLK_CNTL__FORCE_CP 0x00010000L
-#define SCLK_CNTL__FORCE_HDP 0x00020000L
-#define SCLK_CNTL__FORCE_DISP1 0x00040000L
-#define SCLK_CNTL__FORCE_TOP 0x00080000L
-#define SCLK_CNTL__FORCE_E2 0x00100000L
-#define SCLK_CNTL__FORCE_SE 0x00200000L
-#define SCLK_CNTL__FORCE_IDCT 0x00400000L
-#define SCLK_CNTL__FORCE_VIP 0x00800000L
-#define SCLK_CNTL__FORCE_RE 0x01000000L
-#define SCLK_CNTL__FORCE_PB 0x02000000L
-#define SCLK_CNTL__FORCE_TAM 0x04000000L
-#define SCLK_CNTL__FORCE_TDM 0x08000000L
-#define SCLK_CNTL__FORCE_RB 0x10000000L
-#define SCLK_CNTL__FORCE_TV_SCLK 0x20000000L
-#define SCLK_CNTL__FORCE_SUBPIC 0x40000000L
-#define SCLK_CNTL__FORCE_OV0 0x80000000L
-#define SCLK_CNTL__R300_FORCE_VAP (1<<21)
-#define SCLK_CNTL__R300_FORCE_SR (1<<25)
-#define SCLK_CNTL__R300_FORCE_PX (1<<26)
-#define SCLK_CNTL__R300_FORCE_TX (1<<27)
-#define SCLK_CNTL__R300_FORCE_US (1<<28)
-#define SCLK_CNTL__R300_FORCE_SU (1<<30)
-#define SCLK_CNTL__FORCEON_MASK 0xffff8000L
-
-/* pllSCLK_CNTL2 */
-#define SCLK_CNTL2__R300_TCL_MAX_DYN_STOP_LAT (1<<10)
-#define SCLK_CNTL2__R300_GA_MAX_DYN_STOP_LAT (1<<11)
-#define SCLK_CNTL2__R300_CBA_MAX_DYN_STOP_LAT (1<<12)
-#define SCLK_CNTL2__R300_FORCE_TCL (1<<13)
-#define SCLK_CNTL2__R300_FORCE_CBA (1<<14)
-#define SCLK_CNTL2__R300_FORCE_GA (1<<15)
-
-/* SCLK_MORE_CNTL */
-#define SCLK_MORE_CNTL__DISPREGS_MAX_DYN_STOP_LAT 0x00000001L
-#define SCLK_MORE_CNTL__MC_GUI_MAX_DYN_STOP_LAT 0x00000002L
-#define SCLK_MORE_CNTL__MC_HOST_MAX_DYN_STOP_LAT 0x00000004L
-#define SCLK_MORE_CNTL__FORCE_DISPREGS 0x00000100L
-#define SCLK_MORE_CNTL__FORCE_MC_GUI 0x00000200L
-#define SCLK_MORE_CNTL__FORCE_MC_HOST 0x00000400L
-#define SCLK_MORE_CNTL__STOP_SCLK_EN 0x00001000L
-#define SCLK_MORE_CNTL__STOP_SCLK_A 0x00002000L
-#define SCLK_MORE_CNTL__STOP_SCLK_B 0x00004000L
-#define SCLK_MORE_CNTL__STOP_SCLK_C 0x00008000L
-#define SCLK_MORE_CNTL__HALF_SPEED_SCLK 0x00010000L
-#define SCLK_MORE_CNTL__IO_CG_VOLTAGE_DROP 0x00020000L
-#define SCLK_MORE_CNTL__TVFB_SOFT_RESET 0x00040000L
-#define SCLK_MORE_CNTL__VOLTAGE_DROP_SYNC 0x00080000L
-#define SCLK_MORE_CNTL__IDLE_DELAY_HALF_SCLK 0x00400000L
-#define SCLK_MORE_CNTL__AGP_BUSY_HALF_SCLK 0x00800000L
-#define SCLK_MORE_CNTL__CG_SPARE_RD_C_MASK 0xff000000L
-#define SCLK_MORE_CNTL__FORCEON 0x00000700L
-
-/* MCLK_CNTL */
-#define MCLK_CNTL__MCLKA_SRC_SEL_MASK 0x00000007L
-#define MCLK_CNTL__YCLKA_SRC_SEL_MASK 0x00000070L
-#define MCLK_CNTL__MCLKB_SRC_SEL_MASK 0x00000700L
-#define MCLK_CNTL__YCLKB_SRC_SEL_MASK 0x00007000L
-#define MCLK_CNTL__FORCE_MCLKA_MASK 0x00010000L
-#define MCLK_CNTL__FORCE_MCLKA 0x00010000L
-#define MCLK_CNTL__FORCE_MCLKB_MASK 0x00020000L
-#define MCLK_CNTL__FORCE_MCLKB 0x00020000L
-#define MCLK_CNTL__FORCE_YCLKA_MASK 0x00040000L
-#define MCLK_CNTL__FORCE_YCLKA 0x00040000L
-#define MCLK_CNTL__FORCE_YCLKB_MASK 0x00080000L
-#define MCLK_CNTL__FORCE_YCLKB 0x00080000L
-#define MCLK_CNTL__FORCE_MC_MASK 0x00100000L
-#define MCLK_CNTL__FORCE_MC 0x00100000L
-#define MCLK_CNTL__FORCE_AIC_MASK 0x00200000L
-#define MCLK_CNTL__FORCE_AIC 0x00200000L
-#define MCLK_CNTL__MRDCKA0_SOUTSEL_MASK 0x03000000L
-#define MCLK_CNTL__MRDCKA1_SOUTSEL_MASK 0x0c000000L
-#define MCLK_CNTL__MRDCKB0_SOUTSEL_MASK 0x30000000L
-#define MCLK_CNTL__MRDCKB1_SOUTSEL_MASK 0xc0000000L
-#define MCLK_CNTL__R300_DISABLE_MC_MCLKA (1 << 21)
-#define MCLK_CNTL__R300_DISABLE_MC_MCLKB (1 << 21)
-
-/* MCLK_MISC */
-#define MCLK_MISC__SCLK_SOURCED_FROM_MPLL_SEL_MASK 0x00000003L
-#define MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL_MASK 0x00000004L
-#define MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL 0x00000004L
-#define MCLK_MISC__ENABLE_SCLK_FROM_MPLL_MASK 0x00000008L
-#define MCLK_MISC__ENABLE_SCLK_FROM_MPLL 0x00000008L
-#define MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN_MASK 0x00000010L
-#define MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN 0x00000010L
-#define MCLK_MISC__DLL_READY_LAT_MASK 0x00000100L
-#define MCLK_MISC__DLL_READY_LAT 0x00000100L
-#define MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT_MASK 0x00001000L
-#define MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT 0x00001000L
-#define MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT_MASK 0x00002000L
-#define MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT 0x00002000L
-#define MCLK_MISC__MC_MCLK_DYN_ENABLE_MASK 0x00004000L
-#define MCLK_MISC__MC_MCLK_DYN_ENABLE 0x00004000L
-#define MCLK_MISC__IO_MCLK_DYN_ENABLE_MASK 0x00008000L
-#define MCLK_MISC__IO_MCLK_DYN_ENABLE 0x00008000L
-#define MCLK_MISC__CGM_CLK_TO_OUTPIN_MASK 0x00010000L
-#define MCLK_MISC__CGM_CLK_TO_OUTPIN 0x00010000L
-#define MCLK_MISC__CLK_OR_COUNT_SEL_MASK 0x00020000L
-#define MCLK_MISC__CLK_OR_COUNT_SEL 0x00020000L
-#define MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND_MASK 0x00040000L
-#define MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND 0x00040000L
-#define MCLK_MISC__CGM_SPARE_RD_MASK 0x00300000L
-#define MCLK_MISC__CGM_SPARE_A_RD_MASK 0x00c00000L
-#define MCLK_MISC__TCLK_TO_YCLKB_EN_MASK 0x01000000L
-#define MCLK_MISC__TCLK_TO_YCLKB_EN 0x01000000L
-#define MCLK_MISC__CGM_SPARE_A_MASK 0x0e000000L
-
-/* VCLK_ECP_CNTL */
-#define VCLK_ECP_CNTL__VCLK_SRC_SEL_MASK 0x00000003L
-#define VCLK_ECP_CNTL__VCLK_INVERT 0x00000010L
-#define VCLK_ECP_CNTL__PIXCLK_SRC_INVERT 0x00000020L
-#define VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb 0x00000040L
-#define VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb 0x00000080L
-#define VCLK_ECP_CNTL__ECP_DIV_MASK 0x00000300L
-#define VCLK_ECP_CNTL__ECP_FORCE_ON 0x00040000L
-#define VCLK_ECP_CNTL__SUBCLK_FORCE_ON 0x00080000L
-#define VCLK_ECP_CNTL__R300_DISP_DAC_PIXCLK_DAC_BLANK_OFF (1<<23)
-
-/* PLL_PWRMGT_CNTL */
-#define PLL_PWRMGT_CNTL__MPLL_TURNOFF_MASK 0x00000001L
-#define PLL_PWRMGT_CNTL__MPLL_TURNOFF 0x00000001L
-#define PLL_PWRMGT_CNTL__SPLL_TURNOFF_MASK 0x00000002L
-#define PLL_PWRMGT_CNTL__SPLL_TURNOFF 0x00000002L
-#define PLL_PWRMGT_CNTL__PPLL_TURNOFF_MASK 0x00000004L
-#define PLL_PWRMGT_CNTL__PPLL_TURNOFF 0x00000004L
-#define PLL_PWRMGT_CNTL__P2PLL_TURNOFF_MASK 0x00000008L
-#define PLL_PWRMGT_CNTL__P2PLL_TURNOFF 0x00000008L
-#define PLL_PWRMGT_CNTL__TVPLL_TURNOFF_MASK 0x00000010L
-#define PLL_PWRMGT_CNTL__TVPLL_TURNOFF 0x00000010L
-#define PLL_PWRMGT_CNTL__AGPCLK_DYN_STOP_LAT_MASK 0x000001e0L
-#define PLL_PWRMGT_CNTL__APM_POWER_STATE_MASK 0x00000600L
-#define PLL_PWRMGT_CNTL__APM_PWRSTATE_RD_MASK 0x00001800L
-#define PLL_PWRMGT_CNTL__PM_MODE_SEL_MASK 0x00002000L
-#define PLL_PWRMGT_CNTL__PM_MODE_SEL 0x00002000L
-#define PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND_MASK 0x00004000L
-#define PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND 0x00004000L
-#define PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND_MASK 0x00008000L
-#define PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND 0x00008000L
-#define PLL_PWRMGT_CNTL__MOBILE_SU_MASK 0x00010000L
-#define PLL_PWRMGT_CNTL__MOBILE_SU 0x00010000L
-#define PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK_MASK 0x00020000L
-#define PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK 0x00020000L
-#define PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK_MASK 0x00040000L
-#define PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK 0x00040000L
-#define PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE_MASK 0x00080000L
-#define PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE 0x00080000L
-#define PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE_MASK 0x00100000L
-#define PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE 0x00100000L
-#define PLL_PWRMGT_CNTL__TCL_CLOCK_CTIVE_RD_MASK 0x00200000L
-#define PLL_PWRMGT_CNTL__TCL_CLOCK_ACTIVE_RD 0x00200000L
-#define PLL_PWRMGT_CNTL__CG_NO2_DEBUG_MASK 0xff000000L
-
-/* CLK_PWRMGT_CNTL */
-#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF_MASK 0x00000001L
-#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF 0x00000001L
-#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF_MASK 0x00000002L
-#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF 0x00000002L
-#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF_MASK 0x00000004L
-#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF 0x00000004L
-#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF_MASK 0x00000008L
-#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF 0x00000008L
-#define CLK_PWRMGT_CNTL__MCLK_TURNOFF_MASK 0x00000010L
-#define CLK_PWRMGT_CNTL__MCLK_TURNOFF 0x00000010L
-#define CLK_PWRMGT_CNTL__SCLK_TURNOFF_MASK 0x00000020L
-#define CLK_PWRMGT_CNTL__SCLK_TURNOFF 0x00000020L
-#define CLK_PWRMGT_CNTL__PCLK_TURNOFF_MASK 0x00000040L
-#define CLK_PWRMGT_CNTL__PCLK_TURNOFF 0x00000040L
-#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF_MASK 0x00000080L
-#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF 0x00000080L
-#define CLK_PWRMGT_CNTL__MC_CH_MODE_MASK 0x00000100L
-#define CLK_PWRMGT_CNTL__MC_CH_MODE 0x00000100L
-#define CLK_PWRMGT_CNTL__TEST_MODE_MASK 0x00000200L
-#define CLK_PWRMGT_CNTL__TEST_MODE 0x00000200L
-#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN_MASK 0x00000400L
-#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN 0x00000400L
-#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE_MASK 0x00001000L
-#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE 0x00001000L
-#define CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK 0x00006000L
-#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT_MASK 0x00008000L
-#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT 0x00008000L
-#define CLK_PWRMGT_CNTL__MC_BUSY_MASK 0x00010000L
-#define CLK_PWRMGT_CNTL__MC_BUSY 0x00010000L
-#define CLK_PWRMGT_CNTL__MC_INT_CNTL_MASK 0x00020000L
-#define CLK_PWRMGT_CNTL__MC_INT_CNTL 0x00020000L
-#define CLK_PWRMGT_CNTL__MC_SWITCH_MASK 0x00040000L
-#define CLK_PWRMGT_CNTL__MC_SWITCH 0x00040000L
-#define CLK_PWRMGT_CNTL__DLL_READY_MASK 0x00080000L
-#define CLK_PWRMGT_CNTL__DLL_READY 0x00080000L
-#define CLK_PWRMGT_CNTL__DISP_PM_MASK 0x00100000L
-#define CLK_PWRMGT_CNTL__DISP_PM 0x00100000L
-#define CLK_PWRMGT_CNTL__DYN_STOP_MODE_MASK 0x00e00000L
-#define CLK_PWRMGT_CNTL__CG_NO1_DEBUG_MASK 0x3f000000L
-#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF_MASK 0x40000000L
-#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF 0x40000000L
-#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF_MASK 0x80000000L
-#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF 0x80000000L
-
-/* BUS_CNTL1 */
-#define BUS_CNTL1__PMI_IO_DISABLE_MASK 0x00000001L
-#define BUS_CNTL1__PMI_IO_DISABLE 0x00000001L
-#define BUS_CNTL1__PMI_MEM_DISABLE_MASK 0x00000002L
-#define BUS_CNTL1__PMI_MEM_DISABLE 0x00000002L
-#define BUS_CNTL1__PMI_BM_DISABLE_MASK 0x00000004L
-#define BUS_CNTL1__PMI_BM_DISABLE 0x00000004L
-#define BUS_CNTL1__PMI_INT_DISABLE_MASK 0x00000008L
-#define BUS_CNTL1__PMI_INT_DISABLE 0x00000008L
-#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE_MASK 0x00000020L
-#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE 0x00000020L
-#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS_MASK 0x00000100L
-#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS 0x00000100L
-#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS_MASK 0x00000200L
-#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS 0x00000200L
-#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS_MASK 0x00000400L
-#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS 0x00000400L
-#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS_MASK 0x00000800L
-#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS 0x00000800L
-#define BUS_CNTL1__MOBILE_PLATFORM_SEL_MASK 0x0c000000L
-#define BUS_CNTL1__SEND_SBA_LATENCY_MASK 0x70000000L
-#define BUS_CNTL1__AGPCLK_VALID_MASK 0x80000000L
-#define BUS_CNTL1__AGPCLK_VALID 0x80000000L
-
-/* BUS_CNTL1 */
-#define BUS_CNTL1__PMI_IO_DISABLE__SHIFT 0x00000000
-#define BUS_CNTL1__PMI_MEM_DISABLE__SHIFT 0x00000001
-#define BUS_CNTL1__PMI_BM_DISABLE__SHIFT 0x00000002
-#define BUS_CNTL1__PMI_INT_DISABLE__SHIFT 0x00000003
-#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE__SHIFT 0x00000005
-#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS__SHIFT 0x00000008
-#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS__SHIFT 0x00000009
-#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS__SHIFT 0x0000000a
-#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS__SHIFT 0x0000000b
-#define BUS_CNTL1__MOBILE_PLATFORM_SEL__SHIFT 0x0000001a
-#define BUS_CNTL1__SEND_SBA_LATENCY__SHIFT 0x0000001c
-#define BUS_CNTL1__AGPCLK_VALID__SHIFT 0x0000001f
-
-/* CRTC_OFFSET_CNTL */
-#define CRTC_OFFSET_CNTL__CRTC_TILE_LINE_MASK 0x0000000fL
-#define CRTC_OFFSET_CNTL__CRTC_TILE_LINE_RIGHT_MASK 0x000000f0L
-#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT_MASK 0x00004000L
-#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT 0x00004000L
-#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_MASK 0x00008000L
-#define CRTC_OFFSET_CNTL__CRTC_TILE_EN 0x00008000L
-#define CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL_MASK 0x00010000L
-#define CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL 0x00010000L
-#define CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN_MASK 0x00020000L
-#define CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN 0x00020000L
-#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_EN_MASK 0x000c0000L
-#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN_MASK 0x00100000L
-#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN 0x00100000L
-#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_MASK 0x00200000L
-#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC 0x00200000L
-#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN_MASK 0x10000000L
-#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN 0x10000000L
-#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN_MASK 0x20000000L
-#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN 0x20000000L
-#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_MASK 0x40000000L
-#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET 0x40000000L
-#define CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK_MASK 0x80000000L
-#define CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK 0x80000000L
-
-/* CRTC_GEN_CNTL */
-#define CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN_MASK 0x00000001L
-#define CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN 0x00000001L
-#define CRTC_GEN_CNTL__CRTC_INTERLACE_EN_MASK 0x00000002L
-#define CRTC_GEN_CNTL__CRTC_INTERLACE_EN 0x00000002L
-#define CRTC_GEN_CNTL__CRTC_C_SYNC_EN_MASK 0x00000010L
-#define CRTC_GEN_CNTL__CRTC_C_SYNC_EN 0x00000010L
-#define CRTC_GEN_CNTL__CRTC_PIX_WIDTH_MASK 0x00000f00L
-#define CRTC_GEN_CNTL__CRTC_ICON_EN_MASK 0x00008000L
-#define CRTC_GEN_CNTL__CRTC_ICON_EN 0x00008000L
-#define CRTC_GEN_CNTL__CRTC_CUR_EN_MASK 0x00010000L
-#define CRTC_GEN_CNTL__CRTC_CUR_EN 0x00010000L
-#define CRTC_GEN_CNTL__CRTC_VSTAT_MODE_MASK 0x00060000L
-#define CRTC_GEN_CNTL__CRTC_CUR_MODE_MASK 0x00700000L
-#define CRTC_GEN_CNTL__CRTC_EXT_DISP_EN_MASK 0x01000000L
-#define CRTC_GEN_CNTL__CRTC_EXT_DISP_EN 0x01000000L
-#define CRTC_GEN_CNTL__CRTC_EN_MASK 0x02000000L
-#define CRTC_GEN_CNTL__CRTC_EN 0x02000000L
-#define CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B_MASK 0x04000000L
-#define CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B 0x04000000L
-
-/* CRTC2_GEN_CNTL */
-#define CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN_MASK 0x00000001L
-#define CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN 0x00000001L
-#define CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN_MASK 0x00000002L
-#define CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN 0x00000002L
-#define CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE_MASK 0x00000010L
-#define CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE 0x00000010L
-#define CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE_MASK 0x00000020L
-#define CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE 0x00000020L
-#define CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE_MASK 0x00000040L
-#define CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE 0x00000040L
-#define CRTC2_GEN_CNTL__CRT2_ON_MASK 0x00000080L
-#define CRTC2_GEN_CNTL__CRT2_ON 0x00000080L
-#define CRTC2_GEN_CNTL__CRTC2_PIX_WIDTH_MASK 0x00000f00L
-#define CRTC2_GEN_CNTL__CRTC2_ICON_EN_MASK 0x00008000L
-#define CRTC2_GEN_CNTL__CRTC2_ICON_EN 0x00008000L
-#define CRTC2_GEN_CNTL__CRTC2_CUR_EN_MASK 0x00010000L
-#define CRTC2_GEN_CNTL__CRTC2_CUR_EN 0x00010000L
-#define CRTC2_GEN_CNTL__CRTC2_CUR_MODE_MASK 0x00700000L
-#define CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS_MASK 0x00800000L
-#define CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS 0x00800000L
-#define CRTC2_GEN_CNTL__CRTC2_EN_MASK 0x02000000L
-#define CRTC2_GEN_CNTL__CRTC2_EN 0x02000000L
-#define CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B_MASK 0x04000000L
-#define CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B 0x04000000L
-#define CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN_MASK 0x08000000L
-#define CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN 0x08000000L
-#define CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS_MASK 0x10000000L
-#define CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS 0x10000000L
-#define CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS_MASK 0x20000000L
-#define CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS 0x20000000L
-
-/* AGP_CNTL */
-#define AGP_CNTL__MAX_IDLE_CLK_MASK 0x000000ffL
-#define AGP_CNTL__HOLD_RD_FIFO_MASK 0x00000100L
-#define AGP_CNTL__HOLD_RD_FIFO 0x00000100L
-#define AGP_CNTL__HOLD_RQ_FIFO_MASK 0x00000200L
-#define AGP_CNTL__HOLD_RQ_FIFO 0x00000200L
-#define AGP_CNTL__EN_2X_STBB_MASK 0x00000400L
-#define AGP_CNTL__EN_2X_STBB 0x00000400L
-#define AGP_CNTL__FORCE_FULL_SBA_MASK 0x00000800L
-#define AGP_CNTL__FORCE_FULL_SBA 0x00000800L
-#define AGP_CNTL__SBA_DIS_MASK 0x00001000L
-#define AGP_CNTL__SBA_DIS 0x00001000L
-#define AGP_CNTL__AGP_REV_ID_MASK 0x00002000L
-#define AGP_CNTL__AGP_REV_ID 0x00002000L
-#define AGP_CNTL__REG_CRIPPLE_AGP4X_MASK 0x00004000L
-#define AGP_CNTL__REG_CRIPPLE_AGP4X 0x00004000L
-#define AGP_CNTL__REG_CRIPPLE_AGP2X4X_MASK 0x00008000L
-#define AGP_CNTL__REG_CRIPPLE_AGP2X4X 0x00008000L
-#define AGP_CNTL__FORCE_INT_VREF_MASK 0x00010000L
-#define AGP_CNTL__FORCE_INT_VREF 0x00010000L
-#define AGP_CNTL__PENDING_SLOTS_VAL_MASK 0x00060000L
-#define AGP_CNTL__PENDING_SLOTS_SEL_MASK 0x00080000L
-#define AGP_CNTL__PENDING_SLOTS_SEL 0x00080000L
-#define AGP_CNTL__EN_EXTENDED_AD_STB_2X_MASK 0x00100000L
-#define AGP_CNTL__EN_EXTENDED_AD_STB_2X 0x00100000L
-#define AGP_CNTL__DIS_QUEUED_GNT_FIX_MASK 0x00200000L
-#define AGP_CNTL__DIS_QUEUED_GNT_FIX 0x00200000L
-#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET_MASK 0x00400000L
-#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET 0x00400000L
-#define AGP_CNTL__EN_RBFCALM_MASK 0x00800000L
-#define AGP_CNTL__EN_RBFCALM 0x00800000L
-#define AGP_CNTL__FORCE_EXT_VREF_MASK 0x01000000L
-#define AGP_CNTL__FORCE_EXT_VREF 0x01000000L
-#define AGP_CNTL__DIS_RBF_MASK 0x02000000L
-#define AGP_CNTL__DIS_RBF 0x02000000L
-#define AGP_CNTL__DELAY_FIRST_SBA_EN_MASK 0x04000000L
-#define AGP_CNTL__DELAY_FIRST_SBA_EN 0x04000000L
-#define AGP_CNTL__DELAY_FIRST_SBA_VAL_MASK 0x38000000L
-#define AGP_CNTL__AGP_MISC_MASK 0xc0000000L
-
-/* AGP_CNTL */
-#define AGP_CNTL__MAX_IDLE_CLK__SHIFT 0x00000000
-#define AGP_CNTL__HOLD_RD_FIFO__SHIFT 0x00000008
-#define AGP_CNTL__HOLD_RQ_FIFO__SHIFT 0x00000009
-#define AGP_CNTL__EN_2X_STBB__SHIFT 0x0000000a
-#define AGP_CNTL__FORCE_FULL_SBA__SHIFT 0x0000000b
-#define AGP_CNTL__SBA_DIS__SHIFT 0x0000000c
-#define AGP_CNTL__AGP_REV_ID__SHIFT 0x0000000d
-#define AGP_CNTL__REG_CRIPPLE_AGP4X__SHIFT 0x0000000e
-#define AGP_CNTL__REG_CRIPPLE_AGP2X4X__SHIFT 0x0000000f
-#define AGP_CNTL__FORCE_INT_VREF__SHIFT 0x00000010
-#define AGP_CNTL__PENDING_SLOTS_VAL__SHIFT 0x00000011
-#define AGP_CNTL__PENDING_SLOTS_SEL__SHIFT 0x00000013
-#define AGP_CNTL__EN_EXTENDED_AD_STB_2X__SHIFT 0x00000014
-#define AGP_CNTL__DIS_QUEUED_GNT_FIX__SHIFT 0x00000015
-#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET__SHIFT 0x00000016
-#define AGP_CNTL__EN_RBFCALM__SHIFT 0x00000017
-#define AGP_CNTL__FORCE_EXT_VREF__SHIFT 0x00000018
-#define AGP_CNTL__DIS_RBF__SHIFT 0x00000019
-#define AGP_CNTL__DELAY_FIRST_SBA_EN__SHIFT 0x0000001a
-#define AGP_CNTL__DELAY_FIRST_SBA_VAL__SHIFT 0x0000001b
-#define AGP_CNTL__AGP_MISC__SHIFT 0x0000001e
-
-/* DISP_MISC_CNTL */
-#define DISP_MISC_CNTL__SOFT_RESET_GRPH_PP_MASK 0x00000001L
-#define DISP_MISC_CNTL__SOFT_RESET_GRPH_PP 0x00000001L
-#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP_MASK 0x00000002L
-#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP 0x00000002L
-#define DISP_MISC_CNTL__SOFT_RESET_OV0_PP_MASK 0x00000004L
-#define DISP_MISC_CNTL__SOFT_RESET_OV0_PP 0x00000004L
-#define DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK_MASK 0x00000010L
-#define DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK 0x00000010L
-#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK_MASK 0x00000020L
-#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK 0x00000020L
-#define DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK_MASK 0x00000040L
-#define DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK 0x00000040L
-#define DISP_MISC_CNTL__SYNC_STRENGTH_MASK 0x00000300L
-#define DISP_MISC_CNTL__SYNC_PAD_FLOP_EN_MASK 0x00000400L
-#define DISP_MISC_CNTL__SYNC_PAD_FLOP_EN 0x00000400L
-#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP_MASK 0x00001000L
-#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP 0x00001000L
-#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK_MASK 0x00008000L
-#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK 0x00008000L
-#define DISP_MISC_CNTL__SOFT_RESET_LVDS_MASK 0x00010000L
-#define DISP_MISC_CNTL__SOFT_RESET_LVDS 0x00010000L
-#define DISP_MISC_CNTL__SOFT_RESET_TMDS_MASK 0x00020000L
-#define DISP_MISC_CNTL__SOFT_RESET_TMDS 0x00020000L
-#define DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS_MASK 0x00040000L
-#define DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS 0x00040000L
-#define DISP_MISC_CNTL__SOFT_RESET_TV_MASK 0x00080000L
-#define DISP_MISC_CNTL__SOFT_RESET_TV 0x00080000L
-#define DISP_MISC_CNTL__PALETTE2_MEM_RD_MARGIN_MASK 0x00f00000L
-#define DISP_MISC_CNTL__PALETTE_MEM_RD_MARGIN_MASK 0x0f000000L
-#define DISP_MISC_CNTL__RMX_BUF_MEM_RD_MARGIN_MASK 0xf0000000L
-
-/* DISP_PWR_MAN */
-#define DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN_MASK 0x00000001L
-#define DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN 0x00000001L
-#define DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN_MASK 0x00000010L
-#define DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN 0x00000010L
-#define DISP_PWR_MAN__DISP_PWR_MAN_DPMS_MASK 0x00000300L
-#define DISP_PWR_MAN__DISP_D3_RST_MASK 0x00010000L
-#define DISP_PWR_MAN__DISP_D3_RST 0x00010000L
-#define DISP_PWR_MAN__DISP_D3_REG_RST_MASK 0x00020000L
-#define DISP_PWR_MAN__DISP_D3_REG_RST 0x00020000L
-#define DISP_PWR_MAN__DISP_D3_GRPH_RST_MASK 0x00040000L
-#define DISP_PWR_MAN__DISP_D3_GRPH_RST 0x00040000L
-#define DISP_PWR_MAN__DISP_D3_SUBPIC_RST_MASK 0x00080000L
-#define DISP_PWR_MAN__DISP_D3_SUBPIC_RST 0x00080000L
-#define DISP_PWR_MAN__DISP_D3_OV0_RST_MASK 0x00100000L
-#define DISP_PWR_MAN__DISP_D3_OV0_RST 0x00100000L
-#define DISP_PWR_MAN__DISP_D1D2_GRPH_RST_MASK 0x00200000L
-#define DISP_PWR_MAN__DISP_D1D2_GRPH_RST 0x00200000L
-#define DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST_MASK 0x00400000L
-#define DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST 0x00400000L
-#define DISP_PWR_MAN__DISP_D1D2_OV0_RST_MASK 0x00800000L
-#define DISP_PWR_MAN__DISP_D1D2_OV0_RST 0x00800000L
-#define DISP_PWR_MAN__DIG_TMDS_ENABLE_RST_MASK 0x01000000L
-#define DISP_PWR_MAN__DIG_TMDS_ENABLE_RST 0x01000000L
-#define DISP_PWR_MAN__TV_ENABLE_RST_MASK 0x02000000L
-#define DISP_PWR_MAN__TV_ENABLE_RST 0x02000000L
-#define DISP_PWR_MAN__AUTO_PWRUP_EN_MASK 0x04000000L
-#define DISP_PWR_MAN__AUTO_PWRUP_EN 0x04000000L
-
-/* MC_IND_INDEX */
-#define MC_IND_INDEX__MC_IND_ADDR_MASK 0x0000001fL
-#define MC_IND_INDEX__MC_IND_WR_EN_MASK 0x00000100L
-#define MC_IND_INDEX__MC_IND_WR_EN 0x00000100L
-
-/* MC_IND_DATA */
-#define MC_IND_DATA__MC_IND_DATA_MASK 0xffffffffL
-
-/* MC_CHP_IO_CNTL_A1 */
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA__SHIFT 0x00000000
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA__SHIFT 0x00000001
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA__SHIFT 0x00000002
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA__SHIFT 0x00000003
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA__SHIFT 0x00000004
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA__SHIFT 0x00000005
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA__SHIFT 0x00000006
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA__SHIFT 0x00000007
-#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA__SHIFT 0x00000008
-#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA__SHIFT 0x00000009
-#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA__SHIFT 0x0000000a
-#define MC_CHP_IO_CNTL_A1__MEM_IO_MODEA__SHIFT 0x0000000c
-#define MC_CHP_IO_CNTL_A1__MEM_REC_CKA__SHIFT 0x0000000e
-#define MC_CHP_IO_CNTL_A1__MEM_REC_AA__SHIFT 0x00000010
-#define MC_CHP_IO_CNTL_A1__MEM_REC_DQMA__SHIFT 0x00000012
-#define MC_CHP_IO_CNTL_A1__MEM_REC_DQSA__SHIFT 0x00000014
-#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA__SHIFT 0x00000016
-#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA__SHIFT 0x00000017
-#define MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA__SHIFT 0x00000018
-#define MC_CHP_IO_CNTL_A1__MEM_CLK_SELA__SHIFT 0x0000001a
-#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA__SHIFT 0x0000001c
-#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A__SHIFT 0x0000001e
-#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A__SHIFT 0x0000001f
-
-/* MC_CHP_IO_CNTL_B1 */
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB__SHIFT 0x00000000
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB__SHIFT 0x00000001
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB__SHIFT 0x00000002
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB__SHIFT 0x00000003
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB__SHIFT 0x00000004
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB__SHIFT 0x00000005
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB__SHIFT 0x00000006
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB__SHIFT 0x00000007
-#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB__SHIFT 0x00000008
-#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB__SHIFT 0x00000009
-#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB__SHIFT 0x0000000a
-#define MC_CHP_IO_CNTL_B1__MEM_IO_MODEB__SHIFT 0x0000000c
-#define MC_CHP_IO_CNTL_B1__MEM_REC_CKB__SHIFT 0x0000000e
-#define MC_CHP_IO_CNTL_B1__MEM_REC_AB__SHIFT 0x00000010
-#define MC_CHP_IO_CNTL_B1__MEM_REC_DQMB__SHIFT 0x00000012
-#define MC_CHP_IO_CNTL_B1__MEM_REC_DQSB__SHIFT 0x00000014
-#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB__SHIFT 0x00000016
-#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB__SHIFT 0x00000017
-#define MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB__SHIFT 0x00000018
-#define MC_CHP_IO_CNTL_B1__MEM_CLK_SELB__SHIFT 0x0000001a
-#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB__SHIFT 0x0000001c
-#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B__SHIFT 0x0000001e
-#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B__SHIFT 0x0000001f
-
-/* MC_CHP_IO_CNTL_A1 */
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA_MASK 0x00000001L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA 0x00000001L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA_MASK 0x00000002L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA 0x00000002L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA_MASK 0x00000004L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA 0x00000004L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA_MASK 0x00000008L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA 0x00000008L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA_MASK 0x00000010L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA 0x00000010L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA_MASK 0x00000020L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA 0x00000020L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA_MASK 0x00000040L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA 0x00000040L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA_MASK 0x00000080L
-#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA 0x00000080L
-#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA_MASK 0x00000100L
-#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA 0x00000100L
-#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA_MASK 0x00000200L
-#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA 0x00000200L
-#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA_MASK 0x00000400L
-#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA 0x00000400L
-#define MC_CHP_IO_CNTL_A1__MEM_IO_MODEA_MASK 0x00003000L
-#define MC_CHP_IO_CNTL_A1__MEM_REC_CKA_MASK 0x0000c000L
-#define MC_CHP_IO_CNTL_A1__MEM_REC_AA_MASK 0x00030000L
-#define MC_CHP_IO_CNTL_A1__MEM_REC_DQMA_MASK 0x000c0000L
-#define MC_CHP_IO_CNTL_A1__MEM_REC_DQSA_MASK 0x00300000L
-#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA_MASK 0x00400000L
-#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA 0x00400000L
-#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA_MASK 0x00800000L
-#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA 0x00800000L
-#define MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA_MASK 0x03000000L
-#define MC_CHP_IO_CNTL_A1__MEM_CLK_SELA_MASK 0x0c000000L
-#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA_MASK 0x10000000L
-#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA 0x10000000L
-#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A_MASK 0x40000000L
-#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A 0x40000000L
-#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A_MASK 0x80000000L
-#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A 0x80000000L
-
-/* MC_CHP_IO_CNTL_B1 */
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB_MASK 0x00000001L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB 0x00000001L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB_MASK 0x00000002L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB 0x00000002L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB_MASK 0x00000004L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB 0x00000004L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB_MASK 0x00000008L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB 0x00000008L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB_MASK 0x00000010L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB 0x00000010L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB_MASK 0x00000020L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB 0x00000020L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB_MASK 0x00000040L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB 0x00000040L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB_MASK 0x00000080L
-#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB 0x00000080L
-#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB_MASK 0x00000100L
-#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB 0x00000100L
-#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB_MASK 0x00000200L
-#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB 0x00000200L
-#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB_MASK 0x00000400L
-#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB 0x00000400L
-#define MC_CHP_IO_CNTL_B1__MEM_IO_MODEB_MASK 0x00003000L
-#define MC_CHP_IO_CNTL_B1__MEM_REC_CKB_MASK 0x0000c000L
-#define MC_CHP_IO_CNTL_B1__MEM_REC_AB_MASK 0x00030000L
-#define MC_CHP_IO_CNTL_B1__MEM_REC_DQMB_MASK 0x000c0000L
-#define MC_CHP_IO_CNTL_B1__MEM_REC_DQSB_MASK 0x00300000L
-#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB_MASK 0x00400000L
-#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB 0x00400000L
-#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB_MASK 0x00800000L
-#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB 0x00800000L
-#define MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB_MASK 0x03000000L
-#define MC_CHP_IO_CNTL_B1__MEM_CLK_SELB_MASK 0x0c000000L
-#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB_MASK 0x10000000L
-#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB 0x10000000L
-#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B_MASK 0x40000000L
-#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B 0x40000000L
-#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B_MASK 0x80000000L
-#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B 0x80000000L
-
-/* MEM_SDRAM_MODE_REG */
-#define MEM_SDRAM_MODE_REG__MEM_MODE_REG_MASK 0x00007fffL
-#define MEM_SDRAM_MODE_REG__MEM_WR_LATENCY_MASK 0x000f0000L
-#define MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY_MASK 0x00700000L
-#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY_MASK 0x00800000L
-#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY 0x00800000L
-#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY_MASK 0x01000000L
-#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY 0x01000000L
-#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD_MASK 0x02000000L
-#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD 0x02000000L
-#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA_MASK 0x04000000L
-#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA 0x04000000L
-#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR_MASK 0x08000000L
-#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR 0x08000000L
-#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE_MASK 0x10000000L
-#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE 0x10000000L
-#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL_MASK 0x20000000L
-#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL 0x20000000L
-#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE_MASK 0x40000000L
-#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE 0x40000000L
-#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET_MASK 0x80000000L
-#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET 0x80000000L
-
-/* MEM_SDRAM_MODE_REG */
-#define MEM_SDRAM_MODE_REG__MEM_MODE_REG__SHIFT 0x00000000
-#define MEM_SDRAM_MODE_REG__MEM_WR_LATENCY__SHIFT 0x00000010
-#define MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY__SHIFT 0x00000014
-#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY__SHIFT 0x00000017
-#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY__SHIFT 0x00000018
-#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD__SHIFT 0x00000019
-#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA__SHIFT 0x0000001a
-#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR__SHIFT 0x0000001b
-#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE__SHIFT 0x0000001c
-#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL__SHIFT 0x0000001d
-#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE__SHIFT 0x0000001e
-#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET__SHIFT 0x0000001f
-
-/* MEM_REFRESH_CNTL */
-#define MEM_REFRESH_CNTL__MEM_REFRESH_RATE_MASK 0x000000ffL
-#define MEM_REFRESH_CNTL__MEM_REFRESH_DIS_MASK 0x00000100L
-#define MEM_REFRESH_CNTL__MEM_REFRESH_DIS 0x00000100L
-#define MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE_MASK 0x00000200L
-#define MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE 0x00000200L
-#define MEM_REFRESH_CNTL__MEM_TRFC_MASK 0x0000f000L
-#define MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE_MASK 0x00010000L
-#define MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE 0x00010000L
-#define MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE_MASK 0x00020000L
-#define MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE 0x00020000L
-#define MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE_MASK 0x00040000L
-#define MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE 0x00040000L
-#define MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE_MASK 0x00080000L
-#define MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE 0x00080000L
-#define MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE_MASK 0x00100000L
-#define MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE 0x00100000L
-#define MEM_REFRESH_CNTL__DLL_FB_SLCT_CKA_MASK 0x00c00000L
-#define MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE_MASK 0x01000000L
-#define MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE 0x01000000L
-#define MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE_MASK 0x02000000L
-#define MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE 0x02000000L
-#define MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE_MASK 0x04000000L
-#define MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE 0x04000000L
-#define MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE_MASK 0x08000000L
-#define MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE 0x08000000L
-#define MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE_MASK 0x10000000L
-#define MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE 0x10000000L
-#define MEM_REFRESH_CNTL__DLL_FB_SLCT_CKB_MASK 0xc0000000L
-
-/* MC_STATUS */
-#define MC_STATUS__MEM_PWRUP_COMPL_A_MASK 0x00000001L
-#define MC_STATUS__MEM_PWRUP_COMPL_A 0x00000001L
-#define MC_STATUS__MEM_PWRUP_COMPL_B_MASK 0x00000002L
-#define MC_STATUS__MEM_PWRUP_COMPL_B 0x00000002L
-#define MC_STATUS__MC_IDLE_MASK 0x00000004L
-#define MC_STATUS__MC_IDLE 0x00000004L
-#define MC_STATUS__IMP_N_VALUE_R_BACK_MASK 0x00000078L
-#define MC_STATUS__IMP_P_VALUE_R_BACK_MASK 0x00000780L
-#define MC_STATUS__TEST_OUT_R_BACK_MASK 0x00000800L
-#define MC_STATUS__TEST_OUT_R_BACK 0x00000800L
-#define MC_STATUS__DUMMY_OUT_R_BACK_MASK 0x00001000L
-#define MC_STATUS__DUMMY_OUT_R_BACK 0x00001000L
-#define MC_STATUS__IMP_N_VALUE_A_R_BACK_MASK 0x0001e000L
-#define MC_STATUS__IMP_P_VALUE_A_R_BACK_MASK 0x001e0000L
-#define MC_STATUS__IMP_N_VALUE_CK_R_BACK_MASK 0x01e00000L
-#define MC_STATUS__IMP_P_VALUE_CK_R_BACK_MASK 0x1e000000L
-
-/* MDLL_CKO */
-#define MDLL_CKO__MCKOA_SLEEP_MASK 0x00000001L
-#define MDLL_CKO__MCKOA_SLEEP 0x00000001L
-#define MDLL_CKO__MCKOA_RESET_MASK 0x00000002L
-#define MDLL_CKO__MCKOA_RESET 0x00000002L
-#define MDLL_CKO__MCKOA_RANGE_MASK 0x0000000cL
-#define MDLL_CKO__ERSTA_SOUTSEL_MASK 0x00000030L
-#define MDLL_CKO__MCKOA_FB_SEL_MASK 0x000000c0L
-#define MDLL_CKO__MCKOA_REF_SKEW_MASK 0x00000700L
-#define MDLL_CKO__MCKOA_FB_SKEW_MASK 0x00007000L
-#define MDLL_CKO__MCKOA_BP_SEL_MASK 0x00008000L
-#define MDLL_CKO__MCKOA_BP_SEL 0x00008000L
-#define MDLL_CKO__MCKOB_SLEEP_MASK 0x00010000L
-#define MDLL_CKO__MCKOB_SLEEP 0x00010000L
-#define MDLL_CKO__MCKOB_RESET_MASK 0x00020000L
-#define MDLL_CKO__MCKOB_RESET 0x00020000L
-#define MDLL_CKO__MCKOB_RANGE_MASK 0x000c0000L
-#define MDLL_CKO__ERSTB_SOUTSEL_MASK 0x00300000L
-#define MDLL_CKO__MCKOB_FB_SEL_MASK 0x00c00000L
-#define MDLL_CKO__MCKOB_REF_SKEW_MASK 0x07000000L
-#define MDLL_CKO__MCKOB_FB_SKEW_MASK 0x70000000L
-#define MDLL_CKO__MCKOB_BP_SEL_MASK 0x80000000L
-#define MDLL_CKO__MCKOB_BP_SEL 0x80000000L
-
-/* MDLL_RDCKA */
-#define MDLL_RDCKA__MRDCKA0_SLEEP_MASK 0x00000001L
-#define MDLL_RDCKA__MRDCKA0_SLEEP 0x00000001L
-#define MDLL_RDCKA__MRDCKA0_RESET_MASK 0x00000002L
-#define MDLL_RDCKA__MRDCKA0_RESET 0x00000002L
-#define MDLL_RDCKA__MRDCKA0_RANGE_MASK 0x0000000cL
-#define MDLL_RDCKA__MRDCKA0_REF_SEL_MASK 0x00000030L
-#define MDLL_RDCKA__MRDCKA0_FB_SEL_MASK 0x000000c0L
-#define MDLL_RDCKA__MRDCKA0_REF_SKEW_MASK 0x00000700L
-#define MDLL_RDCKA__MRDCKA0_SINSEL_MASK 0x00000800L
-#define MDLL_RDCKA__MRDCKA0_SINSEL 0x00000800L
-#define MDLL_RDCKA__MRDCKA0_FB_SKEW_MASK 0x00007000L
-#define MDLL_RDCKA__MRDCKA0_BP_SEL_MASK 0x00008000L
-#define MDLL_RDCKA__MRDCKA0_BP_SEL 0x00008000L
-#define MDLL_RDCKA__MRDCKA1_SLEEP_MASK 0x00010000L
-#define MDLL_RDCKA__MRDCKA1_SLEEP 0x00010000L
-#define MDLL_RDCKA__MRDCKA1_RESET_MASK 0x00020000L
-#define MDLL_RDCKA__MRDCKA1_RESET 0x00020000L
-#define MDLL_RDCKA__MRDCKA1_RANGE_MASK 0x000c0000L
-#define MDLL_RDCKA__MRDCKA1_REF_SEL_MASK 0x00300000L
-#define MDLL_RDCKA__MRDCKA1_FB_SEL_MASK 0x00c00000L
-#define MDLL_RDCKA__MRDCKA1_REF_SKEW_MASK 0x07000000L
-#define MDLL_RDCKA__MRDCKA1_SINSEL_MASK 0x08000000L
-#define MDLL_RDCKA__MRDCKA1_SINSEL 0x08000000L
-#define MDLL_RDCKA__MRDCKA1_FB_SKEW_MASK 0x70000000L
-#define MDLL_RDCKA__MRDCKA1_BP_SEL_MASK 0x80000000L
-#define MDLL_RDCKA__MRDCKA1_BP_SEL 0x80000000L
-
-/* MDLL_RDCKB */
-#define MDLL_RDCKB__MRDCKB0_SLEEP_MASK 0x00000001L
-#define MDLL_RDCKB__MRDCKB0_SLEEP 0x00000001L
-#define MDLL_RDCKB__MRDCKB0_RESET_MASK 0x00000002L
-#define MDLL_RDCKB__MRDCKB0_RESET 0x00000002L
-#define MDLL_RDCKB__MRDCKB0_RANGE_MASK 0x0000000cL
-#define MDLL_RDCKB__MRDCKB0_REF_SEL_MASK 0x00000030L
-#define MDLL_RDCKB__MRDCKB0_FB_SEL_MASK 0x000000c0L
-#define MDLL_RDCKB__MRDCKB0_REF_SKEW_MASK 0x00000700L
-#define MDLL_RDCKB__MRDCKB0_SINSEL_MASK 0x00000800L
-#define MDLL_RDCKB__MRDCKB0_SINSEL 0x00000800L
-#define MDLL_RDCKB__MRDCKB0_FB_SKEW_MASK 0x00007000L
-#define MDLL_RDCKB__MRDCKB0_BP_SEL_MASK 0x00008000L
-#define MDLL_RDCKB__MRDCKB0_BP_SEL 0x00008000L
-#define MDLL_RDCKB__MRDCKB1_SLEEP_MASK 0x00010000L
-#define MDLL_RDCKB__MRDCKB1_SLEEP 0x00010000L
-#define MDLL_RDCKB__MRDCKB1_RESET_MASK 0x00020000L
-#define MDLL_RDCKB__MRDCKB1_RESET 0x00020000L
-#define MDLL_RDCKB__MRDCKB1_RANGE_MASK 0x000c0000L
-#define MDLL_RDCKB__MRDCKB1_REF_SEL_MASK 0x00300000L
-#define MDLL_RDCKB__MRDCKB1_FB_SEL_MASK 0x00c00000L
-#define MDLL_RDCKB__MRDCKB1_REF_SKEW_MASK 0x07000000L
-#define MDLL_RDCKB__MRDCKB1_SINSEL_MASK 0x08000000L
-#define MDLL_RDCKB__MRDCKB1_SINSEL 0x08000000L
-#define MDLL_RDCKB__MRDCKB1_FB_SKEW_MASK 0x70000000L
-#define MDLL_RDCKB__MRDCKB1_BP_SEL_MASK 0x80000000L
-#define MDLL_RDCKB__MRDCKB1_BP_SEL 0x80000000L
-
-#define MDLL_R300_RDCK__MRDCKA_SLEEP 0x00000001L
-#define MDLL_R300_RDCK__MRDCKA_RESET 0x00000002L
-#define MDLL_R300_RDCK__MRDCKB_SLEEP 0x00000004L
-#define MDLL_R300_RDCK__MRDCKB_RESET 0x00000008L
-#define MDLL_R300_RDCK__MRDCKC_SLEEP 0x00000010L
-#define MDLL_R300_RDCK__MRDCKC_RESET 0x00000020L
-#define MDLL_R300_RDCK__MRDCKD_SLEEP 0x00000040L
-#define MDLL_R300_RDCK__MRDCKD_RESET 0x00000080L
-
-#define pllCLK_PIN_CNTL 0x0001
-#define pllPPLL_CNTL 0x0002
-#define pllPPLL_REF_DIV 0x0003
-#define pllPPLL_DIV_0 0x0004
-#define pllPPLL_DIV_1 0x0005
-#define pllPPLL_DIV_2 0x0006
-#define pllPPLL_DIV_3 0x0007
-#define pllVCLK_ECP_CNTL 0x0008
-#define pllHTOTAL_CNTL 0x0009
-#define pllM_SPLL_REF_FB_DIV 0x000A
-#define pllAGP_PLL_CNTL 0x000B
-#define pllSPLL_CNTL 0x000C
-#define pllSCLK_CNTL 0x000D
-#define pllMPLL_CNTL 0x000E
-#define pllMDLL_CKO 0x000F
-#define pllMDLL_RDCKA 0x0010
-#define pllMDLL_RDCKB 0x0011
-#define pllMCLK_CNTL 0x0012
-#define pllPLL_TEST_CNTL 0x0013
-#define pllCLK_PWRMGT_CNTL 0x0014
-#define pllPLL_PWRMGT_CNTL 0x0015
-#define pllCG_TEST_MACRO_RW_WRITE 0x0016
-#define pllCG_TEST_MACRO_RW_READ 0x0017
-#define pllCG_TEST_MACRO_RW_DATA 0x0018
-#define pllCG_TEST_MACRO_RW_CNTL 0x0019
-#define pllDISP_TEST_MACRO_RW_WRITE 0x001A
-#define pllDISP_TEST_MACRO_RW_READ 0x001B
-#define pllDISP_TEST_MACRO_RW_DATA 0x001C
-#define pllDISP_TEST_MACRO_RW_CNTL 0x001D
-#define pllSCLK_CNTL2 0x001E
-#define pllMCLK_MISC 0x001F
-#define pllTV_PLL_FINE_CNTL 0x0020
-#define pllTV_PLL_CNTL 0x0021
-#define pllTV_PLL_CNTL1 0x0022
-#define pllTV_DTO_INCREMENTS 0x0023
-#define pllSPLL_AUX_CNTL 0x0024
-#define pllMPLL_AUX_CNTL 0x0025
-#define pllP2PLL_CNTL 0x002A
-#define pllP2PLL_REF_DIV 0x002B
-#define pllP2PLL_DIV_0 0x002C
-#define pllPIXCLKS_CNTL 0x002D
-#define pllHTOTAL2_CNTL 0x002E
-#define pllSSPLL_CNTL 0x0030
-#define pllSSPLL_REF_DIV 0x0031
-#define pllSSPLL_DIV_0 0x0032
-#define pllSS_INT_CNTL 0x0033
-#define pllSS_TST_CNTL 0x0034
-#define pllSCLK_MORE_CNTL 0x0035
-
-#define ixMC_PERF_CNTL 0x0000
-#define ixMC_PERF_SEL 0x0001
-#define ixMC_PERF_REGION_0 0x0002
-#define ixMC_PERF_REGION_1 0x0003
-#define ixMC_PERF_COUNT_0 0x0004
-#define ixMC_PERF_COUNT_1 0x0005
-#define ixMC_PERF_COUNT_2 0x0006
-#define ixMC_PERF_COUNT_3 0x0007
-#define ixMC_PERF_COUNT_MEMCH_A 0x0008
-#define ixMC_PERF_COUNT_MEMCH_B 0x0009
-#define ixMC_IMP_CNTL 0x000A
-#define ixMC_CHP_IO_CNTL_A0 0x000B
-#define ixMC_CHP_IO_CNTL_A1 0x000C
-#define ixMC_CHP_IO_CNTL_B0 0x000D
-#define ixMC_CHP_IO_CNTL_B1 0x000E
-#define ixMC_IMP_CNTL_0 0x000F
-#define ixTC_MISMATCH_1 0x0010
-#define ixTC_MISMATCH_2 0x0011
-#define ixMC_BIST_CTRL 0x0012
-#define ixREG_COLLAR_WRITE 0x0013
-#define ixREG_COLLAR_READ 0x0014
-#define ixR300_MC_IMP_CNTL 0x0018
-#define ixR300_MC_CHP_IO_CNTL_A0 0x0019
-#define ixR300_MC_CHP_IO_CNTL_A1 0x001a
-#define ixR300_MC_CHP_IO_CNTL_B0 0x001b
-#define ixR300_MC_CHP_IO_CNTL_B1 0x001c
-#define ixR300_MC_CHP_IO_CNTL_C0 0x001d
-#define ixR300_MC_CHP_IO_CNTL_C1 0x001e
-#define ixR300_MC_CHP_IO_CNTL_D0 0x001f
-#define ixR300_MC_CHP_IO_CNTL_D1 0x0020
-#define ixR300_MC_IMP_CNTL_0 0x0021
-#define ixR300_MC_ELPIDA_CNTL 0x0022
-#define ixR300_MC_CHP_IO_OE_CNTL_CD 0x0023
-#define ixR300_MC_READ_CNTL_CD 0x0024
-#define ixR300_MC_MC_INIT_WR_LAT_TIMER 0x0025
-#define ixR300_MC_DEBUG_CNTL 0x0026
-#define ixR300_MC_BIST_CNTL_0 0x0028
-#define ixR300_MC_BIST_CNTL_1 0x0029
-#define ixR300_MC_BIST_CNTL_2 0x002a
-#define ixR300_MC_BIST_CNTL_3 0x002b
-#define ixR300_MC_BIST_CNTL_4 0x002c
-#define ixR300_MC_BIST_CNTL_5 0x002d
-#define ixR300_MC_IMP_STATUS 0x002e
-#define ixR300_MC_DLL_CNTL 0x002f
-#define NB_TOM 0x15C
-
-#endif /* _RADEON_H */
diff --git a/include/stdio.h b/include/stdio.h
index 039f7df..1939a48 100644
--- a/include/stdio.h
+++ b/include/stdio.h
@@ -10,9 +10,9 @@
/* stdout */
#if !defined(CONFIG_SPL_BUILD) || \
- (defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_SERIAL_SUPPORT)) || \
+ (defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_SERIAL)) || \
(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && \
- defined(CONFIG_SPL_SERIAL_SUPPORT))
+ defined(CONFIG_SPL_SERIAL))
void putc(const char c);
void puts(const char *s);
int __printf(1, 2) printf(const char *fmt, ...);
diff --git a/include/test/ut.h b/include/test/ut.h
index 656e25f..fb2e5fc 100644
--- a/include/test/ut.h
+++ b/include/test/ut.h
@@ -83,6 +83,21 @@
int ut_check_skipline(struct unit_test_state *uts);
/**
+ * ut_check_skip_to_line() - skip output until a line is found
+ *
+ * This creates a string and then checks it against the following lines of
+ * console output obtained with console_record_readline() until it is found.
+ *
+ * After the function returns, uts->expect_str holds the expected string and
+ * uts->actual_str holds the actual string read from the console.
+ *
+ * @uts: Test state
+ * @fmt: printf() format string to look for, followed by args
+ * @return 0 if OK, -ENOENT if not found, other value on error
+ */
+int ut_check_skip_to_line(struct unit_test_state *uts, const char *fmt, ...);
+
+/**
* ut_check_console_end() - Check there is no more console output
*
* After the function returns, uts->actual_str holds the actual string read
@@ -286,6 +301,15 @@
return CMD_RET_FAILURE; \
} \
+/* Assert that a following console output line matches */
+#define ut_assert_skip_to_line(fmt, args...) \
+ if (ut_check_skip_to_line(uts, fmt, ##args)) { \
+ ut_failf(uts, __FILE__, __LINE__, __func__, \
+ "console", "\nExpected '%s',\n got to '%s'", \
+ uts->expect_str, uts->actual_str); \
+ return CMD_RET_FAILURE; \
+ } \
+
/* Assert that there is no more console output */
#define ut_assert_console_end() \
if (ut_check_console_end(uts)) { \
diff --git a/include/u-boot/hash.h b/include/u-boot/hash.h
new file mode 100644
index 0000000..f9d47a9
--- /dev/null
+++ b/include/u-boot/hash.h
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2021 ASPEED Technology Inc.
+ */
+#ifndef _UBOOT_HASH_H
+#define _UBOOT_HASH_H
+
+enum HASH_ALGO {
+ HASH_ALGO_CRC16_CCITT,
+ HASH_ALGO_CRC32,
+ HASH_ALGO_MD5,
+ HASH_ALGO_SHA1,
+ HASH_ALGO_SHA256,
+ HASH_ALGO_SHA384,
+ HASH_ALGO_SHA512,
+
+ HASH_ALGO_NUM,
+
+ HASH_ALGO_INVALID = 0xffffffff,
+};
+
+/* general APIs for hash algo information */
+enum HASH_ALGO hash_algo_lookup_by_name(const char *name);
+ssize_t hash_algo_digest_size(enum HASH_ALGO algo);
+const char *hash_algo_name(enum HASH_ALGO algo);
+
+/* device-dependent APIs */
+int hash_digest(struct udevice *dev, enum HASH_ALGO algo,
+ const void *ibuf, const uint32_t ilen,
+ void *obuf);
+int hash_digest_wd(struct udevice *dev, enum HASH_ALGO algo,
+ const void *ibuf, const uint32_t ilen,
+ void *obuf, uint32_t chunk_sz);
+int hash_init(struct udevice *dev, enum HASH_ALGO algo, void **ctxp);
+int hash_update(struct udevice *dev, void *ctx, const void *ibuf, const uint32_t ilen);
+int hash_finish(struct udevice *dev, void *ctx, void *obuf);
+
+/*
+ * struct hash_ops - Driver model for Hash operations
+ *
+ * The uclass interface is implemented by all hash devices
+ * which use driver model.
+ */
+struct hash_ops {
+ /* progressive operations */
+ int (*hash_init)(struct udevice *dev, enum HASH_ALGO algo, void **ctxp);
+ int (*hash_update)(struct udevice *dev, void *ctx, const void *ibuf, const uint32_t ilen);
+ int (*hash_finish)(struct udevice *dev, void *ctx, void *obuf);
+
+ /* all-in-one operation */
+ int (*hash_digest)(struct udevice *dev, enum HASH_ALGO algo,
+ const void *ibuf, const uint32_t ilen,
+ void *obuf);
+
+ /* all-in-one operation with watchdog triggering every chunk_sz */
+ int (*hash_digest_wd)(struct udevice *dev, enum HASH_ALGO algo,
+ const void *ibuf, const uint32_t ilen,
+ void *obuf, uint32_t chunk_sz);
+};
+
+#endif
diff --git a/include/u-boot/md5.h b/include/u-boot/md5.h
index 6d48592..d61364c 100644
--- a/include/u-boot/md5.h
+++ b/include/u-boot/md5.h
@@ -19,6 +19,10 @@
};
};
+void MD5Init(struct MD5Context *ctx);
+void MD5Update(struct MD5Context *ctx, unsigned char const *buf, unsigned len);
+void MD5Final(unsigned char digest[16], struct MD5Context *ctx);
+
/*
* Calculate and store in 'output' the MD5 digest of 'len' bytes at
* 'input'. 'output' must have enough space to hold 16 bytes.
diff --git a/include/version.h b/include/version.h
index 2d24451..5955b21 100644
--- a/include/version.h
+++ b/include/version.h
@@ -7,16 +7,8 @@
#ifndef __VERSION_H__
#define __VERSION_H__
-#include <timestamp.h>
-
#ifndef DO_DEPS_ONLY
#include "generated/version_autogenerated.h"
#endif
-#define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \
- U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING
-
-#ifndef __ASSEMBLY__
-extern const char version_string[];
-#endif /* __ASSEMBLY__ */
#endif /* __VERSION_H__ */
diff --git a/include/version_string.h b/include/version_string.h
new file mode 100644
index 0000000..a89a6e4
--- /dev/null
+++ b/include/version_string.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __VERSION_STRING_H__
+#define __VERSION_STRING_H__
+
+extern const char version_string[];
+
+#endif /* __VERSION_STRING_H__ */
diff --git a/include/wdt.h b/include/wdt.h
index bc242c2..baaa9db 100644
--- a/include/wdt.h
+++ b/include/wdt.h
@@ -38,6 +38,14 @@
int wdt_stop(struct udevice *dev);
/*
+ * Stop all registered watchdog devices.
+ *
+ * @return: 0 if ok, first error encountered otherwise (but wdt_stop()
+ * is still called on following devices)
+ */
+int wdt_stop_all(void);
+
+/*
* Reset the timer, typically restoring the counter to
* the value configured by start()
*
diff --git a/lib/Kconfig b/lib/Kconfig
index 130fa06..034af72 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -92,7 +92,6 @@
config SSCANF
bool
- default n
config STRTO
bool
@@ -348,7 +347,6 @@
config LIBAVB
bool "Android Verified Boot 2.0 support"
depends on ANDROID_BOOT_IMAGE
- default n
help
This enables support of Android Verified Boot 2.0 which can be used
to assure the end user of the integrity of the software running on a
@@ -769,7 +767,6 @@
config PHANDLE_CHECK_SEQ
bool "Enable phandle check while getting sequence number"
- default n
help
When there are multiple device tree nodes with same name,
enable this config option to distinguish them using
diff --git a/lib/Makefile b/lib/Makefile
index 93be86c..09e380e 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -80,14 +80,12 @@
obj-$(CONFIG_LIBAVB) += libavb/
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/
-ifneq ($(CONFIG_$(SPL_TPL_)BUILD)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)
-obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += fdtdec_common.o
-obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += fdtdec.o
-endif
+obj-$(CONFIG_$(SPL_TPL_)OF_REAL) += fdtdec_common.o fdtdec.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o
obj-$(CONFIG_$(SPL_TPL_)HASH) += crc16.o
+obj-$(CONFIG_MMC_SPI_CRC_ON) += crc16.o
obj-y += net_utils.o
endif
obj-$(CONFIG_ADDR_MAP) += addr_map.o
diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
index 2f07741..7ea4b2e 100644
--- a/lib/acpi/acpi_table.c
+++ b/lib/acpi/acpi_table.c
@@ -11,6 +11,7 @@
#include <log.h>
#include <mapmem.h>
#include <tables_csum.h>
+#include <timestamp.h>
#include <version.h>
#include <acpi/acpi_table.h>
#include <asm/global_data.h>
diff --git a/lib/crc32.c b/lib/crc32.c
index f2acc10..5a3127e 100644
--- a/lib/crc32.c
+++ b/lib/crc32.c
@@ -84,7 +84,7 @@
}
crc_table_empty = 0;
}
-#else
+#elif !defined(CONFIG_ARM64_CRC32)
/* ========================================================================
* Table of CRC-32's of all single-byte values (made by make_crc_table)
*/
@@ -184,6 +184,12 @@
*/
uint32_t __efi_runtime crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len)
{
+#ifdef CONFIG_ARM64_CRC32
+ crc = cpu_to_le32(crc);
+ while (len--)
+ crc = __builtin_aarch64_crc32b(crc, *buf++);
+ return le32_to_cpu(crc);
+#else
const uint32_t *tab = crc_table;
const uint32_t *b =(const uint32_t *)buf;
size_t rem_len;
@@ -221,6 +227,7 @@
}
return le32_to_cpu(crc);
+#endif
}
#undef DO_CRC
diff --git a/lib/display_options.c b/lib/display_options.c
index 4da1f52..360b01b 100644
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -8,7 +8,7 @@
#include <compiler.h>
#include <console.h>
#include <div64.h>
-#include <version.h>
+#include <version_string.h>
#include <linux/ctype.h>
#include <asm/io.h>
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index f48d9e8..3d5a5cd 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -39,7 +39,6 @@
config EFI_SETUP_EARLY
bool
- default n
choice
prompt "Store for non-volatile UEFI variables"
@@ -113,7 +112,6 @@
bool "SetTime() runtime service"
depends on EFI_GET_TIME
default y if ARCH_QEMU || SANDBOX
- default n
help
Provide the SetTime() runtime service at boottime. This service
can be used by an EFI application to adjust the real time clock.
@@ -123,7 +121,6 @@
config EFI_RUNTIME_UPDATE_CAPSULE
bool "UpdateCapsule() runtime service"
- default n
select EFI_HAVE_CAPSULE_SUPPORT
help
Select this option if you want to use UpdateCapsule and
@@ -132,7 +129,6 @@
config EFI_CAPSULE_ON_DISK
bool "Enable capsule-on-disk support"
select EFI_HAVE_CAPSULE_SUPPORT
- default n
help
Select this option if you want to use capsule-on-disk feature,
that is, capsules can be fetched and executed from files
@@ -142,7 +138,6 @@
config EFI_IGNORE_OSINDICATIONS
bool "Ignore OsIndications for CapsuleUpdate on-disk"
depends on EFI_CAPSULE_ON_DISK
- default n
help
There are boards where U-Boot does not support SetVariable at runtime.
Select this option if you want to use the capsule-on-disk feature
@@ -152,7 +147,6 @@
config EFI_CAPSULE_ON_DISK_EARLY
bool "Initiate capsule-on-disk at U-Boot boottime"
depends on EFI_CAPSULE_ON_DISK
- default n
select EFI_SETUP_EARLY
help
Normally, without this option enabled, capsules will be
@@ -163,7 +157,6 @@
config EFI_CAPSULE_FIRMWARE
bool
- default n
config EFI_CAPSULE_FIRMWARE_MANAGEMENT
bool "Capsule: Firmware Management Protocol"
@@ -210,7 +203,6 @@
select PKCS7_VERIFY
select IMAGE_SIGN_INFO
select EFI_SIGNATURE_SUPPORT
- default n
help
Select this option if you want to enable capsule
authentication
@@ -271,7 +263,6 @@
config EFI_LOADER_BOUNCE_BUFFER
bool "EFI Applications use bounce buffers for DMA operations"
depends on ARM64
- default n
help
Some hardware does not support DMA to full 64bit addresses. For this
hardware we can create a bounce buffer so that payloads don't have to
@@ -357,7 +348,6 @@
select PKCS7_MESSAGE_PARSER
select PKCS7_VERIFY
select EFI_SIGNATURE_SUPPORT
- default n
help
Select this option to enable EFI secure boot support.
Once SecureBoot mode is enforced, any EFI binary can run only if
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index d3b8f93..74f0bef 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -14,7 +14,7 @@
#include <efi_tcg2.h>
#include <log.h>
#include <malloc.h>
-#include <version.h>
+#include <version_string.h>
#include <tpm-v2.h>
#include <u-boot/hash-checksum.h>
#include <u-boot/sha1.h>
@@ -1343,10 +1343,11 @@
*/
static efi_status_t efi_append_scrtm_version(struct udevice *dev)
{
- u8 ver[] = U_BOOT_VERSION_STRING;
efi_status_t ret;
- ret = tcg2_measure_event(dev, 0, EV_S_CRTM_VERSION, sizeof(ver), ver);
+ ret = tcg2_measure_event(dev, 0, EV_S_CRTM_VERSION,
+ strlen(version_string) + 1,
+ (u8 *)version_string);
return ret;
}
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 7358cb6..af92e65 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -870,50 +870,6 @@
return cell;
}
-int fdtdec_get_config_int(const void *blob, const char *prop_name,
- int default_val)
-{
- int config_node;
-
- debug("%s: %s\n", __func__, prop_name);
- config_node = fdt_path_offset(blob, "/config");
- if (config_node < 0)
- return default_val;
- return fdtdec_get_int(blob, config_node, prop_name, default_val);
-}
-
-int fdtdec_get_config_bool(const void *blob, const char *prop_name)
-{
- int config_node;
- const void *prop;
-
- debug("%s: %s\n", __func__, prop_name);
- config_node = fdt_path_offset(blob, "/config");
- if (config_node < 0)
- return 0;
- prop = fdt_get_property(blob, config_node, prop_name, NULL);
-
- return prop != NULL;
-}
-
-char *fdtdec_get_config_string(const void *blob, const char *prop_name)
-{
- const char *nodep;
- int nodeoffset;
- int len;
-
- debug("%s: %s\n", __func__, prop_name);
- nodeoffset = fdt_path_offset(blob, "/config");
- if (nodeoffset < 0)
- return NULL;
-
- nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
- if (!nodep)
- return NULL;
-
- return (char *)nodep;
-}
-
u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
{
u64 number = 0;
diff --git a/lib/hang.c b/lib/hang.c
index 578ac78..2735774 100644
--- a/lib/hang.c
+++ b/lib/hang.c
@@ -24,7 +24,7 @@
{
#if !defined(CONFIG_SPL_BUILD) || \
(CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT) && \
- CONFIG_IS_ENABLED(SERIAL_SUPPORT))
+ CONFIG_IS_ENABLED(SERIAL))
puts("### ERROR ### Please RESET the board ###\n");
#endif
bootstage_error(BOOTSTAGE_ID_NEED_RESET);
diff --git a/lib/lmb.c b/lib/lmb.c
index 7bd1255..7936477 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -12,6 +12,10 @@
#include <log.h>
#include <malloc.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
#define LMB_ALLOC_ANYWHERE 0
static void lmb_dump_region(struct lmb_region *rgn, char *name)
@@ -113,6 +117,37 @@
lmb->reserved.cnt = 0;
}
+void arch_lmb_reserve_generic(struct lmb *lmb, ulong sp, ulong end, ulong align)
+{
+ ulong bank_end;
+ int bank;
+
+ /*
+ * Reserve memory from aligned address below the bottom of U-Boot stack
+ * until end of U-Boot area using LMB to prevent U-Boot from overwriting
+ * that memory.
+ */
+ debug("## Current stack ends at 0x%08lx ", sp);
+
+ /* adjust sp by 4K to be safe */
+ sp -= align;
+ for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+ if (!gd->bd->bi_dram[bank].size ||
+ sp < gd->bd->bi_dram[bank].start)
+ continue;
+ /* Watch out for RAM at end of address space! */
+ bank_end = gd->bd->bi_dram[bank].start +
+ gd->bd->bi_dram[bank].size - 1;
+ if (sp > bank_end)
+ continue;
+ if (bank_end > end)
+ bank_end = end - 1;
+
+ lmb_reserve(lmb, sp, bank_end - sp + 1);
+ break;
+ }
+}
+
static void lmb_reserve_common(struct lmb *lmb, void *fdt_blob)
{
arch_lmb_reserve(lmb);
diff --git a/lib/md5.c b/lib/md5.c
index e2ba622..9d34465 100644
--- a/lib/md5.c
+++ b/lib/md5.c
@@ -55,7 +55,7 @@
* Start MD5 accumulation. Set bit count to 0 and buffer to mysterious
* initialization constants.
*/
-static void
+void
MD5Init(struct MD5Context *ctx)
{
ctx->buf[0] = 0x67452301;
@@ -71,7 +71,7 @@
* Update context to reflect the concatenation of another buffer full
* of bytes.
*/
-static void
+void
MD5Update(struct MD5Context *ctx, unsigned char const *buf, unsigned len)
{
register __u32 t;
@@ -120,7 +120,7 @@
* Final wrapup - pad to 64-byte boundary with the bit pattern
* 1 0* (64-bit count of bits processed, MSB-first)
*/
-static void
+void
MD5Final(unsigned char digest[16], struct MD5Context *ctx)
{
unsigned int count;
diff --git a/lib/optee/Kconfig b/lib/optee/Kconfig
index c398f9b..3290b66 100644
--- a/lib/optee/Kconfig
+++ b/lib/optee/Kconfig
@@ -34,7 +34,6 @@
bool "Support OPTEE bootm command"
select BOOTM_LINUX
depends on OPTEE
- default n
help
Select this command to enable chain-loading of a Linux kernel
via an OPTEE firmware.
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 0e0a890..c27a784 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -19,24 +19,6 @@
#include <openssl/evp.h>
#include <openssl/engine.h>
-#if OPENSSL_VERSION_NUMBER >= 0x10000000L
-#define HAVE_ERR_REMOVE_THREAD_STATE
-#endif
-
-#if OPENSSL_VERSION_NUMBER < 0x10100000L || \
- (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
-static void RSA_get0_key(const RSA *r,
- const BIGNUM **n, const BIGNUM **e, const BIGNUM **d)
-{
- if (n != NULL)
- *n = r->n;
- if (e != NULL)
- *e = r->e;
- if (d != NULL)
- *d = r->d;
-}
-#endif
-
static int rsa_err(const char *msg)
{
unsigned long sslErr = ERR_get_error();
@@ -272,7 +254,7 @@
else if (name)
snprintf(key_id, sizeof(key_id),
"%s",
- name);
+ name ? name : "");
else if (keyfile)
snprintf(key_id, sizeof(key_id), "%s", keyfile);
else
@@ -314,24 +296,11 @@
{
int ret;
-#if OPENSSL_VERSION_NUMBER < 0x10100000L || \
- (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
- ret = SSL_library_init();
-#else
ret = OPENSSL_init_ssl(0, NULL);
-#endif
if (!ret) {
fprintf(stderr, "Failure to init SSL library\n");
return -1;
}
-#if OPENSSL_VERSION_NUMBER < 0x10100000L || \
- (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
- SSL_load_error_strings();
-
- OpenSSL_add_all_algorithms();
- OpenSSL_add_all_digests();
- OpenSSL_add_all_ciphers();
-#endif
return 0;
}
@@ -347,8 +316,7 @@
e = ENGINE_by_id(engine_id);
if (!e) {
fprintf(stderr, "Engine isn't available\n");
- ret = -1;
- goto err_engine_by_id;
+ return -1;
}
if (!ENGINE_init(e)) {
@@ -381,29 +349,9 @@
ENGINE_finish(e);
err_engine_init:
ENGINE_free(e);
-err_engine_by_id:
-#if OPENSSL_VERSION_NUMBER < 0x10100000L || \
- (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
- ENGINE_cleanup();
-#endif
return ret;
}
-static void rsa_remove(void)
-{
-#if OPENSSL_VERSION_NUMBER < 0x10100000L || \
- (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
- CRYPTO_cleanup_all_ex_data();
- ERR_free_strings();
-#ifdef HAVE_ERR_REMOVE_THREAD_STATE
- ERR_remove_thread_state(NULL);
-#else
- ERR_remove_state(0);
-#endif
- EVP_cleanup();
-#endif
-}
-
static void rsa_engine_remove(ENGINE *e)
{
if (e) {
@@ -476,12 +424,7 @@
goto err_sign;
}
- #if OPENSSL_VERSION_NUMBER < 0x10100000L || \
- (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
- EVP_MD_CTX_cleanup(context);
- #else
- EVP_MD_CTX_reset(context);
- #endif
+ EVP_MD_CTX_reset(context);
EVP_MD_CTX_destroy(context);
debug("Got signature: %zu bytes, expected %d\n", size, EVP_PKEY_size(pkey));
@@ -513,7 +456,7 @@
if (info->engine_id) {
ret = rsa_engine_init(info->engine_id, &e);
if (ret)
- goto err_engine;
+ return ret;
}
ret = rsa_get_priv_key(info->keydir, info->keyname, info->keyfile,
@@ -528,7 +471,6 @@
EVP_PKEY_free(pkey);
if (info->engine_id)
rsa_engine_remove(e);
- rsa_remove();
return ret;
@@ -537,8 +479,6 @@
err_priv:
if (info->engine_id)
rsa_engine_remove(e);
-err_engine:
- rsa_remove();
return ret;
}
@@ -686,12 +626,8 @@
ret = rsa_get_pub_key(info->keydir, info->keyname, e, &pkey);
if (ret)
goto err_get_pub_key;
-#if OPENSSL_VERSION_NUMBER < 0x10100000L || \
- (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
- rsa = EVP_PKEY_get1_RSA(pkey);
-#else
+
rsa = EVP_PKEY_get0_RSA(pkey);
-#endif
ret = rsa_get_params(rsa, &exponent, &n0_inv, &modulus, &r_squared);
if (ret)
goto err_get_params;
@@ -761,10 +697,6 @@
if (ret)
ret = ret == -FDT_ERR_NOSPACE ? -ENOSPC : -EIO;
err_get_params:
-#if OPENSSL_VERSION_NUMBER < 0x10100000L || \
- (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
- RSA_free(rsa);
-#endif
EVP_PKEY_free(pkey);
err_get_pub_key:
if (info->engine_id)
diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c
index 89aaa85..f661fc6 100644
--- a/lib/tiny-printf.c
+++ b/lib/tiny-printf.c
@@ -48,7 +48,7 @@
out_dgt(info, dgt);
}
-#ifdef CONFIG_SPL_NET_SUPPORT
+#ifdef CONFIG_SPL_NET
static void string(struct printf_info *info, char *s)
{
char ch;
@@ -178,7 +178,7 @@
}
break;
#endif
-#ifdef CONFIG_SPL_NET_SUPPORT
+#ifdef CONFIG_SPL_NET
case 'm':
return mac_address_string(info, ptr, false);
case 'M':
@@ -270,7 +270,7 @@
}
break;
case 'p':
- if (CONFIG_IS_ENABLED(NET_SUPPORT) || _DEBUG) {
+ if (CONFIG_IS_ENABLED(NET) || _DEBUG) {
pointer(info, fmt, va_arg(va, void *));
/*
* Skip this because it pulls in _ctype which is
diff --git a/net/Kconfig b/net/Kconfig
index ba0ca81..7a2d145 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -40,7 +40,6 @@
config IP_DEFRAG
bool "Support IP datagram reassembly"
- default n
help
Selecting this will enable IP datagram reassembly according
to the algorithm in RFC815.
diff --git a/net/cdp.c b/net/cdp.c
index fac0204..a8f890e 100644
--- a/net/cdp.c
+++ b/net/cdp.c
@@ -11,9 +11,6 @@
#include <common.h>
#include <net.h>
-#if defined(CONFIG_CDP_VERSION)
-#include <timestamp.h>
-#endif
#include "cdp.h"
diff --git a/net/eth_common.c b/net/eth_common.c
index 58f899a..82d527a 100644
--- a/net/eth_common.c
+++ b/net/eth_common.c
@@ -32,6 +32,7 @@
void eth_common_init(void)
{
bootstage_mark(BOOTSTAGE_ID_NET_ETH_START);
+#if CONFIG_IS_ENABLED(ETH)
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
miiphy_init();
#endif
@@ -39,6 +40,7 @@
#ifdef CONFIG_PHYLIB
phy_init();
#endif
+#endif
}
int eth_mac_skip(int index)
diff --git a/post/cpu/mpc83xx/ecc.c b/post/cpu/mpc83xx/ecc.c
index cc971a8..f88eff8 100644
--- a/post/cpu/mpc83xx/ecc.c
+++ b/post/cpu/mpc83xx/ecc.c
@@ -70,10 +70,6 @@
int_state = disable_interrupts();
icache_enable();
-#ifdef CONFIG_DDR_32BIT
- /* It seems like no one really uses the CONFIG_DDR_32BIT mode */
-#error "Add ECC POST support for CONFIG_DDR_32BIT here!"
-#else
for (addr = (u64*)CONFIG_SYS_POST_ECC_START_ADDR, errbit=0;
addr < (u64*)CONFIG_SYS_POST_ECC_STOP_ADDR; addr++, errbit++ ) {
@@ -138,7 +134,6 @@
errbit %= 63;
}
-#endif /* !CONFIG_DDR_32BIT */
ecc_clear(ddr);
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 25a3e7f..6f26eb1 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -108,7 +108,7 @@
libs-y += dts/
libs-y += fs/
libs-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/
-libs-$(CONFIG_SPL_NET_SUPPORT) += net/
+libs-$(CONFIG_SPL_NET) += net/
libs-$(CONFIG_SPL_UNIT_TEST) += test/
head-y := $(addprefix $(obj)/,$(head-y))
@@ -295,18 +295,15 @@
FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit
endif
-# Build the .dtb file if:
-# - we are not using OF_PLATDATA
-# - we are using OF_CONTROL
+# Build the .dtb file if needed
+# - OF_REAL is enabled
# - we have either OF_SEPARATE or OF_HOSTFILE
build_dtb :=
-ifeq ($(CONFIG_$(SPL_TPL_)OF_PLATDATA),)
-ifneq ($(CONFIG_$(SPL_TPL_)OF_CONTROL),)
+ifneq ($(CONFIG_$(SPL_TPL_)OF_REAL),)
ifeq ($(CONFIG_OF_SEPARATE)$(CONFIG_OF_HOSTFILE),y)
build_dtb := y
endif
endif
-endif
ifneq ($(build_dtb),)
$(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin \
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 08a8275..5696d3a 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -23,6 +23,9 @@
use Getopt::Long qw(:config no_auto_abbrev);
my $quiet = 0;
+my $verbose = 0;
+my %verbose_messages = ();
+my %verbose_emitted = ();
my $tree = 1;
my $chk_signoff = 1;
my $chk_patch = 1;
@@ -43,6 +46,8 @@
my $fix = 0;
my $fix_inplace = 0;
my $root;
+my $gitroot = $ENV{'GIT_DIR'};
+$gitroot = ".git" if !defined($gitroot);
my %debug;
my %camelcase = ();
my %use_type = ();
@@ -59,13 +64,15 @@
my $codespell = 0;
my $codespellfile = "/usr/share/codespell/dictionary.txt";
my $conststructsfile = "$D/const_structs.checkpatch";
-my $typedefsfile = "";
my $u_boot = 0;
+my $docsfile = "$D/../doc/develop/checkpatch.rst";
+my $typedefsfile;
my $color = "auto";
my $allow_c99_comments = 1; # Can be overridden by --ignore C99_COMMENT_TOLERANCE
# git output parsing needs US English output, so first set backtick child process LANGUAGE
my $git_command ='export LANGUAGE=en_US.UTF-8; git';
my $tabsize = 8;
+my ${CONFIG_} = "CONFIG_";
sub help {
my ($exitcode) = @_;
@@ -76,6 +83,7 @@
Options:
-q, --quiet quiet
+ -v, --verbose verbose mode
--no-tree run without a kernel tree
--no-signoff do not check for 'Signed-off-by' line
--patch treat FILE as patchfile (default)
@@ -129,6 +137,8 @@
--color[=WHEN] Use colors 'always', 'never', or only when output
is a terminal ('auto'). Default is 'auto'.
--u-boot Run additional checks for U-Boot
+ --kconfig-prefix=WORD use WORD as a prefix for Kconfig symbols (default
+ ${CONFIG_})
-h, --help, --version display this help and exit
When FILE is - read standard input.
@@ -155,15 +165,51 @@
my $text = <$script>;
close($script);
- my @types = ();
+ my %types = ();
# Also catch when type or level is passed through a variable
- for ($text =~ /(?:(?:\bCHK|\bWARN|\bERROR|&\{\$msg_level})\s*\(|\$msg_type\s*=)\s*"([^"]+)"/g) {
- push (@types, $_);
+ while ($text =~ /(?:(\bCHK|\bWARN|\bERROR|&\{\$msg_level})\s*\(|\$msg_type\s*=)\s*"([^"]+)"/g) {
+ if (defined($1)) {
+ if (exists($types{$2})) {
+ $types{$2} .= ",$1" if ($types{$2} ne $1);
+ } else {
+ $types{$2} = $1;
+ }
+ } else {
+ $types{$2} = "UNDETERMINED";
+ }
}
- @types = sort(uniq(@types));
+
print("#\tMessage type\n\n");
- foreach my $type (@types) {
+ if ($color) {
+ print(" ( Color coding: ");
+ print(RED . "ERROR" . RESET);
+ print(" | ");
+ print(YELLOW . "WARNING" . RESET);
+ print(" | ");
+ print(GREEN . "CHECK" . RESET);
+ print(" | ");
+ print("Multiple levels / Undetermined");
+ print(" )\n\n");
+ }
+
+ foreach my $type (sort keys %types) {
+ my $orig_type = $type;
+ if ($color) {
+ my $level = $types{$type};
+ if ($level eq "ERROR") {
+ $type = RED . $type . RESET;
+ } elsif ($level eq "WARN") {
+ $type = YELLOW . $type . RESET;
+ } elsif ($level eq "CHK") {
+ $type = GREEN . $type . RESET;
+ }
+ }
print(++$count . "\t" . $type . "\n");
+ if ($verbose && exists($verbose_messages{$orig_type})) {
+ my $message = $verbose_messages{$orig_type};
+ $message =~ s/\n/\n\t/g;
+ print("\t" . $message . "\n\n");
+ }
}
exit($exitcode);
@@ -195,6 +241,46 @@
unshift(@ARGV, @conf_args) if @conf_args;
}
+sub load_docs {
+ open(my $docs, '<', "$docsfile")
+ or warn "$P: Can't read the documentation file $docsfile $!\n";
+
+ my $type = '';
+ my $desc = '';
+ my $in_desc = 0;
+
+ while (<$docs>) {
+ chomp;
+ my $line = $_;
+ $line =~ s/\s+$//;
+
+ if ($line =~ /^\s*\*\*(.+)\*\*$/) {
+ if ($desc ne '') {
+ $verbose_messages{$type} = trim($desc);
+ }
+ $type = $1;
+ $desc = '';
+ $in_desc = 1;
+ } elsif ($in_desc) {
+ if ($line =~ /^(?:\s{4,}|$)/) {
+ $line =~ s/^\s{4}//;
+ $desc .= $line;
+ $desc .= "\n";
+ } else {
+ $verbose_messages{$type} = trim($desc);
+ $type = '';
+ $desc = '';
+ $in_desc = 0;
+ }
+ }
+ }
+
+ if ($desc ne '') {
+ $verbose_messages{$type} = trim($desc);
+ }
+ close($docs);
+}
+
# Perl's Getopt::Long allows options to take optional arguments after a space.
# Prevent --color by itself from consuming other arguments
foreach (@ARGV) {
@@ -205,6 +291,7 @@
GetOptions(
'q|quiet+' => \$quiet,
+ 'v|verbose!' => \$verbose,
'tree!' => \$tree,
'signoff!' => \$chk_signoff,
'patch!' => \$chk_patch,
@@ -238,12 +325,29 @@
'color=s' => \$color,
'no-color' => \$color, #keep old behaviors of -nocolor
'nocolor' => \$color, #keep old behaviors of -nocolor
+ 'kconfig-prefix=s' => \${CONFIG_},
'h|help' => \$help,
'version' => \$help
) or help(1);
help(0) if ($help);
+die "$P: --git cannot be used with --file or --fix\n" if ($git && ($file || $fix));
+die "$P: --verbose cannot be used with --terse\n" if ($verbose && $terse);
+
+if ($color =~ /^[01]$/) {
+ $color = !$color;
+} elsif ($color =~ /^always$/i) {
+ $color = 1;
+} elsif ($color =~ /^never$/i) {
+ $color = 0;
+} elsif ($color =~ /^auto$/i) {
+ $color = (-t STDOUT);
+} else {
+ die "$P: Invalid color mode: $color\n";
+}
+
+load_docs() if ($verbose);
list_types(0) if ($list_types);
$fix = 1 if ($fix_inplace);
@@ -263,20 +367,8 @@
push(@ARGV, '-');
}
-if ($color =~ /^[01]$/) {
- $color = !$color;
-} elsif ($color =~ /^always$/i) {
- $color = 1;
-} elsif ($color =~ /^never$/i) {
- $color = 0;
-} elsif ($color =~ /^auto$/i) {
- $color = (-t STDOUT);
-} else {
- die "Invalid color mode: $color\n";
-}
-
# skip TAB size 1 to avoid additional checks on $tabsize - 1
-die "Invalid TAB size: $tabsize\n" if ($tabsize < 2);
+die "$P: Invalid TAB size: $tabsize\n" if ($tabsize < 2);
sub hash_save_array_words {
my ($hashRef, $arrayRef) = @_;
@@ -377,6 +469,7 @@
# We need \b after 'init' otherwise 'initconst' will cause a false positive in a check
our $Attribute = qr{
const|
+ volatile|
__percpu|
__nocast|
__safe|
@@ -483,7 +576,7 @@
our $allocFunctions = qr{(?x:
(?:(?:devm_)?
- (?:kv|k|v)[czm]alloc(?:_node|_array)? |
+ (?:kv|k|v)[czm]alloc(?:_array)?(?:_node)? |
kstrdup(?:_const)? |
kmemdup(?:_nul)?) |
(?:\w+)?alloc_skb(?:_ip_align)? |
@@ -503,6 +596,88 @@
Cc:
)};
+our $tracing_logging_tags = qr{(?xi:
+ [=-]*> |
+ <[=-]* |
+ \[ |
+ \] |
+ start |
+ called |
+ entered |
+ entry |
+ enter |
+ in |
+ inside |
+ here |
+ begin |
+ exit |
+ end |
+ done |
+ leave |
+ completed |
+ out |
+ return |
+ [\.\!:\s]*
+)};
+
+sub edit_distance_min {
+ my (@arr) = @_;
+ my $len = scalar @arr;
+ if ((scalar @arr) < 1) {
+ # if underflow, return
+ return;
+ }
+ my $min = $arr[0];
+ for my $i (0 .. ($len-1)) {
+ if ($arr[$i] < $min) {
+ $min = $arr[$i];
+ }
+ }
+ return $min;
+}
+
+sub get_edit_distance {
+ my ($str1, $str2) = @_;
+ $str1 = lc($str1);
+ $str2 = lc($str2);
+ $str1 =~ s/-//g;
+ $str2 =~ s/-//g;
+ my $len1 = length($str1);
+ my $len2 = length($str2);
+ # two dimensional array storing minimum edit distance
+ my @distance;
+ for my $i (0 .. $len1) {
+ for my $j (0 .. $len2) {
+ if ($i == 0) {
+ $distance[$i][$j] = $j;
+ } elsif ($j == 0) {
+ $distance[$i][$j] = $i;
+ } elsif (substr($str1, $i-1, 1) eq substr($str2, $j-1, 1)) {
+ $distance[$i][$j] = $distance[$i - 1][$j - 1];
+ } else {
+ my $dist1 = $distance[$i][$j - 1]; #insert distance
+ my $dist2 = $distance[$i - 1][$j]; # remove
+ my $dist3 = $distance[$i - 1][$j - 1]; #replace
+ $distance[$i][$j] = 1 + edit_distance_min($dist1, $dist2, $dist3);
+ }
+ }
+ }
+ return $distance[$len1][$len2];
+}
+
+sub find_standard_signature {
+ my ($sign_off) = @_;
+ my @standard_signature_tags = (
+ 'Signed-off-by:', 'Co-developed-by:', 'Acked-by:', 'Tested-by:',
+ 'Reviewed-by:', 'Reported-by:', 'Suggested-by:'
+ );
+ foreach my $signature (@standard_signature_tags) {
+ return $signature if (get_edit_distance($sign_off, $signature) <= 2);
+ }
+
+ return "";
+}
+
our @typeListMisordered = (
qr{char\s+(?:un)?signed},
qr{int\s+(?:(?:un)?signed\s+)?short\s},
@@ -591,6 +766,8 @@
["__ATTR", 2],
);
+my $word_pattern = '\b[A-Z]?[a-z]{2,}\b';
+
#Create a search pattern for all these functions to speed up a loop below
our $mode_perms_search = "";
foreach my $entry (@mode_permission_funcs) {
@@ -759,7 +936,7 @@
next;
}
- $$wordsRef .= '|' if ($$wordsRef ne "");
+ $$wordsRef .= '|' if (defined $$wordsRef);
$$wordsRef .= $line;
}
close($file);
@@ -769,16 +946,18 @@
return 0;
}
-my $const_structs = "";
-read_words(\$const_structs, $conststructsfile)
- or warn "No structs that should be const will be found - file '$conststructsfile': $!\n";
+my $const_structs;
+if (show_type("CONST_STRUCT")) {
+ read_words(\$const_structs, $conststructsfile)
+ or warn "No structs that should be const will be found - file '$conststructsfile': $!\n";
+}
-my $typeOtherTypedefs = "";
-if (length($typedefsfile)) {
+if (defined($typedefsfile)) {
+ my $typeOtherTypedefs;
read_words(\$typeOtherTypedefs, $typedefsfile)
or warn "No additional types will be considered - file '$typedefsfile': $!\n";
+ $typeTypedefs .= '|' . $typeOtherTypedefs if (defined $typeOtherTypedefs);
}
-$typeTypedefs .= '|' . $typeOtherTypedefs if ($typeOtherTypedefs ne "");
sub build_types {
my $mods = "(?x: \n" . join("|\n ", (@modifierList, @modifierListFile)) . "\n)";
@@ -843,10 +1022,16 @@
our $declaration_macros = qr{(?x:
(?:$Storage\s+)?(?:[A-Z_][A-Z0-9]*_){0,2}(?:DEFINE|DECLARE)(?:_[A-Z0-9]+){1,6}\s*\(|
(?:$Storage\s+)?[HLP]?LIST_HEAD\s*\(|
- (?:$Storage\s+)?${Type}\s+uninitialized_var\s*\(|
(?:SKCIPHER_REQUEST|SHASH_DESC|AHASH_REQUEST)_ON_STACK\s*\(
)};
+our %allow_repeated_words = (
+ add => '',
+ added => '',
+ bad => '',
+ be => '',
+);
+
sub deparenthesize {
my ($string) = @_;
return "" if (!defined($string));
@@ -904,7 +1089,7 @@
sub is_SPDX_License_valid {
my ($license) = @_;
- return 1 if (!$tree || which("python") eq "" || !(-e "$root/scripts/spdxcheck.py") || !(-e "$root/.git"));
+ return 1 if (!$tree || which("python") eq "" || !(-e "$root/scripts/spdxcheck.py") || !(-e "$gitroot"));
my $root_path = abs_path($root);
my $status = `cd "$root_path"; echo "$license" | python scripts/spdxcheck.py -`;
@@ -922,7 +1107,7 @@
$camelcase_seeded = 1;
- if (-e ".git") {
+ if (-e "$gitroot") {
my $git_last_include_commit = `${git_command} log --no-merges --pretty=format:"%h%n" -1 -- include`;
chomp $git_last_include_commit;
$camelcase_cache = ".checkpatch-camelcase.git.$git_last_include_commit";
@@ -950,7 +1135,7 @@
return;
}
- if (-e ".git") {
+ if (-e "$gitroot") {
$files = `${git_command} ls-files "include/*.h"`;
@include_files = split('\n', $files);
}
@@ -970,10 +1155,20 @@
}
}
+sub git_is_single_file {
+ my ($filename) = @_;
+
+ return 0 if ((which("git") eq "") || !(-e "$gitroot"));
+
+ my $output = `${git_command} ls-files -- $filename 2>/dev/null`;
+ my $count = $output =~ tr/\n//;
+ return $count eq 1 && $output =~ m{^${filename}$};
+}
+
sub git_commit_info {
my ($commit, $id, $desc) = @_;
- return ($id, $desc) if ((which("git") eq "") || !(-e ".git"));
+ return ($id, $desc) if ((which("git") eq "") || !(-e "$gitroot"));
my $output = `${git_command} log --no-color --format='%H %s' -1 $commit 2>&1`;
$output =~ s/^\s*//gm;
@@ -1012,7 +1207,7 @@
# If input is git commits, extract all commits from the commit expressions.
# For example, HEAD-3 means we need check 'HEAD, HEAD~1, HEAD~2'.
-die "$P: No git repository found\n" if ($git && !-e ".git");
+die "$P: No git repository found\n" if ($git && !-e "$gitroot");
if ($git) {
my @commits = ();
@@ -1043,6 +1238,9 @@
$allow_c99_comments = !defined $ignore_type{"C99_COMMENT_TOLERANCE"};
for my $filename (@ARGV) {
my $FILE;
+ my $is_git_file = git_is_single_file($filename);
+ my $oldfile = $file;
+ $file = 1 if ($is_git_file);
if ($git) {
open($FILE, '-|', "git format-patch -M --stdout -1 $filename") ||
die "$P: $filename: git format-patch failed - $!\n";
@@ -1065,6 +1263,7 @@
while (<$FILE>) {
chomp;
push(@rawlines, $_);
+ $vname = qq("$1") if ($filename eq '-' && $_ =~ m/^Subject:\s+(.+)/i);
}
close($FILE);
@@ -1086,6 +1285,7 @@
@modifierListFile = ();
@typeListFile = ();
build_types();
+ $file = $oldfile if ($is_git_file);
}
if (!$quiet) {
@@ -1131,6 +1331,7 @@
my ($formatted_email) = @_;
my $name = "";
+ my $quoted = "";
my $name_comment = "";
my $address = "";
my $comment = "";
@@ -1162,14 +1363,20 @@
}
}
- $name = trim($name);
- $name =~ s/^\"|\"$//g;
- $name =~ s/(\s*\([^\)]+\))\s*//;
- if (defined($1)) {
- $name_comment = trim($1);
+ # Extract comments from names excluding quoted parts
+ # "John D. (Doe)" - Do not extract
+ if ($name =~ s/\"(.+)\"//) {
+ $quoted = $1;
}
+ while ($name =~ s/\s*($balanced_parens)\s*/ /) {
+ $name_comment .= trim($1);
+ }
+ $name =~ s/^[ \"]+|[ \"]+$//g;
+ $name = trim("$quoted $name");
+
$address = trim($address);
$address =~ s/^\<|\>$//g;
+ $comment = trim($comment);
if ($name =~ /[^\w \-]/i) { ##has "must quote" chars
$name =~ s/(?<!\\)"/\\"/g; ##escape quotes
@@ -1180,25 +1387,30 @@
}
sub format_email {
- my ($name, $address) = @_;
+ my ($name, $name_comment, $address, $comment) = @_;
my $formatted_email;
- $name = trim($name);
- $name =~ s/^\"|\"$//g;
+ $name =~ s/^[ \"]+|[ \"]+$//g;
$address = trim($address);
+ $address =~ s/(?:\.|\,|\")+$//; ##trailing commas, dots or quotes
if ($name =~ /[^\w \-]/i) { ##has "must quote" chars
$name =~ s/(?<!\\)"/\\"/g; ##escape quotes
$name = "\"$name\"";
}
+ $name_comment = trim($name_comment);
+ $name_comment = " $name_comment" if ($name_comment ne "");
+ $comment = trim($comment);
+ $comment = " $comment" if ($comment ne "");
+
if ("$name" eq "") {
$formatted_email = "$address";
} else {
- $formatted_email = "$name <$address>";
+ $formatted_email = "$name$name_comment <$address>";
}
-
+ $formatted_email .= "$comment";
return $formatted_email;
}
@@ -1206,7 +1418,7 @@
my ($email) = @_;
my ($email_name, $name_comment, $email_address, $comment) = parse_email($email);
- return format_email($email_name, $email_address);
+ return format_email($email_name, $name_comment, $email_address, $comment);
}
sub same_email_addresses {
@@ -1216,7 +1428,9 @@
my ($email2_name, $name2_comment, $email2_address, $comment2) = parse_email($email2);
return $email1_name eq $email2_name &&
- $email1_address eq $email2_address;
+ $email1_address eq $email2_address &&
+ $name1_comment eq $name2_comment &&
+ $comment1 eq $comment2;
}
sub which {
@@ -1681,8 +1895,16 @@
sub ctx_locate_comment {
my ($first_line, $end_line) = @_;
+ # If c99 comment on the current line, or the line before or after
+ my ($current_comment) = ($rawlines[$end_line - 1] =~ m@^\+.*(//.*$)@);
+ return $current_comment if (defined $current_comment);
+ ($current_comment) = ($rawlines[$end_line - 2] =~ m@^[\+ ].*(//.*$)@);
+ return $current_comment if (defined $current_comment);
+ ($current_comment) = ($rawlines[$end_line] =~ m@^[\+ ].*(//.*$)@);
+ return $current_comment if (defined $current_comment);
+
# Catch a comment on the end of the line itself.
- my ($current_comment) = ($rawlines[$end_line - 1] =~ m@.*(/\*.*\*/)\s*(?:\\\s*)?$@);
+ ($current_comment) = ($rawlines[$end_line - 1] =~ m@.*(/\*.*\*/)\s*(?:\\\s*)?$@);
return $current_comment if (defined $current_comment);
# Look through the context and try and figure out if there is a
@@ -2076,7 +2298,16 @@
splice(@lines, 1, 1);
$output = join("\n", @lines);
}
+
+ if ($terse) {
+ $output = (split('\n', $output))[0] . "\n";
+ }
+
+ if ($verbose && exists($verbose_messages{$type}) &&
+ !exists($verbose_emitted{$type})) {
+ $output .= $verbose_messages{$type} . "\n\n";
+ $verbose_emitted{$type} = 1;
+ }
- $output = (split('\n', $output))[0] . "\n" if ($terse);
push(our @report, $output);
@@ -2425,6 +2656,15 @@
"DEVICE_PLAT_AUTO", $herecurr);
}
+sub exclude_global_initialisers {
+ my ($realfile) = @_;
+
+ # Do not check for BPF programs (tools/testing/selftests/bpf/progs/*.c, samples/bpf/*_kern.c, *.bpf.c).
+ return $realfile =~ m@^tools/testing/selftests/bpf/progs/.*\.c$@ ||
+ $realfile =~ m@^samples/bpf/.*_kern\.c$@ ||
+ $realfile =~ m@/bpf/.*\.bpf\.c$@;
+}
+
sub process {
my $filename = shift;
@@ -2443,6 +2683,7 @@
my $signoff = 0;
my $author = '';
my $authorsignoff = 0;
+ my $author_sob = '';
my $is_patch = 0;
my $is_binding_patch = -1;
my $in_header_lines = $file ? 0 : 1;
@@ -2506,7 +2747,7 @@
if ($rawline=~/^\+\+\+\s+(\S+)/) {
$setup_docs = 0;
- if ($1 =~ m@Documentation/admin-guide/kernel-parameters.rst$@) {
+ if ($1 =~ m@Documentation/admin-guide/kernel-parameters.txt$@) {
$setup_docs = 1;
}
#next;
@@ -2706,7 +2947,7 @@
if (($last_binding_patch != -1) &&
($last_binding_patch ^ $is_binding_patch)) {
WARN("DT_SPLIT_BINDING_PATCH",
- "DT binding docs and includes should be a separate patch. See: Documentation/devicetree/bindings/submitting-patches.txt\n");
+ "DT binding docs and includes should be a separate patch. See: Documentation/devicetree/bindings/submitting-patches.rst\n");
}
}
@@ -2735,8 +2976,8 @@
# Check if the commit log has what seems like a diff which can confuse patch
if ($in_commit_log && !$commit_log_has_diff &&
- (($line =~ m@^\s+diff\b.*a/[\w/]+@ &&
- $line =~ m@^\s+diff\b.*a/([\w/]+)\s+b/$1\b@) ||
+ (($line =~ m@^\s+diff\b.*a/([\w/]+)@ &&
+ $line =~ m@^\s+diff\b.*a/[\w/]+\s+b/$1\b@) ||
$line =~ m@^\s*(?:\-\-\-\s+a/|\+\+\+\s+b/)@ ||
$line =~ m/^\s*\@\@ \-\d+,\d+ \+\d+,\d+ \@\@/)) {
ERROR("DIFF_IN_COMMIT_MSG",
@@ -2757,6 +2998,10 @@
# Check the patch for a From:
if (decode("MIME-Header", $line) =~ /^From:\s*(.*)/) {
$author = $1;
+ my $curline = $linenr;
+ while(defined($rawlines[$curline]) && ($rawlines[$curline++] =~ /^[ \t]\s*(.*)/)) {
+ $author .= $1;
+ }
$author = encode("utf8", $author) if ($line =~ /=\?utf-8\?/i);
$author =~ s/"//g;
$author = reformat_email($author);
@@ -2766,9 +3011,37 @@
if ($line =~ /^\s*signed-off-by:\s*(.*)/i) {
$signoff++;
$in_commit_log = 0;
- if ($author ne '') {
+ if ($author ne '' && $authorsignoff != 1) {
if (same_email_addresses($1, $author)) {
$authorsignoff = 1;
+ } else {
+ my $ctx = $1;
+ my ($email_name, $email_comment, $email_address, $comment1) = parse_email($ctx);
+ my ($author_name, $author_comment, $author_address, $comment2) = parse_email($author);
+
+ if ($email_address eq $author_address && $email_name eq $author_name) {
+ $author_sob = $ctx;
+ $authorsignoff = 2;
+ } elsif ($email_address eq $author_address) {
+ $author_sob = $ctx;
+ $authorsignoff = 3;
+ } elsif ($email_name eq $author_name) {
+ $author_sob = $ctx;
+ $authorsignoff = 4;
+
+ my $address1 = $email_address;
+ my $address2 = $author_address;
+
+ if ($address1 =~ /(\S+)\+\S+(\@.*)/) {
+ $address1 = "$1$2";
+ }
+ if ($address2 =~ /(\S+)\+\S+(\@.*)/) {
+ $address2 = "$1$2";
+ }
+ if ($address1 eq $address2) {
+ $authorsignoff = 5;
+ }
+ }
}
}
}
@@ -2795,8 +3068,17 @@
my $ucfirst_sign_off = ucfirst(lc($sign_off));
if ($sign_off !~ /$signature_tags/) {
- WARN("BAD_SIGN_OFF",
- "Non-standard signature: $sign_off\n" . $herecurr);
+ my $suggested_signature = find_standard_signature($sign_off);
+ if ($suggested_signature eq "") {
+ WARN("BAD_SIGN_OFF",
+ "Non-standard signature: $sign_off\n" . $herecurr);
+ } else {
+ if (WARN("BAD_SIGN_OFF",
+ "Non-standard signature: '$sign_off' - perhaps '$suggested_signature'?\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/$sign_off/$suggested_signature/;
+ }
+ }
}
if (defined $space_before && $space_before ne "") {
if (WARN("BAD_SIGN_OFF",
@@ -2825,7 +3107,7 @@
}
my ($email_name, $name_comment, $email_address, $comment) = parse_email($email);
- my $suggested_email = format_email(($email_name, $email_address));
+ my $suggested_email = format_email(($email_name, $name_comment, $email_address, $comment));
if ($suggested_email eq "") {
ERROR("BAD_SIGN_OFF",
"Unrecognized email address: '$email'\n" . $herecurr);
@@ -2836,8 +3118,76 @@
# Don't force email to have quotes
# Allow just an angle bracketed address
if (!same_email_addresses($email, $suggested_email)) {
+ if (WARN("BAD_SIGN_OFF",
+ "email address '$email' might be better as '$suggested_email'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$email\E/$suggested_email/;
+ }
+ }
+
+ # Address part shouldn't have comments
+ my $stripped_address = $email_address;
+ $stripped_address =~ s/\([^\(\)]*\)//g;
+ if ($email_address ne $stripped_address) {
+ if (WARN("BAD_SIGN_OFF",
+ "address part of email should not have comments: '$email_address'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$email_address\E/$stripped_address/;
+ }
+ }
+
+ # Only one name comment should be allowed
+ my $comment_count = () = $name_comment =~ /\([^\)]+\)/g;
+ if ($comment_count > 1) {
WARN("BAD_SIGN_OFF",
- "email address '$email' might be better as '$suggested_email$comment'\n" . $herecurr);
+ "Use a single name comment in email: '$email'\n" . $herecurr);
+ }
+
+
+ # stable@vger.kernel.org or stable@kernel.org shouldn't
+ # have an email name. In addition comments should strictly
+ # begin with a #
+ if ($email =~ /^.*stable\@(?:vger\.)?kernel\.org/i) {
+ if (($comment ne "" && $comment !~ /^#.+/) ||
+ ($email_name ne "")) {
+ my $cur_name = $email_name;
+ my $new_comment = $comment;
+ $cur_name =~ s/[a-zA-Z\s\-\"]+//g;
+
+ # Remove brackets enclosing comment text
+ # and # from start of comments to get comment text
+ $new_comment =~ s/^\((.*)\)$/$1/;
+ $new_comment =~ s/^\[(.*)\]$/$1/;
+ $new_comment =~ s/^[\s\#]+|\s+$//g;
+
+ $new_comment = trim("$new_comment $cur_name") if ($cur_name ne $new_comment);
+ $new_comment = " # $new_comment" if ($new_comment ne "");
+ my $new_email = "$email_address$new_comment";
+
+ if (WARN("BAD_STABLE_ADDRESS_STYLE",
+ "Invalid email format for stable: '$email', prefer '$new_email'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$email\E/$new_email/;
+ }
+ }
+ } elsif ($comment ne "" && $comment !~ /^(?:#.+|\(.+\))$/) {
+ my $new_comment = $comment;
+
+ # Extract comment text from within brackets or
+ # c89 style /*...*/ comments
+ $new_comment =~ s/^\[(.*)\]$/$1/;
+ $new_comment =~ s/^\/\*(.*)\*\/$/$1/;
+
+ $new_comment = trim($new_comment);
+ $new_comment =~ s/^[^\w]$//; # Single lettered comment with non word character is usually a typo
+ $new_comment = "($new_comment)" if ($new_comment ne "");
+ my $new_email = format_email($email_name, $name_comment, $email_address, $new_comment);
+
+ if (WARN("BAD_SIGN_OFF",
+ "Unexpected content after email: '$email', should be: '$new_email'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\Q$email\E/$new_email/;
+ }
}
}
@@ -2860,7 +3210,7 @@
}
if (!defined $lines[$linenr]) {
WARN("BAD_SIGN_OFF",
- "Co-developed-by: must be immediately followed by Signed-off-by:\n" . "$here\n" . $rawline);
+ "Co-developed-by: must be immediately followed by Signed-off-by:\n" . "$here\n" . $rawline);
} elsif ($rawlines[$linenr] !~ /^\s*signed-off-by:\s*(.*)/i) {
WARN("BAD_SIGN_OFF",
"Co-developed-by: must be immediately followed by Signed-off-by:\n" . "$here\n" . $rawline . "\n" .$rawlines[$linenr]);
@@ -2880,8 +3230,11 @@
# Check for Gerrit Change-Ids not in any patch context
if ($realfile eq '' && !$has_patch_separator && $line =~ /^\s*change-id:/i) {
- ERROR("GERRIT_CHANGE_ID",
- "Remove Gerrit Change-Id's before submitting upstream\n" . $herecurr);
+ if (ERROR("GERRIT_CHANGE_ID",
+ "Remove Gerrit Change-Id's before submitting upstream\n" . $herecurr) &&
+ $fix) {
+ fix_delete_line($fixlinenr, $rawline);
+ }
}
# Check if the commit log is in a possible stack dump
@@ -2903,8 +3256,8 @@
# file delta changes
$line =~ /^\s*(?:[\w\.\-]+\/)++[\w\.\-]+:/ ||
# filename then :
- $line =~ /^\s*(?:Fixes:|Link:)/i ||
- # A Fixes: or Link: line
+ $line =~ /^\s*(?:Fixes:|Link:|$signature_tags)/i ||
+ # A Fixes: or Link: line or signature tag line
$commit_log_possible_stack_dump)) {
WARN("COMMIT_LOG_LONG_LINE",
"Possible unwrapped commit description (prefer a maximum 75 chars per line)\n" . $herecurr);
@@ -2917,6 +3270,15 @@
$commit_log_possible_stack_dump = 0;
}
+# Check for lines starting with a #
+ if ($in_commit_log && $line =~ /^#/) {
+ if (WARN("COMMIT_COMMENT_SYMBOL",
+ "Commit log lines starting with '#' are dropped by git as comments\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/^/ /;
+ }
+ }
+
# Check for git id commit length and improperly formed commit descriptions
if ($in_commit_log && !$commit_log_possible_stack_dump &&
$line !~ /^\s*(?:Link|Patchwork|http|https|BugLink|base-commit):/i &&
@@ -2993,7 +3355,7 @@
($line =~ /^new file mode\s*\d+\s*$/) &&
($realfile =~ m@^Documentation/devicetree/bindings/.*\.txt$@)) {
WARN("DT_SCHEMA_BINDING_PATCH",
- "DT bindings should be in DT schema format. See: Documentation/devicetree/writing-schema.rst\n");
+ "DT bindings should be in DT schema format. See: Documentation/devicetree/bindings/writing-schema.rst\n");
}
# Check for wrappage within a valid hunk of the file
@@ -3057,15 +3419,18 @@
# Check for various typo / spelling mistakes
if (defined($misspellings) &&
($in_commit_log || $line =~ /^(?:\+|Subject:)/i)) {
- while ($rawline =~ /(?:^|[^a-z@])($misspellings)(?:\b|$|[^a-z@])/gi) {
+ while ($rawline =~ /(?:^|[^\w\-'`])($misspellings)(?:[^\w\-'`]|$)/gi) {
my $typo = $1;
+ my $blank = copy_spacing($rawline);
+ my $ptr = substr($blank, 0, $-[1]) . "^" x length($typo);
+ my $hereptr = "$hereline$ptr\n";
my $typo_fix = $spelling_fix{lc($typo)};
$typo_fix = ucfirst($typo_fix) if ($typo =~ /^[A-Z]/);
$typo_fix = uc($typo_fix) if ($typo =~ /^[A-Z]+$/);
my $msg_level = \&WARN;
$msg_level = \&CHK if ($file);
if (&{$msg_level}("TYPO_SPELLING",
- "'$typo' may be misspelled - perhaps '$typo_fix'?\n" . $herecurr) &&
+ "'$typo' may be misspelled - perhaps '$typo_fix'?\n" . $hereptr) &&
$fix) {
$fixed[$fixlinenr] =~ s/(^|[^A-Za-z@])($typo)($|[^A-Za-z@])/$1$typo_fix$3/;
}
@@ -3083,6 +3448,60 @@
}
}
+# check for repeated words separated by a single space
+# avoid false positive from list command eg, '-rw-r--r-- 1 root root'
+ if (($rawline =~ /^\+/ || $in_commit_log) &&
+ $rawline !~ /[bcCdDlMnpPs\?-][rwxsStT-]{9}/) {
+ pos($rawline) = 1 if (!$in_commit_log);
+ while ($rawline =~ /\b($word_pattern) (?=($word_pattern))/g) {
+
+ my $first = $1;
+ my $second = $2;
+ my $start_pos = $-[1];
+ my $end_pos = $+[2];
+ if ($first =~ /(?:struct|union|enum)/) {
+ pos($rawline) += length($first) + length($second) + 1;
+ next;
+ }
+
+ next if (lc($first) ne lc($second));
+ next if ($first eq 'long');
+
+ # check for character before and after the word matches
+ my $start_char = '';
+ my $end_char = '';
+ $start_char = substr($rawline, $start_pos - 1, 1) if ($start_pos > ($in_commit_log ? 0 : 1));
+ $end_char = substr($rawline, $end_pos, 1) if ($end_pos < length($rawline));
+
+ next if ($start_char =~ /^\S$/);
+ next if (index(" \t.,;?!", $end_char) == -1);
+
+ # avoid repeating hex occurrences like 'ff ff fe 09 ...'
+ if ($first =~ /\b[0-9a-f]{2,}\b/i) {
+ next if (!exists($allow_repeated_words{lc($first)}));
+ }
+
+ if (WARN("REPEATED_WORD",
+ "Possible repeated word: '$first'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\b$first $second\b/$first/;
+ }
+ }
+
+ # if it's a repeated word on consecutive lines in a comment block
+ if ($prevline =~ /$;+\s*$/ &&
+ $prevrawline =~ /($word_pattern)\s*$/) {
+ my $last_word = $1;
+ if ($rawline =~ /^\+\s*\*\s*$last_word /) {
+ if (WARN("REPEATED_WORD",
+ "Possible repeated word: '$last_word'\n" . $hereprev) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/(\+\s*\*\s*)$last_word /$1/;
+ }
+ }
+ }
+ }
+
# ignore non-hunk lines and lines being removed
next if (!$hunk_line || $line =~ /^-/);
@@ -3141,11 +3560,7 @@
if ($lines[$ln - 1] =~ /^\+\s*(?:bool|tristate|prompt)\s*["']/) {
$is_start = 1;
- } elsif ($lines[$ln - 1] =~ /^\+\s*(?:help|---help---)\s*$/) {
- if ($lines[$ln - 1] =~ "---help---") {
- WARN("CONFIG_DESCRIPTION",
- "prefer 'help' over '---help---' for new help texts\n" . $herecurr);
- }
+ } elsif ($lines[$ln - 1] =~ /^\+\s*(?:---)?help(?:---)?$/) {
$length = -1;
}
@@ -3172,22 +3587,44 @@
#print "is_start<$is_start> is_end<$is_end> length<$length>\n";
}
-# check for MAINTAINERS entries that don't have the right form
- if ($realfile =~ /^MAINTAINERS$/ &&
- $rawline =~ /^\+[A-Z]:/ &&
- $rawline !~ /^\+[A-Z]:\t\S/) {
- if (WARN("MAINTAINERS_STYLE",
- "MAINTAINERS entries use one tab after TYPE:\n" . $herecurr) &&
- $fix) {
- $fixed[$fixlinenr] =~ s/^(\+[A-Z]):\s*/$1:\t/;
+# check MAINTAINERS entries
+ if ($realfile =~ /^MAINTAINERS$/) {
+# check MAINTAINERS entries for the right form
+ if ($rawline =~ /^\+[A-Z]:/ &&
+ $rawline !~ /^\+[A-Z]:\t\S/) {
+ if (WARN("MAINTAINERS_STYLE",
+ "MAINTAINERS entries use one tab after TYPE:\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/^(\+[A-Z]):\s*/$1:\t/;
+ }
}
- }
-
-# discourage the use of boolean for type definition attributes of Kconfig options
- if ($realfile =~ /Kconfig/ &&
- $line =~ /^\+\s*\bboolean\b/) {
- WARN("CONFIG_TYPE_BOOLEAN",
- "Use of boolean is deprecated, please use bool instead.\n" . $herecurr);
+# check MAINTAINERS entries for the right ordering too
+ my $preferred_order = 'MRLSWQBCPTFXNK';
+ if ($rawline =~ /^\+[A-Z]:/ &&
+ $prevrawline =~ /^[\+ ][A-Z]:/) {
+ $rawline =~ /^\+([A-Z]):\s*(.*)/;
+ my $cur = $1;
+ my $curval = $2;
+ $prevrawline =~ /^[\+ ]([A-Z]):\s*(.*)/;
+ my $prev = $1;
+ my $prevval = $2;
+ my $curindex = index($preferred_order, $cur);
+ my $previndex = index($preferred_order, $prev);
+ if ($curindex < 0) {
+ WARN("MAINTAINERS_STYLE",
+ "Unknown MAINTAINERS entry type: '$cur'\n" . $herecurr);
+ } else {
+ if ($previndex >= 0 && $curindex < $previndex) {
+ WARN("MAINTAINERS_STYLE",
+ "Misordered MAINTAINERS entry - list '$cur:' before '$prev:'\n" . $hereprev);
+ } elsif ((($prev eq 'F' && $cur eq 'F') ||
+ ($prev eq 'X' && $cur eq 'X')) &&
+ ($prevval cmp $curval) > 0) {
+ WARN("MAINTAINERS_STYLE",
+ "Misordered MAINTAINERS entry - list file patterns in alphabetic order\n" . $hereprev);
+ }
+ }
+ }
}
if (($realfile =~ /Makefile.*/ || $realfile =~ /Kbuild.*/) &&
@@ -3284,6 +3721,12 @@
}
}
+# check for embedded filenames
+ if ($rawline =~ /^\+.*\Q$realfile\E/) {
+ WARN("EMBEDDED_FILENAME",
+ "It's generally not useful to have the filename in the file\n" . $herecurr);
+ }
+
# check we are in a valid source file if not then ignore this hunk
next if ($realfile !~ /\.(h|c|s|S|sh|dtsi|dts)$/);
@@ -3361,10 +3804,20 @@
# check for adding lines without a newline.
if ($line =~ /^\+/ && defined $lines[$linenr] && $lines[$linenr] =~ /^\\ No newline at end of file/) {
- WARN("MISSING_EOF_NEWLINE",
- "adding a line without newline at end of file\n" . $herecurr);
+ if (WARN("MISSING_EOF_NEWLINE",
+ "adding a line without newline at end of file\n" . $herecurr) &&
+ $fix) {
+ fix_delete_line($fixlinenr+1, "No newline at end of file");
+ }
}
+# check for .L prefix local symbols in .S files
+ if ($realfile =~ /\.S$/ &&
+ $line =~ /^\+\s*(?:[A-Z]+_)?SYM_[A-Z]+_(?:START|END)(?:_[A-Z_]+)?\s*\(\s*\.L/) {
+ WARN("AVOID_L_PREFIX",
+ "Avoid using '.L' prefixed local symbol names for denoting a range of code via 'SYM_*_START/END' annotations; see Documentation/asm-annotations.rst\n" . $herecurr);
+ }
+
if ($u_boot) {
u_boot_line($realfile, $line, $rawline, $herecurr);
}
@@ -3400,14 +3853,28 @@
# check for assignments on the start of a line
if ($sline =~ /^\+\s+($Assignment)[^=]/) {
- CHK("ASSIGNMENT_CONTINUATIONS",
- "Assignment operator '$1' should be on the previous line\n" . $hereprev);
+ my $operator = $1;
+ if (CHK("ASSIGNMENT_CONTINUATIONS",
+ "Assignment operator '$1' should be on the previous line\n" . $hereprev) &&
+ $fix && $prevrawline =~ /^\+/) {
+ # add assignment operator to the previous line, remove from current line
+ $fixed[$fixlinenr - 1] .= " $operator";
+ $fixed[$fixlinenr] =~ s/\Q$operator\E\s*//;
+ }
}
# check for && or || at the start of a line
if ($rawline =~ /^\+\s*(&&|\|\|)/) {
- CHK("LOGICAL_CONTINUATIONS",
- "Logical continuations should be on the previous line\n" . $hereprev);
+ my $operator = $1;
+ if (CHK("LOGICAL_CONTINUATIONS",
+ "Logical continuations should be on the previous line\n" . $hereprev) &&
+ $fix && $prevrawline =~ /^\+/) {
+ # insert logical operator at last non-comment, non-whitepsace char on previous line
+ $prevline =~ /[\s$;]*$/;
+ my $line_end = substr($prevrawline, $-[0]);
+ $fixed[$fixlinenr - 1] =~ s/\Q$line_end\E$/ $operator$line_end/;
+ $fixed[$fixlinenr] =~ s/\Q$operator\E\s*//;
+ }
}
# check indentation starts on a tab stop
@@ -3475,7 +3942,7 @@
if ($realfile =~ m@^(drivers/net/|net/)@ &&
$prevrawline =~ /^\+[ \t]*\/\*[ \t]*$/ &&
$rawline =~ /^\+[ \t]*\*/ &&
- $realline > 2) {
+ $realline > 3) { # Do not warn about the initial copyright comment block after SPDX-License-Identifier
WARN("NETWORKING_BLOCK_COMMENT_STYLE",
"networking block comments don't use an empty /* line, use /* Comment...\n" . $hereprev);
}
@@ -3557,43 +4024,48 @@
}
# check for missing blank lines after declarations
- if ($sline =~ /^\+\s+\S/ && #Not at char 1
- # actual declarations
- ($prevline =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
+# (declarations must have the same indentation and not be at the start of line)
+ if (($prevline =~ /\+(\s+)\S/) && $sline =~ /^\+$1\S/) {
+ # use temporaries
+ my $sl = $sline;
+ my $pl = $prevline;
+ # remove $Attribute/$Sparse uses to simplify comparisons
+ $sl =~ s/\b(?:$Attribute|$Sparse)\b//g;
+ $pl =~ s/\b(?:$Attribute|$Sparse)\b//g;
+ if (($pl =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
# function pointer declarations
- $prevline =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
+ $pl =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
# foo bar; where foo is some local typedef or #define
- $prevline =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
+ $pl =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
# known declaration macros
- $prevline =~ /^\+\s+$declaration_macros/) &&
+ $pl =~ /^\+\s+$declaration_macros/) &&
# for "else if" which can look like "$Ident $Ident"
- !($prevline =~ /^\+\s+$c90_Keywords\b/ ||
+ !($pl =~ /^\+\s+$c90_Keywords\b/ ||
# other possible extensions of declaration lines
- $prevline =~ /(?:$Compare|$Assignment|$Operators)\s*$/ ||
+ $pl =~ /(?:$Compare|$Assignment|$Operators)\s*$/ ||
# not starting a section or a macro "\" extended line
- $prevline =~ /(?:\{\s*|\\)$/) &&
+ $pl =~ /(?:\{\s*|\\)$/) &&
# looks like a declaration
- !($sline =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
+ !($sl =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
# function pointer declarations
- $sline =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
+ $sl =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
# foo bar; where foo is some local typedef or #define
- $sline =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
+ $sl =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
# known declaration macros
- $sline =~ /^\+\s+$declaration_macros/ ||
+ $sl =~ /^\+\s+$declaration_macros/ ||
# start of struct or union or enum
- $sline =~ /^\+\s+(?:static\s+)?(?:const\s+)?(?:union|struct|enum|typedef)\b/ ||
+ $sl =~ /^\+\s+(?:static\s+)?(?:const\s+)?(?:union|struct|enum|typedef)\b/ ||
# start or end of block or continuation of declaration
- $sline =~ /^\+\s+(?:$|[\{\}\.\#\"\?\:\(\[])/ ||
+ $sl =~ /^\+\s+(?:$|[\{\}\.\#\"\?\:\(\[])/ ||
# bitfield continuation
- $sline =~ /^\+\s+$Ident\s*:\s*\d+\s*[,;]/ ||
+ $sl =~ /^\+\s+$Ident\s*:\s*\d+\s*[,;]/ ||
# other possible extensions of declaration lines
- $sline =~ /^\+\s+\(?\s*(?:$Compare|$Assignment|$Operators)/) &&
- # indentation of previous and current line are the same
- (($prevline =~ /\+(\s+)\S/) && $sline =~ /^\+$1\S/)) {
- if (WARN("LINE_SPACING",
- "Missing a blank line after declarations\n" . $hereprev) &&
- $fix) {
- fix_insert_line($fixlinenr, "\+");
+ $sl =~ /^\+\s+\(?\s*(?:$Compare|$Assignment|$Operators)/)) {
+ if (WARN("LINE_SPACING",
+ "Missing a blank line after declarations\n" . $hereprev) &&
+ $fix) {
+ fix_insert_line($fixlinenr, "\+");
+ }
}
}
@@ -3646,12 +4118,16 @@
}
# check indentation of a line with a break;
-# if the previous line is a goto or return and is indented the same # of tabs
+# if the previous line is a goto, return or break
+# and is indented the same # of tabs
if ($sline =~ /^\+([\t]+)break\s*;\s*$/) {
my $tabs = $1;
- if ($prevline =~ /^\+$tabs(?:goto|return)\b/) {
- WARN("UNNECESSARY_BREAK",
- "break is not useful after a goto or return\n" . $hereprev);
+ if ($prevline =~ /^\+$tabs(goto|return|break)\b/) {
+ if (WARN("UNNECESSARY_BREAK",
+ "break is not useful after a $1\n" . $hereprev) &&
+ $fix) {
+ fix_delete_line($fixlinenr, $rawline);
+ }
}
}
@@ -3934,6 +4410,17 @@
#ignore lines not being added
next if ($line =~ /^[^\+]/);
+# check for self assignments used to avoid compiler warnings
+# e.g.: int foo = foo, *bar = NULL;
+# struct foo bar = *(&(bar));
+ if ($line =~ /^\+\s*(?:$Declare)?([A-Za-z_][A-Za-z\d_]*)\s*=/) {
+ my $var = $1;
+ if ($line =~ /^\+\s*(?:$Declare)?$var\s*=\s*(?:$var|\*\s*\(?\s*&\s*\(?\s*$var\s*\)?\s*\)?)\s*[;,]/) {
+ WARN("SELF_ASSIGNMENT",
+ "Do not use self-assignments to avoid compiler warnings\n" . $herecurr);
+ }
+ }
+
# check for dereferences that span multiple lines
if ($prevline =~ /^\+.*$Lval\s*(?:\.|->)\s*$/ &&
$line =~ /^\+\s*(?!\#\s*(?!define\s+|if))\s*$Lval/) {
@@ -4049,8 +4536,7 @@
if (defined $realline_next &&
exists $lines[$realline_next - 1] &&
!defined $suppress_export{$realline_next} &&
- ($lines[$realline_next - 1] =~ /EXPORT_SYMBOL.*\((.*)\)/ ||
- $lines[$realline_next - 1] =~ /EXPORT_UNUSED_SYMBOL.*\((.*)\)/)) {
+ ($lines[$realline_next - 1] =~ /EXPORT_SYMBOL.*\((.*)\)/)) {
# Handle definitions which produce identifiers with
# a prefix:
# XXX(foo);
@@ -4077,8 +4563,7 @@
}
if (!defined $suppress_export{$linenr} &&
$prevline =~ /^.\s*$/ &&
- ($line =~ /EXPORT_SYMBOL.*\((.*)\)/ ||
- $line =~ /EXPORT_UNUSED_SYMBOL.*\((.*)\)/)) {
+ ($line =~ /EXPORT_SYMBOL.*\((.*)\)/)) {
#print "FOO B <$lines[$linenr - 1]>\n";
$suppress_export{$linenr} = 2;
}
@@ -4089,7 +4574,8 @@
}
# check for global initialisers.
- if ($line =~ /^\+$Type\s*$Ident(?:\s+$Modifier)*\s*=\s*($zero_initializer)\s*;/) {
+ if ($line =~ /^\+$Type\s*$Ident(?:\s+$Modifier)*\s*=\s*($zero_initializer)\s*;/ &&
+ !exclude_global_initialisers($realfile)) {
if (ERROR("GLOBAL_INITIALISERS",
"do not initialise globals to $1\n" . $herecurr) &&
$fix) {
@@ -4168,12 +4654,24 @@
}
}
+# check for const static or static <non ptr type> const declarations
+# prefer 'static const <foo>' over 'const static <foo>' and 'static <foo> const'
+ if ($sline =~ /^\+\s*const\s+static\s+($Type)\b/ ||
+ $sline =~ /^\+\s*static\s+($BasicType)\s+const\b/) {
+ if (WARN("STATIC_CONST",
+ "Move const after static - use 'static const $1'\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bconst\s+static\b/static const/;
+ $fixed[$fixlinenr] =~ s/\bstatic\s+($BasicType)\s+const\b/static const $1/;
+ }
+ }
+
# check for non-global char *foo[] = {"bar", ...} declarations.
if ($line =~ /^.\s+(?:static\s+|const\s+)?char\s+\*\s*\w+\s*\[\s*\]\s*=\s*\{/) {
WARN("STATIC_CONST_CHAR_ARRAY",
"char * array declaration might be better as static const\n" .
$herecurr);
- }
+ }
# check for sizeof(foo)/sizeof(foo[0]) that could be ARRAY_SIZE(foo)
if ($line =~ m@\bsizeof\s*\(\s*($Lval)\s*\)@) {
@@ -4290,16 +4788,23 @@
"printk() should include KERN_<LEVEL> facility level\n" . $herecurr);
}
- if ($line =~ /\bprintk\s*\(\s*KERN_([A-Z]+)/) {
- my $orig = $1;
+# prefer variants of (subsystem|netdev|dev|pr)_<level> to printk(KERN_<LEVEL>
+ if ($line =~ /\b(printk(_once|_ratelimited)?)\s*\(\s*KERN_([A-Z]+)/) {
+ my $printk = $1;
+ my $modifier = $2;
+ my $orig = $3;
+ $modifier = "" if (!defined($modifier));
my $level = lc($orig);
$level = "warn" if ($level eq "warning");
my $level2 = $level;
$level2 = "dbg" if ($level eq "debug");
+ $level .= $modifier;
+ $level2 .= $modifier;
WARN("PREFER_PR_LEVEL",
- "Prefer [subsystem eg: netdev]_$level2([subsystem]dev, ... then dev_$level2(dev, ... then pr_$level(... to printk(KERN_$orig ...\n" . $herecurr);
+ "Prefer [subsystem eg: netdev]_$level2([subsystem]dev, ... then dev_$level2(dev, ... then pr_$level(... to $printk(KERN_$orig ...\n" . $herecurr);
}
+# prefer dev_<level> to dev_printk(KERN_<LEVEL>
if ($line =~ /\bdev_printk\s*\(\s*KERN_([A-Z]+)/) {
my $orig = $1;
my $level = lc($orig);
@@ -4309,6 +4814,12 @@
"Prefer dev_$level(... to dev_printk(KERN_$orig, ...\n" . $herecurr);
}
+# trace_printk should not be used in production code.
+ if ($line =~ /\b(trace_printk|trace_puts|ftrace_vprintk)\s*\(/) {
+ WARN("TRACE_PRINTK",
+ "Do not use $1() in production code (this can be ignored if built only with a debug config option)\n" . $herecurr);
+ }
+
# ENOSYS means "bad syscall nr" and nothing else. This will have a small
# number of false positives, but assembly files are not checked, so at
# least the arch entry code will not trigger this warning.
@@ -4317,6 +4828,17 @@
"ENOSYS means 'invalid syscall nr' and nothing else\n" . $herecurr);
}
+# ENOTSUPP is not a standard error code and should be avoided in new patches.
+# Folks usually mean EOPNOTSUPP (also called ENOTSUP), when they type ENOTSUPP.
+# Similarly to ENOSYS warning a small number of false positives is expected.
+ if (!$file && $line =~ /\bENOTSUPP\b/) {
+ if (WARN("ENOTSUPP",
+ "ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP\n" . $herecurr) &&
+ $fix) {
+ $fixed[$fixlinenr] =~ s/\bENOTSUPP\b/EOPNOTSUPP/;
+ }
+ }
+
# function brace can't be on same line, except for #defines of do while,
# or if closed on same line
if ($perl_version_ok &&
@@ -4328,7 +4850,7 @@
$fix) {
fix_delete_line($fixlinenr, $rawline);
my $fixed_line = $rawline;
- $fixed_line =~ /(^..*$Type\s*$Ident\(.*\)\s*){(.*)$/;
+ $fixed_line =~ /(^..*$Type\s*$Ident\(.*\)\s*)\{(.*)$/;
my $line1 = $1;
my $line2 = $2;
fix_insert_line($fixlinenr, ltrim($line1));
@@ -4739,7 +5261,7 @@
# A colon needs no spaces before when it is
# terminating a case value or a label.
} elsif ($opv eq ':C' || $opv eq ':L') {
- if ($ctx =~ /Wx./) {
+ if ($ctx =~ /Wx./ and $realfile !~ m@.*\.lds\.h$@) {
if (ERROR("SPACING",
"space prohibited before that '$op' $at\n" . $hereptr)) {
$good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]);
@@ -4823,7 +5345,7 @@
## $line !~ /^.\s*$Type\s+$Ident(?:\s*=[^,{]*)?\s*,\s*$Type\s*$Ident.*/) {
##
## # Remove any bracketed sections to ensure we do not
-## # falsly report the parameters of functions.
+## # falsely report the parameters of functions.
## my $ln = $line;
## while ($ln =~ s/\([^\(\)]*\)//g) {
## }
@@ -4964,6 +5486,17 @@
}
}
+# check if a statement with a comma should be two statements like:
+# foo = bar(), /* comma should be semicolon */
+# bar = baz();
+ if (defined($stat) &&
+ $stat =~ /^\+\s*(?:$Lval\s*$Assignment\s*)?$FuncArg\s*,\s*(?:$Lval\s*$Assignment\s*)?$FuncArg\s*;\s*$/) {
+ my $cnt = statement_rawlines($stat);
+ my $herectx = get_stat_here($linenr, $cnt, $here);
+ WARN("SUSPECT_COMMA_SEMICOLON",
+ "Possible comma where semicolon could be used\n" . $herectx);
+ }
+
# return is not a function
if (defined($stat) && $stat =~ /^.\s*return(\s*)\(/s) {
my $spacing = $1;
@@ -4991,7 +5524,7 @@
$lines[$linenr - 3] !~ /^[ +]\s*$Ident\s*:/) {
WARN("RETURN_VOID",
"void function return statements are not generally useful\n" . $hereprev);
- }
+ }
# if statements using unnecessary parentheses - ie: if ((foo == bar))
if ($perl_version_ok &&
@@ -5084,8 +5617,30 @@
my ($s, $c) = ($stat, $cond);
if ($c =~ /\bif\s*\(.*[^<>!=]=[^=].*/s) {
- ERROR("ASSIGN_IN_IF",
- "do not use assignment in if condition\n" . $herecurr);
+ if (ERROR("ASSIGN_IN_IF",
+ "do not use assignment in if condition\n" . $herecurr) &&
+ $fix && $perl_version_ok) {
+ if ($rawline =~ /^\+(\s+)if\s*\(\s*(\!)?\s*\(\s*(($Lval)\s*=\s*$LvalOrFunc)\s*\)\s*(?:($Compare)\s*($FuncArg))?\s*\)\s*(\{)?\s*$/) {
+ my $space = $1;
+ my $not = $2;
+ my $statement = $3;
+ my $assigned = $4;
+ my $test = $8;
+ my $against = $9;
+ my $brace = $15;
+ fix_delete_line($fixlinenr, $rawline);
+ fix_insert_line($fixlinenr, "$space$statement;");
+ my $newline = "${space}if (";
+ $newline .= '!' if defined($not);
+ $newline .= '(' if (defined $not && defined($test) && defined($against));
+ $newline .= "$assigned";
+ $newline .= " $test $against" if (defined($test) && defined($against));
+ $newline .= ')' if (defined $not && defined($test) && defined($against));
+ $newline .= ')';
+ $newline .= " {" if (defined($brace));
+ fix_insert_line($fixlinenr + 1, $newline);
+ }
+ }
}
# Find out what is on the end of the line after the
@@ -5206,6 +5761,8 @@
#CamelCase
if ($var !~ /^$Constant$/ &&
$var =~ /[A-Z][a-z]|[a-z][A-Z]/ &&
+#Ignore some autogenerated defines and enum values
+ $var !~ /^(?:[A-Z]+_){1,5}[A-Z]{1,3}[a-z]/ &&
#Ignore Page<foo> variants
$var !~ /^(?:Clear|Set|TestClear|TestSet|)Page[A-Z]/ &&
#Ignore SI style variants like nS, mV and dB
@@ -5301,9 +5858,9 @@
$dstat =~ s/\s*$//s;
# Flatten any parentheses and braces
- while ($dstat =~ s/\([^\(\)]*\)/1/ ||
- $dstat =~ s/\{[^\{\}]*\}/1/ ||
- $dstat =~ s/.\[[^\[\]]*\]/1/)
+ while ($dstat =~ s/\([^\(\)]*\)/1u/ ||
+ $dstat =~ s/\{[^\{\}]*\}/1u/ ||
+ $dstat =~ s/.\[[^\[\]]*\]/1u/)
{
}
@@ -5344,6 +5901,7 @@
$dstat !~ /^\.$Ident\s*=/ && # .foo =
$dstat !~ /^(?:\#\s*$Ident|\#\s*$Constant)\s*$/ && # stringification #foo
$dstat !~ /^do\s*$Constant\s*while\s*$Constant;?$/ && # do {...} while (...); // do {...} while (...)
+ $dstat !~ /^while\s*$Constant\s*$Constant\s*$/ && # while (...) {...}
$dstat !~ /^for\s*$Constant$/ && # for (...)
$dstat !~ /^for\s*$Constant\s+(?:$Ident|-?$Constant)$/ && # for (...) bar()
$dstat !~ /^do\s*{/ && # do {...
@@ -5385,7 +5943,7 @@
next if ($arg =~ /\.\.\./);
next if ($arg =~ /^type$/i);
my $tmp_stmt = $define_stmt;
- $tmp_stmt =~ s/\b(sizeof|typeof|__typeof__|__builtin\w+|typecheck\s*\(\s*$Type\s*,|\#+)\s*\(*\s*$arg\s*\)*\b//g;
+ $tmp_stmt =~ s/\b(__must_be_array|offsetof|sizeof|sizeof_field|__stringify|typeof|__typeof__|__builtin\w+|typecheck\s*\(\s*$Type\s*,|\#+)\s*\(*\s*$arg\s*\)*\b//g;
$tmp_stmt =~ s/\#+\s*$arg\b//g;
$tmp_stmt =~ s/\b$arg\s*\#\#//g;
my $use_cnt = () = $tmp_stmt =~ /\b$arg\b/g;
@@ -5662,6 +6220,17 @@
"Prefer using '\"%s...\", __func__' to using '$context_function', this function's name, in a string\n" . $herecurr);
}
+# check for unnecessary function tracing like uses
+# This does not use $logFunctions because there are many instances like
+# 'dprintk(FOO, "%s()\n", __func__);' which do not match $logFunctions
+ if ($rawline =~ /^\+.*\([^"]*"$tracing_logging_tags{0,3}%s(?:\s*\(\s*\)\s*)?$tracing_logging_tags{0,3}(?:\\n)?"\s*,\s*__func__\s*\)\s*;/) {
+ if (WARN("TRACING_LOGGING",
+ "Unnecessary ftrace-like logging - prefer using ftrace\n" . $herecurr) &&
+ $fix) {
+ fix_delete_line($fixlinenr, $rawline);
+ }
+ }
+
# check for spaces before a quoted newline
if ($rawline =~ /^.*\".*\s\\n/) {
if (WARN("QUOTED_WHITESPACE_BEFORE_NEWLINE",
@@ -5808,6 +6377,28 @@
"Avoid logging continuation uses where feasible\n" . $herecurr);
}
+# check for unnecessary use of %h[xudi] and %hh[xudi] in logging functions
+ if (defined $stat &&
+ $line =~ /\b$logFunctions\s*\(/ &&
+ index($stat, '"') >= 0) {
+ my $lc = $stat =~ tr@\n@@;
+ $lc = $lc + $linenr;
+ my $stat_real = get_stat_real($linenr, $lc);
+ pos($stat_real) = index($stat_real, '"');
+ while ($stat_real =~ /[^\"%]*(%[\#\d\.\*\-]*(h+)[idux])/g) {
+ my $pspec = $1;
+ my $h = $2;
+ my $lineoff = substr($stat_real, 0, $-[1]) =~ tr@\n@@;
+ if (WARN("UNNECESSARY_MODIFIER",
+ "Integer promotion: Using '$h' in '$pspec' is unnecessary\n" . "$here\n$stat_real\n") &&
+ $fix && $fixed[$fixlinenr + $lineoff] =~ /^\+/) {
+ my $nspec = $pspec;
+ $nspec =~ s/h//g;
+ $fixed[$fixlinenr + $lineoff] =~ s/\Q$pspec\E/$nspec/;
+ }
+ }
+ }
+
# check for mask then right shift without a parentheses
if ($perl_version_ok &&
$line =~ /$LvalOrFunc\s*\&\s*($LvalOrFunc)\s*>>/ &&
@@ -5966,8 +6557,7 @@
my $barriers = qr{
mb|
rmb|
- wmb|
- read_barrier_depends
+ wmb
}x;
my $barrier_stems = qr{
mb__before_atomic|
@@ -6008,10 +6598,12 @@
}
}
-# check for smp_read_barrier_depends and read_barrier_depends
- if (!$file && $line =~ /\b(smp_|)read_barrier_depends\s*\(/) {
- WARN("READ_BARRIER_DEPENDS",
- "$1read_barrier_depends should only be used in READ_ONCE or DEC Alpha code\n" . $herecurr);
+# check for data_race without a comment.
+ if ($line =~ /\bdata_race\s*\(/) {
+ if (!ctx_has_comment($first_line, $linenr)) {
+ WARN("DATA_RACE",
+ "data_race without comment\n" . $herecurr);
+ }
}
# check of hardware specific defines
@@ -6053,50 +6645,68 @@
}
}
-# Check for __attribute__ packed, prefer __packed
- if ($realfile !~ m@\binclude/uapi/@ &&
- $line =~ /\b__attribute__\s*\(\s*\(.*\bpacked\b/) {
- WARN("PREFER_PACKED",
- "__packed is preferred over __attribute__((packed))\n" . $herecurr);
- }
-
-# Check for __attribute__ aligned, prefer __aligned
- if ($realfile !~ m@\binclude/uapi/@ &&
- $line =~ /\b__attribute__\s*\(\s*\(.*aligned/) {
- WARN("PREFER_ALIGNED",
- "__aligned(size) is preferred over __attribute__((aligned(size)))\n" . $herecurr);
- }
-
-# Check for __attribute__ section, prefer __section
+# Check for compiler attributes
if ($realfile !~ m@\binclude/uapi/@ &&
- $line =~ /\b__attribute__\s*\(\s*\(.*_*section_*\s*\(\s*("[^"]*")/) {
- my $old = substr($rawline, $-[1], $+[1] - $-[1]);
- my $new = substr($old, 1, -1);
- if (WARN("PREFER_SECTION",
- "__section(\"$new\") is preferred over __attribute__((section($old)))\n" . $herecurr) &&
- $fix) {
- $fixed[$fixlinenr] =~ s/\b__attribute__\s*\(\s*\(\s*_*section_*\s*\(\s*\Q$old\E\s*\)\s*\)\s*\)/__section($new)/;
- }
- }
+ $rawline =~ /\b__attribute__\s*\(\s*($balanced_parens)\s*\)/) {
+ my $attr = $1;
+ $attr =~ s/\s*\(\s*(.*)\)\s*/$1/;
-# Check for __attribute__ format(printf, prefer __printf
- if ($realfile !~ m@\binclude/uapi/@ &&
- $line =~ /\b__attribute__\s*\(\s*\(\s*format\s*\(\s*printf/) {
- if (WARN("PREFER_PRINTF",
- "__printf(string-index, first-to-check) is preferred over __attribute__((format(printf, string-index, first-to-check)))\n" . $herecurr) &&
- $fix) {
- $fixed[$fixlinenr] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*printf\s*,\s*(.*)\)\s*\)\s*\)/"__printf(" . trim($1) . ")"/ex;
+ my %attr_list = (
+ "alias" => "__alias",
+ "aligned" => "__aligned",
+ "always_inline" => "__always_inline",
+ "assume_aligned" => "__assume_aligned",
+ "cold" => "__cold",
+ "const" => "__attribute_const__",
+ "copy" => "__copy",
+ "designated_init" => "__designated_init",
+ "externally_visible" => "__visible",
+ "format" => "printf|scanf",
+ "gnu_inline" => "__gnu_inline",
+ "malloc" => "__malloc",
+ "mode" => "__mode",
+ "no_caller_saved_registers" => "__no_caller_saved_registers",
+ "noclone" => "__noclone",
+ "noinline" => "noinline",
+ "nonstring" => "__nonstring",
+ "noreturn" => "__noreturn",
+ "packed" => "__packed",
+ "pure" => "__pure",
+ "section" => "__section",
+ "used" => "__used",
+ "weak" => "__weak"
+ );
+ while ($attr =~ /\s*(\w+)\s*(${balanced_parens})?/g) {
+ my $orig_attr = $1;
+ my $params = '';
+ $params = $2 if defined($2);
+ my $curr_attr = $orig_attr;
+ $curr_attr =~ s/^[\s_]+|[\s_]+$//g;
+ if (exists($attr_list{$curr_attr})) {
+ my $new = $attr_list{$curr_attr};
+ if ($curr_attr eq "format" && $params) {
+ $params =~ /^\s*\(\s*(\w+)\s*,\s*(.*)/;
+ $new = "__$1\($2";
+ } else {
+ $new = "$new$params";
+ }
+ if (WARN("PREFER_DEFINED_ATTRIBUTE_MACRO",
+ "Prefer $new over __attribute__(($orig_attr$params))\n" . $herecurr) &&
+ $fix) {
+ my $remove = "\Q$orig_attr\E" . '\s*' . "\Q$params\E" . '(?:\s*,\s*)?';
+ $fixed[$fixlinenr] =~ s/$remove//;
+ $fixed[$fixlinenr] =~ s/\b__attribute__/$new __attribute__/;
+ $fixed[$fixlinenr] =~ s/\}\Q$new\E/} $new/;
+ $fixed[$fixlinenr] =~ s/ __attribute__\s*\(\s*\(\s*\)\s*\)//;
+ }
+ }
}
- }
-# Check for __attribute__ format(scanf, prefer __scanf
- if ($realfile !~ m@\binclude/uapi/@ &&
- $line =~ /\b__attribute__\s*\(\s*\(\s*format\s*\(\s*scanf\b/) {
- if (WARN("PREFER_SCANF",
- "__scanf(string-index, first-to-check) is preferred over __attribute__((format(scanf, string-index, first-to-check)))\n" . $herecurr) &&
- $fix) {
- $fixed[$fixlinenr] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*scanf\s*,\s*(.*)\)\s*\)\s*\)/"__scanf(" . trim($1) . ")"/ex;
+ # Check for __attribute__ unused, prefer __always_unused or __maybe_unused
+ if ($attr =~ /^_*unused/) {
+ WARN("PREFER_DEFINED_ATTRIBUTE_MACRO",
+ "__always_unused or __maybe_unused is preferred over __attribute__((__unused__))\n" . $herecurr);
}
}
@@ -6132,18 +6742,18 @@
if ($line =~ /(\(\s*$C90_int_types\s*\)\s*)($Constant)\b/) {
my $cast = $1;
my $const = $2;
+ my $suffix = "";
+ my $newconst = $const;
+ $newconst =~ s/${Int_type}$//;
+ $suffix .= 'U' if ($cast =~ /\bunsigned\b/);
+ if ($cast =~ /\blong\s+long\b/) {
+ $suffix .= 'LL';
+ } elsif ($cast =~ /\blong\b/) {
+ $suffix .= 'L';
+ }
if (WARN("TYPECAST_INT_CONSTANT",
- "Unnecessary typecast of c90 int constant\n" . $herecurr) &&
+ "Unnecessary typecast of c90 int constant - '$cast$const' could be '$const$suffix'\n" . $herecurr) &&
$fix) {
- my $suffix = "";
- my $newconst = $const;
- $newconst =~ s/${Int_type}$//;
- $suffix .= 'U' if ($cast =~ /\bunsigned\b/);
- if ($cast =~ /\blong\s+long\b/) {
- $suffix .= 'LL';
- } elsif ($cast =~ /\blong\b/) {
- $suffix .= 'L';
- }
$fixed[$fixlinenr] =~ s/\Q$cast\E$const\b/$newconst$suffix/;
}
}
@@ -6203,9 +6813,11 @@
$specifier = $1;
$extension = $2;
$qualifier = $3;
- if ($extension !~ /[SsBKRraEehMmIiUDdgVCbGNOxtf]/ ||
+ if ($extension !~ /[4SsBKRraEehMmIiUDdgVCbGNOxtf]/ ||
($extension eq "f" &&
- defined $qualifier && $qualifier !~ /^w/)) {
+ defined $qualifier && $qualifier !~ /^w/) ||
+ ($extension eq "4" &&
+ defined $qualifier && $qualifier !~ /^cc/)) {
$bad_specifier = $specifier;
last;
}
@@ -6385,8 +6997,7 @@
if (defined $cond) {
substr($s, 0, length($cond), '');
}
- if ($s =~ /^\s*;/ &&
- $function_name ne 'uninitialized_var')
+ if ($s =~ /^\s*;/)
{
WARN("AVOID_EXTERNS",
"externs should be avoided in .c files\n" . $herecurr);
@@ -6405,17 +7016,13 @@
}
# check for function declarations that have arguments without identifier names
-# while avoiding uninitialized_var(x)
if (defined $stat &&
- $stat =~ /^.\s*(?:extern\s+)?$Type\s*(?:($Ident)|\(\s*\*\s*$Ident\s*\))\s*\(\s*([^{]+)\s*\)\s*;/s &&
- (!defined($1) ||
- (defined($1) && $1 ne "uninitialized_var")) &&
- $2 ne "void") {
- my $args = trim($2);
+ $stat =~ /^.\s*(?:extern\s+)?$Type\s*(?:$Ident|\(\s*\*\s*$Ident\s*\))\s*\(\s*([^{]+)\s*\)\s*;/s &&
+ $1 ne "void") {
+ my $args = trim($1);
while ($args =~ m/\s*($Type\s*(?:$Ident|\(\s*\*\s*$Ident?\s*\)\s*$balanced_parens)?)/g) {
my $arg = trim($1);
- if ($arg =~ /^$Type$/ &&
- $arg !~ /enum\s+$Ident$/) {
+ if ($arg =~ /^$Type$/ && $arg !~ /enum\s+$Ident$/) {
WARN("FUNCTION_ARGUMENTS",
"function definition argument '$arg' should also have an identifier name\n" . $herecurr);
}
@@ -6451,7 +7058,7 @@
if (!grep(/$name/, @setup_docs)) {
CHK("UNDOCUMENTED_SETUP",
- "__setup appears un-documented -- check Documentation/admin-guide/kernel-parameters.rst\n" . $herecurr);
+ "__setup appears un-documented -- check Documentation/admin-guide/kernel-parameters.txt\n" . $herecurr);
}
}
@@ -6507,7 +7114,7 @@
}
# check for alloc argument mismatch
- if ($line =~ /\b(kcalloc|kmalloc_array)\s*\(\s*sizeof\b/) {
+ if ($line =~ /\b((?:devm_)?(?:kcalloc|kmalloc_array))\s*\(\s*sizeof\b/) {
WARN("ALLOC_ARRAY_ARGS",
"$1 uses number as first arg, sizeof is generally wrong\n" . $herecurr);
}
@@ -6533,41 +7140,22 @@
}
}
+# check for IS_ENABLED() without CONFIG_<FOO> ($rawline for comments too)
+ if ($rawline =~ /\bIS_ENABLED\s*\(\s*(\w+)\s*\)/ && $1 !~ /^${CONFIG_}/) {
+ WARN("IS_ENABLED_CONFIG",
+ "IS_ENABLED($1) is normally used as IS_ENABLED(${CONFIG_}$1)\n" . $herecurr);
+ }
+
# check for #if defined CONFIG_<FOO> || defined CONFIG_<FOO>_MODULE
- if ($line =~ /^\+\s*#\s*if\s+defined(?:\s*\(?\s*|\s+)(CONFIG_[A-Z_]+)\s*\)?\s*\|\|\s*defined(?:\s*\(?\s*|\s+)\1_MODULE\s*\)?\s*$/) {
+ if ($line =~ /^\+\s*#\s*if\s+defined(?:\s*\(?\s*|\s+)(${CONFIG_}[A-Z_]+)\s*\)?\s*\|\|\s*defined(?:\s*\(?\s*|\s+)\1_MODULE\s*\)?\s*$/) {
my $config = $1;
if (WARN("PREFER_IS_ENABLED",
- "Prefer IS_ENABLED(<FOO>) to CONFIG_<FOO> || CONFIG_<FOO>_MODULE\n" . $herecurr) &&
+ "Prefer IS_ENABLED(<FOO>) to ${CONFIG_}<FOO> || ${CONFIG_}<FOO>_MODULE\n" . $herecurr) &&
$fix) {
$fixed[$fixlinenr] = "\+#if IS_ENABLED($config)";
}
}
-# check for case / default statements not preceded by break/fallthrough/switch
- if ($line =~ /^.\s*(?:case\s+(?:$Ident|$Constant)\s*|default):/) {
- my $has_break = 0;
- my $has_statement = 0;
- my $count = 0;
- my $prevline = $linenr;
- while ($prevline > 1 && ($file || $count < 3) && !$has_break) {
- $prevline--;
- my $rline = $rawlines[$prevline - 1];
- my $fline = $lines[$prevline - 1];
- last if ($fline =~ /^\@\@/);
- next if ($fline =~ /^\-/);
- next if ($fline =~ /^.(?:\s*(?:case\s+(?:$Ident|$Constant)[\s$;]*|default):[\s$;]*)*$/);
- $has_break = 1 if ($rline =~ /fall[\s_-]*(through|thru)/i);
- next if ($fline =~ /^.[\s$;]*$/);
- $has_statement = 1;
- $count++;
- $has_break = 1 if ($fline =~ /\bswitch\b|\b(?:break\s*;[\s$;]*$|exit\s*\(\b|return\b|goto\b|continue\b)/);
- }
- if (!$has_break && $has_statement) {
- WARN("MISSING_BREAK",
- "Possible switch case/default not preceded by break or fallthrough comment\n" . $herecurr);
- }
- }
-
# check for /* fallthrough */ like comment, prefer fallthrough;
my @fallthroughs = (
'fallthrough',
@@ -6683,7 +7271,8 @@
# check for various structs that are normally const (ops, kgdb, device_tree)
# and avoid what seem like struct definitions 'struct foo {'
- if ($line !~ /\bconst\b/ &&
+ if (defined($const_structs) &&
+ $line !~ /\bconst\b/ &&
$line =~ /\bstruct\s+($const_structs)\b(?!\s*\{)/) {
WARN("CONST_STRUCT",
"struct $1 should normally be const\n" . $herecurr);
@@ -6691,12 +7280,14 @@
# use of NR_CPUS is usually wrong
# ignore definitions of NR_CPUS and usage to define arrays as likely right
+# ignore designated initializers using NR_CPUS
if ($line =~ /\bNR_CPUS\b/ &&
$line !~ /^.\s*\s*#\s*if\b.*\bNR_CPUS\b/ &&
$line !~ /^.\s*\s*#\s*define\b.*\bNR_CPUS\b/ &&
$line !~ /^.\s*$Declare\s.*\[[^\]]*NR_CPUS[^\]]*\]/ &&
$line !~ /\[[^\]]*\.\.\.[^\]]*NR_CPUS[^\]]*\]/ &&
- $line !~ /\[[^\]]*NR_CPUS[^\]]*\.\.\.[^\]]*\]/)
+ $line !~ /\[[^\]]*NR_CPUS[^\]]*\.\.\.[^\]]*\]/ &&
+ $line !~ /^.\s*\.\w+\s*=\s*.*\bNR_CPUS\b/)
{
WARN("NR_CPUS",
"usage of NR_CPUS is often wrong - consider using cpu_possible(), num_possible_cpus(), for_each_possible_cpu(), etc\n" . $herecurr);
@@ -6715,6 +7306,17 @@
"Using $1 should generally have parentheses around the comparison\n" . $herecurr);
}
+# return sysfs_emit(foo, fmt, ...) fmt without newline
+ if ($line =~ /\breturn\s+sysfs_emit\s*\(\s*$FuncArg\s*,\s*($String)/ &&
+ substr($rawline, $-[6], $+[6] - $-[6]) !~ /\\n"$/) {
+ my $offset = $+[6] - 1;
+ if (WARN("SYSFS_EMIT",
+ "return sysfs_emit(...) formats should include a terminating newline\n" . $herecurr) &&
+ $fix) {
+ substr($fixed[$fixlinenr], $offset, 0) = '\\n';
+ }
+ }
+
# nested likely/unlikely calls
if ($line =~ /\b(?:(?:un)?likely)\s*\(\s*!?\s*(IS_ERR(?:_OR_NULL|_VALUE)?|WARN)/) {
WARN("LIKELY_MISUSE",
@@ -6732,12 +7334,6 @@
}
}
-# check for mutex_trylock_recursive usage
- if ($line =~ /mutex_trylock_recursive/) {
- ERROR("LOCKING",
- "recursive locking is bad, do not use this ever.\n" . $herecurr);
- }
-
# check for lockdep_set_novalidate_class
if ($line =~ /^.\s*lockdep_set_novalidate_class\s*\(/ ||
$line =~ /__lockdep_no_validate__\s*\)/ ) {
@@ -6900,7 +7496,7 @@
exit(0);
}
- # This is not a patch, and we are are in 'no-patch' mode so
+ # This is not a patch, and we are in 'no-patch' mode so
# just keep quiet.
if (!$chk_patch && !$is_patch) {
exit(0);
@@ -6914,9 +7510,33 @@
if ($signoff == 0) {
ERROR("MISSING_SIGN_OFF",
"Missing Signed-off-by: line(s)\n");
- } elsif (!$authorsignoff) {
- WARN("NO_AUTHOR_SIGN_OFF",
- "Missing Signed-off-by: line by nominal patch author '$author'\n");
+ } elsif ($authorsignoff != 1) {
+ # authorsignoff values:
+ # 0 -> missing sign off
+ # 1 -> sign off identical
+ # 2 -> names and addresses match, comments mismatch
+ # 3 -> addresses match, names different
+ # 4 -> names match, addresses different
+ # 5 -> names match, addresses excluding subaddress details (refer RFC 5233) match
+
+ my $sob_msg = "'From: $author' != 'Signed-off-by: $author_sob'";
+
+ if ($authorsignoff == 0) {
+ ERROR("NO_AUTHOR_SIGN_OFF",
+ "Missing Signed-off-by: line by nominal patch author '$author'\n");
+ } elsif ($authorsignoff == 2) {
+ CHK("FROM_SIGN_OFF_MISMATCH",
+ "From:/Signed-off-by: email comments mismatch: $sob_msg\n");
+ } elsif ($authorsignoff == 3) {
+ WARN("FROM_SIGN_OFF_MISMATCH",
+ "From:/Signed-off-by: email name mismatch: $sob_msg\n");
+ } elsif ($authorsignoff == 4) {
+ WARN("FROM_SIGN_OFF_MISMATCH",
+ "From:/Signed-off-by: email address mismatch: $sob_msg\n");
+ } elsif ($authorsignoff == 5) {
+ WARN("FROM_SIGN_OFF_MISMATCH",
+ "From:/Signed-off-by: email subaddress mismatch: $sob_msg\n");
+ }
}
}
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index a9c2380..61ae682 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1,23 +1,11 @@
-CONFIG_16BIT
CONFIG_64BIT_PHYS_ADDR
-CONFIG_8349_CLKIN
CONFIG_83XX
-CONFIG_83XX_CLKIN
-CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
CONFIG_83XX_PCICLK
-CONFIG_83XX_PCI_STREAMING
CONFIG_88F5182
CONFIG_A003399_NOR_WORKAROUND
CONFIG_A008044_WORKAROUND
-CONFIG_ACX517AKN
-CONFIG_ACX544AKN
-CONFIG_ADDRESS
-CONFIG_ADDR_AUTO_INCR_BIT
-CONFIG_ADNPESC1
CONFIG_AEABI
CONFIG_AEMIF_CNTRL_BASE
-CONFIG_ALTERA_SPI_IDLE_VAL
-CONFIG_ALU
CONFIG_AM335X_USB0
CONFIG_AM335X_USB0_MODE
CONFIG_AM335X_USB1
@@ -25,10 +13,6 @@
CONFIG_AM437X_USB2PHY2_HOST
CONFIG_ANDES_PCU
CONFIG_ANDES_PCU_BASE
-CONFIG_APER_0_BASE
-CONFIG_APER_1_BASE
-CONFIG_APER_SIZE
-CONFIG_APUS_FAST_EXCEPT
CONFIG_ARCH_ADPAG101P
CONFIG_ARCH_HAS_ILOG2_U32
CONFIG_ARCH_HAS_ILOG2_U64
@@ -38,21 +22,12 @@
CONFIG_ARCH_USE_BUILTIN_BSWAP
CONFIG_ARC_MMU_VER
CONFIG_ARMADA100
-CONFIG_ARMADA168
CONFIG_ARMV7_SECURE_BASE
CONFIG_ARMV7_SECURE_MAX_SIZE
CONFIG_ARMV7_SECURE_RESERVE_SIZE
CONFIG_ARMV8_SWITCH_TO_EL1
-CONFIG_ARM_ARCH_CP15_ERRATA
CONFIG_ARM_GIC_BASE_ADDRESS
-CONFIG_ARM_PL180_MMCI_BASE
-CONFIG_ARM_PL180_MMCI_CLOCK_FREQ
CONFIG_ARP_TIMEOUT
-CONFIG_ASTRO_COFDMDUOS2
-CONFIG_ASTRO_TWIN7S2
-CONFIG_ASTRO_V512
-CONFIG_ASTRO_V532
-CONFIG_ASTRO_V912
CONFIG_AT91C_PQFP_UHPBUG
CONFIG_AT91RESET_EXTRST
CONFIG_AT91RM9200
@@ -77,7 +52,6 @@
CONFIG_ATMEL_LEGACY
CONFIG_ATMEL_MCI_8BIT
CONFIG_ATMEL_SPI0
-CONFIG_AT_TRANS
CONFIG_AUTO_ZRELADDR
CONFIG_BACKSIDE_L2_CACHE
CONFIG_BCH_CONST_M
@@ -92,6 +66,7 @@
CONFIG_BL2_SIZE
CONFIG_BOARDDIR
CONFIG_BOARDNAME
+CONFIG_BOARDNAME_LOCAL
CONFIG_BOARD_COMMON
CONFIG_BOARD_ECC_SUPPORT
CONFIG_BOARD_IS_OPENRD_BASE
@@ -101,7 +76,6 @@
CONFIG_BOARD_POSTCLK_INIT
CONFIG_BOARD_SIZE_LIMIT
CONFIG_BOOGER
-CONFIG_BOOTBLOCK
CONFIG_BOOTFILE
CONFIG_BOOTMODE
CONFIG_BOOTP_
@@ -119,7 +93,6 @@
CONFIG_BOOTSCRIPT_COPY_RAM
CONFIG_BOOTSCRIPT_HDR_ADDR
CONFIG_BOOTSCRIPT_KEY_HASH
-CONFIG_BOOT_MODE_BIT
CONFIG_BOOT_RETRY_MIN
CONFIG_BOOT_RETRY_TIME
CONFIG_BPTR_VIRT_ADDR
@@ -132,7 +105,6 @@
CONFIG_BS_HDR_SIZE
CONFIG_BS_SIZE
CONFIG_BTB
-CONFIG_BUFNO_AUTO_INCR_BIT
CONFIG_BUILD_ENVCRC
CONFIG_BUS_WIDTH
CONFIG_CDP_APPLIANCE_VLAN_TYPE
@@ -166,7 +138,6 @@
CONFIG_CLOCK_SYNTHESIZER
CONFIG_CM922T_XA10
CONFIG_CMDLINE_PS_SUPPORT
-CONFIG_CMDLINE_TAG
CONFIG_CM_INIT
CONFIG_CM_MULTIPLE_SSRAM
CONFIG_CM_REMAP
@@ -175,7 +146,6 @@
CONFIG_CM_T3X
CONFIG_CM_T43
CONFIG_CM_TCRAM
-CONFIG_CNTL
CONFIG_COLDFIRE
CONFIG_COMMANDS
CONFIG_COMMON_BOOT
@@ -222,20 +192,6 @@
CONFIG_DCACHE
CONFIG_DCACHE_OFF
CONFIG_DCFG_ADDR
-CONFIG_DDR3
-CONFIG_DDR_2T_TIMING
-CONFIG_DDR_32BIT
-CONFIG_DDR_64BIT
-CONFIG_DDR_CLK_FREQ
-CONFIG_DDR_DEFAULT_CL
-CONFIG_DDR_ECC
-CONFIG_DDR_ECC_CMD
-CONFIG_DDR_ECC_INIT_VIA_DMA
-CONFIG_DDR_FIXED_SIZE
-CONFIG_DDR_II
-CONFIG_DDR_LOG_LEVEL
-CONFIG_DDR_MB
-CONFIG_DDR_SPD
CONFIG_DEBUG
CONFIG_DEBUG_FS
CONFIG_DEBUG_LED
@@ -266,38 +222,14 @@
CONFIG_DM9000_USE_16BIT
CONFIG_DMA_COHERENT
CONFIG_DMA_COHERENT_SIZE
-CONFIG_DMA_LPC32XX
CONFIG_DMA_NONCOHERENT
-CONFIG_DMA_REQ_BIT
CONFIG_DNET_AUTONEG_TIMEOUT
CONFIG_DP_DDR_CTRL
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
CONFIG_DP_DDR_NUM_CTRLS
CONFIG_DRAM_TIMINGS_
-CONFIG_DRIVER_AT91EMAC_PHYADDR
-CONFIG_DRIVER_AT91EMAC_QUIET
CONFIG_DRIVER_DM9000
CONFIG_DSP_CLUSTER_START
-CONFIG_DWC2_DFLT_SPEED_FULL
-CONFIG_DWC2_DMA_BURST_SIZE
-CONFIG_DWC2_DMA_ENABLE
-CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
-CONFIG_DWC2_HOST_NPERIO_TX_FIFO_SIZE
-CONFIG_DWC2_HOST_PERIO_TX_FIFO_SIZE
-CONFIG_DWC2_HOST_RX_FIFO_SIZE
-CONFIG_DWC2_I2C_ENABLE
-CONFIG_DWC2_IC_USB_CAP
-CONFIG_DWC2_MAX_CHANNELS
-CONFIG_DWC2_MAX_PACKET_COUNT
-CONFIG_DWC2_MAX_TRANSFER_SIZE
-CONFIG_DWC2_PHY_TYPE
-CONFIG_DWC2_PHY_ULPI_DDR
-CONFIG_DWC2_PHY_ULPI_EXT_VBUS
-CONFIG_DWC2_THR_CTL
-CONFIG_DWC2_TS_DLINE
-CONFIG_DWC2_TX_THR_LENGTH
-CONFIG_DWC2_ULPI_FS_LS
-CONFIG_DWC2_UTMI_WIDTH
CONFIG_DWCDDR21MCTL
CONFIG_DWCDDR21MCTL_BASE
CONFIG_DWC_AHSATA_BASE_ADDR
@@ -312,12 +244,6 @@
CONFIG_E300
CONFIG_E5500
CONFIG_ECC
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER
-CONFIG_ECC_MODE_MASK
-CONFIG_ECC_MODE_SHIFT
-CONFIG_ECC_SRAM_ADDR_MASK
-CONFIG_ECC_SRAM_ADDR_SHIFT
-CONFIG_ECC_SRAM_REQ_BIT
CONFIG_EDB9301
CONFIG_EDB93XX_INDUSTRIAL
CONFIG_EDB93XX_SDCS0
@@ -338,11 +264,8 @@
CONFIG_ENV_ADDR_FLEX
CONFIG_ENV_CALLBACK_LIST_DEFAULT
CONFIG_ENV_CALLBACK_LIST_STATIC
-CONFIG_ENV_COMMON_BOOT
-CONFIG_ENV_EEPROM_IS_ON_I2C
CONFIG_ENV_FLAGS_LIST_DEFAULT
CONFIG_ENV_FLAGS_LIST_STATIC
-CONFIG_ENV_FLASHBOOT
CONFIG_ENV_IS_EMBEDDED
CONFIG_ENV_IS_IN_
CONFIG_ENV_MAX_ENTRIES
@@ -358,8 +281,6 @@
CONFIG_ENV_SIZE_FLEX
CONFIG_ENV_SROM_BANK
CONFIG_ENV_TOTAL_SIZE
-CONFIG_ENV_UBIFS_OPTION
-CONFIG_ENV_UBI_MTD
CONFIG_ENV_VERSION
CONFIG_EPH_POWER_EN
CONFIG_EPOLL
@@ -370,22 +291,15 @@
CONFIG_ESDHC_HC_BLK_ADDR
CONFIG_ESPRESSO7420
CONFIG_ET1100_BASE
+CONFIG_ETH1ADDR
+CONFIG_ETH2ADDR
CONFIG_ETHADDR
CONFIG_ETHBASE
-CONFIG_ETHER_INDEX
-CONFIG_ETHER_NONE
-CONFIG_ETHER_ON_FCC
-CONFIG_ETHER_ON_FCC1
-CONFIG_ETHER_ON_FCC2
-CONFIG_ETHER_ON_FCC3
CONFIG_ETHPRIME
CONFIG_ETH_BUFSIZE
CONFIG_ETH_RXSIZE
CONFIG_EXTRA_CLOCK
CONFIG_EXTRA_ENV
-CONFIG_EXTRA_ENV_BOARD_SETTINGS
-CONFIG_EXTRA_ENV_ITB
-CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS
CONFIG_EXTRA_ENV_SETTINGS
CONFIG_EXTRA_ENV_SETTINGS_COMMON
CONFIG_EXT_AHB2AHB_BASE
@@ -410,7 +324,6 @@
CONFIG_EXYNOS_SPL
CONFIG_EXYNOS_TMU
CONFIG_FACTORYSET
-CONFIG_FAST_FLASH_BIT
CONFIG_FB_ADDR
CONFIG_FB_BACKLIGHT
CONFIG_FB_DEFERRED_IO
@@ -455,7 +368,6 @@
CONFIG_FSL_DEVICE_DISABLE
CONFIG_FSL_DIU_CH7301
CONFIG_FSL_DIU_FB
-CONFIG_FSL_DMA
CONFIG_FSL_DSPI1
CONFIG_FSL_ESDHC_PIN_MUX
CONFIG_FSL_FIXED_MMC_LOCATION
@@ -467,6 +379,7 @@
CONFIG_FSL_LBC
CONFIG_FSL_MEMAC
CONFIG_FSL_NGPIXIS
+CONFIG_FSL_PCI_INIT
CONFIG_FSL_PMIC_BITLEN
CONFIG_FSL_PMIC_BUS
CONFIG_FSL_PMIC_CLK
@@ -520,7 +433,6 @@
CONFIG_FTWDT010_WATCHDOG
CONFIG_FZOTG266HD0A_BASE
CONFIG_GATEWAYIP
-CONFIG_GICV2
CONFIG_GLOBAL_DATA_NOT_REG10
CONFIG_GLOBAL_TIMER
CONFIG_GMII
@@ -541,7 +453,6 @@
CONFIG_HAS_FEC
CONFIG_HAS_FSL_DR_USB
CONFIG_HAS_FSL_MPH_USB
-CONFIG_HDBOOT
CONFIG_HDMI_ENCODER_I2C_ADDR
CONFIG_HETROGENOUS_CLUSTERS
CONFIG_HIDE_LOGO_VERSION
@@ -694,7 +605,6 @@
CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP
CONFIG_HSMMC2_8BIT
CONFIG_HUSH_INIT_VAR
-CONFIG_HVBOOT
CONFIG_HWCONFIG
CONFIG_HW_ENV_SETTINGS
CONFIG_I2C_ENV_EEPROM_BUS
@@ -718,15 +628,12 @@
CONFIG_IDE_PREINIT
CONFIG_IDE_RESET
CONFIG_IDE_SWAP_IO
-CONFIG_ID_EEPROM
CONFIG_IMA
CONFIG_IMX
CONFIG_IMX6_PWM_PER_CLK
CONFIG_IMX_HDMI
-CONFIG_IMX_NAND
CONFIG_IMX_VIDEO_SKIP
CONFIG_INETSPACE_V2
-CONFIG_INITRD_TAG
CONFIG_INIT_IGNORE_ERROR
CONFIG_INI_ALLOW_MULTILINE
CONFIG_INI_CASE_INSENSITIVE
@@ -741,6 +648,8 @@
CONFIG_IOS
CONFIG_IO_TRACE
CONFIG_IPADDR
+CONFIG_IPADDR1
+CONFIG_IPADDR2
CONFIG_IPROC
CONFIG_IRAM_BASE
CONFIG_IRAM_END
@@ -757,7 +666,6 @@
CONFIG_JFFS2_SUMMARY
CONFIG_JRSTARTR_JR0
CONFIG_JTAG_CONSOLE
-CONFIG_KCLK_DIS
CONFIG_KEEP_SERVERADDR
CONFIG_KEYBOARD
CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE
@@ -770,7 +678,6 @@
CONFIG_KIRKWOOD_GPIO
CONFIG_KIRKWOOD_PCIE_INIT
CONFIG_KIRKWOOD_RGMII_PAD_1V8
-CONFIG_KIRQ_EN
CONFIG_KM8321
CONFIG_KMTEGR1
CONFIG_KM_BOARD_EXTRA_ENV
@@ -856,10 +763,8 @@
CONFIG_LD9040
CONFIG_LEGACY
CONFIG_LEGACY_BOOTCMD_ENV
-CONFIG_LINUX
CONFIG_LITTLETON_LCD
CONFIG_LMS283GF05
-CONFIG_LOADADDR
CONFIG_LOADS_ECHO
CONFIG_LOWPOWER_ADDR
CONFIG_LOWPOWER_FLAG
@@ -896,8 +801,6 @@
CONFIG_M5301x
CONFIG_MACB_SEARCH_PHY
CONFIG_MACH_OMAPL138_LCDK
-CONFIG_MACH_TYPE
-CONFIG_MACH_TYPE_COMPAT_REV
CONFIG_MACRESET_TIMEOUT
CONFIG_MALLOC_F_ADDR
CONFIG_MALTA
@@ -913,11 +816,8 @@
CONFIG_MCF5253
CONFIG_MCFRTC
CONFIG_MCFTMR
-CONFIG_MCLK_DIS
CONFIG_MDIO_TIMEOUT
-CONFIG_MEMSIZE
CONFIG_MEMSIZE_IN_BYTES
-CONFIG_MEMSIZE_MASK
CONFIG_MEM_HOLE_16M
CONFIG_MEM_INIT_VALUE
CONFIG_MEM_REMAP
@@ -926,13 +826,11 @@
CONFIG_MII_INIT
CONFIG_MIPS_HUGE_TLB_SUPPORT
CONFIG_MIPS_MT_FPAFF
-CONFIG_MIRQ_EN
CONFIG_MISC_COMMON
CONFIG_MIU_1BIT_INTERLEAVED
CONFIG_MIU_2BIT_21_7_INTERLEAVED
CONFIG_MIU_2BIT_INTERLEAVED
CONFIG_MIU_LINEAR
-CONFIG_MMCBOOTCOMMAND
CONFIG_MMCROOT
CONFIG_MMC_DEFAULT_DEV
CONFIG_MMC_RPMB_TRACE
@@ -1054,8 +952,6 @@
CONFIG_ORIGEN
CONFIG_OTHBOOTARGS
CONFIG_OVERWRITE_ETHADDR_ONCE
-CONFIG_PAGE_CNT_MASK
-CONFIG_PAGE_CNT_SHIFT
CONFIG_PALMAS_AUDPWR
CONFIG_PALMAS_POWER
CONFIG_PALMAS_SMPS7_FPWM
@@ -1080,6 +976,7 @@
CONFIG_PCI_EHCI_DEVICE
CONFIG_PCI_EHCI_DEVNO
CONFIG_PCI_GT64120
+CONFIG_PCI_INDIRECT_BRIDGE
CONFIG_PCI_IO_BUS
CONFIG_PCI_IO_PHYS
CONFIG_PCI_IO_SIZE
@@ -1129,11 +1026,9 @@
CONFIG_POST_SKIP_ENV_FLAGS
CONFIG_POST_UART
CONFIG_POST_WATCHDOG
-CONFIG_POWER
CONFIG_POWER_FSL
CONFIG_POWER_FSL_MC13892
CONFIG_POWER_HI6553
-CONFIG_POWER_I2C
CONFIG_POWER_LTC3676
CONFIG_POWER_LTC3676_I2C_ADDR
CONFIG_POWER_MAX77696_I2C_ADDR
@@ -1155,7 +1050,6 @@
CONFIG_PROC_FS
CONFIG_PROFILE_ALL_BRANCHES
CONFIG_PROFILING
-CONFIG_PROOF_POINTS
CONFIG_PSRAM_SCFG
CONFIG_PWM
CONFIG_PXA_LCD
@@ -1169,7 +1063,7 @@
CONFIG_QUOTA
CONFIG_RAMBOOTCOMMAND
CONFIG_RAMBOOT_NAND
-CONFIG_RAMBOOT_PBL
+CONFIG_RAMBOOT_SDCARD
CONFIG_RAMBOOT_SPIFLASH
CONFIG_RAMBOOT_TEXT_BASE
CONFIG_RAMDISKFILE
@@ -1180,11 +1074,9 @@
CONFIG_RED_LED
CONFIG_REG
CONFIG_REG_0
-CONFIG_REG_1_BASE
CONFIG_REG_2
CONFIG_REG_3
CONFIG_REG_8
-CONFIG_REG_APER_SIZE
CONFIG_REMAKE_ELF
CONFIG_REQ
CONFIG_RESERVED_01_BASE
@@ -1196,7 +1088,6 @@
CONFIG_RESET_VECTOR_ADDRESS
CONFIG_RESTORE_FLASH
CONFIG_RES_BLOCK_SIZE
-CONFIG_REVISION_TAG
CONFIG_RMII
CONFIG_RMSTP0_ENA
CONFIG_RMSTP10_ENA
@@ -1237,7 +1128,6 @@
CONFIG_S5PC110
CONFIG_S5P_PA_SYSRAM
CONFIG_S6E8AX0
-CONFIG_SABRELITE
CONFIG_SAMA5D3_LCD_BASE
CONFIG_SAMSUNG
CONFIG_SAMSUNG_ONENAND
@@ -1270,15 +1160,11 @@
CONFIG_SERIAL_HW_FLOW_CONTROL
CONFIG_SERIAL_MULTI
CONFIG_SERIAL_SOFTWARE_FIFO
-CONFIG_SERIAL_TAG
CONFIG_SERIRQ_CONTINUOUS_MODE
CONFIG_SERVERIP
CONFIG_SETUP_INITRD_TAG
-CONFIG_SETUP_MEMORY_TAGS
-CONFIG_SET_BIST
CONFIG_SET_BOOTARGS
CONFIG_SET_DFU_ALT_BUF_LEN
-CONFIG_SFIO
CONFIG_SGI_IP28
CONFIG_SH73A0
CONFIG_SH7751_PCI
@@ -1296,19 +1182,12 @@
CONFIG_SH_ETHER_SH7734_MII
CONFIG_SH_ETHER_USE_PORT
CONFIG_SH_GPIO_PFC
-CONFIG_SH_I2C_8BIT
-CONFIG_SH_I2C_CLOCK
-CONFIG_SH_I2C_DATA_HIGH
-CONFIG_SH_I2C_DATA_LOW
CONFIG_SH_MMCIF_CLK
CONFIG_SH_QSPI_BASE
CONFIG_SH_SCIF_CLK_FREQ
CONFIG_SH_SDHI_FREQ
CONFIG_SH_SDRAM_OFFSET
-CONFIG_SIEMENS_MACH_TYPE
CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
-CONFIG_SKIP_LOWLEVEL_INIT
-CONFIG_SKIP_LOWLEVEL_INIT_ONLY
CONFIG_SKIP_TRUNOFF_WATCHDOG
CONFIG_SLIC
CONFIG_SLTTMR
@@ -1446,7 +1325,6 @@
CONFIG_SYS_AMASK5
CONFIG_SYS_AMASK6
CONFIG_SYS_AMASK7
-CONFIG_SYS_AT91_CPU_NAME
CONFIG_SYS_AT91_MAIN_CLOCK
CONFIG_SYS_AT91_PLLA
CONFIG_SYS_AT91_PLLB
@@ -1459,10 +1337,6 @@
CONFIG_SYS_ATA_PORT_ADDR
CONFIG_SYS_ATA_REG_OFFSET
CONFIG_SYS_ATA_STRIDE
-CONFIG_SYS_ATI_REV_A11
-CONFIG_SYS_ATI_REV_A12
-CONFIG_SYS_ATI_REV_A13
-CONFIG_SYS_ATI_REV_ID_MASK
CONFIG_SYS_ATMEL_CPU_NAME
CONFIG_SYS_AUTOLOAD
CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
@@ -1528,12 +1402,6 @@
CONFIG_SYS_CMD_IAS
CONFIG_SYS_CMD_INT
CONFIG_SYS_CMD_SUSPEND
-CONFIG_SYS_CMXFCR_MASK1
-CONFIG_SYS_CMXFCR_MASK2
-CONFIG_SYS_CMXFCR_MASK3
-CONFIG_SYS_CMXFCR_VALUE1
-CONFIG_SYS_CMXFCR_VALUE2
-CONFIG_SYS_CMXFCR_VALUE3
CONFIG_SYS_CORE_SRAM
CONFIG_SYS_CORE_SRAM_SIZE
CONFIG_SYS_CPC_REINIT_F
@@ -1548,7 +1416,6 @@
CONFIG_SYS_CPLD_FTIM2
CONFIG_SYS_CPLD_FTIM3
CONFIG_SYS_CPLD_SIZE
-CONFIG_SYS_CPMFCR_RAMTYPE
CONFIG_SYS_CPM_INTERRUPT
CONFIG_SYS_CPRI
CONFIG_SYS_CPRI_CLK
@@ -1800,7 +1667,6 @@
CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
CONFIG_SYS_DEFAULT_VIDEO_MODE
-CONFIG_SYS_DEF_EEPROM_ADDR
CONFIG_SYS_DIALOG_PMIC_I2C_ADDR
CONFIG_SYS_DIMM_SLOTS_PER_CTLR
CONFIG_SYS_DIRECT_FLASH_NFS
@@ -1846,7 +1712,6 @@
CONFIG_SYS_FAST_CLK
CONFIG_SYS_FAULT_ECHO_LINK_DOWN
CONFIG_SYS_FAULT_MII_ADDR
-CONFIG_SYS_FCC_PSMR
CONFIG_SYS_FDT_BASE
CONFIG_SYS_FDT_LOAD_ADDR
CONFIG_SYS_FDT_PAD
@@ -2074,18 +1939,6 @@
CONFIG_SYS_FSL_FMAN_ADDR
CONFIG_SYS_FSL_GUTS_ADDR
CONFIG_SYS_FSL_I2C
-CONFIG_SYS_FSL_I2C2_OFFSET
-CONFIG_SYS_FSL_I2C2_SLAVE
-CONFIG_SYS_FSL_I2C2_SPEED
-CONFIG_SYS_FSL_I2C3_OFFSET
-CONFIG_SYS_FSL_I2C3_SLAVE
-CONFIG_SYS_FSL_I2C3_SPEED
-CONFIG_SYS_FSL_I2C4_OFFSET
-CONFIG_SYS_FSL_I2C4_SLAVE
-CONFIG_SYS_FSL_I2C4_SPEED
-CONFIG_SYS_FSL_I2C_OFFSET
-CONFIG_SYS_FSL_I2C_SLAVE
-CONFIG_SYS_FSL_I2C_SPEED
CONFIG_SYS_FSL_IFC_BASE
CONFIG_SYS_FSL_IFC_BASE1
CONFIG_SYS_FSL_IFC_BASE2
@@ -2113,8 +1966,6 @@
CONFIG_SYS_FSL_OCRAM_SIZE
CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
CONFIG_SYS_FSL_PAMU_OFFSET
-CONFIG_SYS_FSL_PBL_PBI
-CONFIG_SYS_FSL_PBL_RCW
CONFIG_SYS_FSL_PCIE_COMPAT
CONFIG_SYS_FSL_PCI_VER_3_X
CONFIG_SYS_FSL_PEBUF_BASE
@@ -2298,52 +2149,23 @@
CONFIG_SYS_I2C_DIRECT_BUS
CONFIG_SYS_I2C_DVI_ADDR
CONFIG_SYS_I2C_DVI_BUS_NUM
-CONFIG_SYS_I2C_EARLY_INIT
CONFIG_SYS_I2C_EEPROM_CCID
CONFIG_SYS_I2C_EEPROM_NXID
-CONFIG_SYS_I2C_EEPROM_NXID_MAC
CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS
CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS
CONFIG_SYS_I2C_EXPANDER_ADDR
CONFIG_SYS_I2C_FPGA_ADDR
CONFIG_SYS_I2C_FRAM
CONFIG_SYS_I2C_G762_ADDR
+CONFIG_SYS_I2C_IDT6V49205B
CONFIG_SYS_I2C_IFDR_DIV
-CONFIG_SYS_I2C_IHS_CH0
-CONFIG_SYS_I2C_IHS_CH1
-CONFIG_SYS_I2C_IHS_CH2
-CONFIG_SYS_I2C_IHS_CH3
-CONFIG_SYS_I2C_IHS_DUAL
-CONFIG_SYS_I2C_IHS_SLAVE_0
-CONFIG_SYS_I2C_IHS_SLAVE_0_1
-CONFIG_SYS_I2C_IHS_SLAVE_1
-CONFIG_SYS_I2C_IHS_SLAVE_1_1
-CONFIG_SYS_I2C_IHS_SLAVE_2
-CONFIG_SYS_I2C_IHS_SLAVE_2_1
-CONFIG_SYS_I2C_IHS_SLAVE_3
-CONFIG_SYS_I2C_IHS_SLAVE_3_1
-CONFIG_SYS_I2C_IHS_SPEED_0
-CONFIG_SYS_I2C_IHS_SPEED_0_1
-CONFIG_SYS_I2C_IHS_SPEED_1
-CONFIG_SYS_I2C_IHS_SPEED_1_1
-CONFIG_SYS_I2C_IHS_SPEED_2
-CONFIG_SYS_I2C_IHS_SPEED_2_1
-CONFIG_SYS_I2C_IHS_SPEED_3
-CONFIG_SYS_I2C_IHS_SPEED_3_1
CONFIG_SYS_I2C_INIT_BOARD
CONFIG_SYS_I2C_LDI_ADDR
-CONFIG_SYS_I2C_LEGACY
CONFIG_SYS_I2C_LPC32XX_SLAVE
CONFIG_SYS_I2C_LPC32XX_SPEED
-CONFIG_SYS_I2C_MAC1_BUS
-CONFIG_SYS_I2C_MAC1_CHIP_ADDR
-CONFIG_SYS_I2C_MAC1_DATA_ADDR
-CONFIG_SYS_I2C_MAC2_BUS
-CONFIG_SYS_I2C_MAC2_CHIP_ADDR
-CONFIG_SYS_I2C_MAC2_DATA_ADDR
CONFIG_SYS_I2C_MAX_HOPS
+CONFIG_SYS_I2C_NCT72_ADDR
CONFIG_SYS_I2C_NOPROBES
-CONFIG_SYS_I2C_OFFSET
CONFIG_SYS_I2C_PCA953X_ADDR
CONFIG_SYS_I2C_PCA953X_WIDTH
CONFIG_SYS_I2C_PCA9557_ADDR
@@ -2353,53 +2175,6 @@
CONFIG_SYS_I2C_PXA
CONFIG_SYS_I2C_QIXIS_ADDR
CONFIG_SYS_I2C_RTC_ADDR
-CONFIG_SYS_I2C_S3C24X0_SLAVE
-CONFIG_SYS_I2C_S3C24X0_SPEED
-CONFIG_SYS_I2C_SH
-CONFIG_SYS_I2C_SH_BASE0
-CONFIG_SYS_I2C_SH_BASE1
-CONFIG_SYS_I2C_SH_BASE2
-CONFIG_SYS_I2C_SH_BASE3
-CONFIG_SYS_I2C_SH_BASE4
-CONFIG_SYS_I2C_SH_NUM_CONTROLLERS
-CONFIG_SYS_I2C_SH_SPEED0
-CONFIG_SYS_I2C_SH_SPEED1
-CONFIG_SYS_I2C_SH_SPEED2
-CONFIG_SYS_I2C_SH_SPEED3
-CONFIG_SYS_I2C_SH_SPEED4
-CONFIG_SYS_I2C_SLAVE
-CONFIG_SYS_I2C_SLAVE1
-CONFIG_SYS_I2C_SLAVE2
-CONFIG_SYS_I2C_SLAVE3
-CONFIG_SYS_I2C_SOFT
-CONFIG_SYS_I2C_SOFT_SLAVE
-CONFIG_SYS_I2C_SOFT_SLAVE_10
-CONFIG_SYS_I2C_SOFT_SLAVE_11
-CONFIG_SYS_I2C_SOFT_SLAVE_12
-CONFIG_SYS_I2C_SOFT_SLAVE_2
-CONFIG_SYS_I2C_SOFT_SLAVE_3
-CONFIG_SYS_I2C_SOFT_SLAVE_4
-CONFIG_SYS_I2C_SOFT_SLAVE_5
-CONFIG_SYS_I2C_SOFT_SLAVE_6
-CONFIG_SYS_I2C_SOFT_SLAVE_7
-CONFIG_SYS_I2C_SOFT_SLAVE_8
-CONFIG_SYS_I2C_SOFT_SLAVE_9
-CONFIG_SYS_I2C_SOFT_SPEED
-CONFIG_SYS_I2C_SOFT_SPEED_10
-CONFIG_SYS_I2C_SOFT_SPEED_11
-CONFIG_SYS_I2C_SOFT_SPEED_12
-CONFIG_SYS_I2C_SOFT_SPEED_2
-CONFIG_SYS_I2C_SOFT_SPEED_3
-CONFIG_SYS_I2C_SOFT_SPEED_4
-CONFIG_SYS_I2C_SOFT_SPEED_5
-CONFIG_SYS_I2C_SOFT_SPEED_6
-CONFIG_SYS_I2C_SOFT_SPEED_7
-CONFIG_SYS_I2C_SOFT_SPEED_8
-CONFIG_SYS_I2C_SOFT_SPEED_9
-CONFIG_SYS_I2C_SPEED
-CONFIG_SYS_I2C_SPEED1
-CONFIG_SYS_I2C_SPEED2
-CONFIG_SYS_I2C_SPEED3
CONFIG_SYS_I2C_TCA642X_ADDR
CONFIG_SYS_I2C_TCA642X_BUS_NUM
CONFIG_SYS_IBAT0L
@@ -2484,7 +2259,6 @@
CONFIG_SYS_LIME_SIZE
CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE
CONFIG_SYS_LOADS_BAUD_CHANGE
-CONFIG_SYS_LOAD_ADDR
CONFIG_SYS_LOW
CONFIG_SYS_LOWMEM_BASE
CONFIG_SYS_LOW_RES_TIMER
@@ -2760,14 +2534,6 @@
CONFIG_SYS_OBIR
CONFIG_SYS_OHCI_BE_CONTROLLER
CONFIG_SYS_OHCI_SWAP_REG_ACCESS
-CONFIG_SYS_OMAP24_I2C_SLAVE1
-CONFIG_SYS_OMAP24_I2C_SLAVE2
-CONFIG_SYS_OMAP24_I2C_SLAVE3
-CONFIG_SYS_OMAP24_I2C_SLAVE4
-CONFIG_SYS_OMAP24_I2C_SPEED1
-CONFIG_SYS_OMAP24_I2C_SPEED2
-CONFIG_SYS_OMAP24_I2C_SPEED3
-CONFIG_SYS_OMAP24_I2C_SPEED4
CONFIG_SYS_OMAP_ABE_SYSCK
CONFIG_SYS_ONENAND_BASE
CONFIG_SYS_ONENAND_BLOCK_SIZE
@@ -2828,10 +2594,12 @@
CONFIG_SYS_PCIE1_CFG_BASE
CONFIG_SYS_PCIE1_CFG_SIZE
CONFIG_SYS_PCIE1_IO_BASE
+CONFIG_SYS_PCIE1_IO_BUS
CONFIG_SYS_PCIE1_IO_PHYS
CONFIG_SYS_PCIE1_IO_SIZE
CONFIG_SYS_PCIE1_IO_VIRT
CONFIG_SYS_PCIE1_MEM_BASE
+CONFIG_SYS_PCIE1_MEM_BUS
CONFIG_SYS_PCIE1_MEM_PHYS
CONFIG_SYS_PCIE1_MEM_SIZE
CONFIG_SYS_PCIE1_MEM_VIRT
@@ -2845,10 +2613,12 @@
CONFIG_SYS_PCIE2_CFG_BASE
CONFIG_SYS_PCIE2_CFG_SIZE
CONFIG_SYS_PCIE2_IO_BASE
+CONFIG_SYS_PCIE2_IO_BUS
CONFIG_SYS_PCIE2_IO_PHYS
CONFIG_SYS_PCIE2_IO_SIZE
CONFIG_SYS_PCIE2_IO_VIRT
CONFIG_SYS_PCIE2_MEM_BASE
+CONFIG_SYS_PCIE2_MEM_BUS
CONFIG_SYS_PCIE2_MEM_PHYS
CONFIG_SYS_PCIE2_MEM_SIZE
CONFIG_SYS_PCIE2_MEM_VIRT
@@ -3173,6 +2943,7 @@
CONFIG_SYS_SXCNFG_VAL
CONFIG_SYS_TBIPA_VALUE
CONFIG_SYS_TCLK
+CONFIG_SYS_TEXT_BASE_NOR
CONFIG_SYS_TIMERBASE
CONFIG_SYS_TIMER_BASE
CONFIG_SYS_TIMER_COUNTER
@@ -3255,7 +3026,6 @@
CONFIG_SYS_VCXK_RESET_DDR
CONFIG_SYS_VCXK_RESET_PIN
CONFIG_SYS_VCXK_RESET_PORT
-CONFIG_SYS_VGA_RAM_EN
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE
CONFIG_SYS_VSC7385_BASE
CONFIG_SYS_VSC7385_BASE_PHYS
@@ -3269,7 +3039,6 @@
CONFIG_SYS_XHCI_USB2_ADDR
CONFIG_SYS_XHCI_USB3_ADDR
CONFIG_SYS_XIMG_LEN
-CONFIG_SYS_i2C_FSL
CONFIG_TAM3517_SETTINGS
CONFIG_TCA642X
CONFIG_TEGRA_BOARD_STRING
@@ -3319,7 +3088,6 @@
CONFIG_TWL6030_POWER
CONFIG_TX_DESCR_NUM
CONFIG_TZSW_RESERVED_DRAM_SIZE
-CONFIG_UBIBLOCK
CONFIG_UBIFS_VOLUME
CONFIG_UBI_PART
CONFIG_UBI_SIZE
@@ -3327,6 +3095,8 @@
CONFIG_UBOOT_ENABLE_PADS_ALL
CONFIG_UBOOT_SECTOR_COUNT
CONFIG_UBOOT_SECTOR_START
+CONFIG_UCP1020
+CONFIG_UCP1020_REV_1_3
CONFIG_UDP_CHECKSUM
CONFIG_UEC_ETH
CONFIG_UEC_ETH1
@@ -3423,7 +3193,6 @@
CONFIG_VAL
CONFIG_VAR_SIZE_SPL
CONFIG_VERY_BIG_RAM
-CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
CONFIG_VIDEO_BCM2835
CONFIG_VIDEO_BMP_LOGO
CONFIG_VIDEO_DA8XX
diff --git a/scripts/spdxcheck.py b/scripts/spdxcheck.py
new file mode 100755
index 0000000..3e784cf
--- /dev/null
+++ b/scripts/spdxcheck.py
@@ -0,0 +1,296 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: GPL-2.0
+# Copyright Thomas Gleixner <tglx@linutronix.de>
+
+from argparse import ArgumentParser
+from ply import lex, yacc
+import locale
+import traceback
+import sys
+import git
+import re
+import os
+
+class ParserException(Exception):
+ def __init__(self, tok, txt):
+ self.tok = tok
+ self.txt = txt
+
+class SPDXException(Exception):
+ def __init__(self, el, txt):
+ self.el = el
+ self.txt = txt
+
+class SPDXdata(object):
+ def __init__(self):
+ self.license_files = 0
+ self.exception_files = 0
+ self.licenses = [ ]
+ self.exceptions = { }
+
+# Read the spdx data from the LICENSES directory
+def read_spdxdata(repo):
+
+ # The subdirectories of LICENSES in the kernel source
+ # Note: exceptions needs to be parsed as last directory.
+ license_dirs = [ "preferred", "dual", "deprecated", "exceptions" ]
+ lictree = repo.head.commit.tree['LICENSES']
+
+ spdx = SPDXdata()
+
+ for d in license_dirs:
+ for el in lictree[d].traverse():
+ if not os.path.isfile(el.path):
+ continue
+
+ exception = None
+ for l in open(el.path).readlines():
+ if l.startswith('Valid-License-Identifier:'):
+ lid = l.split(':')[1].strip().upper()
+ if lid in spdx.licenses:
+ raise SPDXException(el, 'Duplicate License Identifier: %s' %lid)
+ else:
+ spdx.licenses.append(lid)
+
+ elif l.startswith('SPDX-Exception-Identifier:'):
+ exception = l.split(':')[1].strip().upper()
+ spdx.exceptions[exception] = []
+
+ elif l.startswith('SPDX-Licenses:'):
+ for lic in l.split(':')[1].upper().strip().replace(' ', '').replace('\t', '').split(','):
+ if not lic in spdx.licenses:
+ raise SPDXException(None, 'Exception %s missing license %s' %(exception, lic))
+ spdx.exceptions[exception].append(lic)
+
+ elif l.startswith("License-Text:"):
+ if exception:
+ if not len(spdx.exceptions[exception]):
+ raise SPDXException(el, 'Exception %s is missing SPDX-Licenses' %exception)
+ spdx.exception_files += 1
+ else:
+ spdx.license_files += 1
+ break
+ return spdx
+
+class id_parser(object):
+
+ reserved = [ 'AND', 'OR', 'WITH' ]
+ tokens = [ 'LPAR', 'RPAR', 'ID', 'EXC' ] + reserved
+
+ precedence = ( ('nonassoc', 'AND', 'OR'), )
+
+ t_ignore = ' \t'
+
+ def __init__(self, spdx):
+ self.spdx = spdx
+ self.lasttok = None
+ self.lastid = None
+ self.lexer = lex.lex(module = self, reflags = re.UNICODE)
+ # Initialize the parser. No debug file and no parser rules stored on disk
+ # The rules are small enough to be generated on the fly
+ self.parser = yacc.yacc(module = self, write_tables = False, debug = False)
+ self.lines_checked = 0
+ self.checked = 0
+ self.spdx_valid = 0
+ self.spdx_errors = 0
+ self.curline = 0
+ self.deepest = 0
+
+ # Validate License and Exception IDs
+ def validate(self, tok):
+ id = tok.value.upper()
+ if tok.type == 'ID':
+ if not id in self.spdx.licenses:
+ raise ParserException(tok, 'Invalid License ID')
+ self.lastid = id
+ elif tok.type == 'EXC':
+ if id not in self.spdx.exceptions:
+ raise ParserException(tok, 'Invalid Exception ID')
+ if self.lastid not in self.spdx.exceptions[id]:
+ raise ParserException(tok, 'Exception not valid for license %s' %self.lastid)
+ self.lastid = None
+ elif tok.type != 'WITH':
+ self.lastid = None
+
+ # Lexer functions
+ def t_RPAR(self, tok):
+ r'\)'
+ self.lasttok = tok.type
+ return tok
+
+ def t_LPAR(self, tok):
+ r'\('
+ self.lasttok = tok.type
+ return tok
+
+ def t_ID(self, tok):
+ r'[A-Za-z.0-9\-+]+'
+
+ if self.lasttok == 'EXC':
+ print(tok)
+ raise ParserException(tok, 'Missing parentheses')
+
+ tok.value = tok.value.strip()
+ val = tok.value.upper()
+
+ if val in self.reserved:
+ tok.type = val
+ elif self.lasttok == 'WITH':
+ tok.type = 'EXC'
+
+ self.lasttok = tok.type
+ self.validate(tok)
+ return tok
+
+ def t_error(self, tok):
+ raise ParserException(tok, 'Invalid token')
+
+ def p_expr(self, p):
+ '''expr : ID
+ | ID WITH EXC
+ | expr AND expr
+ | expr OR expr
+ | LPAR expr RPAR'''
+ pass
+
+ def p_error(self, p):
+ if not p:
+ raise ParserException(None, 'Unfinished license expression')
+ else:
+ raise ParserException(p, 'Syntax error')
+
+ def parse(self, expr):
+ self.lasttok = None
+ self.lastid = None
+ self.parser.parse(expr, lexer = self.lexer)
+
+ def parse_lines(self, fd, maxlines, fname):
+ self.checked += 1
+ self.curline = 0
+ try:
+ for line in fd:
+ line = line.decode(locale.getpreferredencoding(False), errors='ignore')
+ self.curline += 1
+ if self.curline > maxlines:
+ break
+ self.lines_checked += 1
+ if line.find("SPDX-License-Identifier:") < 0:
+ continue
+ expr = line.split(':')[1].strip()
+ # Remove trailing comment closure
+ if line.strip().endswith('*/'):
+ expr = expr.rstrip('*/').strip()
+ # Remove trailing xml comment closure
+ if line.strip().endswith('-->'):
+ expr = expr.rstrip('-->').strip()
+ # Special case for SH magic boot code files
+ if line.startswith('LIST \"'):
+ expr = expr.rstrip('\"').strip()
+ self.parse(expr)
+ self.spdx_valid += 1
+ #
+ # Should we check for more SPDX ids in the same file and
+ # complain if there are any?
+ #
+ break
+
+ except ParserException as pe:
+ if pe.tok:
+ col = line.find(expr) + pe.tok.lexpos
+ tok = pe.tok.value
+ sys.stdout.write('%s: %d:%d %s: %s\n' %(fname, self.curline, col, pe.txt, tok))
+ else:
+ sys.stdout.write('%s: %d:0 %s\n' %(fname, self.curline, col, pe.txt))
+ self.spdx_errors += 1
+
+def scan_git_tree(tree):
+ for el in tree.traverse():
+ # Exclude stuff which would make pointless noise
+ # FIXME: Put this somewhere more sensible
+ if el.path.startswith("LICENSES"):
+ continue
+ if el.path.find("license-rules.rst") >= 0:
+ continue
+ if not os.path.isfile(el.path):
+ continue
+ with open(el.path, 'rb') as fd:
+ parser.parse_lines(fd, args.maxlines, el.path)
+
+def scan_git_subtree(tree, path):
+ for p in path.strip('/').split('/'):
+ tree = tree[p]
+ scan_git_tree(tree)
+
+if __name__ == '__main__':
+
+ ap = ArgumentParser(description='SPDX expression checker')
+ ap.add_argument('path', nargs='*', help='Check path or file. If not given full git tree scan. For stdin use "-"')
+ ap.add_argument('-m', '--maxlines', type=int, default=15,
+ help='Maximum number of lines to scan in a file. Default 15')
+ ap.add_argument('-v', '--verbose', action='store_true', help='Verbose statistics output')
+ args = ap.parse_args()
+
+ # Sanity check path arguments
+ if '-' in args.path and len(args.path) > 1:
+ sys.stderr.write('stdin input "-" must be the only path argument\n')
+ sys.exit(1)
+
+ try:
+ # Use git to get the valid license expressions
+ repo = git.Repo(os.getcwd())
+ assert not repo.bare
+
+ # Initialize SPDX data
+ spdx = read_spdxdata(repo)
+
+ # Initialize the parser
+ parser = id_parser(spdx)
+
+ except SPDXException as se:
+ if se.el:
+ sys.stderr.write('%s: %s\n' %(se.el.path, se.txt))
+ else:
+ sys.stderr.write('%s\n' %se.txt)
+ sys.exit(1)
+
+ except Exception as ex:
+ sys.stderr.write('FAIL: %s\n' %ex)
+ sys.stderr.write('%s\n' %traceback.format_exc())
+ sys.exit(1)
+
+ try:
+ if len(args.path) and args.path[0] == '-':
+ stdin = os.fdopen(sys.stdin.fileno(), 'rb')
+ parser.parse_lines(stdin, args.maxlines, '-')
+ else:
+ if args.path:
+ for p in args.path:
+ if os.path.isfile(p):
+ parser.parse_lines(open(p, 'rb'), args.maxlines, p)
+ elif os.path.isdir(p):
+ scan_git_subtree(repo.head.reference.commit.tree, p)
+ else:
+ sys.stderr.write('path %s does not exist\n' %p)
+ sys.exit(1)
+ else:
+ # Full git tree scan
+ scan_git_tree(repo.head.commit.tree)
+
+ if args.verbose:
+ sys.stderr.write('\n')
+ sys.stderr.write('License files: %12d\n' %spdx.license_files)
+ sys.stderr.write('Exception files: %12d\n' %spdx.exception_files)
+ sys.stderr.write('License IDs %12d\n' %len(spdx.licenses))
+ sys.stderr.write('Exception IDs %12d\n' %len(spdx.exceptions))
+ sys.stderr.write('\n')
+ sys.stderr.write('Files checked: %12d\n' %parser.checked)
+ sys.stderr.write('Lines checked: %12d\n' %parser.lines_checked)
+ sys.stderr.write('Files with SPDX: %12d\n' %parser.spdx_valid)
+ sys.stderr.write('Files with errors: %12d\n' %parser.spdx_errors)
+
+ sys.exit(0)
+
+ except Exception as ex:
+ sys.stderr.write('FAIL: %s\n' %ex)
+ sys.stderr.write('%s\n' %traceback.format_exc())
+ sys.exit(1)
diff --git a/test/bloblist.c b/test/bloblist.c
index 4104e6a..b48be38 100644
--- a/test/bloblist.c
+++ b/test/bloblist.c
@@ -14,7 +14,7 @@
DECLARE_GLOBAL_DATA_PTR;
-/* Declare a new compression test */
+/* Declare a new bloblist test */
#define BLOBLIST_TEST(_name, _flags) \
UNIT_TEST(_name, _flags, bloblist_test)
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
index 2edab7be..6f00258 100644
--- a/test/dm/acpi.c
+++ b/test/dm/acpi.c
@@ -11,6 +11,7 @@
#include <dm.h>
#include <malloc.h>
#include <mapmem.h>
+#include <timestamp.h>
#include <version.h>
#include <tables_csum.h>
#include <version.h>
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
index ed12caf..d7e596ee 100644
--- a/test/dm/cpu.c
+++ b/test/dm/cpu.c
@@ -27,7 +27,7 @@
uclass_find_next_device(&dev))
ut_assert(dev_get_flags(dev) & DM_FLAG_ACTIVATED);
- ut_assertok(uclass_get_device_by_name(UCLASS_CPU, "cpu-test1", &dev));
+ ut_assertok(uclass_get_device_by_name(UCLASS_CPU, "cpu@1", &dev));
ut_asserteq_ptr(cpu_get_current_dev(), dev);
ut_asserteq(cpu_is_current(dev), 1);
diff --git a/test/dm/of_platdata.c b/test/dm/of_platdata.c
index 0463cf0..ec41087 100644
--- a/test/dm/of_platdata.c
+++ b/test/dm/of_platdata.c
@@ -1,11 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
+#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
+#include <irq.h>
#include <dm/test.h>
#include <test/test.h>
#include <test/ut.h>
+#include <asm-generic/gpio.h>
#include <asm/global_data.h>
/* Test that we can find a device using of-platdata */
@@ -27,11 +30,9 @@
struct udevice *dev;
int i;
- /* Skip the clock */
- ut_assertok(uclass_first_device_err(UCLASS_MISC, &dev));
- ut_asserteq_str("sandbox_clk_test", dev->name);
+ ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "sandbox_spl_test",
+ &dev));
- ut_assertok(uclass_next_device_err(&dev));
plat = dev_get_plat(dev);
ut_assert(plat->boolval);
ut_asserteq(1, plat->intval);
@@ -222,3 +223,59 @@
}
DM_TEST(dm_test_of_plat_parent, UT_TESTF_SCAN_PDATA);
#endif
+
+/* Test clocks with of-platdata */
+static int dm_test_of_plat_clk(struct unit_test_state *uts)
+{
+ struct dtd_sandbox_clk_test *plat;
+ struct udevice *dev;
+ struct clk clk;
+
+ ut_assertok(uclass_first_device_err(UCLASS_MISC, &dev));
+ ut_asserteq_str("sandbox_clk_test", dev->name);
+ plat = dev_get_plat(dev);
+
+ ut_assertok(clk_get_by_phandle(dev, &plat->clocks[0], &clk));
+ ut_asserteq_str("sandbox_fixed_clock", clk.dev->name);
+
+ return 0;
+}
+DM_TEST(dm_test_of_plat_clk, UT_TESTF_SCAN_PDATA);
+
+/* Test irqs with of-platdata */
+static int dm_test_of_plat_irq(struct unit_test_state *uts)
+{
+ struct dtd_sandbox_irq_test *plat;
+ struct udevice *dev;
+ struct irq irq;
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "sandbox_irq_test",
+ &dev));
+ plat = dev_get_plat(dev);
+
+ ut_assertok(irq_get_by_phandle(dev, &plat->interrupts_extended[0],
+ &irq));
+ ut_asserteq_str("sandbox_irq", irq.dev->name);
+
+ return 0;
+}
+DM_TEST(dm_test_of_plat_irq, UT_TESTF_SCAN_PDATA);
+
+/* Test GPIOs with of-platdata */
+static int dm_test_of_plat_gpio(struct unit_test_state *uts)
+{
+ struct dtd_sandbox_gpio_test *plat;
+ struct udevice *dev;
+ struct gpio_desc desc;
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "sandbox_gpio_test",
+ &dev));
+ plat = dev_get_plat(dev);
+
+ ut_assertok(gpio_request_by_phandle(dev, &plat->test_gpios[0], &desc,
+ GPIOD_IS_OUT));
+ ut_asserteq_str("sandbox_gpio", desc.dev->name);
+
+ return 0;
+}
+DM_TEST(dm_test_of_plat_gpio, UT_TESTF_SCAN_PDATA);
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 44e51de..49efabe 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -318,3 +318,18 @@
return 0;
}
DM_TEST(dm_test_ofnode_get_path, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+static int dm_test_ofnode_conf(struct unit_test_state *uts)
+{
+ ut_assert(!ofnode_conf_read_bool("missing"));
+ ut_assert(ofnode_conf_read_bool("testing-bool"));
+
+ ut_asserteq(123, ofnode_conf_read_int("testing-int", 0));
+ ut_asserteq(6, ofnode_conf_read_int("missing", 6));
+
+ ut_assertnull(ofnode_conf_read_str("missing"));
+ ut_asserteq_str("testing", ofnode_conf_read_str("testing-str"));
+
+ return 0;
+}
+DM_TEST(dm_test_ofnode_conf, 0);
diff --git a/test/dm/timer.c b/test/dm/timer.c
index 70043b9..9f94d47 100644
--- a/test/dm/timer.c
+++ b/test/dm/timer.c
@@ -33,16 +33,16 @@
{
struct udevice *dev;
- cpu_sandbox_set_current("cpu-test1");
+ cpu_sandbox_set_current("cpu@1");
ut_assertok(uclass_get_device_by_name(UCLASS_TIMER, "timer@1", &dev));
ut_asserteq(3000000, timer_get_rate(dev));
ut_assertok(device_remove(dev, DM_REMOVE_NORMAL));
- cpu_sandbox_set_current("cpu-test2");
+ cpu_sandbox_set_current("cpu@2");
ut_assertok(uclass_get_device_by_name(UCLASS_TIMER, "timer@1", &dev));
ut_asserteq(2000000, timer_get_rate(dev));
- cpu_sandbox_set_current("cpu-test1");
+ cpu_sandbox_set_current("cpu@1");
return 0;
}
diff --git a/test/dm/wdt.c b/test/dm/wdt.c
index 24b991d..ee615f0 100644
--- a/test/dm/wdt.c
+++ b/test/dm/wdt.c
@@ -6,11 +6,14 @@
#include <common.h>
#include <dm.h>
#include <wdt.h>
+#include <asm/gpio.h>
#include <asm/state.h>
#include <asm/test.h>
#include <dm/test.h>
#include <test/test.h>
#include <test/ut.h>
+#include <linux/delay.h>
+#include <watchdog.h>
/* Test that watchdog driver functions are called */
static int dm_test_wdt_base(struct unit_test_state *uts)
@@ -19,7 +22,8 @@
struct udevice *dev;
const u64 timeout = 42;
- ut_assertok(uclass_get_device(UCLASS_WDT, 0, &dev));
+ ut_assertok(uclass_get_device_by_driver(UCLASS_WDT,
+ DM_DRIVER_GET(wdt_sandbox), &dev));
ut_assertnonnull(dev);
ut_asserteq(0, state->wdt.counter);
ut_asserteq(false, state->wdt.running);
@@ -39,3 +43,87 @@
return 0;
}
DM_TEST(dm_test_wdt_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+static int dm_test_wdt_gpio(struct unit_test_state *uts)
+{
+ /*
+ * The sandbox wdt gpio is "connected" to gpio bank a, offset
+ * 7. Use the sandbox back door to verify that the gpio-wdt
+ * driver behaves as expected.
+ */
+ struct udevice *wdt, *gpio;
+ const u64 timeout = 42;
+ const int offset = 7;
+ int val;
+
+ ut_assertok(uclass_get_device_by_driver(UCLASS_WDT,
+ DM_DRIVER_GET(wdt_gpio), &wdt));
+ ut_assertnonnull(wdt);
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio));
+ ut_assertnonnull(gpio);
+ ut_assertok(wdt_start(wdt, timeout, 0));
+
+ val = sandbox_gpio_get_value(gpio, offset);
+ ut_assertok(wdt_reset(wdt));
+ ut_asserteq(!val, sandbox_gpio_get_value(gpio, offset));
+ ut_assertok(wdt_reset(wdt));
+ ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
+
+ ut_asserteq(-ENOSYS, wdt_stop(wdt));
+
+ return 0;
+}
+DM_TEST(dm_test_wdt_gpio, UT_TESTF_SCAN_FDT);
+
+static int dm_test_wdt_watchdog_reset(struct unit_test_state *uts)
+{
+ struct sandbox_state *state = state_get_current();
+ struct udevice *gpio_wdt, *sandbox_wdt;
+ struct udevice *gpio;
+ const u64 timeout = 42;
+ const int offset = 7;
+ uint reset_count;
+ int val;
+
+ ut_assertok(uclass_get_device_by_driver(UCLASS_WDT,
+ DM_DRIVER_GET(wdt_gpio), &gpio_wdt));
+ ut_assertnonnull(gpio_wdt);
+ ut_assertok(uclass_get_device_by_driver(UCLASS_WDT,
+ DM_DRIVER_GET(wdt_sandbox), &sandbox_wdt));
+ ut_assertnonnull(sandbox_wdt);
+ ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio));
+ ut_assertnonnull(gpio);
+
+ /* Neither device should be "started", so watchdog_reset() should be a no-op. */
+ reset_count = state->wdt.reset_count;
+ val = sandbox_gpio_get_value(gpio, offset);
+ watchdog_reset();
+ ut_asserteq(reset_count, state->wdt.reset_count);
+ ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
+
+ /* Start both devices. */
+ ut_assertok(wdt_start(gpio_wdt, timeout, 0));
+ ut_assertok(wdt_start(sandbox_wdt, timeout, 0));
+
+ /* Make sure both devices have just been pinged. */
+ timer_test_add_offset(100);
+ watchdog_reset();
+ reset_count = state->wdt.reset_count;
+ val = sandbox_gpio_get_value(gpio, offset);
+
+ /* The gpio watchdog should be pinged, the sandbox one not. */
+ timer_test_add_offset(30);
+ watchdog_reset();
+ ut_asserteq(reset_count, state->wdt.reset_count);
+ ut_asserteq(!val, sandbox_gpio_get_value(gpio, offset));
+
+ /* After another ~30ms, both devices should get pinged. */
+ timer_test_add_offset(30);
+ watchdog_reset();
+ ut_asserteq(reset_count + 1, state->wdt.reset_count);
+ ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
+
+ return 0;
+}
+DM_TEST(dm_test_wdt_watchdog_reset, UT_TESTF_SCAN_FDT);
diff --git a/test/print_ut.c b/test/print_ut.c
index e2bcfbe..11d8580 100644
--- a/test/print_ut.c
+++ b/test/print_ut.c
@@ -9,7 +9,7 @@
#include <display_options.h>
#include <log.h>
#include <mapmem.h>
-#include <version.h>
+#include <version_string.h>
#include <test/suites.h>
#include <test/test.h>
#include <test/ut.h>
diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py
index 1db5da4..384fd53 100644
--- a/test/py/u_boot_console_base.py
+++ b/test/py/u_boot_console_base.py
@@ -351,13 +351,13 @@
self.p.logfile_read = self.logstream
bcfg = self.config.buildconfig
config_spl = bcfg.get('config_spl', 'n') == 'y'
- config_spl_serial_support = bcfg.get('config_spl_serial_support',
+ config_spl_serial = bcfg.get('config_spl_serial',
'n') == 'y'
env_spl_skipped = self.config.env.get('env__spl_skipped',
False)
env_spl2_skipped = self.config.env.get('env__spl2_skipped',
True)
- if config_spl and config_spl_serial_support and not env_spl_skipped:
+ if config_spl and config_spl_serial and not env_spl_skipped:
m = self.p.expect([pattern_u_boot_spl_signon] +
self.bad_patterns)
if m != 0:
diff --git a/test/ut.c b/test/ut.c
index 1eec2a5..28da417 100644
--- a/test/ut.c
+++ b/test/ut.c
@@ -121,6 +121,32 @@
return 0;
}
+int ut_check_skip_to_line(struct unit_test_state *uts, const char *fmt, ...)
+{
+ va_list args;
+ int len;
+ int ret;
+
+ va_start(args, fmt);
+ len = vsnprintf(uts->expect_str, sizeof(uts->expect_str), fmt, args);
+ va_end(args);
+ if (len >= sizeof(uts->expect_str)) {
+ ut_fail(uts, __FILE__, __LINE__, __func__,
+ "unit_test_state->expect_str too small");
+ return -EOVERFLOW;
+ }
+ while (1) {
+ if (!console_record_avail())
+ return -ENOENT;
+ ret = readline_check(uts);
+ if (ret < 0)
+ return ret;
+
+ if (!strcmp(uts->expect_str, uts->actual_str))
+ return 0;
+ }
+}
+
int ut_check_console_end(struct unit_test_state *uts)
{
int ret;
diff --git a/tools/binman/control.py b/tools/binman/control.py
index dcba02f..0dbcbc2 100644
--- a/tools/binman/control.py
+++ b/tools/binman/control.py
@@ -565,12 +565,9 @@
global state
if args.full_help:
- pager = os.getenv('PAGER')
- if not pager:
- pager = 'more'
- fname = os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])),
- 'README.rst')
- command.Run(pager, fname)
+ tools.PrintFullHelp(
+ os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])), 'README.rst')
+ )
return 0
# Put these here so that we can import this module without libfdt
diff --git a/tools/buildman/README b/tools/buildman/README
index ec2d4e7..ce27788 100644
--- a/tools/buildman/README
+++ b/tools/buildman/README
@@ -1010,13 +1010,13 @@
...
43: Convert CONFIG_SPL_USBETH_SUPPORT to Kconfig
arm:
- + u-boot.cfg: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_NET_SUPPORT=1
- + u-boot-spl.cfg: CONFIG_SPL_MMC_SUPPORT=1 CONFIG_SPL_NAND_SUPPORT=1
- + all: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_MMC_SUPPORT=1 CONFIG_SPL_NAND_SUPPORT=1 CONFIG_SPL_NET_SUPPORT=1
+ + u-boot.cfg: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_NET=1
+ + u-boot-spl.cfg: CONFIG_SPL_MMC=1 CONFIG_SPL_NAND_SUPPORT=1
+ + all: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_MMC=1 CONFIG_SPL_NAND_SUPPORT=1 CONFIG_SPL_NET=1
am335x_evm_usbspl :
- + u-boot.cfg: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_NET_SUPPORT=1
- + u-boot-spl.cfg: CONFIG_SPL_MMC_SUPPORT=1 CONFIG_SPL_NAND_SUPPORT=1
- + all: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_MMC_SUPPORT=1 CONFIG_SPL_NAND_SUPPORT=1 CONFIG_SPL_NET_SUPPORT=1
+ + u-boot.cfg: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_NET=1
+ + u-boot-spl.cfg: CONFIG_SPL_MMC=1 CONFIG_SPL_NAND_SUPPORT=1
+ + all: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_MMC=1 CONFIG_SPL_NAND_SUPPORT=1 CONFIG_SPL_NET=1
44: Convert CONFIG_SPL_USB_HOST to Kconfig
...
diff --git a/tools/buildman/control.py b/tools/buildman/control.py
index a98d1b4..fd9664c 100644
--- a/tools/buildman/control.py
+++ b/tools/buildman/control.py
@@ -16,6 +16,7 @@
from patman import gitutil
from patman import patchstream
from patman import terminal
+from patman import tools
from patman.terminal import Print
def GetPlural(count):
@@ -133,12 +134,9 @@
global builder
if options.full_help:
- pager = os.getenv('PAGER')
- if not pager:
- pager = 'more'
- fname = os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])),
- 'README')
- command.Run(pager, fname)
+ tools.PrintFullHelp(
+ os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])), 'README')
+ )
return 0
gitutil.Setup()
diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile
index 0195456..92113dc 100644
--- a/tools/docker/Dockerfile
+++ b/tools/docker/Dockerfile
@@ -2,7 +2,7 @@
# This Dockerfile is used to build an image containing basic stuff to be used
# to build U-Boot and run our test suites.
-FROM ubuntu:focal-20210723
+FROM ubuntu:focal-20210827
MAINTAINER Tom Rini <trini@konsulko.com>
LABEL Description=" This image is for building U-Boot inside a container"
@@ -60,6 +60,7 @@
iasl \
imagemagick \
iputils-ping \
+ libconfuse-dev \
libgit2-dev \
libguestfs-tools \
liblz4-tool \
@@ -76,6 +77,7 @@
mount \
mtd-utils \
mtools \
+ ninja-build \
openssl \
picocom \
parted \
@@ -166,11 +168,24 @@
RUN git clone git://git.qemu.org/qemu.git /tmp/qemu && \
cd /tmp/qemu && \
git submodule update --init dtc && \
- git checkout v4.2.0 && \
+ git checkout v6.1.0 && \
+ # config user.name and user.email to make 'git am' happy
+ git config user.name u-boot && \
+ git config user.email u-boot@denx.de && \
+ # manually apply the bug fix for QEMU 6.1.0 Xilinx Zynq UART emulation codes
+ wget -O - http://patchwork.ozlabs.org/project/qemu-devel/patch/20210823020813.25192-2-bmeng.cn@gmail.com/mbox/ | git am && \
./configure --prefix=/opt/qemu --target-list="aarch64-softmmu,arm-softmmu,i386-softmmu,mips-softmmu,mips64-softmmu,mips64el-softmmu,mipsel-softmmu,ppc-softmmu,riscv32-softmmu,riscv64-softmmu,sh4-softmmu,x86_64-softmmu,xtensa-softmmu" && \
make -j$(nproc) all install && \
rm -rf /tmp/qemu
+# Build genimage (required by some targets to generate disk images)
+RUN wget -O - https://github.com/pengutronix/genimage/releases/download/v14/genimage-14.tar.xz | tar -C /tmp -xJ && \
+ cd /tmp/genimage-14 && \
+ ./configure && \
+ make -j$(nproc) && \
+ make install && \
+ rm -rf /tmp/genimage-14
+
# Create our user/group
RUN echo uboot ALL=NOPASSWD: ALL > /etc/sudoers.d/uboot
RUN useradd -m -U uboot
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 869c92b..3bb5c68 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -62,6 +62,7 @@
# a phandle property.
PHANDLE_PROPS = {
'clocks': '#clock-cells',
+ 'interrupts-extended': '#interrupt-cells',
'gpios': '#gpio-cells',
'sandbox,emul': '#emul-cells',
}
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 2a61a5d..e39c39e 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -951,21 +951,23 @@
DEVNAME(dev), strerror(errno));
return -1;
}
- if (rc != readlen) {
- fprintf(stderr,
- "Read error on %s: Attempted to read %zd bytes but got %d\n",
- DEVNAME(dev), readlen, rc);
- return -1;
- }
#ifdef DEBUG
fprintf(stderr, "Read 0x%x bytes at 0x%llx on %s\n",
rc, (unsigned long long)blockstart + block_seek,
DEVNAME(dev));
#endif
- processed += readlen;
- readlen = min(blocklen, count - processed);
- block_seek = 0;
- blockstart += blocklen;
+ processed += rc;
+ if (rc != readlen) {
+ fprintf(stderr,
+ "Warning on %s: Attempted to read %zd bytes but got %d\n",
+ DEVNAME(dev), readlen, rc);
+ readlen -= rc;
+ block_seek += rc;
+ } else {
+ blockstart += blocklen;
+ readlen = min(blocklen, count - processed);
+ block_seek = 0;
+ }
}
return processed;
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 302bfcf..fbe883c 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -732,6 +732,12 @@
exit (EXIT_FAILURE);
}
+ if (sbuf.st_size == 0) {
+ fprintf (stderr, "%s: Input file %s is empty, bailing out\n",
+ params.cmdname, datafile);
+ exit (EXIT_FAILURE);
+ }
+
ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, dfd, 0);
if (ptr == MAP_FAILED) {
fprintf (stderr, "%s: Can't read %s: %s\n",
diff --git a/tools/patman/main.py b/tools/patman/main.py
index 04e37a5..e5be28e 100755
--- a/tools/patman/main.py
+++ b/tools/patman/main.py
@@ -28,6 +28,7 @@
from patman import terminal
from patman import test_util
from patman import test_checkpatch
+from patman import tools
epilog = '''Create patches from commits in a branch, check them and email them
as specified by tags you place in the commits. Use -n to do a dry run first.'''
@@ -170,14 +171,9 @@
fd.close()
elif args.full_help:
- pager = os.getenv('PAGER')
- if not pager:
- pager = shutil.which('less')
- if not pager:
- pager = 'more'
- fname = os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])),
- 'README')
- command.Run(pager, fname)
+ tools.PrintFullHelp(
+ os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])), 'README')
+ )
else:
# If we are not processing tags, no need to warning about bad ones
diff --git a/tools/patman/tools.py b/tools/patman/tools.py
index 877e37c..710f1fd 100644
--- a/tools/patman/tools.py
+++ b/tools/patman/tools.py
@@ -5,6 +5,7 @@
import glob
import os
+import shlex
import shutil
import struct
import sys
@@ -581,3 +582,17 @@
hex value of size, or 'None' if the value is None
"""
return 'None' if val is None else '%#x' % len(val)
+
+def PrintFullHelp(fname):
+ """Print the full help message for a tool using an appropriate pager.
+
+ Args:
+ fname: Path to a file containing the full help message
+ """
+ pager = shlex.split(os.getenv('PAGER', ''))
+ if not pager:
+ lesspath = shutil.which('less')
+ pager = [lesspath] if lesspath else None
+ if not pager:
+ pager = ['more']
+ command.Run(*pager, fname)