ddr: imx93: update the ddr init to support mult setpoints
Update the DDR init flow for multi-setpoint support on i.MX93. A new
fsp_cfg struct need to be added in the timing file to store the diff
part of the DDRC and DRAM MR register for each setpoint.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c
index e9e0294..8cd4387 100644
--- a/drivers/ddr/imx/phy/helper.c
+++ b/drivers/ddr/imx/phy/helper.c
@@ -167,8 +167,7 @@
dwc_ddrphy_apb_wr(0xd0000, 0x1);
}
-void dram_config_save(struct dram_timing_info *timing_info,
- unsigned long saved_timing_base)
+void *dram_config_save(struct dram_timing_info *timing_info, unsigned long saved_timing_base)
{
int i = 0;
struct dram_timing_info *saved_timing = (struct dram_timing_info *)saved_timing_base;
@@ -217,4 +216,6 @@
cfg->val = timing_info->ddrphy_pie[i].val;
cfg++;
}
+
+ return (void *)cfg;
}