S5P:SROM config code moved to s5p-common directory
SROM config code is made common for S5P series of boards.
smdkc100.c now refers to s5p-common/sromc.c for SROM related
subroutines.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile
index ce0a41e..1705399 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -27,7 +27,8 @@
COBJS-y += cpu_info.o
COBJS-y += timer.o
-COBJS-$(CONFIG_PWM) += pwm.o
+COBJS-y += sromc.o
+COBJS-$(CONFIG_PWM) += pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5pc1xx/sromc.c b/arch/arm/cpu/armv7/s5p-common/sromc.c
similarity index 68%
rename from arch/arm/cpu/armv7/s5pc1xx/sromc.c
rename to arch/arm/cpu/armv7/s5p-common/sromc.c
index 044d122..091e8d1 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/sromc.c
+++ b/arch/arm/cpu/armv7/s5p-common/sromc.c
@@ -23,27 +23,27 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/smc.h>
+#include <asm/arch/sromc.h>
/*
- * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the
- * band width control and bank control registers
- * srom_bank - SROM Bank 0 to 5
- * smc_bw_conf - SMC Band witdh reg configuration value
- * smc_bc_conf - SMC Bank Control reg configuration value
+ * s5p_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM
+ * srom_bw_conf - SMC Band witdh reg configuration value
+ * srom_bc_conf - SMC Bank Control reg configuration value
*/
-void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
+void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)
{
u32 tmp;
- struct s5pc1xx_smc *srom =
- (struct s5pc1xx_smc *)samsung_get_base_sromc();
+ struct s5p_sromc *srom =
+ (struct s5p_sromc *)samsung_get_base_sromc();
/* Configure SMC_BW register to handle proper SROMC bank */
tmp = srom->bw;
tmp &= ~(0xF << (srom_bank * 4));
- tmp |= smc_bw_conf;
+ tmp |= srom_bw_conf;
srom->bw = tmp;
/* Configure SMC_BC register */
- srom->bc[srom_bank] = smc_bc_conf;
+ srom->bc[srom_bank] = srom_bc_conf;
}
diff --git a/arch/arm/cpu/armv7/s5pc1xx/Makefile b/arch/arm/cpu/armv7/s5pc1xx/Makefile
index b182bf5..d66314e 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/Makefile
+++ b/arch/arm/cpu/armv7/s5pc1xx/Makefile
@@ -32,7 +32,6 @@
SOBJS += reset.o
COBJS += clock.o
-COBJS += sromc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))