| commit | 9b9a75a76e832070db30af6356213018a788610a | [log] [tgz] |
|---|---|---|
| author | Stephen Warren <swarren@nvidia.com> | Tue Feb 24 14:08:27 2015 -0700 |
| committer | Tom Warren <twarren@nvidia.com> | Wed Mar 04 10:09:00 2015 -0700 |
| tree | 83a0c0ba0d23cb01a7bfa72bb9c9b6b8cb3dc94b | |
| parent | 899a5cbf0e28082fb427054ab3450ba0ba8749cd [diff] |
ARM: tegra: pinmux: partially handle varying register layouts Tegra210 moves some bits around in the pinmux registers. Update the code to handle this. This doesn't attempt to address the issues with the group-to-group varying drive group register layout mentioned earlier. This patch handles the SoC-to-SoC differences in the mux register layout. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>