diff --git a/board/spear/x600/x600.c b/board/spear/x600/x600.c
index 044d204..b8edfcd 100644
--- a/board/spear/x600/x600.c
+++ b/board/spear/x600/x600.c
@@ -67,31 +67,32 @@
 		fsmc_nand_init(nand);
 }
 
-int designware_board_phy_init(struct eth_device *dev, int phy_addr,
-	int (*mii_write)(struct eth_device *, u8, u8, u16),
-	int dw_reset_phy(struct eth_device *))
+int board_phy_config(struct phy_device *phydev)
 {
 	/* Extended PHY control 1, select GMII */
-	mii_write(dev, phy_addr, 23, 0x0020);
+	phy_write(phydev, MDIO_DEVAD_NONE, 23, 0x0020);
 
 	/* Software reset necessary after GMII mode selction */
-	dw_reset_phy(dev);
+	phy_reset(phydev);
 
 	/* Enable extended page register access */
-	mii_write(dev, phy_addr, 31, 0x0001);
+	phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0001);
 
 	/* 17e: Enhanced LED behavior, needs to be written twice */
-	mii_write(dev, phy_addr, 17, 0x09ff);
-	mii_write(dev, phy_addr, 17, 0x09ff);
+	phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff);
+	phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff);
 
 	/* 16e: Enhanced LED method select */
-	mii_write(dev, phy_addr, 16, 0xe0ea);
+	phy_write(phydev, MDIO_DEVAD_NONE, 16, 0xe0ea);
 
 	/* Disable extended page register access */
-	mii_write(dev, phy_addr, 31, 0x0000);
+	phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0000);
 
 	/* Enable clock output pin */
-	mii_write(dev, phy_addr, 18, 0x0049);
+	phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x0049);
+
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
 
 	return 0;
 }
@@ -100,7 +101,7 @@
 {
 	int ret = 0;
 
-	if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_PHY_ADDR,
+	if (designware_initialize(CONFIG_SPEAR_ETHBASE,
 				  PHY_INTERFACE_MODE_GMII) >= 0)
 		ret++;