commit 988152c606cdad26cb96162bcccbc4b035129a17
author Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Wed Mar 21 15:58:47 2018 +0300
committer Alexey Brodkin <abrodkin@synopsys.com> Wed Mar 21 17:06:37 2018 +0300
tree 64bb622169e2ec562448864fedf24190a5e8032f
parent ad8aef30995e16195bafd0a84eef4a7a48491e50

ARC: Cache: Remove per-line I$ operations as unused

__cache_line_loop() function was copied from Linux kernel
where per-line instruction cache operations are really used.

In U-Boot we use only entire I$ ops, so we can drop support of
per-line I$ ops from __cache_line_loop() because __cache_line_loop()
is never called with OP_INV_IC parameter.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

arch/arc/lib/cache.c

diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index 26f0a1f..2252542 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -23,7 +23,6 @@
 
 #define OP_INV		0x1
 #define OP_FLUSH	0x2
-#define OP_INV_IC	0x3
 
 /* Bit val in SLC_CONTROL */
 #define SLC_CTRL_DIS		0x001
@@ -373,30 +372,15 @@
 }
 
 #ifndef CONFIG_SYS_DCACHE_OFF
-/*
- * Common Helper for Line Operations on {I,D}-Cache
- */
-static inline void __cache_line_loop(unsigned long paddr, unsigned long sz,
-				     const int cacheop)
+/* Common Helper for Line Operations on D-cache */
+static inline void __dcache_line_loop(unsigned long paddr, unsigned long sz,
+				      const int cacheop)
 {
 	unsigned int aux_cmd;
-#if (CONFIG_ARC_MMU_VER == 3)
-	unsigned int aux_tag;
-#endif
 	int num_lines;
 
-	if (cacheop == OP_INV_IC) {
-		aux_cmd = ARC_AUX_IC_IVIL;
-#if (CONFIG_ARC_MMU_VER == 3)
-		aux_tag = ARC_AUX_IC_PTAG;
-#endif
-	} else {
-		/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
-		aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
-#if (CONFIG_ARC_MMU_VER == 3)
-		aux_tag = ARC_AUX_DC_PTAG;
-#endif
-	}
+	/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
+	aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
 
 	sz += paddr & ~CACHE_LINE_MASK;
 	paddr &= CACHE_LINE_MASK;
@@ -405,7 +389,7 @@
 
 	while (num_lines-- > 0) {
 #if (CONFIG_ARC_MMU_VER == 3)
-		write_aux_reg(aux_tag, paddr);
+		write_aux_reg(ARC_AUX_DC_PTAG, paddr);
 #endif
 		write_aux_reg(aux_cmd, paddr);
 		paddr += l1_line_sz;
@@ -458,7 +442,7 @@
 {
 	unsigned int ctrl_reg = __before_dc_op(cacheop);
 
-	__cache_line_loop(paddr, sz, cacheop);
+	__dcache_line_loop(paddr, sz, cacheop);
 	__after_dc_op(cacheop, ctrl_reg);
 }
 #else